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Abstract—For photovoltaic applications, the interleaved fly- iprim,pk Peak current through transformer primary wind-
back module-integrated converters (MICs) (IFMICs) operating ing within one switching period in discontinuous
in continuous conduction mode (CCM) show the advantages of conduction mode (DCM).
high power density, low voltage and current stresses, and low
electromagnetic interference but demonstrate a difficult control ioutput Average diode current.
problem compared to the discontinuous conduction mode. This IPV Photovoltaic (PV) current.
paper concentrates on the control issues and presents detailed KI Controller integral term.
modeling, in-depth dynamic analysis, and a two-step controller Kp Controller proportional term.
design approach for IFMIC systems operating in CCM. The Lf Output filter inductor.
proposed modeling approach is based on the fourth-order system
considering the dynamics of the output CL filter. This realistic Lm Magnetizing inductance.
fourth-order system modeling shows the presence of a resonant n or n2 /n1 Transformer secondary-to-primary turns ratio.
peak at a certain frequency, which can cause phase loss and Pavg Average power injected into the grid.
constraints of system bandwidth. A decoupled two-step controller RCf Filter capacitor equivalent series resistance
design approach is thus proposed to simplify the modeling and (ESR).
control synthesis in the IFMIC development. The decoupled con-
troller consists of a proportional–integral controller (based on Rf Inductor ESR.
the simplified model), followed by a lag term for mitigating the Rpv Dynamic PV resistance.
effect of the resonant peak. A 200-W digitally controlled MIC Tsw Switching period.
prototype is constructed for evaluation purposes. The simulation vCf Filter capacitor voltage.
and experimental results verify the effectiveness of the proposed vCpv Voltage across input capacitor.
modeling and control approaches.
Vg Grid voltage.
Index Terms—Digital control, modeling, module-integrated Vg,rms RMS grid voltage.
converter (MIC), photovoltaic (PV) power systems, single-phase Vg,th Threshold grid voltage below which DCM
grid-connected inverters.
occurs.
Vinv Voltage at pseudo-dc link.
N OMENCLATURE
Vpv PV voltage.
Cf Output filter capacitor. τ Controller lag term time constant.
Cpv Input capacitor. ω Grid pulsatance.
D Main MOSFET duty cycle.
D1 D1 = 1 − D.
I. I NTRODUCTION
dp Peak duty cycle.
fsw
idiode
iLf
Switching frequency of main flyback switch.
Diode current.
Grid-injected or output current.
M ODULE-INTEGRATED converters (MICs), the so-
called ac modules, or microinverters, are considered to
be the trend of future PV power systems and have drawn signif-
iLm Current through magnetizing inductance. icant research interest recently [1]–[3]. The module–converter
iprim Current through transformer primary winding. integration provides a parallel configuration and independent
operation of each PV panel. The individual maximum power
point tracking (MPPT) algorithm allows local optimization and
reduces power losses that result from PV module mismatch and
partial shading [4]–[6]. Furthermore, the parallel structure of
MIC prevents the single point failure, offers “plug and play”
Manuscript received November 18, 2012; revised January 16, 2013 and features, and increases the generation stability [1]. Modeling
February 20, 2013; accepted March 29, 2013. Date of publication April 16,
2013; date of current version August 23, 2013. and analytical studies have predicted the energy yield improve-
The authors are with the Masdar Institute of Science and Technology, ment when the MIC topologies are widely applied to PV power
Abu Dhabi, UAE (e-mail: mwxiao@masdar.ac.ae). systems [7]. However, the research challenge of microinverters
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org. includes conversion efficiency, system cost, harmonic injection,
Digital Object Identifier 10.1109/TIE.2013.2258309 reliability, etc.
0278-0046 © 2013 IEEE
1378 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014
Statistics [8] show that inverter failures are the biggest cause
of lost productivity among other components in PV systems.
In [9], the double-frequency decoupling capacitor is considered
the dominant component that limits the system lifetime. It pre-
dicts that replacing electrolytic capacitors with film capacitors
can prolong the life expectancy of MIC systems. Therefore,
an improved circuit topology has been proposed in [10] and
[11] to minimize the decoupling capacitance and expect high
power density and long life time. Research also focuses on
developing new topologies to improve conversion efficiency
[12]–[17]. Others aim at the objectives of reducing total har-
monic distortion (THD) and/or improving power factor. The
MIC topology review and comparison have been conducted in Fig. 1. IFMIC with current unfolding.
[1], [2], [18], and [19]. The study in [1] summarizes power
rating, component count, efficiency, and printed circuit board Section II briefly introduces the background about operating
size of different inverter topologies. In the conclusion, the IFMIC in DCM and CCM. The modeling approach is based
pseudo-dc-link inverters are considered to be among the best. on the averaged state-space modeling technique and presented
A comprehensive comparison of MIC topologies is reported in in Section III. It focuses on the second order at the beginning
[19], including power rating, component count, switching fre- and then migrates to the fourth-order analysis considering
quency, soft-switching capability, and efficiency. It emphasizes the output CL filter. The small-signal ac model shows the
that the flyback MIC (FMIC) topology with current unfolding unique system dynamics and control challenges that need to
shows low component count and potential for high efficiency be considered for the closed-loop design. More particularly,
and reliability. the system shows a resonant peak which can severely reduce
The topology of FMIC has drawn significant research atten- the phase margin, limiting the system bandwidth and severely
tion in recent years [20]–[27]. Modified topologies have been degrading performance. The modeling analysis is followed by
proposed to minimize the decoupling capacitance in FMIC a decoupled two-step controller design approach. In the first
[10], [11]. Among the studies undertaken thus far on FMIC, step, a proportional–integral (PI) controller is designed based
one group focuses on the operation in DCM [24]–[26], [28], on the second-order model, and then, a lag term is appended
[29], and another concentrates on the continuous conduction to mitigate the side effect of the resonant peak. Section IV
mode (CCM) [20], [22]. In DCM, if the output filter and illustrates the simulation and experimental results to verify the
nonideal factor are neglected, the output-current-to-duty-cycle modeling and control approach.
transfer function is a constant gain, as reported in [22] and
[26]. Therefore, the current control loop is a straightforward
II. T HEORETICAL BACKGROUND
approach and shows little design complexity. The study in [22]
stated that the CCM demonstrates the advantages of higher The schematics of the IFMIC topology are shown in Fig. 1,
power density, lower voltage and current stresses on power where the PV current is drawn from the PV panel and modu-
switches, and lower electromagnetic interference (EMI) when lated to a full-wave-rectified sinusoidal waveform by switching
compared to the DCM mode of operation. The appearance of Q1 and Q2 at high frequency. The voltage waveform of the
a notch around the resonant frequency that is caused by the pseudo-dc link is also full-wave-rectified sinusoidal. The gate
presence of the CL filter is also reported in [22]; however, no signals for Q1 and Q2 are given in an interleaved manner
further investigation is conducted for its mitigation. The system shifted at 180◦ , and each half shares the load equally. The
design is based on a second-order system for modeling and SCR H-bridge comprising Q3–Q6 forms a current-unfolding
control purposes, which does not provide the exact behavior circuit for injecting sinusoidal ac current into the grid. The
of the overall system. This paper shows that the FMIC system low-cost and reliable SCRs are ideal for this application since
demonstrates a fourth-order dynamic and a resonant peak at the unfolding bridge is switched at the grid voltage and grid
a particular frequency, which causes phase loss and limits the frequency. To follow the polarity of the grid voltage waveform,
system bandwidth. Since the resonant peak cannot be observed Q4 and Q5 conduct during the positive half cycle, while Q3 and
by the simplified second-order modeling, this study focuses on Q6 conduct for the negative half cycle. A CL filter is applied
the high-order representation and control solution to minimize at the point of common coupling for attenuating harmonic
the impact of the resonance. injection to the grid.
This paper focuses on the control issue and presents mod- The current-unfolding IFMIC can operate in either DCM or
eling, controller design, simulation, and experimentation for CCM. In DCM, the transformer magnetizing current falls to
investigating the interleaved FMIC (IFMIC) operating in CCM. zero in each switching cycle and demagnetizes the transformer
Compared to the FMIC, the IFMIC shows the following ad- completely, as shown in Fig. 2. The sum of the switch-on
vantages: 1) Each converter unit in the IFMIC shares the time Ton and the falling time Tf is less than the switching
load equally; 2) the interleaving operation reduces the input period Tsw . The main switch is controlled such that the peak
voltage ripple at switching frequency and the pseudo-dc-link magnetizing inductance current is contained within a rectified
voltage ripple; and 3) the current sharing reduces the EMI. sinusoidal current envelope. Following the derivations in [21]
EDWIN et al.: DYNAMIC MODELING AND CONTROL OF IFMIC FOR PV POWER APPLICATIONS 1379
⎧
dvCpv
⎪
⎪ − Rpv1Cpv 0 vCpv
⎪
⎪
dt
diLm =
⎪
⎪
1
0 0 iLm
⎨ dt
0 Vpv
+ Rpv Cpv (7)
⎪
⎪ 0
−nL1m Vg
⎪
⎪
⎪
⎪ v
⎩ y = idiode = [ 0 n ]
1 Cpv
iLm
⎧
dvCpv
⎪ − Rpv Cpv − CDpv
1
vCpv
⎪
⎪ dt =
⎪
⎪ diLm D
0 i Fig. 5. Pole-zero map for four operating points (second-order model).
⎪
⎨ dt
Lm1
Lm
0 Vpv
+ Rpv Cpv (8) TABLE I
⎪
⎪ 0
− nLm D1 Vg P OLE -Z ERO L OCATIONS FOR F OUR D IFFERENT O PERATING P OINTS
⎪
⎪
⎪
⎪
⎩ y = ioutput = [ 0 D1 ] vCpv .
n iLm
Vg Vg
s Rpv Cpv Dn1 VCpv + n + D1
n VCpv + n − DILm Rpv ILm
Gidiode ,d (s) = − (9)
s2 [Rpv Cpv Lm ] + sLm + D2 Rpv n
EDWIN et al.: DYNAMIC MODELING AND CONTROL OF IFMIC FOR PV POWER APPLICATIONS 1381
⎧⎡ ⎤ ⎡ ⎤ ⎡ RCf ⎤
−D1 nL1m ⎡ î ⎤
R R VCpv ILf RCf VCf
⎪ −D1 n2Cf n2 Lm ILm + Lm − nLm +
D
⎪
dîLm D1 nLCfm
⎪ dv̂
⎪ dt ⎢
Lm Lm
⎥ Lm ⎢
nLm
⎥
⎪ ⎢ Cpv ⎥ − CDpv − Rpv1Cpv − ICLm
⎪⎢ dt ⎥ ⎢
⎪
⎪ ⎢
0 0 ⎥⎢ v̂Cpv ⎥ ⎢
⎥⎢ ⎥+⎢
⎥
⎥ dˆ
⎪
⎪ ⎢ ⎥= ⎢ ⎥⎣ îLf ⎦ ⎢ R
pv
⎥
⎪⎣
⎪
d îLf ⎦ ⎣ D1 nL RCf
0 −
(RCf +Rf ) 1
⎦ ⎣ − Cf
nLf ILm ⎦
⎨ dt f Lf Lf
dv̂Cf
D 1
0 − 1
0 v̂ Cf − ILm
1 nC ⎡ ⎤ C nCf (14)
⎪
⎪
dt f f
⎪
⎪ îLm
⎪
⎪ ⎢ v̂Cpv ⎥
⎪
⎪
⎪
⎪ y = [0 0 1 0]⎢ ⎣ îLf ⎦
⎥
⎪
⎪
⎩
v̂Cf
îLf (s) ps3 + As2 + Bs + C
= 4 (15)
ˆ
d(s) s + Es3 + F s2 + Hs + M
EDWIN et al.: DYNAMIC MODELING AND CONTROL OF IFMIC FOR PV POWER APPLICATIONS 1383
TABLE III
P OLE -Z ERO L OCATIONS FOR F OUR D IFFERENT O PERATING P OINTS
Fig. 21. Comparison of simulation and experimental results for one operating
point.
A. Transient Verification
In order to evaluate the transient response and verify the
control analysis, a dc source is used to mimic the grid-tied
operation since the ac voltage can be assumed to be a succession
of slowly varying dc voltage levels, as explained in Section II.
The dc voltage can be assigned to different levels to emulate the
various operating points and verify the theoretical derivation
according to the slow moving ac voltage. Fig. 21 shows the
transient response of the closed-loop system for the operating
point, which is equivalent to an input voltage of 10 V, a dc
Fig. 20. Z-domain bode plot of compensated system. output voltage of 50 V, and a current reference of 330 mA. The
simulation result shows similar characteristics of the practical
measurements in terms of damping and response speed. The
addition, the traditional lag compensator with a zero and a waveform is shifted slightly for distinguishable comparison.
pole can also be selected to mitigate the resonant peak. The Both illustrate significant oscillation at the transient period. The
decoupled two-step controller design approach is a systematic measured 32-kHz oscillation frequency matches the resonant
way and shows the advantage of simplicity and flexibility in frequency, which is indicated in the bode diagram in Fig. 18.
controller parameterization. Furthermore, a step change is implemented on the ac output
current reference, as shown in Fig. 22. The simulation and
experimental results follow the same reference change from
IV. E XPERIMENTAL E VALUATION 0.6 to 1 A.
The IFMIC prototype is developed for the evaluation pur-
pose. It is controlled by a dsPIC33FJ16GS502 digital signal B. AC Grid-Tied Evaluation
controller. Fig. 19 demonstrates the prototype photograph. The
controller is also implemented with other functions for pro- The prototype is then tested with an ac grid where an
tection, phase-locked loop, sine lookup table, etc. By using a autotransformer is the adjustable interface linked to the grid.
sampling frequency of 85 kHz and the Tustin transformation, Fig. 23 illustrates the measured waveforms of the grid voltage
the equivalent Z-domain transfer function for the controller (blue), the “folded” voltage at the inverter pseudo-dc link
becomes (cyan), and the injected grid current (pink). Fig. 24 shows
the experimental results at the rated 200-W power level. The
0.03458z 2 + 0.000191z − 0.03439 oscilloscope-captured signals include the PV voltage (cyan),
Cz = . (17)
z 2 − 1.619z + 0.619 PV current (pink), PV power (red), grid voltage (blue), and
injected grid current (green). The power source is a PV array
The Z-domain bode plot of the compensated system is shown simulator (Agilent E4350B).
in Fig. 20. The sampling time delay in the digital controller The IFMIC is tested in different power levels from 25% to
results in the phase margin is 8◦ lower than the analog analysis, 100% of the rated power. The measured current THD and effi-
which is shown in Fig. 18. ciency are demonstrated in Fig. 25(a) and (b), respectively. The
1386 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014
Fig. 22. Comparison of simulation and experimental results for iLf reference
change.
Fig. 25. Measured efficiency and THD at different measured power levels.
RCf ILm
p= − (18)
nLf
ILm n(ILm Lm RCf − Cpv D1 RCf Rpv VCpv ) + Cpv D1 ILf RCf 2
Rpv − Cpv D1 RCf Rpv VCf
A= − − (19)
nCf Lf Cpv Lf Lm Rpv n2
n(−Cf ILm RCf Rpv D2 − Cf D1 ILm RCf Rpv D − ILm Lm + Cf D1 RCf VCpv + Cpv D1 Rpv VCpv )
B =
Cf Cpv Lf Lm Rpv n2
Cf D1 RCf VCf + Cpv D1 Rpv VCf − Cf D1 ILf RCf 2
− Cpv D1 ILf RCf Rpv
+ (20)
Cpv Lf Lm Rpv n2
n(−D1 VCpv + D ILm Rpv + D1 DILm Rpv ) − D1 VCf + D1 ILf RCf
2
C =− (21)
Cf Cpv Lf Lm Rpv n2
RCf + Rf 1 D1 RCf
E = + + (22)
Lf Cpv Rpv Lm n2
D R
1 D2 (RCf + Rf ) Cpv1Rpv + L1m nCf 2 D12 D12 RCf
2
D1 RCf
F = + + + 2
− 2
+ (23)
C f Lf Cpv Lm Lf C f Lm n Lf Lm n Cpv Lm Rpv n2
(Lm + Cf D RCf Rpv + Cf D Rf Rpv )n + D1 Lf + Cf D1 RCf − Cf D1 RCf
2 2 2 2 2 2 2
H =
Cf Cpv Lf Lm Rpv n2
Cf D1 RCf Rf + Cpv D1 RCf Rpv − Cpv D12 RCf Rpv + Cpv D12 Rf Rpv
+ (24)
Cf Cpv Lf Lm Rpv n2
D2 Rf − D12 RCf + D1 RCf + D2 Rpv n2
M = 1 (25)
Cf Cpv Lf Lm Rpv n2
TABLE IV R EFERENCES
IFMIC C IRCUIT PARAMETERS
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May 30/Jun. 3, 2011, pp. 2598–2605. degrees from The University of British Columbia,
[21] A. C. Kyritsis, C. Tatakis, and N. P. Papanikolaou, “Optimum design of Vancouver, BC, Canada, in 2003 and 2007,
the current-source flyback inverter for decentralized grid-connected pho- respectively.
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293, Mar. 2008. with the Massachusetts Institute of Technology,
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application,” IEEE Trans. Power Electron., vol. 27, no. 3, pp. 1295–1303, reer, he was with MSR Innovations Inc., Vancouver,
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efficiency-oriented design methodology of flyback inverter for AC photo- Ambedkar Marathwada University, Aurangabad,
voltaic modules,” IEEE Trans. Power Electron., vol. 27, no. 7, pp. 3221– India, in 2000, the M.Tech. degree in electrical en-
3233, Jul. 2012. gineering from the Indian Institute of Technology,
[27] Y. H. Kim, Y. H. Ji, J. G. Kim, Y. C. Jung, and C. Y. Won, “A new control New Delhi, India, in 2002, and the Ph.D. degree in
strategy for improving weighted efficiency in photovoltaic AC module- electrical engineering from the École de Technologie
type interleaved flyback inverters,” IEEE Trans. Power Electron., vol. 28, Supérieure, Montréal, QC, Canada, in 2008.
no. 6, pp. 2688–2699, Jun. 2013. From December 2008 to March 2010, he was a
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the flyback inverter,” in Proc. 6th IEEE Conf. Ind. Electron. Appl., 2011, Ontario, London, ON, Canada. Since April 2010, he has been an Assistant
pp. 1803–1808. Professor with Masdar Institute of Science and Technology, Abu Dhabi, UAE.
[29] S. Zengin, F. Deveci, and M. Boztepe, “Decoupling capacitor selection in From April 2010 to December 2010, he was a Visiting Faculty Member at the
DCM flyback PV microinverters considering harmonic distortion,” IEEE Massachusetts Institute of Technology, Cambridge, MA, USA. His research
Trans. Power Electron., vol. 28, no. 2, pp. 816–825, Feb. 2013. interests include applications of power electronics in distribution systems
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