1 - Number System and Digital Logic

MMI (Number System & Digital Logic)-GMA Ehsan ur Rahman Page 1
Chapter 1

Number System and Digital Logic

It is very important to understand various number systems and their conversion
process to understand microprocessor or microcontroller based hardware and
software (computer system in short). In this chapter the fundamental of the
numbering and coding systems are presented. After that procedure to use
different numbering system for different mathematics are also described. Besides
the numbering system digital logic and basic functional module are also
presented as a review.

1.1 Number System

Based on the purpose of the numbering system can be of two types, one that is
used by human beings and the other are used by computers. Human are using
mainly 10-based numbering system which is popularly known as decimal
numbering system. Computer systems only use 2-based or binary number
system. Some other number systems are also used for convenience to represent
binary numbers which are the 16-base hexadecimal, 8-base octal and binary
coded decimal (bcd). ASCII is another number system used to present different
characters in binary number.

1.1.1 Decimal Number

In this number system 10 different symbols are used to represent any number.
These symbols are different in different language, in English these symbols are
shown is based on their weight

English symbols for decimal number system:

Symbol 0 1 2 3 4 5 6 7 8 9
Name Zero One Two Three Four Five Six Seven Eight Nine
Weight Null I II III IIII IIIII IIIII
I
IIIII
II
IIIII
III
IIIII
IIII

To count more than nine we repeat the above symbol and the number grows
form single digit to multiple digit. For multi-digit numbers the rightmost digit
changes with the increase of count keeping the left one fixed. Thus the second
right most digit increase when the right most digit ends to the last symbol 9.
Following example shows the use of the above ten symbol presenting decimal
numbers greater than nine-

Digit-1 1 1 1 1 1 1 1 1 1 1 2 2 2 2
Digit-2 0 1 2 3 4 5 6 7 8 9 0 1 2 3
Number 10 11 12 13 14 15 16 17 18 19 20 21 22 23
Digit-2 increase Digit-1 increase

In the decimal number system 0 alone can not represent any quantity, but it
increase the weight ten times (x10) every time it added in the right position, such
as 10 represent ten, 100 represents 10x10, which is called hundred.
Mathematically this increase of weight is represented as-

10
N
, where N is the number of 0 added in the right position.

Following table summarizes the weights of 0 addition-

N Weight
1 0 One
10 1 Ten
100 2 Hundred
1000 3 Thousand
10000 4 Ten thousand or Myriad
100000 5 Hundred Thousand or Lakh
1000000 6 Million
1000000000 9 Billion

So, the position of the symbol in a number carries different weight. Following
example shows the weight of the symbols in a number-

Symbol 3 4 5 6 7 8
Digit-number 1 2 3 4 5 6
Weight x10
5
x10
4
x10
3
x10
2
x10
1
x10
0

Value 300000 40000 5000 600 70 8

300000 + 40000 + 5000 + 600 + 70 + 8 = 345678

1.1.2 Binary Number

In binary number system only two symbols (0 and 1) are used to represent
any number. These two symbols indicate No and Yes or logic level low and
logic level High for digital computer system. Similar to the decimal system these
two symbols are repeated to represent numbers larger than one.

It is shown in the previous section that how easily we are using the decimal
number system. We will use the same rules for binary number system but using
only two symbols, which would be easier.

To represent number greater than one we need to repeat symbols and use more
than one digit-

Number Quantity Digit-1 Digit-2 Digit-3 Repeat of symbol
000 0 0 0 0
Digit-3
Digit-2
Digit-1
001 1 0 0 1
010 2 0 1 0
Digit-3
011 3 0 1 1
100 4 1 0 0
Digit-3
Digit-2
101 5 1 0 1
110 6 1 1 0
Digit-3
111 7 1 1 1

Position of 1 in a number gives it different weight, which is increased two times
(x2) every time. Mathematically it can be written as-

2
N-1
, where N is the number of digits in a number

Following table shows the weight of the digits in a binary number

Position 11 10 9 8 7 6 5 4 3 2 1
(N-1) 10 9 8 7 6 5 4 3 2 1 0
2
10
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0

Weight 1024 512 256 128 64 32 16 8 4 2 1

So, the number represented by the 8-digit binary number 11101010 can be find
out-

Symbol 1 1 1 0 1 0 1 0
Position 8 7 6 5 4 3 2 1
(N-1) 7 6 5 4 3 2 1 0
Weight x128 x64 x32 x16 x8 x4 x2 x1
Value 128 64 32 0 8 0 2 0

128 + 64 + 32 + 0 + 8 + 0 + 2 + 0 = 234

1.1.2 Hexadecimal Number

Hexadecimal number system also called hex number system in short. As it is a
16-based number system it requires 16 symbols to represent any number. This
number system uses 6 (thus it is called hex) more symbols with the 10 symbol
used in the decimal number system, which are A, B, C, D, E and F. This
numbering system is actually implemented to shorten the binary number
representation.

Symbol 0 1 2 3 4 5 6 7 8 9 A B C D E F
Weight 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

So, any number greater than 15 needs more than one digit to be represented.
Position of every digit from the right to left has higher weight of 16 times (x16),
i.e.,

16
(N-1)
, where N is the digit number.
Following table shows the weight of the digits of the hexadecimal number.

Position 4 3 2 1
(N-1) 3 2 1 0
16
3
16
2
16
1
16
0

Weight 4096 256 16 1

A 4-digit number ABCD represents 43981, which can be found as follows-

Symbol A B C D
Position 4 3 2 1
(N-1) 3 2 1 0
Weight x4096 x256 x16 x1
Value 40960 2816 192 13

40960 + 2816 + 192 + 13 = 43981.

1.1.3 Octal Number

Octal number use eight symbols 0 to 7 of the decimal number systems. It is also
used to represent binary number. To represent any number greater than 7 needs
more than one digit. Every digit from right to left has higher weight of 8 times
(x8). The 4-digit octal-number 4567 represents the decimal 2423. Following table
shows the conversion-

Symbol 4 5 6 7
Position 4 3 2 1
(N-1) 3 2 1 0
Weight x8
3
x8
2
x8
1
x8
0

Value 4x512=2048 5x64=320 6x8=48 7x1=7

2048 + 320 + 48 + 7 = 2423

1.1.4 Number system notation

For easy understanding subscript notations are used to describe the number
system used for the representation. Followings are the notation

Number System Notation Example
Decimal x10 or d 150
x10
or 150
d

Binary x2 or b 10010110
x2
or 10010110
b

Hexadecimal x16 or h 96
x16
or 96
h

Octal x8 or o 226
x8
or 226
o

1.1.5 Number system relationship and conversion

In the following table above four different number systems are presented to show
their relationship-

Bin Oct Dec Hex
0000 0 0 0
0001 1 1 1
0010 2 2 2
0011 3 3 3
0100 4 4 4
0101 5 5 5
0110 6 6 6
0111 7 7 7
1000 10 8 8
1001 11 9 9
1010 12 10 A
1011 13 11 B
1100 14 12 C
1101 15 13 D
1110 16 14 E
1111 17 15 F

Hex to decimal conversion: Convert the hexadecimal number 4B3 to decimal
number.

Solution:

Symbol 4 B 3
Decimal weight 4 11 3
Digit Position 3 2 1
(N-1) 2 1 0
Hex weight x16
2
x16
1
x16
0

Value 4x256=1024 11x16=176 3x1=3

1024 + 176 + 3 = 1203
Octal to decimal conversion: Convert 234 octal number to decimal.

Solution:

Symbol 2 3 4
Decimal weight 2 3 4
Digit Position 3 2 1
(N-1) 2 1 0
Hex weight x8
2
x8
1
x8
0

Value 2x64=128 3x8=24 4x1=4

128 + 24 + 4 = 156

Binary to decimal conversion: Convert 11011011 to decimal.

Solution:

Symbol 1 1 0 1 1 0 1 1
Position 8 7 6 5 4 3 2 1
(N-1) 7 6 5 4 3 2 1 0
Weight x128 x64 x32 x16 x8 x4 x2 x1
Value 128 64 0 16 8 0 2 1

128 + 64 + 0 + 16 + 8 + 0 + 2 + 1 = 219

Decimal to hexadecimal conversion: Convert the decimal number 3315 to
hexadecimal number.

Solution:

Decimal to binary conversion: Convert the decimal number 315 to binary
number.

Solution:

Decimal to octal conversion: Convert the decimal number 315 to octal number.

Quotient Remainder
315/2 = 157 1
157/2 = 78 1
78/2 = 39 0
39/2 = 19 1
19/2 = 9 1
9/2 = 4 1
4/2 = 2 0
2/2 = 1 0
1/2 = 0 1

315 = 100111011

Quotient Remainder Hexadecimal
3315/16 = 207 3 3
207/16 = 12 15 F
12/16 = 0 12 C (Stop when quotient = 0)

3315 = CF3
Solution:

1.1.6 Binary Coded Decimal number (BCD)

Binary Coded Decimal number system is a combination of the binary number
system and decimal number system. In this system every 4-digit binary number
represents one digit of decimal number, i.e., every 4-digit binary number can
represent decimal 0 to 9. So, we need 4 digits more binary number to represent
2-digit decimal number. Following table shows the BCD numbers with other
number system.

Dec Oct Hex Bin BCD
0 0 0 0000 0000
1 1 1 0001 0001
2 2 2 0010 0010
3 3 3 0011 0011
4 4 4 0100 0100
5 5 5 0101 0101
6 6 6 0110 0110
7 7 7 0111 0111
8 10 8 1000 1000
9 11 9 1001 1001
10 12 A 1010 0001 0000
11 13 B 1011 0001 0001
12 14 C 1100 0001 0010
13 15 D 1101 0001 0011
14 16 E 1110 0001 0100
15 17 F 1111 0001 0101

Quotient Remainder
315/8 = 39 3
39/8 = 4 7
4/8 = 0 4

315 = 473
BCD number system is mainly used for HW interfacing with 7-segment display
module. As the 7-segment display module can display from 0 to 9 so only BCD
number system can be used to display the decimal number using 7-segment
display unit. There is another conversion required to make the BCD number
visible in a 7-segment display module, which will be described in the coming
sections.

1.2 Mathematics

Similar to decimal mathematics simple addition, subtraction, multiplication and
division can be done for binary, hex, octal and BCD numbers. For simplicity only
addition and subtraction of binary and hex numbers will be described.

1.2.1 Binary addition

For binary addition following simple rules should be used, which are-

0 + 0 = 0
0 + 1 = 1
1 + 0 = 1
1 + 1 = 10

Following example shows addition of two binary numbers. Like decimal addition
same digit of two numbers will be added with each other and if there is any
overflow (over 9 in decimal number) will be added with the next left digit of the
upper (or left number).

1 5 1
st
Number
+ 1 8 2
nd
Number
----------
3 1 as overflow
+ 1
----------
3 3

Step-1: digit-1 of result = digit-1 (1
st
number) + digit-1 (2
nd
number)

5 + 8 = 13
as 12 is greater than 9, only the first digit (here 3) of the result will be the
digit-1 of the result and second digit of the result (here 1) will be added
with the digit-2 of the first number.

digit-1 of the result is 3
overflow is 1

Step-2: digit-2 (1
st
number) of upper number + the overflow of step-1

digit-2 (1
st
number) with overflow = 1 + 1 = 2

Step-3: digit-2 of result = digit-2 (1
st
number with over flow) + digit-2 (2
nd
number)

2 + 1 = 3

digit-2 of result is 3
So, the complete result is 3 3

Now we will do the same for the binary representation of the above 2 numbers.

1 5 = 1 1 1 1 (1
st
number)
1 8 = 1 0 0 1 0 (2
nd
number)

Here the 1
st
number is of 4 digits and the 2
nd
number is of 5 digits. Now, addition
of these two numbers is

1 1 1 1
+ 1 0 0 1 0
---------------
1
0 --- 1 as overflow
+ 1
---------------
0 0 1 --- 1 as overflow
+ 1
---------------
0 0 0 1 --- 1 as overflow
+ 1
---------------
1 0 0 0 0 1 33 in decimal
Step-1: digit-1 (1
st
nd
number) = 1 + 0 = 1, where 1 is the
digit-1 of the result and there is no overflow (or 0 overflow).

Step-2: The 2
nd
digit of the result will be, overflow of previous step + digit-2 (1
st

nd
digit) = 0 + 1 + 1 = 1 0, where 0 is the digit-2 of the
result and 1 is the overflow.

Applying the same rule of step-2, the digit-3 of result will be, overflow of previous
step + digit-3 (1
st
nd
number) = 1 + 1 + 0 = 1 0, where 0 is the
result and 1 is the overflow.

For the fourth digits, 1 + 1 + 0 = 1 0, 0 is the result and 1 is the overflow
For the fifth digits, 1 + __ + 1 = 1 0, as there is no more digit to left in the
numbers to add, result of this step is 1 0.

So, the complete result is, 1 0 0 0 0 1 (which is 33 in decimal).

1.2.2 Hex addition

The same rule can be applied to add two hex numbers. We also need the
following table of hex-addition:

+ A B C D E F
1 B C D E F 10
2 C D E F 10 11
3 D E F 10 11 12
4 E F 10 11 12 13
5 F 10 11 12 13 14
6 10 11 12 13 14 15
7 11 12 13 14 15 16
8 12 13 14 15 16 17
9 13 14 15 16 17 18
A 14 15 16 17 18 19
B 15 16 17 18 19 1A
C 16 17 18 19 1A 1B
D 17 18 19 1A 1B 1C
E 18 19 1A 1B 1C 1D
F 19 1A 1B 1C 1D 1E

Following example shows the addition of two hex numbers step by step.

2 A B C (1
st
number)
+ E D 5 3 (2
nd
number)
----------------
F
0 --- 1 as overflow
+ 1 + 1 overflow with digit-3
----------------
8 0 F --- 1 as overflow
+ 1
----------------
1 1 8 0 F

Step-1: digit-1 (1
st
nd
number) = C + 3 = F, where the result is
F without any overflow.

Step-2: overflow of previous step + digit-2 (1
st
digit) + digit-2 (2
nd
digit) = 0 + B + 5
= B + 5 = 1 0, where 0 is the digit-2 of result and 1 is the overflow.

Similarly for the 3
rd
digits, overflow of previous step + digit-3 (1
st
digit) + digit-3
(2
nd
digit) = 1 + A + D = ( 1 + A ) + D = B + D = 1 8, where 8 is the digit-3 of result
and 1 is the overflow.

And for the fourth digits, overflow of previous step + digit-4 (1
st
digit) + digit-4 (2
nd

digit) = 1 + 2 + E = ( 1 + 2 ) + E = 3 + E = 1 1, as there is no more digits left in the
numbers, 1 1 is the result without any overflow.

So, the complete result = 1 1 8 0 F.

In the above examples we see that we get only 1 as overflow, but it can be more
than 1 while adding more than 2 numbers.

1.2.3 Binary subtraction

We can also perform binary subtraction in the same way we do for decimal
subtraction. We add 2 ( 10 in binary, as we add 10 10 for decimal subtraction)
with the present digit of the the 1
st
number and add 1 with the next digit of the 2
nd

number. We also need to know the following basic rules for binary subtraction-

0 0 = 0
1 1 = 0
1 0 = 1
10 1 = 1

Following example shows the subtraction of a number from a larger number.

1 1 0 1 0 1 ( 1
st
number, decimal 53 )
- 1 0 1 1 0 0 ( 2
nd
number, decimal 44 )
---------------------
1
0
0
---------------------
1 0 Adding 2 (10) with 4
th
digit of 1
st
number
- 1 digit-4 (2
nd
number)
---------------------
1 0 0 1
---------------------
1 1 Digit-6 (1
st
number), digit-5 (1
st
number)
- 1 1 Digit-6 (2
nd
number), digit-5 (2
nd
number) + 1
--------------------
0 1 0 0 1
0
-------------------
0 0 1 0 0 1 Decimal 9

1.2.4 Hex subtraction

For hex subtraction, if any digit of the 1
st
number is smaller than the same digit of
the 2
nd
number, we need to add 10 hex (decimal 16) with that digit of the 1
st

number and 1 hex with the next digit of the 2
nd
number. Following example
shows subtraction of two hex numbers step by step.

C D A 3 52643 in decimal (1
st
number)
- 2 B F 2 11250 in decimal (2
nd
number)
----------------
1
----------------
1 A Digit-2 (1
st
number) + 10 hex
- F Digit-2 (2
nd
number)
----------------
B 1
----------------
C D Digit-4 (1
st
number), digit-3 (1
st
number)
- 2 C Digit-4 (2
nd
number), digit-3 (2
nd
number) + 1
----------------
1 B 1
A
----------------
A 1 B 1

1.3 Digital Logic

As mentioned earlier, computer systems use binary number system because two
voltage levels (0v and +5v in general) can be represented by binary 0 and 1.
Logically any signal of 0v is considered as binary 0 and signal of 5v is considered
as binary 1. Practically binary 0 and 1 are not exactly limited to 0v and 5v, it
depends on the logic level of device type, for a 3.6v device 3v can be considered
as binary 1. Detail voltage levels of different devices are described in sub-section
1.6.2.

1.3.1 Logic Gate

Binary logics are implemented in some simple hardware called logic gates.
These logic gates have one or more than one logic inputs and one output per
gate, out put logic level changes according to the logic level of the input (s) and
the logical operation performed by the logic gate. There are 3 types of basic logic
gate; following table shows the logical operation of the basic logic gates
considering 2 inputs each-


Gate Input (A,B) Logical operation Output (Y)
NOT Gate
0
1
Y = A
1
0
OR Gate
0 0
0 1
1 0
1 1
Y = A or B
Y = A + B
0
1
1
1
AND Gate
0 0
0 1
1 0
1 1
Y = A and B
Y = A.B
0
0
0
1

AND Gate OR Gate NOT Gate/ Inverter

Figure 1. : Basic Logic gate symbol

There are three logic gates which are derived from the three basic gates. These
are NOR, NAND, XOR (exclusive-or) and XNOR gate.

NAND gate and NOR gate are also called universal gate because we can derive
any logic using only NAND gates or NOR gates. OR, NOR, AND and NAND
gates can be of two or more than two inputs.

The Exclusive-OR, or XOR function is an interesting and useful variation on the
basic OR function. Verbally, it can be stated as, "Either A or B, but not both." The
XOR gate produces a logic 1 output only if its two inputs are different. If the
inputs are the same, the output is a logic 0. Unlike other gates XOR and XNOR
can have only two inputs.

These derived gates and their logical operations are shown in the following table-

Gate Derived from Input (A,B) Logical operation Output (Y)
NOR Gate OR > NOT
0 0
0 1
1 0
1 1
Y = (A or B)
Y = (A + B)
1
0
0
0
NAND Gate AND > NOT
0 0
0 1
1 0
1 1
Y = (A and B)
Y = (A . B)
1
1
1
0
XOR Gate Multiple Gate
0 0
0 1
1 0
1 1
Y = A (+) B
0
1
1
0
XNOR Gate XOR > NOT
0 0
0 1
1 0
1 1
Y = (A (+) B)
1
0
0
1

NAND Gate NOR Gate XOR Gate

Figure 1. : Derived Logic gate symbol

1.3.2 Boolean algebra

For logic simplification and derivation Boolean algebra is very useful. Followings
are the rules of Boolean algebra.

AND Operations (): 00 = 0 A0 = 0
10 = 0 A1 = A
01 = 0 AA = A
11 = 1 AA' = 0
OR Operations (+): 0+0 = 0 A+0 = A
1+0 = 1 A+1 = 1
0+1 = 1 A+A = A
1+1 = 1 A+A' = 1

NOT Operations ('): 0' = 1 A'' = A
1' = 0

Associative Law: (AB)C = A(BC) = ABC
(A+B)+C = A+(B+C) = A+B+C

Distributive Law: A(B+C) = (AB) + (AC)
A+(BC) = (A+B) (A+C)

Commutative Law: AB = BA
A+B = B+A

Precedence: AB = AB
AB+C = (AB) + C
A+BC = A + (BC)

DeMorgan's Theorem: (AB)' = A' + B' (NAND)
(A+B)' = A' B' (NOR)

1.4 Digital devices

Using the logic gates we can perform lot of logical and mathematical operations
like adder, selector etc. Various functional devices are also available as single
component to use. These devices are of following types-

Flip-Flop Timer-Counter Multiplexer
De-multiplexer Decoder Encoder
Buffer-Register Shift-register

A list of different type of digital logic and functional ICs is given in appendix A.

1.4.1 Flip-flop

Flip-flop changes the output state based on the input state and (if any) clock-
pulse. Symbol and the characteristic tables for different flip-flops are shown
bellow.

Set-Reset Flip-flop (SR F/F): SR flip-flop is a simple latch, where S and R stand
for set and reset respectively. It can be constructed from a pair of cross-coupled
NAND or NOR logic gates. The stored bit is present on the output marked Q and
its complement Q. If S is pulsed high while R is held low, then the Q output is
forced high, and stays high even after S returns low; similarly, if R is pulsed high
while S is held low, then the Q output is forced low, and stays low even after R
returns low.

Symbol S-R Action Q (t) Q(t+1)

0-0 No change 0 0
0-1 Q=0 0 1
1-0 Q=1 1 0
1-1
Undefined/
Race condition
1 1

Toggle Flip-flop (T-F/F): If the T input is high, the T flip-flop changes state
("toggles") whenever the clock input receives a pulse. If the T input is low, the
flip-flop holds the previous value. When T is held high, the toggle flip-flop divides
the clock frequency by two; that is, if clock frequency is 4 MHz, the output
frequency obtained from the flip-flop will be 2 MHz. This 'divide by' feature has
application in various types of digital counters. A T flip-flop can also be built using
a JK flip-flop (J & K pins are connected together and act as T) or D flip-flop (T
input and Q is connected to the D input through an XOR gate).

Symbol T Q (t) Q(t+1) Action

0 0 0 No change
0 1 1 No change
1 0 1 Toggle
1 1 0 Toggle

J-K Flip-flop (JK F/F): The JK flip-flop augments the behavior of the SR flip-flop
(J=Set, K=Reset) by interpreting the S = R = 1 condition as a "flip" or toggle
command. Specifically, the combination J = 1, K = 0 is a command to set the flip-
flop; the combination J = 0, K = 1 is a command to reset the flip-flop; and the
combination J = K = 1 is a command to toggle the flip-flop, i.e., change its output
to the logical complement of its current value. Setting J = K = 0 does NOT result
in a D flip-flop, but rather, will hold the current state. To synthesize a D flip-flop,
simply set K equal to the complement of J. The JK flip-flop is therefore a
universal flip-flop, because it can be configured to work as an SR flip-flop, a D
flip-flop, or a T flip-flop. This flip flop is positive edge triggered (Clock Pulse).

Symbol J-K Action Q (t) Q(t+1)

0-0 Hold 0 0
0-1 Reset 0 1
1-0 Set 1 0
1-1 Toggle 1 1

D Flip-flop (D F/F): The Q output always takes on the state of the D input at the
moment of a rising clock edge (or falling edge if the clock input is active low). It is
called the D flip-flop for this reason, since the output takes the value of the D
input or Data input, and Delays it by one clock count. The D flip-flop can be
interpreted as a primitive memory cell, zero-order hold, or delay line.

Symbol Clock D Q (t)

Rising 0 0
Rising 1 0
Non Rising No change Q (t-1)

Master Slave D Flip-flop: A masterslave D flip-flop is created by connecting
two gated D latches in series, and inverting the enable input to one of them. It is
called masterslave because the second latch in the series only changes in
response to a change in the first (master) latch. For a positive-edge triggered
masterslave D flip-flop, when the clock signal is low (logical 0) the enable seen
by the first or master D latch (the inverted clock signal) is high (logical 1). This
allows the master latch to store the input value when the clock signal transitions
from low to high. As the clock signal goes high (0 to 1) the inverted enable of
the first latch goes low (1 to 0) and the value seen at the input to the master latch
is locked. Nearly simultaneously, the twice inverted enable of the second or
slave D latch transitions from low to high (0 to 1) with the clock signal. This
allows the signal captured at the rising edge of the clock by the now locked
master latch to pass through the slave latch. When the clock signal returns to
low (1 to 0), the output of the "slave" latch is "locked", and the value seen at the
last rising edge of the clock is held while the master latch begins to accept new
values in preparation for the next rising clock edge.

Symbol D Q > Q(t+1)

0 X Falling 0
1 X Falling 1

1.4.2 Counter

Counter is a device which stores (and sometimes displays) the number of times a
particular event or process has occurred, often in relationship to a clock signal.
Counters can be implemented quite easily using flip-flop, and a wide variety of
designs exist i.e.;

Asynchronous (ripple) counter, Synchronous counter
Binary counter, Decade counter, BCD Counter
Updown counter
Preset able/ programmable counter
Ring counter, Johnson counter, Cascaded counter

Counters can be of 4-bit, 8-bit or more than 8-bit. Counters are used as
frequency divider also.

1.4.3 Multiplexer, De-multiplexer

Multiplexer or mux is a device that performs multiplexing; it selects one of many
analog or digital input signals and forwards the selected input into a single line. A
multiplexer of 2
n
inputs has n select bits, which are used to select which input line
to send to the output. A very common application of mux is found in computers,
where dynamic memory uses the same address or data lines by more than one
memory chip. By this scheme a large amounts of memory can be incorporated
into the computer while limiting the number of copper traces. In such an
application, this circuit is commonly called data selector.

On the other end, a de-multiplexer (or demux) is a device taking a single input
signal and selecting one of many data-output-lines, which is connected to the
single input. A multiplexer is often used with a complementary de-multiplexer on
the receiving end.

1.4.4 Decoder

Decoder can take the form of a multiple-input, multiple-output logic circuit that
converts coded inputs into coded outputs, where the input and output codes are
different. Such as, an n-to-2
n
type binary decoders, which converts binary
information from 'n' coded inputs to a maximum of 2n unique outputs. Decoding
is necessary in applications such as data multiplexing, BCD to 7 segment display
and memory address decoding. Following figure shows a 2 line to 4 line decoder,
which can be used for address decoding of computer system memory.


1.4.5 Shift-register

The term register refers to a group of flip-flops operating as a unit to hold data. A
counter can be viewed as a specialized kind of register, which counts events and
thereby generates data, rather than just holding the data. Shift register shifts data
through it, from flip-flop to flip-flop. Based on shift nature shift register are of two
kinds;
- Serial to Parallel Shift Register or Serial in Parallel Out Shift register (SIPO)
- Parallel to Serial Shift Register or Parallel in Serial Out Shift register (PISO)

If we apply one byte (8 bits) of data to the initial data input one bit at a time at the
input of an SIPO registe, and apply one clock pulse to the circuit after setting
each bit of data, we will find the entire byte present at the flip-flop outputs in
parallel format.


PISO register transfer the parallel data to its single output bit by bit for each clock
pulse.

1.4.6 Buffer-Register

Buffers are normally used for physical isolation and / or to increase the driving
capability to support more inputs at a time. Some time it can be used for logic
level shifting also, such as 5v logi to 3v logic. Buffer can also hold one byte data
for temporary use.

1.5 Digital ICs and their characteristics

There are different families of digital ICs based on the technology. For simplicity
and within the scope of this book some logic families and their characteristics are
described in this section, which we should consider while designing our
microprocessor and microcontroller based system in this stage.

1.5.1 Device Families:

For our design we will use mainly TTL and CMOS ICs. These two families again
have variants with different improved features like speed, operating voltage,
power consumption, propagation delay etc. The 74 series (54 series is the
military version of 74 series) is mainly TTL and 4000 Series is CMOS, however
some 74 series have CMOS-TTL combination for better performance. Different
types of 74 series are listed in the following table.

Basic TTL Families Bus Driver Families
True TTL ABT Advanced BiCMOS Technology
L Low power ABTE ABT - Enhanced Transceiver Logic
S Schottky ABTH Advanced BiCMOS Technology bus Hold
H High speed BCT BiCMOS - TTL inputs
LS Low power Schottky BTL Backplane Transceiver Logic
AS Advanced Schottky GTL Gunning Transceiver Logic
ALS Advanced Low power Schottky GTLP GTL Plus
F(AST) Fast (Advanced Schottky) Low Voltage Families
C CMOS ALB Advanced Low Voltage BiCMOS
HC High speed CMOS LV Low Voltage
HCT High speed CMOS TTL inputs LVC LV CMOS
AHC Advanced High speed CMOS LVCH Low Voltage CMOS bus Hold
AHCT Advanced High speed CMOS TTL inputs ALVC Advanced Low Voltage CMOS
FCT Fast CMOS TTL inputs LVT LV TTL
AC Advanced CMOS LVTZ Low Voltage TTL High Impedance power-up
ACT Advanced CMOS TTL inputs ALVC ALV CMOS
ACQ Advanced CMOS Quiet outputs ALVCH Advanced Low Voltage CMOS bus Hold
ACTQ Advanced CMOS TTL inputs Quiet outputs LCX LV - CMOS (3v & 5v)
VCX LV - CMOS (1.8v & 3.6v)

1.5.2 Supply voltage and logic level

Comparison of Input and Output logic switching levels for the CMOS, TTL, mixed
CMOS/TTL, and Low voltage logic families is shown in the following graph. The
graph shows 5 volt CMOS, TTL, and mixed CMOS/TTL IC devices, and 3.3 volt
LVTTL LVCMOS IC devices. The CMOS families (AC, HC, AHC, C) have
different input and output switching levels than the TTL logic devices (F, S, AS,
LS, ALS). The output switching levels from CMOS ICs is higher then a TTL IC,
which happens to result in a better design and does not have a negative effect.

VCC: The voltage applied to the power pin(s).
VIH (Voltage Input High): The minimum positive voltage applied to the input which will
be accepted by the device as a logic high.
VIL (Voltage Input Low): The maximum positive voltage applied to the input which will
be accepted by the device as a logic low.
VOL (Voltage Output Low): The maximum positive voltage from an output which the
device considers will be accepted as the maximum positive low level.
VOH (Voltage Output High): The maximum positive voltage from an output which the
device considers will be accepted as the minimum positive high level.
VT (Threshold Voltage): The voltage applied to a device which causes the device to
switch. May also be listed as a '+' or '-' value.

However the difference in input logic switching level does impact the design, the
TTL output does not correctly switch a CMOS input. The switching difference
between a TTL IC output and a CMOS IC input has to be accounted for. The
mixed CMOS/TTL (ACT, HCT, AHCT, FCT) logic devices have TTL logic input
switching levels and CMOS output switching levels. The mixed TTL/CMOS
devices are CMOS devices which just happen to have TTL input trigger levels,
but they are CMOS ICs.

So the rule is, if we use a CMOS IC for reduced current consumption (for
example), and a TTL IC feeds the CMOS chip, then we need to either provide a
voltage translation or use one of the mixed CMOS/TTL devices.

1.5.3 Propagation delay, Speed and power consumption

Different digital logic families have different speed and power consumption.
Power consumption is related to the speed also. Following table shows the
propagation delay (delay time to reflect the change of input to the output), speed
(the maximum frequency a device can toggle its state, 1 to 0 or 0 to 1), dynamic
power consumption (when the device works or oscillates). Besides the input and
output current limit at low and hi state (mentioned in the datasheet) are also to be
considered.

Series
Propagation
delay (ns)
Speed
(MHz)
Power per gate
@1 MHz (mW)
Supply
Voltage (V)
4000B 30 5 1.2 10
C 30 5 1.2 10
AC/ACT 3 125 0.5 3.3 or 5
HC/HCT 9 30 0.5 5
(74 Basic) 10 25 10 5
L 33 3 1 5
H 6 43 22 5
S 3 110 19 5
LS 10 33 2 5
ALS 4 34 1.3 5
F 3.5 100 5.4 5
AS 2 105 8 5
74G 1.5 1125

1.65 - 3.6
1.6 Digital quantities

1.6.1 Bit, Byte and Nibble

A binary digit is called a bit. There are two possible states in a bit, usually
expressed as 0 and 1.

A series of eight bits strung together makes a byte. With 8 bits, or 8 binary digits,
there exist 2
8
= 256 possible combinations. The right most bit of a byte is called
Least Significant Bit (LSB) and the left most bit is called Most Significant Bit
(MSB). The following table shows some of these combinations with their decimal
values.

4 bits make a nibble. A byte has two nibbles, right four bits are called the lower
nibble and left four bits are called higher nibble. In the following table first row
shows the lower nibble and the first column represents the higher nibble.

0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111
0000 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
0001 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
0010 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
0011 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
0100 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79
0101 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95
0110 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111
0111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127
1000 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143
1001 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159
1010 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175
1011 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191
1100 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207
1101 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223
1110 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239
1111 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255

For example decimal 150 corresponds the 1001 from the first column and 0110
from the first row, so the binary representation of 150 is 1001-0110.

Sometimes bit is noted by the letter b in small, and byte is noted by the letter B
in capital.

1.6.2 Kilo (K) and Mega (M)

2
10
= 1024 is commonly referred to as kilo or "K". It is approximately equal to one
thousand. Thus, 1 Kbyte is 1024 bytes. Likewise, 1024K is referred to as Mega
or M. It is approximately equal to a million. 1 Mega byte is 1024*1024 =
1,048,576 bytes.

1.6.3 Signed number

The MSB is used for representing signed binary numbers. The following example
shows that a single byte can represent numbers from 0 to 255 (called unsigned
number) or -127 to +127 (called signed number or magnitude). While
programming we have to mentioned the type of the number to be used by the
software. By default any 8-bit system considered the 8-bit binary number as
signed number, however, we can use the number in the software as unsigned
number.

Binary Number Unsigned Signed
0111-1111
0000-1111
0000-0000
1000-0000
1111-1111
127
15
0
128
255
+127
+15
0
- 0
-127

There are two more ways to represent signed number; Ones (1s) complement
and Twos (2s) complement.

Ones complement: The ones' complement form of a negative binary number is
the bitwise NOT applied to it; the complement of its positive counterpart. As an
example, the ones' complement form of 11010100 (43
d
) becomes 00101011
(43
d
).

Twos complement: In two's complement, negative numbers are represented by
the bit pattern which is one greater (in an unsigned sense) than the ones'
complement of the positive value, ie.

2s complement = 1s complement + 1

The main advantage of twos complement is that in this system we have only one
0, where as other two ways have +0 and -0. In the following table shows three
ways of negative number representation.

Signed Binary 1s complement 2s complement Un-signed
Decimal Binary Decimal Binary Decimal Binary Decimal
00000000 0 00000000 +0 00000000 0 0
00000001 1 00000001 1 00000001 1 1
01111110 126 01111110 126 01111110 126 126
01111111 127 01111111 127 01111111 127 127
10000000 -0 01111111 -127 10000000 -128 128
10000001 -1 01111110 -126 01111111 -127 129
11111110 -126 00000001 -1 00000010 -2 254
11111111 -127 00000000 -0 00000001 -1 255

1.6.4 Hand notation

Like decimal counting using finger we can also binary calculation using finger
lines. Starting from the root of the pinky if we start counting the first bit or the
LSB, the it will give 2
d
. Now growing upward we can count the bits (2, 3, 4.16)
which give us 2
1
= 1 to 2
16
= 64k. So, we can derive the following rules for finger
counting-

1 finger = 1 nibble = 4 bits = 2
4
= 16
d
= One Hex digit
1 joint = 1 bit = x2

So, one round of counting give 16-bits = 64k. If we consider this 16 bits as
address bits (will be discussed later) then it will give 64kB of memory location.


We can count more than 64k by multiple round of counting as given in the
following table-

bits Pinky Ring Middle Pointer scale
16 2 4 8 6 32 64 128 256 512 1K 2K 4K 8K 16K 32K 64K 1-K
32 128 256 512 1M 2M 4M 8M 16M 32M 64M 128 256 512 1G 2G 4G M-G
48 8G 16G 32G 64G 128 256 512 1T 2T 4T 8T 16T 32T 64T 128 256 G-T

1.7 "Real World" DOs & DON'Ts

1.7.1 What should we do with the unused input pins?

TTL devices normally default to a logic ONE if the input is allowed to FLOAT.
However, depending on many factors, these inputs can act as an antenna, and
pick up NOISE which can cause mischief to the circuit. The worst case is, the
device will act as an uncontrolled intermittent OSCILLATOR.
Therefore, all unused inputs of TTL logic devices IDEALLY should be returned to
either a logic ONE or logic ZERO. Certain devices 74XX and earlier 74LS the
logic 1 (Vcc) should be a 1k resistor to Vcc; or alternatively, connected directly to
ground (0). Most/all other logic devices, the resistor is UNNECESSARY.

In the case of CMOS devices, there is NO input DEFAULT; CMOS input
impedance is on the order of thousands of MEGOHMS and will cause EXTREME
FAILURES if allowed to FLOAT.

To make this point: if you put your finger or a scope probe on or NEAR an un-
terminated CMOS input, it can cause a logic CHANGE!! If allowed to float, some
CMOS devices can oscillate so fast, that it exceeds the device power rating and
will literally destroy itself.

Tri-state: Tri-state means three states. We know that digital devices can have
two states; 0 and 1. However, tri-state digital outputs have one more state which
is called hi-impedance or open. This tri-state output pin can be easily understand
from the following figure, where a single pole 3-throw switch can connect its pole
to +5 volt, ground (or 0v) and no-voltage.

Figure 1.x: Tri-state output

Open collector and open drain: Push-pull (also called totem pole) type output
has two complementary BJTs or MOSFETs connected with the Vcc and ground.
However, open collector and open drain outputs has only one BJT or MOSFET
connected with the ground.

Figure 1.x: Push-pull, open collector, open drain output

If these types of output have no internal pull-up resistor, we can connect multiple
outputs with a single external pull-up as shown in the figure. These outputs then
act as single ORed output.

Figure 1.x: Multiple open drain outputs with external pull-up

1.7.2 Unused Output pins

Tri-state and open collector devices, etc., DO NOT require any attention. In the
case of the tri-state control pin, it should be treated as an INPUT.

1.7.3 Warning

- NEVER EVER USE the original generic 7400 DEVICE. INSTEAD: Use
anything else, e.g., 74LS, 74ALS, etc.

- The older devices require five to ten times the drive power and force very
LARGE amounts of NOISE on to the Vcc rail! This is NOT GOOD!

- Remember, the newer the technology the happier the circuit will be well
almost!

Review Questions:

1. Relate a number using Binary, Hex and BCD number system.
2. Mention De-Morgans Law.
3. Show the algorithm to convert a decimal number to hex number.
4. What are the notations for decimal, hex and binary number?
5. Add two binary numbers?
6. Subtract two binary numbers?
7. Which numbers are ve from the followings and what is their decimal
value?

Design experiment:

1. Design a circuit using digital ICs (CMOS and/or TTL) that will turn on and
off a light at two particular times, like ON at 7pm and OFF at 11pm. This
time should the changeable.

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