1

Basic Principle of Buck

The buck is a popular non-isolated power stage topology, sometimes called a step-
down power stage. Power supply designers choose the buck power stage because the
required output is always less than the input voltage. The input current for a buck
power stage is discontinuous, or pulsating, because the power switch (Q1) current that
pulses from zero to I
O
every switching cycle. The output current for a buck power
stage is continuous or non-pulsating because the output current is supplied by the
output inductor/capacitor combination.
Figure 1 shows a simplified schematic of the buck power stage. Inductor L and
capacitor C make up the effective output filter. The capacitor equivalent series
resistance (ESR), R
C
, and the inductor dc resistance, R
L
, are included in the analysis.
Resistor R represents the load seen by the power supply output. The diode D1 is
usually called the catch diode, or freewheeling diode.
Figure 1. Buck Power Stage Schematic
A power stage can operate in continuous or discontinuous inductor current mode. In
continuous inductor current mode, current flows continuously in the inductor during
the entire switching cycle in steady-state operation. In discontinuous inductor current
mode, inductor current is zero for a portion of the switching cycle. It starts at zero,
reaches peak value, and return to zero during each switching cycle. It is desirable for a
power stage to stay in only one mode over its expected operating conditions because
the power stage frequency response changes significantly between the two modes of
operation.


2
Buck Steady-State Continuous Conduction Mode (CCM)
In continuous conduction mode, the buck power stage assumes two states per
switching cycle. In the ON state, Q1 is on and D1 is off. In the OFF state, Q1 is off
and D1 is on. A simple linear circuit can represent each of the two states where the
switches in the circuit are replaced by their equivalent circuit during each state. Figure
2 shows the linear circuit diagram for each of the two states.
Figure 2. Buck Power Stage States
The duration of the on state is DT
s
=T
ON,
where D is the duty cycle set by the
control circuit, expressed as a ratio of the switch on time to the time of one complete
switching cycle, T
s
. The duration of the off state is T
OFF
.


3
Figure 3. CCM Buck Power Stage Waveforms
Refer to Figures 1 and 2. The inductor-current increase can be calculated by using a
version of the familiar relationship:
The inductor current increase during the on state is given by:
The quantity I
L
(+) is the inductor ripple current.
The inductor current decrease during the off state is given by:
The quantity I
L
(-) is also the inductor ripple current.
T
L
V
I
dt
di
L V
L
L
L
L
= =
ON
O L L Q i
L
T
L
V R I V V
I

= +
) (
) (
OFF
L L d O
L
T
L
R I V V
I
+ +
=
) (
) (


4
In steady-state conditions, the current increase, I
L
(+), during the on time and the
current decrease, I
L
(-), during the off time are equal. Therefore, these two equations
can be equated and solved for V
O
to obtain the continuous conduction mode (CCM)
buck voltage conversion relationship:
And,
The steady-state equation for V
O
is:
*Notice that in simplifying the above, T
ON
+T
OFF
is assumed to be equal to T
s
. This is true only for
CCM mode. Setting the two values of I
L
equal to each other is equivalent balancing the volt-
seconds on the inductor. Volt-second balance on the inductor is a physical necessity and should be
comprehended at least as well as Ohms Law.

The above voltage conversation relationship for V
O
illustrates that V
O
can be
adjusted by adjusting the duty cycle, D, and is always less than the input because D is
a number between 0 and 1. A common simplification is to assume V
Q
, V
d
, and R
L
are small enough to ignore. The above equation simplifies considerably to :
A simplified, qualitative way to visualize the circuit operation is to consider the
output filter as an averaging network. This is a valid simplification because the filter
cutoff frequency (usually between 500Hz and 5KHz) is always much less than the
power supply switching frequency (usually above 100KHz). The input voltage applied
to the filter is the voltage at the junction of Q1, D1, and L, labeled as V
c-p
. The filter
passes the dc component (or average) of V
c-p
and greatly attenuates all frequencies
above the output filter cutoff frequency. Thus, the output voltage is simply the average
of the V
c-p
voltage.
To relate the inductor current to the output current, refer to Figure 2 and 3. Note the
inductor delivers current to the output capacitor and load resistor combination during
the whole switching cycle. The inductor current averaged over the switching cycle is
equal to the output current. This is true because the average current in the output
capacitor must be zero.
L L
OFF ON
ON
d
OFF ON
ON
Q i O
R I
T T
T
V
T T
T
V V V
+

+
= ) ( ) ( ) (
S
ON
OFF ON
ON
T
T
T T
T
D =
+
=
S
OFF
T
T
D = ) 1 (
L L d Q i O
R I D V D V V V = ) 1 ( ) (
D V V
i O
=


5
The relationship between the average inductor current and the output current for the
CCM mode is given by:
Buck Steady-State Discontinuous Conduction Mode (DCM)
Figure 4 shows the inductor current condition where the power stage is at the
boundary between continuous and discontinuous mode. This is where the inductor
current just falls to zero and the next switching cycle begins immediately after the
current reaches zero. From the charge and discharge of output capacitor, the output
current is given by:
Figure 4. Boundary Between Continuous and Discontinuous Mode
Further reduction in output load current puts the power stage into discontinuous
current conduction mode(DCM). The discontinuous mode power stage input-to-
output relationship is quite different from the continuous mode.
Figure 5. Discontinuous Current Mode
O Avg L
I I =
) (
( )
O L PK OFF ON
PK
OFF ON O
I I I T T
I
T T I 2 ) (
2
= = + = +


6
The duration of the on state is T
ON
=DT
S
, where D is the duty cycle set by the
control circuit. The duration of the off state is T
OFF
=D2T
S
. The idle time is the
remainder of the switching cycle and is given as T
S
-T
ON
-T
OFF
= D3T
S.
These
times are shown with the waveforms in Figure 6.
The inductor current increase during the on state is given by:
The ripple current magnitude, I
L
(+), is also the peak inductor current, I
pk
, because
in discontinuous mode. The current starts at zero each cycle.
The inductor current decrease during the off state is given by:
As in the continuous conduction mode case, the current increase, I
L
(+), during the
on time and the current decrease during the off time, I
L
(-), are equal. So,
PK S
O i
ON
O i
L
I T D
L
V V
T
L
V V
I =

= + ) (
S
O
OFF
O
L
T D
L
V
T
L
V
I = = 2 ) (
2 D D
D
V
T T
T
V V
i
OFF ON
ON
i O
+
=
+
=


7
Figure 6. Discontinuous Mode Buck Power Stage Waveforms
Now calculate the output current. It is the average of the inductor current .
Now solve two equations, I
O
and V
O
, the discontinuous conduction mode buck
voltage conversion relationship is given by:
S
S S PK O
avg L O
T
T D T D I
R
V
I I
+
= = =
2
2
) (
( ) 2
2
) ( D D
L
T D
V V
R
V
I
S
O i
O
O
+

= =
2
4
1 1
2
D
K
V V
i O

+ +
=
M
K
M D

=
1


8
Where K is defined as:
Critical Inductance
The previous analyses for the buck power stage have been for continuous and
discontinuous conduction modes of steady-state operation. The conduction mode of a
power stage is a function of input voltage, output voltage, output current, and the
value of the inductor. A buck power stage can be designed to operate in continuous
mode for load currents above a certain level usually 5 to 10% of full load. Usually,
the input voltage range, output voltage, and load current are defined by the power
stage specification. This leaves the inductor value as the design parameter to maintain
continuous conduction mode.
The minimum value of inductor to maintain continuous conduction mode can be
determined by the following procedure.
First, define I
OB
as the minimum output current to maintain continuous conduction
mode, normally referred to as the critical current. This value is shown in Figure 4. In
boundary between CCM and DCM,
On Boundary:
CCM:
S
T R
L
K

=
2
2
L
LB OB
I
I I

= =
( )
L
T D D V
L
T D V
T D
L
V V
I
S i S O
S
O i
OB

=
2
1
2
) 1 (
2
O
O
S
in
O
O
OB
S O
V
P
T
V
V
V
I
T D V
L
(min)
(max)
min
2
) 1 (
2
) 1 (

i
O
V
V
M =
S
O i
ON
O i
L
T D
L
V V
T
L
V V
I

=
|
.
|

\
|

=
i
V D Vo =
L
T D D V
I I
S i
OB O
2
) 1 (
=


9
Consider the V
Q
, V
d
and R
L

Output Capacitor
In switching power supply power stages, the function of output capacitor is to store
energy. The output capacitance for a buck power stage is generally selected to limit
output voltage ripple to the level required by the specification. The series impedance
of the capacitor and the power stage output current determine the output voltage ripple.
The three elements of the capacitor that contribute to its impedance (and output
voltage ripple) are equivalent series resistance (ESR), equivalent series inductance
(ESL), and capacitance (C). The value of his capacitance can be calculated from the
following expression:
The value Vo is the maximum change of the output voltage, and Q is the charge
transferred from the capacitor C to the load during one cycle. The capacitor will be
charged provided that the current in the inductor is larger than the load current Io. The
area shaded corresponds to the change of the change of the charge Q in the capacitor
C.
O
O
S
in
O
L L d O
OB
S L L d O
V
P
T
V
V
R I V V
I
T D R I V V
L
(min)
(max)
min
2
) 1 ( ) (
2
) 1 ( ) (

+ +
=

+ +

O
V
Q
C

=
f
I
f
I t I Q
L
L L

= = =
8
)
2
1
2
1
(
2
1


10
For CCM Mode:
For DCM Mode:
The ripple voltage across the output capacitance is determined by the size of the filter
capacitor. The above equation is based on the assumption that all inductor ripple
current flows through the capacitor and the ESR is zero. For both CCM or DCM
mode, assuming that the capacitor is very large, the ESR needed to Limit the ripple to
V
O
is:
*The output filter capacitor should be rated at least 10~20 times the calculated
capacitance and 30 to 50 percent lower than the calculated ESR.

The RMS value of the ripple current flowing in the output capacitance (CCM) is
given by:

L
O
I
V
ESR

O
L
O
V f
I
V
Q
C


=

8 L
T D V V
L
t V V
I
S O i ON O i
L

=

=
) ( ) (
o s
L
O
O
V f
I
I
I
C

|
|
.
|

\
|

2
(max)
(max)
1
PK S
O i
ON
O i
L
I T D
L
V V
T
L
V V
I =

=
L
L
CRMS
I
I
I =

= 289 . 0
3 2
Practical Check Method:
The output ripple voltage is assumed to be V
O
, the output capacitance is C
C f I
V
ESR
s L
O
2
1

) ( 2 ESR I V f
I
C
L O s
L

11
Synchronous Rectifier
Synchronous rectification allows for high efficiency by reducing the losses associated
with the Schottky rectifiers.
The Schottky rectifier D1 conducts during the time that MOSFET Q2 is on, which
improves efficiency by pre-venting the synchronous-rectifier MOSFET Q2 lossy body
diode from conducting.


12
Buck DC/DC Converter Small Signal Model (Transfer Function):
)
1
) (
( ) ( )
1
) (
( ) ( )
1
(
1
) ( ) (
T
s Z
s i
T
s GV
s V
T
T
H
s V s V
OUT
load
g
g ref O
+

+
+
+
=

gain loop
V
s GV s G s H
s T
M
d C
= =
) ( ) ( ) (
) (


13
For CCM Mode:

Where D is Duty Cycle
* Two Pole f
LC
, One Zero f
ESR
for GVd(s) & GVg(s)
( )
(
(
(
(
(

+
+
+
(

+
+ + +
+
=
) ( // 1
1
) (
2
L
C
L
L C
C
g d
R R
R R
LC s
R R
L
C R R C R s
C sR
V s GV
C R
f
C
ESR
2
1
=
LC
f
LC
2
1
=
( )
(
(
(
(

+
+
+
(

+
+ + +
+
+
=
) ( // 1
1
) (
2
L
C
L
L C
C
L
g
R R
R R
LC s
R R
L
C R R C R s
C sR
R R
DR
s GV
(
(
(
(
(
(
(
(
(
(

|
|
.
|

\
|
+
+
+
(
(
(
(

+
+
+
+
+
|
|
.
|

\
|
+
|
.
|

\
|
+
+
=
LC R R
R R
C R R L
R R
RR
R
s s
C R
s
L
R
s
R R
RR
s Z
C
L
C
C
C
L
C
L
C
C
OUT
1
) (
1
1
) (
2


14
For DCM Mode:
|
|
|
|
.
|

\
|
+

=
P
O
d
w
s
M
M
D
V
s GV
1
1
2
1
2 ) (
RC M
M
w
P
1
1
2

=
g
O
V
V
M =


15
Compensator 1:
Compensator 2:
| |
) 1 )( 1 )( (
) ( 1 ) 1 (
3 3
2 1
2 1 2
2 1 1
3 3 1 1 2
C SR
C C
C C R
S C C SR
C R R S C SR
V
V
G
O
C
C
+
+
+ +
+ + +
= =
| |
) 1 (
) ( 1 ) 1 (
3 3 1 1
3 3 1 1 2
C SR C SR
C R R S C SR
V
V
G
O
C
C
+
+ + +
= =


16
Compensator 3:
Compensator 4:
1 1
1 2
) 1 (
C SR
C SR
V
V
G
O
C
C
+
= =
) 1 )( (
) 1 (
2 1
2 1 2
2 1 1
1 2
C C
C C R
S C C SR
C SR
V
V
G
O
C
C
+
+ +
+
= =


17
Compensator 5:
Compensator 6:
S C C R C SC
C SR
R R
R
Gm
V
V
G
O
C
C
1
)
1
)( (
2 1 2 2 1
2 2
4 1
4
+ +
+
+
= =
)
1
)( (
2
2 2
4 1
4
SC
C SR
R R
R
Gm
V
V
G
O
C
C
+
+
= =


18
Compensator 7:
Compensator 8:
)
1 ) (
1
)( (
1 4 3
1 4
2 1
2
+ +
+
+
= =
C R R S
C SR
R R
R
Gv
V
V
G
O
C
C
| |
| |
)
) ( ) )( ( 1
) 2 1 ( 1
)( (
2 1 5 4 3
2
2 5 2 1 4 3
2 1 5 4
2
2 5 4
2 1
2
C C R R R S C R C C R R S
C C R R S C R C C R S
R R
R
Gv
V
V
G
O
C
C
+ + + + + +
+ + + +
+
= =


19
Application Example of Buck Circuit 1
OB
S i
OB
S i
OB
S O
I
T D Vo V
I
T D D V
I
T D V
L

2
) (
2
) 1 (
2
) 1 (
(max) (max)
min


20
VIN=3V, Vo=1.5V,Io=200mA, fosc=500kHz
1. Inductor L1:
The condition of L because of a continuous current in the range of the use voltage
Select L=22H, Load current value which becomes continous current condition.
If I
O
I
OB

The peak value of the inductor I
L(peak)

2. P-MOSFET Drain Current: Peak value
The peak value of the drain current of P-MOSFET should be in the rated current
value of P-MOSFET. The peak current of P-MOSFET is assumed to be I
D
, I
D
is
obtained by the following formula.
5 . 0
0 . 3
5 . 1
= = =
i
O
V
V
D
uH
I
T D V
L
OB
S O
75 . 3
2 . 0 2
10 2 ) 5 . 0 1 ( 5 . 1
2
) 1 (
6

A
L
T D V
I
S O
OB
034 . 0
10 22 2
10 2 ) 5 . 0 1 ( 5 . 1
2
) 1 (
6
6

L
T D V V
L
t V V
I
S O i ON O i
L

=

=
) ( ) (
(max) (max)
L
t V V
I
I
I I
ON O i
O
L
O peak L

+ =

+ =
2
) (
2
) (
A I
D
234 . 0
10 22 2
10 2 5 . 0 ) 5 . 1 0 . 3 (
2 . 0
6
6
=


+

A I I
peak L L
234 . 0
10 22 2
10 2 5 . 0 ) 5 . 1 0 . 3 (
2 . 0
6
6
) (
=


+ =

21
Where t
r
and t
f
are the MOSFET turn-on and turn-off switching times
Q
Gate
is the MOSFET gate-to-source capacitance
3.Diode D1:
The peak value of diode current I
FSM

The Average Current I
F

The repetition peak reverse voltage of the diode V
RRM

4. Output Capacitor:
If the desired output ripple voltage is 50mV, then the ESR needed is:
*The ESR of above-mentioned capacitor becomes 100m. As a result, the condition is satisfied.
*The value of above-mentioned capacitor becomes 150F. As a result, the condition is satisfied.
A I I
O F
2 . 0
V V V
i RRM
5 . 1
A I
FSM
234 . 0
10 22 2
10 2 5 . 0 ) 5 . 1 0 . 3 (
2 . 0
6
6
=


+

s GS Gate s f r O I ON DS O Q D
f V Q f t t I V R I P + + + = ) (
2
1
) (
2
) 1 (
F
ESR I V f
I
C
L O s
L

501 . 0
) 1 . 0 068 . 0 05 . 0 ( 10 500 2
068 . 0
) ( 2
3
=

=

=

=

m
C f I
V
ESR
s L
O
5 . 728
10 47 10 500 2
1
068 . 0
05 . 0
2
1
6 3

RMS
L
CRMS
mA
I
I 0196 . 0 068 . 0 289 . 0
3 2
= =

=


22
10
-1
10
0
10
1
10
2
10
3
10
4
10
5
10
6
-60
-40
-20
0
20
Frequency (Hz)
G
a
i
n

d
B
Buck Converter GVd(s) Bode Plot
10
-1
10
0
10
1
10
2
10
3
10
4
10
5
10
6
-150
-100
-50
0
Frequency (Hz)
P
h
a
s
e

d
e
g
f
Z1
=33.86KHz
f
P1,2
=4.94KHz


23
10
-1
10
0
10
1
10
2
10
3
10
4
10
5
10
6
-20
0
20
40
60
Frequency (Hz)
G
a
i
n

d
B
Compensator Gc(s)Vm(s) Bode Plot
10
-1
10
0
10
1
10
2
10
3
10
4
10
5
10
6
-100
-50
0
50
100
Frequency (Hz)
P
h
a
s
e

d
e
g


24
f
C
=19.27KHz
GM=
PM=71.95
10
-1
10
0
10
1
10
2
10
3
10
4
10
5
10
6
-40
-20
0
20
40
60
80
Frequency (Hz)
G
a
i
n

d
B
Loop Gain T(s) Bode Plot
10
-1
10
0
10
1
10
2
10
3
10
4
10
5
10
6
-150
-100
-50
0
50
Frequency (Hz)
P
h
a
s
e

d
e
g


25
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
x 10
-3
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
T(s)/1+T(s)Step Response
Time(sec)
A
m
p
l
i
t
u
d
e


26
Application Example of Buck Circuit 2


27
VIN=12V, Vo=5V,Io=300mA, fosc=500kHz
2. Inductor L1:
The condition of L because of a continuous current in the range of the use voltage
Select L=22H, Load current value which becomes continous current condition.
If I
O
I
OB

The peak value of the inductor I
L(peak)

2. P-MOSFET Drain Current: Peak value
The peak value of the drain current of P-MOSFET should be in the rated current
value of P-MOSFET. The peak current of P-MOSFET is assumed to be I
D
, I
D
is
obtained by the following formula.
A I I
peak L L
433 . 0
10 22 2
10 2 4167 . 0 ) 5 12 (
3 . 0
6
6
) (
=


+ =

4167 . 0
12
5
= = =
i
O
V
V
D
uH
I
T D V
L
OB
S O
72 . 9
3 . 0 2
10 2 ) 4167 . 0 1 ( 5
2
) 1 (
6

A
L
T D V
I
S O
OB
132 . 0
10 22 2
10 2 ) 4167 . 0 1 ( 5
2
) 1 (
6
6

L
T D V V
L
t V V
I
S O i ON O i
L

=

=
) ( ) (
L
t V V
I
I
I I
ON O i
O
L
O peak L

+ =

+ =
2
) (
2
) (
A I
D
433 . 0
10 22 2
10 2 4167 . 0 ) 5 12 (
3 . 0
6
6
=


+

28
Where t
r
and t
f
are the MOSFET turn-on and turn-off switching times
Q
Gate
is the MOSFET gate-to-source capacitance
3.Diode D1:
The peak value of diode current I
FSM

The Average Current I
F

The repetition peak reverse voltage of the diode V
RRM

4. Output Capacitor:
If the desired output ripple voltage is 50mV, then the capacitor needed is:
Now, assuming that the capacitor is very large, the ESR needed to limit the ripple to
50mV is:
A I I
O F
3 . 0
V V V
i RRM
12
A I
FSM
433 . 0
10 22 2
10 2 4167 . 0 ) 5 12 (
3 . 0
6
6
=


+

s GS Gate s f r O I ON DS O Q D
f V Q f t t I V R I P + + + = ) (
2
1
) (
2
) 1 (
A
L
T D V V
L
t V V
I
S O i ON O i
L
265 . 0
) ( ) (
=

=

=
F
V
Q
C
O
325 . 1
05 . 0 10 500 8
265 . 0
3
=

=

= =

m
I
V
ESR
O
O
7 . 188
265 . 0
05 . 0


29


30
5. Soft-Start and Short circuit time Ts:


6. Output voltage is obtained by applying the internal reference voltage 0.5V to the
below equation:
Set R2=2K, R1 becomes 18K
2
2 1
5 . 0
R
R R
V
O
+
=
A I C
T
V
I
SCP SCP
1 =

=
ms T T
S
80 1 . 0
1
8 . 0
= = =


31
7. In practical use, the user should red the R
T
and C
T
values from the characteristic
curve in the data sheet or should determine an approximate target value by using the
equation.
The setting oscillating frequency is 500KHz, then
C
T
=270pF R
T
=3K
8. AT1380 has a feature to adjust output source current by inserting a resistor between
the BR/CTL pin and GND. For example, the following shows the case to set source
current to I
OUT
=30mA.
(a) Obtain I
BR
at I
OUT
=50mA from BR/CTL pin current vs. Output source
current curve. I
BR
-0.8mA at I
OUT
=50mA
(b) Obtain V
BR
at I
BR
-0.8mA from BR/CTL pin current vs. BR/CTL pin
voltage curve. V
BR
150mV at I
BR
-0.8mA
(c) R
B
= V
BR
/ I
BR
=150/0.8=187.5
) (
1 . 2
1
Hz
R C
f
T T

=


32
*2N7002 Spec. I
D
=115mA
(max.)
Ciss=50pF
S
I
t
V
C =

S
I mA= =

5 . 2
10 100
5
10 50
9
12
S OUT
I I


33


34
9. The error amplifier is fixed gain amplifier of 40dB. The C
P
capacitor is connected
with the FB-pin, LPF is composed, and the phase of the loop characteristic of the
switching regulator makes amends. Usually the capacitor C
P
is 0.1F.
*Improve Load Transient Response



35
CH1:OUT CH2:P-CH MOSFET(G) CH3:P-CH MOSFET(D) CH4:I
L
Fig1. Iout=130mA waveform
Fig2. Iout=50mA waveform


36
Fig3. Iout=200mA waveform
Fig4. Iout=300mA waveform



37
DCM Example:
V
IN
=12V10% V
OUT
=9V I
OUT
=115mA frequency=600kHz L=10H
Operating in CCM:

Operating in DCM:
Change L=4.7H & frequency=600kHz

We can use the maximum duty cycle is 85%(AT1380A) for this application by
operating on DCM mode.
% 33 . 83
8 . 10
9
.) (min
= = =
IN
OUT
V
V
D
2
2
4
1 1
2
D
T R
L
V V
S LOAD
IN OUT

+ +
=
% 80 = D
% 47 . 47 = D



38
References
1. Application Report Understanding Buck Power Stages in Switchmode Power
Supplies, TI Literature Number SLVA057, 1999.
2. R. W. Erickson, Fundamentals of Power Electronics, New York: Chapman and
Hall, 1997.