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ENB244 ASSIGNMENT Total 30%

Part A Digital Design UsingPLDs 40% o! Assign"ent#


Note$ Please work in groups of around 2 and hand in a combined assignment part A.
%an&e& '(t$ Wed 1st/Sept
D(e in$ Mon 20
th
/Sept !ia Assignment Minder"
Problems 1 must be sol!ed using Win#$P% and a &A%20'(.
Problems 2 and ) must be sol!ed using Altera*s +uartus ,, A-.% or '-.%"
Problem / must be sol!ed using Altera*s schematic circuit design s0stem.ie. !ia #ct .iagram"
All / designs must be simulated on the computer1 and appropriate testing wa!eforms included.
P)'BLEM * #ounter .esign 2 $sing &A% and the Win#$P% software"
.esign a modulo 3 counter to displa0 41* 42* 4)* 4/* 43* on a 56segment %7. displa0 in line with the count.
8nce the counter reaches 3 it is to stop counting1 and an0 further count inputs are to turn on the .P %7..
9ote the 43* is still to be displa0ed1 together with the decimal point"
:he 3or ;" state counter should count in 56segment mode so that it fits into a single &A%20'(.
9ote< sometimes 2 smaller models are better than 1 larger one"

#lock Pulse
DE+ADE
+'UNTE)
&A%20'("
(
=eset
=
A reset input is to be incorporated into the s0stem so that the counter will be cleared to 41* on the ne>t input clock pulse
following a reset as indicated in the diagram abo!e.
9ote< the counter can be in an0 state when initiall0 powered up and needs to be reset"
b" Simulate the s0stem in Win#$P%1 making sure that the simulation wa!eforms 0ou hand in are rea&a,le.
CRA Details - Your report should contain:
A block diagram showing pin connections
Any relevant design notes (may or may not be appropriate, depending upon your design method)
WinCUPL Coding
Appropriate test waveorms (suicient, but not too many)
:here is no need to test it on hardware1 but 0ou are !er0 welcome to do so1 if 0ou wish"
10 marks"
P)'BLEM 2 #ounter .esign6 +uartus ,, 1 A-.%/'-.% S0nchronous Se? #ct .esign"
A ) stage $p/.own @ohnson #ounter is indicated in the diagram below

#ount Pulse
3-,it
.o/nson
+'UNTE)
)
#ount A AB#
CeroAAB# A 000"
Dull A AB# A 001"
C
D
P
$
=eset
=
$p/.own
E A AB# A110 or111" E
$p count se?uence is AB# A 000110011101111101110011000.
When the =eset input is true the counter is to go to Fero as0nchronousl0.
a" .esign the counter in +uartus ,,.A-.% or '-.%"
b" Simulate the s0stem and produce appropriate timing wa!eforms.
CRA Details - Your report should contain:
Any relevant design notes (may or may not be appropriate, depending upon your design method)
Coding (A!"L or #!"L)
Appropriate test waveorms (suicient, but not too many)$ :here is no need to test the s0stem on hardware
( marks"
P)'BLEM 3 State Machine .esign 2 +uartus,, 6 A-.% or '-.% Se? Machine .esign S0stem"
A se?uential circuit has 2 inputs AB and ) outputs G1 Ca1 Cb" together with a reset input =.
:he output G is to go true whene!er one of the inputs A or B goes true1 and is to remain until both A and B
ha!e come and gone1 or the s0stem is reset".
:he output Ca is to go true if A arri!es before B and is to remain true until the s0stem is reset.
:he output Cb is to go true if B arri!es before A and is to remain true until the s0stem is reset.
Both outputs Ca and Cb are to be true when A and B arri!e within the same clock pulse and are to remain true
until the s0stem is reset.
9ote< Eou can assume that there are onl0 single A and B pulses although the0 can be more than one clock pulse wide"
a" .raw a model of the s0nchronous s0stem1 together with a state assignment and output e?uations.
9ote< it is sometimes better to use a number of small sub6models rather than one large one"
b" ,mplement the s0stem using the s0nchronous se?uential circuit design s0stem in +uartus ,,.A-.% or'-.%"
c" Simulate the s0stem and produce rele!ant timing wa!eforms.
CRA Details - Your report should contain:
%elevant design notes (&odels, 'tate assignment etc)
Coding (A!"L or #!"L)
Appropriate test waveorms (suicient, but not too many)$ :here is no need to test the s0stem on hardware
10 marks"
P)'BLEM 4 Shift =eg .esign6 Altera Schematic graphical" #ircuit .iagram .esign S0stem"
.esign the circuit of a /6bit1 :> shift register using .6t0pe flip flops.

T0
S%I1T
)EGISTE)
/
Ser.ata ,n A 40*
Serial .ata 8ut
:> 7mpt0
:>
:>7

%
#lock
Par :> .ata ,n
:) 6H:0
%oad/Shift
As0n =eset =
.in
Serial #lock 8ut
/ pulses"
:>
Note$ #ould consider using an e>tra .6flip flop to help with the :> 7mpt0 output
When the %oad/IShift input is true the :> .ata :) 6H :0" is to be loaded into the shift register on the ne>t clock
pulse and the :>7mpt0 7" output is to go false.
When the %oad/IShift input is false the :> .ata :) 6H :0" is to be shifted right one place on the ne>t clock
pulse. :hus the original :> data can be shifted out in serial form least sig bit first
When all / bits ha!e been shifted out the :> 7mpt0 7" output line is to go true.
When the =eset input is 0 the shift register is to be cleared as0nchronousl0.
CRA Details - Your report should contain:
Circuit "iagram and any relevant design notes
Appropriate test waveorms (suicient, but not too many)
12 marks"
ENB244 Assign Part B MI+)'P)'+ESS')S$ 20% o! Assign"ent
3as/ing Ma4/ine Serial+o""s5 I'5 Ti"ers an& Interr(6ts#
-anded out Wed 1
st
Sept"1 .emonstrations in week starting Mon11
th
8ct"
N'TE$ Please work in groups of around )1 and hand in one report at demonstration.
A microprocessor s0stem S:J300" has ( inputs Port#" and ( 8utputs PortB" as indicated in the diagram below.

Port #
PortB
(
(
Push Buttons
0'
%7.*s
3'
ATMega*2
Pull $p =esistors
internal"
P.1
=S2)2
Serial
#omms
:>
P.0
=>
:>
=>
MAG2)2
3'
+'MPUTE)
running
h0perterminal"
:his s0stem is to be used to control a domestic clothes washing machine with the following ,nputs and 8utputs.
INPUTS 'UTPUTS
P#0 A Start/#ontinue push button PB0 A =eal :ime ,ndicator %7.
P#1 A Stop push button PB1 A #old Water ,nlet 'al!e for rinsing"
P#2 A .oor Switch PB2 A -ot Water ,nlet 'al!e for washing"
P#) A Water %e!el %ow pressure switch contact PB) A Wash/Spin Solenoid ie Motor Slow/Dast"
P#/ A Water %e!el Dull pressure switch contact PB/ A Main Motor 89
P#3 A :emperature -ot 7nough :hermostat contact PB3 A Motor Dwd/=e!
P#; A Ad!ance :o 9e>t #0cle PB; A Pump 8ut Motor 89
PB5 A 7nd %7.

3as/ Mo&e
)inse Mo&e S6in Mo&e
:urn 8n Wash Solenoid
Set Motor to Slow Dwd Mode
.ela0 appro> 2 secs
#heck :emperaure
#heck Stop Button
#heck .oor Switch
:ime B $p
Ees
9o
Set :imerA for 13 minutes
#hange Motor .irection
Set :imer B for 3 secs
:urn 8n Motor
:urn 8ff Motor
.ela0 appro> 1 secs
:ime A $p
Ees
9o
+/e47 Te"6erat(re
:urn 8ff -eater :urn 8n -eater
Water -ot 7nough
Ees
9o
Start Button Pressed
.ela0 appro> 2 secs
Start
Ees
9o
Wash Mode
Pump 8ut Water
Pump 8ut Water
=inse with #leanWater Mode
.ela0 appro> 2 secs
Spin .r0 KPump 8ut Mode
:urn 8n 7nd %7.
:urn 8ff -ot water
:urn 8n -ot Water
Water %e!el -igh
Ees
9o
.ela0 appro> 2 secs
.ela0 appro> 2 secs
.ela0 appro> 2 secs
Note$
:hese flow charts are a
suggestion onl01 so feel free to
make an0 changes1 that will be
an impro!ement.
)eal Ti"e S8ste"
,mplement the washing machine using a real time s0stem as indicated in the diagram below.
:oggle PB0 %7. e!er0 second ie at a fre? of 0.3-F" !ia the :imer 1 interrupt s0stem.

:imer ,nterrupt
e!er0 10msecs"
,nitialisation

E9er8 *0"Se4s
,nc #lock:icks
Set 9ew#lock:ick Dlag
=ead ,nputs
produce<
Stead0 State K #hanges"

Ma0 consider checking the
Stop1 .oor Switch etc here"
etc

E9er8 Se4on&
Set 9ewSec Dlag
:oggle %7. PB0"
.ec :imers to Fero
etc
Main Progra" Loo6
%ook for Start and #ontrol machine

Sen& (se!(l &ata to P+ as process proceeds
=ele!ant ,nput K 8utput .ata1 :imes etc"

:> LSystem InitialisedM
7nable ,nterrupts
)eset Ti"er*'+AIS)

Note$
.o not forget to install the )eset and
Ti"er*'+AIS) interrupt !ectors1 in the
interrupt !ector table1 at start of the cseg.
Set :imer for 3 Secs
:est 8utputs
4:* =ecei!ed
9o
Ees
9o
4:ime $p*
9o
Ees
9o
Testing S8ste"
ASSESSMENT o! Part B
50N of the marks will be for the lab demonstration on the S:J300 board1 sometime during Week 11.
)0N of the marks will for the report i.e program listing O flow charts" that must handed in during the lab
demonstration.
Your report should contain:
Compiled 'ource Code (i$e$ list ile that the compiler produces( (((((($lst )that contains the original
source code and the machine code
Appropriate low charts

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