125

Chapter 2:
Single Inductor Multi-output DC-DC
Converters


126

2.1 Introduction
Applications of the traditional DC-DC converters such as Buck and Boost
converters have been widespread. The DC-DC converters vary in power and voltage
level in various applications. Many applications involve only one load and one
power source. In these cases, the traditional DC-DC converters are the only
candidates to perform power conversion. However, more complicated applications
with several loads and differing power demands may require multi-outputs. A
traditional way to develop multi-output converters is to use transformers. A
transformer, which has a primary winding and a number of secondary windings,
supplies different loads. In some applications, the requirement of galvanic isolation
demands the use of transformers. However, in general, the transformer-based
converters have the deficiencies of excess size, weight and cost of the transformer.
Having several high power loads, the dimensions of the transformer increases. The
general schematic of a multi-output transformer-based converter is illustrated in
Fig.2-1 (a).
The other way to generate several output voltages from a single input voltage is to
utilize multiple single output converters. A general schematic of the multiple single
output converters supplied by a single voltage source is illustrated in Fig.2-1 (b).
Each converter is designed for a specific load and the performance and/or
malfunction of each load/converter does not affect the other loads/converters.
Although this method improves the reliability of the system, the cost, volume and
weight of the system increases. The utilization of a converter for each load may
become inefficient for the overall design when some of the loads can tolerate more
fluctuations and do not need high quality converters. The problem with the multiple
converters is the number of passive and active elements which are proportional to
the number of output voltages. For instance using n Buck converters to supply n-
outputs, n inductors are required.
One solution is to share some of the active and passive elements of the converters.
This approach leads to development of multi-output DC-DC converters which is the
main focus of this chapter. The advantage of this configuration is that fewer passive
and active elements will be utilized for a given number of outputs. Therefore, the
size, weight and cost of the whole system will be reduced. However, the complexity
127

of the control system and limitations in load power are the main drawbacks of this
configuration.

C R v
3
(t)
v
in
(t)
v
1
(t)
v
2
(t)
Transformer
C
R
C
R
+
-
(a)
v
3
(t)
v
2
(t)
v
1
(t)
v
in
(t)
C R
C R
R
+
-
C

(b)
Fig.2-1: General schematic of a) multi-output transformer-based DC-DC converter
and b) multi-output transformer-less DC-DC converter

There are applications where several loads are supplied by a single main power
source, such as a fuel cell or a photovoltaic panel. Loads are different appliances
ranging from traction motors, lighting and air conditioners to controllers. The power
demand and power condition of each load is different. Some loads need a high level
128

of power but they are not very sensitive to voltage fluctuations and the quality of
power is tolerable. However, there are other loads which need adjustable voltages
with a minimum ripple to operate properly. Therefore, the switching converters
should be designed according to the load demand and the power flow direction
(from a main source to loads).
The series connected loads, practically exist in multi-level inverters. The DC-link
capacitors are connected in series and the current driven from them is determined by
the inverter. In another example, a system including several DC loads may benefit if
some of the loads are connected in series.
Ripple is a difference between the actual voltage across the load and the reference
value. The quality of the voltage may be quantified by the parameter of ripple. Three
cases are illustrated in Fig.2-2. The first case, shown in Fig.2-2 (a), illustrates the
ripple for low switching frequency and filter with small inductor and capacitor. To
reduce the ripple, the switching frequency may be increased for the same filter
parameters [Fig.2-2 (b)]. The advantage of this solution is improvement in quality
without the extra cost of passive circuit elements (inductor and capacitor). However,
the disadvantage is an increase in the switching loss and a decrease in the efficiency
of the system. The other solution is to increase the values of filter parameters with
the same switching frequency. The result of this case is illustrated in Fig.2-2 (c).


ripple
V
v(t)
ripple V
v(t)
(a)
(c)
ripple V
v(t)
(b)

Fig.2-2: Output voltage (V), average of the output voltage (
V
), reference voltage
(V
ref
) ; a) Low quality b) same LC components higher frequency and c) large LC
components same frequency

129

The building blocks of multi-output DC-DC converters are based on traditional DC-
DC converters such as Buck, Boost, and positive Buck-Boost. Before starting the
circuit analysis of multi-output converters, the traditional DC-DC converters are
briefly explained.
Conventionally, switching DC-DC converters are designed to provide a regulated
DC-source required by a specific load. There is an input power supply of which the
voltage (v
in
(t)) may fluctuate, and the level of the input current (i
in
(t)) may vary. The
required property of the DC-DC converter is to provide the demanded output voltage
(v
out
(t)) despite variations of the input voltage and the load current. If the efficiency
of the DC-DC converter is 100%, then the output power is equal to the input power.
Fig.2-3 illustrates a general schematic of a DC-DC converter.

DC-DC Converter
v
in
(t) v
out
(t)
i
out
(t)
i
in
(t)
+
-
L
O
A
D

Fig.2-3: General schematic of a DC-DC converter

There are two basic DC-DC converters, namely, Buck and Boost converters. By
cascading Buck and Boost converters, the topology of positive Buck-Boost
converter can be developed. Fig.2-4 illustrates the topologies of these three
converters, and their multi-output modifications are presented in this chapter.
Although all of the converters shown in Fig.2-4 fit with the representation in Fig.2-
3, each one of these topologies has limitations.
The conversion ratios of Buck and Boost converters are determined by the duty
cycle of their switch. Assuming the ripple is negligible (v
out
(t)=V
out
and v
in
(t)=V
in
),
(2-1 and 2-2) illustrate the relationship between the input voltage, the output voltage,
and the duty cycle of Buck and Boost converters.

in S out
V D V
Buck
(2-1)
130

in
S
out
V
D
V
Boost
1
1
(2-2)
where
Buck
S
D
is the duty cycle of S
Buck
, and
Boost
S
D
is the duty cycle of S
Boost
.
Considering that the duty cycle is between 0 and 1, the output voltage of the Buck
converter is less than its input voltage. For the Boost converter, the output voltage is
more than the input voltage.

L
O
A
D
v
in
(t) v
out
(t)
i
out
(t)
i
in
(t)
S
Buck
D
Buck
L
C
+
-
(a)
L
O
A
D
v
in
(t) v
out
(t)
i
out
(t) i
in
(t)
S
Boost
D
Boost
L
C
+
-

(b)

L
O
A
D
v
in
(t)
v
out
(t)
i
out
(t)
i
in
(t)
S
Boost
S
Buck
D
Buck
D
Boost
L
C
(c)
+
-
Fig.2-4: a) Buck converter b) Boost converter and c) positive Buck-Boost converter

Other DC-DC converters may be developed based on Buck and Boost converters.
For instance, the positive Buck-Boost converter is developed by connecting a Buck
131

and a Boost converter in series, as shown in Fig.2-4.(c). The Positive Buck-Boost
converter covers the operation areas of Buck and Boost converters. The relationship
between the input voltage, the output voltage, and the duty cycles is presented in (2-
3).
in
S
S
out
V
D
D
V
Boost
Buck
1
(2-3)
In addition, the positive Buck-Boost converter has a switching state which is
unavailable in either Buck or Boost converters. By turning S
Buck
off and turning S
Boost

on, the inductor current will be circulated in a closed loop. Therefore, it is not
conducted to any load nor it is discharged significantly.
In this chapter, multi-output modifications of these three converters are presented.
Topologies of a Buck, a Boost and a Positive Buck-Boost multi-output converter are
presented in the next sections.
Generally, the concept of the multi-output DC-DC converters is to share one part of
the converter between several loads. However, there are components which should
be devoted to one load. There are two general topologies of multi-output converters:
series connected loads and parallel connected loads. Other topologies may be
developed from these two general topologies; however, this is not the focus of this
chapter. Fig.2-5 illustrates two general topologies of the multi-output converter with
series and parallel loads.
Parallel connected loads are more common since most of the loads have a
connection to a common node.
As seen in Fig.2-5, an inductor, a switch, and a diode are the common components
of a DC-DC converter which can be the front part of a Buck, a Boost or a Positive
Buck-Boost converter. Since each load may require a different level of voltage, the
output capacitors may not be shared between different loads. Diodes (D
1
-D
n
) in
series with switches (S
1
-S
n
), in both parallel and series load configurations are
included for protection of the switches. The switches are designed to block forward
voltage when they are turned off. However, since turning on each switch changes
the voltage across other switches, the diodes in series with switches are included to
block any reverse voltage across the turned off switches. For instance, when the
loads are connected in series [Fig.2-5.(a)], if S
1
turns on, S
2
should be turned off and
the voltage across S
2
would be v
2
(t), which is negative and may damage the switch.
132

By adding a diode in series with the switch (S
2
in this case), the reverse voltage will
be blocked by the diode (D
2
in this case).

v
in
(t)
v
3
(t)
v
2
(t)
v
1
(t)
D
n
D
2
D
1
S
1
S
2
+
-
S
n

(a)
v
in
(t)
v
n
(t) v
2
(t) v
1
(t)
D
n
D
2
D
1
S
1
S
2
S
n
+
-
(b)
Fig.2-5: Multi-output DC-DC converter a) parallel-connected and b) series-
connected


To develop steady state equations of the multi-output converters, we need to explain
the mathematical modeling of the steady state performance of the converters based
on the averaging method; this is explained below.
133

2.2 Averaging Method
In steady state analysis, when the converter operates in continuous conduction mode
(CCM), the output voltages and the inductor current have a constant DC level and a
high frequency component with small amplitude, which is referred to as a ripple.
To calculate the relationship between the input voltage, the output voltages, the load
resistances and the duty cycles of the switches, the ripple can be ignored. The duty
cycle of each switch is defined as the ratio of the turn on time of the switch to the
switching cycle (T
sw
).

In the steady state condition, the DC levels of the inductor current and the output
voltages do not change over one switching cycle. In other words, in the steady state
condition, the inductor current or the capacitor voltages at the beginning and at the
end of each switching cycle are equal, as is formulated in (2-4).
) ( ) (
) ( ) (
t v T t v
t i T t i
j j
C sw C
L sw L
(2-4)
Where i
L
(t) and
) (t v
j
C
are instantaneous levels of the inductor current and the j
th

output voltage respectively. To derive the steady state equations, the average of the
inductor current over one switching cycle is named I
L
. The average of the output
voltage (
) (t v
j
C
) over one switching cycle is named
j
C
V
. In the steady state
condition, the average of the inductor current and the output voltages is constant, but
the instantaneous values of the inductor current and the output voltages change.
Fig.2-6 illustrates the inductor current (i
L
(t)) and the capacitor voltage (
) (t v
j
C
) and
their averages values (
L
I
,
j
C
V
). The instantaneous change in the inductor current
(i
L
(t)) depends on the inductance value (L), the voltage across the inductor (v
L
(t)),
and the time interval at which the voltage has been applied. Likewise, the change of
the capacitor voltage (
) (t v
j
C
)

depends on the capacitance value (C
j
), the capacitor
current (
) (t i
j
C
), and the time interval at which the current is conducted. (2-5)
formulates this fundamental relationship.
134

i
L
(t) i
L
(t+T
sw
)
0
dt
di
L
0
dt
di
L
t t+T
sw
v
Cj
(t)
v
Cj
(t+T
sw
)
i
L
(t)
0
dt
dv
Cj
0
dt
dv
Cj
t t+T
sw
(a)
(b)
t v
j
C

Fig.2-6: Actual and average quantities of a) inductor current and b) capacitor voltage

Assuming that the switching frequency is high and the current or the voltage ripple
is not significant, the instantaneous current or voltage variation is not important.
dt
t dv
C t i
dt
t di
L t v
j
j C
L
L
j
) (
) (
) (
) (
(2-5)

Averaging the above equation over one switching cycle and considering the steady
state condition:
135

0
0
) ( ) (
1
) (
1
) (
0
0 ) ( ) ( 1
) (
1
) (
sw
j
C sw C
j
T t
t
C j
sw
T t
t
C
sw
C C
sw sw
L sw L
T t
t
L
sw
T t
t
L
sw
L L
T
C
Tsw
t v T t v
C dv C
T
dt t i
T
t i I
T
L
T
t i T t i
L Ldi
T
dt t v
T
t v V
j j
sw
j
sw
j j j
sw sw

(2-6)
where V
L
is the average of v
L
(t), and
j
C
I is the average of ) (t i
j
C
, over one
switching cycle. According to (2-4) the average voltage across the inductor (V
L
) and
the average current through the capacitor C
j
are zero.
(2-6) is applied to calculate the steady state levels of the inductor current, and the
output voltages as functions of the input voltage, the load resistances and the duty
cycle. For each converter, the average of v
L
(t) over one switching cycle (V
L
) is
determined by the time interval of each switching state and the voltage applied to the
inductor in that switching cycle; a similar concept applies for the current through the
capacitor ( ) (t i
j
C
). Assuming a multi-output DC-DC converter with n switching
states (s
1
, s
2
, , s
n
) with time intervals (T
s1
, T
s2
, , T
sn
) which applies voltages (V
s1
,
V
s2
, , V
sn
) across the inductor and currents (I
s1j
, I
s2j
, , I
snj
) through the capacitor
C
j
, (2-6) may be rewritten as below:

0 ] ... [
1
) (
1
) (
0 ] ... [
1
) (
1
) (
2 2 1 1
2 2 1 1
n nj j j
sw
j j
n n
sw
S S S S S S
sw
T t
t
C
sw
C
S S S S S S
sw
T t
t
L
sw
L
T I T I T I
T
dt t i
T
t i
T V T V T V
T
dt t v
T
t v
(2-7)
Solving these equations for a topology allows the calculation of the steady state
levels of the inductor current and the output voltages as a function of the input
voltage, the output loads, and the time interval of each switching state or the duty
cycle of each switch. For simplicity, steady state equations for double-output DC-
DC converters are explained in detail. Using the averaging method, switching states
and waveforms are presented to clarify the analysis.

2.3 Topologies and Circuit Analysis
Multi-output topologies presented in this chapter are categorized into parallel and
series configurations. According to the traditional DC-DC converters, three different
136

DC-DC converters Buck, Boost and Positive Buck-Boost have been modified to
create multi-output converters. In this chapter, we analyze six general double-output
DC-DC converter topologies and define steady state equations.

2.3.1 Multi-output Buck Converter
In a multi-output Buck converter, S
Buck
, D
Buck
, and the inductor are common
components between loads. Each load has a devoted capacitor, a diode, and a
switch. Topologies with parallel and series loads are explained in this section.

Fig.2-7 shows a multi-output Buck converter topology with parallel loads. The first
part of the circuit is similar to the conventional Buck converter; and the input
switch, S
Buck
controls the power flow. There is a common inductor for several output
LC filters. Since the inductor current must be circulated through one of the outputs,
one of the output switches, S
1
, S
2
, ,S
n
must be turned on at any instant.
R
1
C
1
D
Buck
L
v
in
(t)
S
Buck
S
1
D
1
S
2
R
2
C
2 R
n
C
n
D
2
D
n
v
1
(t) v
2
(t) v
n
(t)
S
n
Common
components
Fig.2-7: Multi-output Buck converter with parallel-connected loads

As may be observed in Fig.2-7, the switches used to supply loads may conduct
current in single direction and may block voltage in both directions. The reason is
that the inductor current flows only from the inductor to the loads. However, the
voltage across each switch depends on the operation of other switches; therefore, the
voltage across each switch may be positive or negative.
If one of the output voltages (in this case, v
n
(t)) is known to be more than other
output voltages, the switch (S
n
) which conducts the inductor current to that output
voltage v
n
(t) may be removed. The reason is that when all other switches are turned
137

off, the inductor current automatically flows through D
n
and supplies v
n
(t). Since
v
n
(t) is more than other output voltages when any other switch (S
k
) is turned on, the
voltage at the anode of D
n
is v
k
(t) and v
k
(t) <v
n
(t); therefore, D
n
does not conduct
and acts like a turned off switch.
Fig.2-8 shows a multi-output Buck converter topology with series loads. Similar to
the multi-output Buck converter with parallel loads, the inductor current must be
conducted through one of the output switches (S
1
to S
n-1
). In other words, if the
inductor current is conducted by S
k
, it supplies a series connected loads (R
1
-R
k
).

R
1
C
1 D
Buck
L
v
in
(t)
S
Buck
C
2
R
2
S
1
S
2
D
1
D
2
C
n
R
n
D
n
v
n
(t)
v
2
(t)
v
1
(t)
Common
components
S
n

Fig.2-8: Multi-output Buck converter with series loads

As can be seen in Fig.2- 8, the last load, R
n
, can be connected to the inductor
through only one diode, D
n,
and without any switch. The reason is the fact that when
all S
j
switches are turned off, the current stored in the inductor turns the diode on
and supplies R
n
and the rest of the loads. When any of the switches (S
j
) is turned on,
the voltage across the diode D
n
becomes negative and D
n
will be turned off.
Therefore, there is no need to add an extra switch in series with D
n
.


138

2.3.1.1 Double-output Buck Converter Analysis with Parallel
Connected Loads

The topology of a double-output Buck converter with parallel loads is illustrated in
Fig.2-9, considering that V
2
is more than V
1
and the switch S
2
has been removed.

R
1
C
1
D
Buck
L
v
in
(t)
S
Buck
S
1
D
1
R
2
C
2
D
2
v
1
(t) v
2
(t)
Common
components

Fig.2-9: Double-output Buck converter

Four switching states of the double-output Buck converter supplying two parallel-
connected loads are illustrated in Fig.2-10.
Considering the switching states illustrated in Fig.2-10, one switching cycle
including all the switching states for the double-output Buck converter with the
parallel loads is shown in Fig.2-11.
Fig.2-11 (a) illustrates the voltage and current waveforms of the inductor. In each
switching state, the voltage across the inductor changes and as a result, the inductor
current is changed, with different slope in each switching state. Fig.2-11 (b) and (c)
illustrate the current through each output capacitor and the resultant variation of the
voltages across the output capacitors. The effect of each switching state on the
inductor current and the output voltages is explained here in detail.







139

R
1
C
1
D
Buck
L
v
in
(t)
S
Buck
S
1
D
1
R
2
C
2
D
2
v
1
(t) v
2
(t)

(a): 11: SBuck: on , S1: on
R
1
C
1
D
Buck
L
v
in
(t)
S
Buck
S
1
D
1
R
2
C
2
D
2
v
1
(t) v
2
(t)

(b): 10: SBuck: on , S1: off
R
1
C
1
D
Buck
L
v
in
(t)
S
Buck
S
1
D
1
R
2
C
2
D
2
v
1
(t) v
2
(t)

(c): 00: SBuck: off , S1: off
R
1
C
1
D
Buck
L
v
in
(t)
S
Buck
S
1
D
1
R
2
C
2
D
2
v
1
(t) v
2
(t)

(d): 01: S
Buck
: off , S
1
: on
Fig.2-10: Switching states of a double-output Buck converter



140

T
sw
T
sw
vL(t)
i
L
(t)
I
L
t
0
t
1
t
2
t
3
t
0
t
1
t
2
t
3
t
4
t
4
11 10 01 00
V
in
-V
1
V
in
-V
2
-V
2
-V
1

(a)
Tsw
Tsw
IL-IR1
-IR1
iC1(t)
v1(t)
IL
V1
t0 t1 t2 t3 t4
t0 t1 t2 t3 t4
11 10 01 00

(b)
T
sw
Tsw
I
L
-I
R2
-I
R2
11 10 01 00
v
2
(t)
i
C2
(t)
I
L
V2
t
0
t
1
t
2
t
3
t
4
t0 t1 t2 t3 t4

(c)
Fig.2-11: One switching cycle of a double-output Buck converter supplying parallel
connected loads a) inductor voltage and inductor current b) current and voltage of C
1

and c) current and voltage of C
2

141

Switching state 11 and time interval T
11
(t
0
-t
1
)
The switches S
Buck
and S
1
are turned on. As a result, the voltage across the inductor is
v
L
(t)=V
in
-V
1
. If V
in
>V
1
, the inductor current increases [Fig.2-11 (a)]. The inductor
current is supplied to the output capacitor C
1
. Therefore, the output voltage v
1
(t) is
increased while the output voltage v
2
(t) is decreased because C
2
supplies the load R
2
.

Switching state 10 and time interval T
10
(t
1
-t
2
)
The switch S
Buck
is turned on and S
1
is turned off. As a result, the voltage across the
inductor is v
L
(t)=V
in
-V
2
. If V
in
>V
2
, the inductor current is increased [Fig.2-11 (a)].
The inductor current is supplied to the output capacitor C
2
. Therefore, the output
voltage v
2
(t) is increased and the output voltage v
1
(t) is decreased because C
1

supplies the load R
1
.

Switching state 00 and time interval T
00
(t
2
-t
3
)
The switches S
Buck
and S
1
are turned off. As a result, the voltage across the inductor
is v
L
(t)= -V
2
and the inductor current is decreased [Fig.2-11 (a)]. The inductor
current is supplied to the output capacitor C
2
. Therefore, the output voltage v
2
(t) is
increased and the output voltage v
1
(t) is decreased because C
1
supplies the load R
1
.

Switching state 01 and time interval T
01
(t
3
-t
4
)
The switch S
Buck
is turned off and S
1
is turned on. As a result, the voltage across the
inductor is v
L
(t)=-V
1
and the inductor current is decreased [Fig.2-11 (a)]. The
inductor current is supplied to the output capacitor C
1
. Therefore, the output voltage
v
1
(t) is increased and the output voltage v
2
(t) is decreased because C
2
supplies the
load R
2
.

According to the switching states shown in Fig.2-10, and (2-7), voltage average
across the inductor and the average current through each capacitor over one
switching cycle can be determined as follows:

142

0 ) ( ) ( ) ( ) (
1
) (
1
) (
0 ) ( ) ( ) ( ) (
1
) (
1
) (
0 ) ( ) ( ) ( ) (
1
) (
1
) (
4
3
2
3
2
2
2
1
2
1
0
2 2 2
4
3
1
3
2
1
2
1
1
1
0
1 1 1
4
3
3
2
2
1
1
0
t
t
C
t
t
C
t
t
C
t
t
C
sw
T t
t
C
sw
C
t
t
C
t
t
C
t
t
C
t
t
C
sw
T t
t
C
sw
C
t
t
L
t
t
L
t
t
L
t
t
L
sw
T t
t
L
sw
L
dt t i dt t i dt t i dt t i
T
dt t i
T
t i
dt t i dt t i dt t i dt t i
T
dt t i
T
t i
dt t v dt t v dt t v dt t v
T
dt t v
T
t v
sw
sw
sw
(2-8)

The following time intervals are shown in Fig.2-11;
3 4 01
2 3 00
1 2 10
0 1 11
t t T
t t T
t t T
t t T
(2-9)

Assuming that the ripple is negligible, v
1
(t)=V
1
, v
2
(t)=V
2
, i
L
(t)=I
L
, v
in
(t)=V
in
.
(2-8) may be rewritten as follows:
0 ) ( ) ( ) ( ) (
1 01 2 00 2 10 1 11
V T V T V V T V V T
in in
(2-10)
0 ) ( ) ( ) ( ) (
1 1 1 1
01 00 10 11 R L R R R L
I I T I T I T I I T (2-11)
0 ) ( ) ( ) ( ) (
2 2 2 2
01 00 10 11 R R L R L R
I T I I T I I T I T (2-12)

By factorizing V
in
, I
L
, V
1
, V
2
and rewriting the (2-10 to 2-12), we can simplify these
equations as follows:

0 ) ( ) ( ) (
00 10 2 01 11 1 10 11
T T V T T V T T V
in
(2-13)
0 ) ( ) (
1
01 11 sw R L
T I T T I (2-14)
0 ) ( ) (
2
00 10 sw R L
T I T T I (2-15)

Dividing both sides of the (2-13 to 2-15) by T
sw
, the duty cycles of switches S
Buck
, S
1
,
and D
2
can be defined as follows:

143

sw
D
sw
S
sw
S
T
T T
D
T
T T
D
T
T T
D
Buck
) (
) (
) (
00 10
01 11
10 11
2
1
(2-16)
Considering that,

sw
T T T T T
01 00 01 11
(2-17)

(2-16 and 2-17) yield: 1
2 1
D S
D D .

Considering I
Rj
=V
j
/R
j
, (2-13 to 2-15) may be rewritten as:

0
2 1
2 1
V D V D V D
D S in S
Buck
(2-18)
L S L S R L S
I R D V
R
V
I D I I D
1 1
1
1
1
1 1 1
0 (2-19)
L D L D R L D
I R D V
R
V
I D I I D
2 2
2
2
2
2 2 2
0 (2-20)
The average level of the inductor current and output voltages may be formulated as:
2
2
1
2
2
2
1
2
2 1
2 1
0
R D R D
V D
I I R D I R D V D
D S
in S
L L
D
L
S
in S
Buck
Buck

(2-21)
According to (2-19 and 2-20):
2
2
1
2
1
1
2 1
1
R D R D
V R D D
V
D S
in S S
Buck
(2-22)
2
2
1
2
2
2
2 1
2
R D R D
V R D D
V
D S
in S D
Buck
(2-23)

As (2-22 and 2-23) indicate, the level of output voltages depend on the resistance of
the loads, the duty cycles of the switches S
Buck
and S
1
, and the input voltage (V
in
). For
any special case where (R
1
=R
2
=R) the output voltages are related to the input
voltage and the duty cycles, as presented in the following equations:
2 2
1
2 1
1
D S
in S S
D D
V D D
V
Buck
(2-24)
144

2 2
2
2 1
2
D S
in S D
D D
V D D
V
Buck
(2-25)
To analyze the effect of the load variations on the steady state operation, three
different cases R
1
=R
2
, R
1
=2R
2
and 2R
1
=R
2
are considered. For each case, V
1
/V
in

and V
2
/V
in
are plotted vs.
1
S
D
for four different
Buck
S
D

values. Since
1
2 1
D S
D D
, when
1
S
D
increases,
2
D
D
decreases linearly. According to (2-22 and 2-23), the
effect of
1
S
D
on V
1
is the same as the effect of
2
D
D
on V
2
.
Buck
S
D
has a proportional
relationship with V
1
and V
2
.
When one of the load resistors increases compared to the other one, the relevant
output voltage reduces compared to the equal load resistances case. For R
1
=2R
2
=2R,
the output voltage equations are:

2 2
1
2 1
1
2
2
D S
in S S
D D
V D D
V
Buck
(2-26)
2 2
2
2 1
2
2
D S
in S D
D D
V D D
V
Buck
(2-27)

And for R
2
=2R
1
=2R, the output voltage equations are:

2 2
1
2 1
1
2
D S
in S S
D D
V D D
V
Buck
(2-28)
2 2
2
2 1
2
2
2
D S
in S D
D D
V D D
V
Buck
(2-29)
Two other case studies are considered, and the results are presented in Fig.2-12.
Case study:
0
1
S
D

In all cases considered in Fig.2-12, for
0
1
S
D
, the output voltage V
1
has the same
level of zero independent from load resistances R
1
and R
2
. This fact may be
explained by considering the topology of a double output Buck converter with
parallel loads. With
0
1
S
D
the converter acts the same as a traditional Buck
converter with only the second load as its output, and the first load continuously
145

disconnected. As a result, the voltage V
1
is zero for all cases and the voltage V
2

varies proportional to
Buck
S
D
.




Fig.2-12: V
1
/V
in
and V
2
/V
in
with respect to
1
S
D and for different
Buck
S
D in a
double output Buck converter with parallel loads


146

Case study:
1
1
S
D

Considering the above explanation, for the case study with
1
1
S
D
, the only change
is replacement of V
1
and V
2
. Therefore, in this case, V
2
is continuously zero and V
1

varies proportional to
Buck
S
D
.
2.3.1.2 Double-output Buck Converter Analysis with Series
Connected Loads

Double output Buck converter topology with series loads is illustrated in Fig.2-13.
The switching states of the double-output Buck converter with the series loads are
illustrated in Fig.2-14. The front side of the converter is similar to the traditional
Buck converter and the output part consists of two switch-capacitor units connected
in series which supply two different loads.
The inductor and the capacitor current and voltage waveforms are illustrated in
Fig.2-15. The name of the switching state for each time interval is also mentioned.
Comparing these waveforms with the waveforms of the double output Buck
converter with parallel loads, the shape of the inductor voltage is similar, but the
levels of the voltages are changed.

Common
components
R
1
C
1 D
Buck
L
v
in
(t)
S
Buck
C
2
R
2
S
1
D
1
D
2
v
2
(t)
v
1
(t)

Fig.2-13: A double output Buck converter with series loads

147

R
1
C
1 D
Buck
L
v
in
(t)
S
Buck
C
2
R
2
S
1
D
1
D
2
v
2
(t)
v
1
(t)

11: SBuck: on , S1: on
(a)
R
1
C
1 D
Buck
L
v
in
(t)
S
Buck
C
2
R
2
S
1
D
1
D
2
v
2
(t)
v
1
(t)

10: SBuck: on , S1: off
(b)

R
1
C
1 D
Buck
L
v
in
(t)
S
Buck
C
2
R
2
S
1
D
1
D
2
v
2
(t)
v
1
(t)

00: SBuck: off , S1: off
(c)

R
1
C
1 D
Buck
L
v
in
(t)
S
Buck
C
2
R
2
S
1
D
1
D
2
v
2
(t)
v
1
(t)

01: SBuck: off , S1: on
(d)
Fig.2-14: Switching states of a double-output Buck converter with series loads
148

V
L
i
L
Tsw
T
sw
I
L
t0 t1 t2 t3
t0 t1 t2 t3
11 10 01 00
V
in
-V
1
V
in
-V
1
-V
2
-V
1
-V
2
-V
1

(a)
V1
iC1
Tsw
Tsw
IL -IR1
IR1
V1
t0 t1 t2 t3
t0 t1 t2 t3
11 10 01 00

(b)
i
C2
V
2
T
sw
T
sw
I
L
-I
R2
-I
R2
11 10 01 00
V
2
I
L
t0 t1 t2 t3
t0 t1 t2 t3

(c)
Fig.2- 15: One switching cycle of a double-output Buck converter supplying series-
connected loads a) inductor voltage and inductor current b) C
1
current and voltage
and c) C
2
current and voltage
149

The effect of each switching state on the inductor current and the output voltages are
explained in the following sections. In all switching states, the inductor current is
conducted to the first load (R
1
) continuously. Therefore, in the steady state, the
inductor current must be equal to the first load (R
1
) current.

Switching state 11 and time interval T
11
(t
0
-t
1
)
The switches S
Buck
and S
1
are turned on. As a result, the voltage across the inductor is
v
L
(t)=V
in
-V
1
. Since V
in
>V
1
, the inductor current is increased [Fig.2-15 (a)] and
supplies the output capacitor C
1
. Since the inductor current is equal to the first load
(R
1
) current, the output voltage v
1
(t) remains unchanged and the output voltage v
2
(t)
is decreased because of supplying the load R
2
[Fig.2-15 (b) and (c)].

Switching state 10 and time interval T
10
(t
1
-t
2
)
The switch S
Buck
is turned on and S
1
is turned off. As a result, the voltage across the
inductor is v
L
(t)=V
in
-V
1
-V
2
. Since V
in
>V
1
+V
2
, the inductor current is increased
[Fig.2- 15 (a)]. The inductor current is supplied to the output capacitors C
1
and C
2
.
Therefore, the output voltage v
2
(t) is increased and the output voltage v
1
(t) stays
unchanged [Fig.2-15 (b) and (c)] because the inductor current is equal to the first
load (R
1
) current.

Switching state 00 and time interval T
00
(t
2
-t
3
)
The switches S
Buck
and S
1
are turned off. As a result, the voltage across the inductor
is v
L
(t)= -V
1
-V
2
and the inductor current is decreased [Fig.2-15 (a)]. The inductor
current is supplied to the output capacitors C
1
and C
2
. Therefore, the output voltage
v
1
(t) stays unchanged and v
2
(t) is increased [Fig.2-15 (b) and (c)].

Switching state 01 and time interval T
01
(t
3
-t
4
)
The switch S
Buck
is turned off and S
1
is turned on. As a result, the voltage across the
inductor is v
L
(t)=-V
1
and the inductor current decreases [Fig.2-15 (a)]. The inductor
current is supplied to the output capacitor C
1
. Therefore, the output voltage v
1
(t)
stays unchanged and the output voltage v
2
(t) is decreased because of supplying the
load R
2
[Fig.2-15 (b) and (c)].

150

According to the switching state waveforms shown in Fig.2-15 and (2-7), the steady
state equation can be derived based on the average voltage across the inductor and
the average current through the capacitors over one switching cycle, as follows:
0 ) ( ) ( ) ( ) (
1
) (
1
) (
0 ) ( ) ( ) ( ) (
1
) (
1
) (
0 ) ( ) ( ) ( ) (
1
) (
1
) (
4
3
2
3
2
2
2
1
2
1
0
2 2 2
4
3
1
3
2
1
2
1
1
1
0
1 1 1
4
3
3
2
2
1
1
0
t
t
C
t
t
C
t
t
C
t
t
C
sw
T t
t
C
sw
C
t
t
C
t
t
C
t
t
C
t
t
C
sw
T t
t
C
sw
C
t
t
L
t
t
L
t
t
L
t
t
L
sw
T t
t
L
sw
L
dt t i dt t i dt t i dt t i
T
dt t i
T
t i
dt t i dt t i dt t i dt t i
T
dt t i
T
t i
dt t v dt t v dt t v dt t v
T
dt t v
T
t v
sw
sw
sw

(2-30)

Assuming the ripple is negligible, v
1
(t)=V
1
, v
2
(t)=V
2
, v
in
(t)=V
in
, and i
L
(t)=I
L
,
(2-30) may be rewritten as follows:

0 ) ( ) ( ) ( ) (
1 01 2 1 00 2 1 10 1 11
V T V V T V V V T V V T
in in
(2-31)
0 ) ( ) ( ) ( ) (
1 1 1 1
01 00 10 11 R L R L R L R L
I I T I I T I I T I I T (2-32)
0 ) ( ) ( ) ( ) (
2 2 2 2
01 00 10 11 R R L R L R
I T I I T I I T I T (2-33)

where T
11
, T
10
, T
00
, and T
01
are the time intervals of switching states 11, 10, 00, and
01, respectively. By factorizing V
in
, I
L
, V
1
, V
2
and rewriting (2-31 to 2-33):

0 ) ( ) ( ) (
00 10 2 1 10 11
T T V T V T T V
sw in
(2-34)
0 ) ( ) (
1
sw R sw L
T I T I (2-35)
0 ) ( ) (
2
00 10 sw R L
T I T T I (2-36)

Dividing both sides of (2-34 to 2-36) by T
sw
, the duty cycles of the switch S
Buck
and
the diode D
2
can be derived as follows:
sw
D
sw
S
T
T T
D
T
T T
D
Buck
) (
) (
00 10
10 11
2
(2-37)
151

Considering I
Rj
=V
j
/R
j
, (2-34 to 2-36) may be rewritten as:
0
2 1
2
V D V V D
D in S
Buck
(2-38)
L L R L
I R V
R
V
I I I
1 1
1
1
0
1
(2-39)
L D L D R L D
I R D V
R
V
I D I I D
2 2
2
2
2 2 2 2
0 (2-40)

The average inductor current and the output voltages may be formulated as:
2
2
1
2
2
1
2
2
0
R D R
V D
I I R D I R V D
D
in S
L L
D
L in S
Buck
Buck
(2-41)

Substituting I
L
from (2-41) to (2-38 to 2-40) yields:
2
2
1
1
1
2
R D R
V R D
V
D
in S
Buck
(2-42)
2
2
1
2
2
2
2
R D R
V R D D
V
D
in S D
Buck
(2-43)

As (2-42 and 2-43) indicate, the output voltages depend on the resistance of the
loads, the duty cycles of the switches S
Buck
and S
1
, and the input voltage (V
in
). For an
especial case where (R
1
=R
2
=R), the output voltages are related to the input voltage
and the duty cycles presented in (2-44 and 2-45)
2
1
2
1
D
in S
D
V D
V
Buck
(2-44)
2
2
2
2
1
D
in S D
D
V D D
V
Buck
(2-45)
For R
1
=2R
2
=2R, the output voltage equations are:
2
1
2
2
2
D
in S
D
V D
V
Buck
(2-46)
2
2
2
2
2
D
in S D
D
V D D
V
Buck
(2-47)

152

And for R
2
=2R
1
=2R, the output voltage equations are:
2
1
2
2 1
D
in S
D
V D
V
Buck
(2-48)
2
2
2
2
2 1
2
D
in S D
D
RV D D
V
Buck
(2-49)

To analyze the effect of the load variations on the steady state operation, Fig.2-16 is
presented. Three different cases R
1
=R
2
, R
1
=2R
2
and 2R
1
=R
2
are considered and
for each case, V
1
/V
in
and V
2
/V
in
are plotted vs.

1
S
D
for four
Buck
S
D
values. Since the
loads are connected in series, R
1
is supplied with the inductor current continuously;
therefore, V
2
/V
in
is lower than V
1
/V
in
for equal resistances. (2-43) indicates that if V
2

needs to be increased,
2
D
D
must increase; as a result, the inductor current will
decrease based on (2-41). Reduction in inductor current causes reduction in V
1
.
Buck
S
D
has a proportional relationship with V
1
and V
2
.

Two other case studies have been considered for the results presented in Fig.2-16.

Case study:
0
1
S
D

In all cases considered in Fig.2-16, when
0
1
S
D
, the topology of the double-output
Buck converter with series loads reduces to a traditional Buck converter with both
loads connected in series as one load. Therefore, the summation of the output
voltages would be equal to
Buck
S in
D V
.

Case study:
1
1
S
D

With
1
1
S
D
, the second load is disconnected from the inductor continuously;
therefore, the output voltage is zero. The rest of the circuit acts as a traditional Buck
converter only with the first load. Therefore, the output voltage V
1
varies
proportional to
Buck
S
D
.

153







Fig.2-16: V
1
/V
in
and V
2
/V
in
with respect to
1
S
D and for different
Buck
S
D in a double
output Buck converter with series loads
.


154

2.3.2 Multi-output Boost Converters
In a multi-output Boost converter, S
Boost
and the inductor are common components
between loads. Each load has a devoted capacitor, diode, and a switch. Topologies
with parallel and series loads are explained in this section.
Fig.2-17 shows a multi-output Boost converter topology with parallel loads. The
first part of the circuit is similar to the conventional Boost converter, and the switch
S
Boost
controls the power flow. Since the inductor current must be circulated all the
time, one of the output switches, S
1
, S
2
, , S
n
or S
Boost
must be turned on at any
instant. As can be observed in Fig.2-17, as for a conventional Boost converter, the
inductor current may be increased by conduction of S
Boost
. Therefore, the multi-
output Boost converter may increase its output voltages over input voltage.
Although there is no theoretical limit, in practice, the conversion ratio of multi-
output Boost converter supplying parallel connected loads reduces because of losses
in active and passive elements.
R
1
C
1
L
v
in
(t) S
Boost
S
1
D
1
S
2
R
2 C
2
R
n
C
n
D
2
D
n
v
1
(t)
v
2
(t) v
n
(t)
S
n
Common
components
Fig.2-17: Multi-output Boost converter with parallel-connected loads

As may be observed in Fig.2-17, the switches used to supply loads conduct current
in single direction and block voltage in both directions. The reason is the inductor
current flows only from the inductor to loads. However, the voltage across each
switch depends on the operation of other switches; therefore, the voltage across each
switch may be positive or negative.
If one of the output voltages (in this case, v
n
(t)) is known to be more than other
output voltages, the switch conducting the inductor current to that output voltage
(S
n
) may be removed because, when all other switches are turned off, the inductor
current automatically conducts from D
n
and supplies v
n
(t). Since v
n
(t) is more than
155

other output voltages when any other switch (S
k
) is turned on, the voltage at the
anode of D
n
is v
k
(t) and v
k
(t) <v
n
(t); therefore, D
n
does not conduct and acts like a
turned off switch.
Fig.2-18 shows a multi-output Boost converter topology with series loads. Similar to
the multi-output Boost converter with parallel loads, the inductor current must be
conducted through one of the output switches (S
1
to S
n-1
and D
n
) or S
Boost
. In other
words, if the inductor current is conducted by S
k
, it supplies the series connected
loads (R
1
-R
k
).
R
1
C
1
L
v
in
(t) S
Boost
C
2
R
2
S
1
S
2
D
1
D
2
C
n
R
n
D
n
v
n
(t)
v
2
(t)
v
1
(t)
Common
components

Fig.2-18: Multi-output Boost converter with series connected loads


As can be seen in Fig.2-18, the last load, R
n,
can be connected to the inductor
through only one diode, D
n,
and without any switch. The reason is due to the fact
that when all S
j
switches are turned off, the current stored in the inductor turns the
diode on and supplies R
n
and the rest of the loads. When any of the switches (S
j
) or
S
Boost
is turned on the voltage across the diode D
n
is negative and D
n
is turned off.
Therefore, there is no need to add a switch in series with D
n
.
2.3.2.1 Double-output Boost Converter Analysis with Parallel
Connected Loads

The topology of a double-output Boost converter with parallel loads is illustrated in
Fig.2-19. Considering that V
2
is more than V
1
, the switch S
2
has been removed.


156

R
1
C
1
L
v
in
(t) S
Boost
S
1
D
1
R
2 C
2
D
2
v
1
(t)
v
2
(t)
Common
components
Fig.2-19: Double-output Boost converter

The switching states of the double-output Boost converter with two parallel-
connected loads are illustrated in Fig.2-20. The number of the switching states
equals the number of loads plus 1. For example, in the case of multi-output Buck
converter with parallel loads, the number of loads is 2. Therefore, the number of
switching states is 2+1=3. Switching states are named according to the condition of
S
Boost
and S
1
in each switching state.
Considering the switching states illustrated in Fig.2-20, one switching cycle
including all switching states for the double-output Boost converter with parallel
loads is shown in Fig.2-21.

Fig.2-21 (a) illustrates the voltage and current waveforms of the inductor. The
operation of switches causes the switching states to change. In each switching state,
the voltage across the inductor changes. As a result, the inductor current is changed
with a different slope in each switching state. Fig.2-21 (b) and (c) illustrate the
current through each output capacitor over each switching cycle and the resultant
variation of the voltages across the output capacitors. The effect of each switching
state on the inductor current and the output voltages is explained here in detail.


157

R
1
C
1
L
v
in
(t) S
Boost
S
1
D
1
R
2 C
2
D
2
v
1
(t)
v
2
(t) v
n
(t)

10: SBoost: on , S1: off
(a)
R
1
C
1
L
v
in
(t) S
Boost
S
1
D
1
R
2 C
2
D
2
v
1
(t)
v
2
(t) v
n
(t)

01: SBoost: off , S1: on
(b)
R
1
C
1
L
v
in
(t) S
Boost
S
1
D
1
R
2 C
2
D
2
v
1
(t)
v
2
(t) v
n
(t)

00: SBoost: off , S1: off
(c)
Fig.2-20: Switching states of double-output Boost converter




158

v
L
(t)
i
L
(t)
T
sw
T
sw
I
L
t
0
t
1
t
2 t
3
t
0
t
1
t
2 t
3
10 01 00
V
in
V
in
-V
1
V
in
-V
2

(a)

i
C1
(t)
v
1
(t)
T
sw
T
sw
I
L
-I
R1
-I
R1
10 01 00
V
1
I
L
t
0
t
1
t
2
t
3
t
0
t
1
t
2
t
3

(b)
v
2
(t)
i
C2
(t)
T
sw
T
sw
I
L
-I
R2
-I
R2
V
2
I
L
t
0
t
1
t
2
t
3
t
0
t
1
t
2 t
3
10 01 00

(c)
Fig.2-21: One switching cycle of a double-output Boost converter supplying parallel
connected loads a) inductor voltage and inductor current b) C
1
current and voltage
and c) C
2
current and voltage
159

Switching state 10 and time interval T
10
(t
0
-t
1
)
The switch S
Boost
is turned on and the switch S
1
is turned off. As a result, the voltage
across the inductor is v
L
(t)=V
in
and the inductor current increases [Fig.2- 21 (a)]. The
inductor current is not supplied to the output capacitors. Therefore, the output
voltages v
1
(t) and v
2
(t) are decreased because of supplying the loads R
1
and R
2

respectively.

Switching state 01 and time interval T
01
(t
1
-t
2
)
The switch S
Boost
is turned off and the switch S
1
is turned on. As a result, the voltage
across the inductor is v
L
(t)=V
in
-V
1
. Since V
in
<V
1
, the inductor current decreases
[Fig.2- 21 (a)]. The inductor current is supplied to the output capacitor C
1
; therefore,
the output voltage v
1
(t) is increased and the output voltage v
2
(t) is decreased because
of supplying the load R
2
.

Switching state 00 and time interval T
00
(t
2
-t
3
)
The switch S
Boost
and S
1
is turned off. As a result, the diode D
2
is conducting and the
voltage across the inductor is v
L
(t)=V
in
-V
2
. Since V
in
<V
2
, the inductor current
decreases [Fig.2-21 (a)]. The inductor current is supplied to the output capacitor C
2
.
Therefore, the output voltage v
2
(t) is increased and the output voltage v
1
(t) is
decreased because of supplying the load R
1
. The same calculations developed for
the double-output Buck converter are required for the double-output Boost converter
to extract the average levels of inductor current and output voltages in a steady state
condition.

According to the switching states shown in Fig.2-20 and (2-7), the voltage average
across the inductor and the average current through each capacitor over one
switching cycle can be determined as follows:

160

0 ) ( ) ( ) (
1
) (
1
) (
0 ) ( ) ( ) (
1
) (
1
) (
0 ) ( ) ( ) (
1
) (
1
) (
3
2
2
2
1
2
1
0
2 2 2
3
2
1
2
1
1
1
0
1 1 1
3
2
2
1
1
0
t
t
C
t
t
C
t
t
C
sw
T t
t
C
sw
C
t
t
C
t
t
C
t
t
C
sw
T t
t
C
sw
C
t
t
L
t
t
L
t
t
L
sw
T t
t
L
sw
L
dt t i dt t i dt t i
T
dt t i
T
t i
dt t i dt t i dt t i
T
dt t i
T
t i
dt t v dt t v dt t v
T
dt t v
T
t v
sw
sw
sw

(2-50)
The following time intervals are shown in Fig.2-21:
2 3 01
1 2 00
0 1 10
t t T
t t T
t t T
(2-51)
where T
10
, T
00
, and T
01
are the time intervals of switching states 10, 00, and 01,
respectively.

Assuming that the ripple is negligible, v
1
(t)=V
1
, v
2
(t)=V
2
, i
L
(t)=I
L
, v
in
(t)=V
in
, (2-45)
can be rewritten as follows:

0 ) ( ) ( ) (
2 00 1 01 10
V V T V V T V T
in in in
(2-52)
0 ) ( ) ( ) (
1 1 1
00 01 10 R R L R
I T I I T I T (2-53)
0 ) ( ) ( ) (
2 2 2
00 01 10 R L R R
I I T I T I T (2-54)

By factorizing V
in
, I
L
, V
1
, V
2
and rewriting (2-52 to 2-54) we can simplify these
equations as follows:

0 ) ( ) ( ) (
00 2 01 1
T V T V T V
sw in
(2-55)
0 ) ( ) (
1
01 sw R L
T I T I (2-56)
0 ) ( ) (
2
00 sw R L
T I T I (2-57)
Dividing both sides of (2-55 to 2-57) by T
sw
, the duty cycles of switches S
Buck
, S
1
,
and D
2
can be defined as follows:

161

sw
D
sw
S
T
T
D
T
T
D
) (
) (
00
01
2
1
(2-58)
where

sw
T T T T
01 00 10
(2-59)

from (2-59) yields: 1
2 1 Boost
S D S
D D D

Assuming that the output voltage ripple is negligible, I
Rj
=V
j
/R
j
, (2-55 to 2-57) can be
rewritten as:

0
2 1
2 1
V D V D V
D S in
(2-60)
L S L S R L S
I R D V
R
V
I D I I D
1 1
1
1
1 1 1 1
0 (2-61)
L D L D R L
D
I R D V
R
V
I D I I D
2 2
2
2
2 2 2
2
0 (2-62)

The average level of the inductor current and the output voltages can be formulated
as:

2
2
1
2
2
2
1
2
2 1
2 1
0
R D R D
V
I I R D I R D V
D S
in
L L
D
L
S
in
(2-63)
According to (2-61 and 2-62):

2
2
1
2
1
1
2 1
1
R D R D
V R D
V
D S
in S
(2-64)
2
2
1
2
2
2
2 1
2
R D R D
V R D
V
D S
in D
(2-65)
As (2-64 and 2-65) indicate, the level of the output voltages depend on the resistance
of the loads, the duty cycles of switch S
1
and diode D
2
, and the input voltage
magnitude (V
in
).
162

For a special case where (R
1
=R
2
=R), the output voltages are related to the input
voltage and the duty cycles, as presented in the following equations:
2 2
1
2 1
1
D S
in S
D D
V D
V (2-66)
2 2
2
2 1
2
D S
in D
D D
V D
V (2-67)
For R
1
=2R
2
=2R, the output voltage equations are:
2 2
1
2 1
1
2
2
D S
in S
D D
V D
V (2-68)
2 2
2
2 1
2
2
D S
in D
D D
V D
V (2-69)
And for R
2
=2R
1
=2R, the output voltage equations are:
2 2
1
2 1
1
2
D S
in S
D D
V D
V (2-70)
2 2
2
2 1
2
2
2
D S
in D
D D
V D
V (2-71)
To analyze the effect of the load variations on the steady state operation, three
different cases R
1
=R
2
, R
1
=2R
2
and 2R
1
=R
2
are considered. For each case, V
1
/V
in

and V
2
/V
in
are plotted vs.
1
S
D
for four different
Boost
S
D

values. Since for constant
Boost
S
D
and for
alue constant v a
2 1
D S
D D
, when
1
S
D
increases,
2
D
D
decreases
linearly. According to (2-64 and 2-65), the effect of
1
S
D
on V
1
is the same as the
effect of
2
D
D
on V
2
.
When one of the load resistors increases compared to the other one, the relevant
output voltage reduces compared to the equal load resistance case.
Two other case studies have been considered for the results presented in Fig.2-22.

Case study:
0
1
S
D

In all cases considered in Fig.2-16, for
0
1
S
D
, the topology of the double-output
Boost converter with parallel loads reduces to a traditional Boost converter with
163

second load as the only load. Therefore, the output voltage V
2
would be equal to
) 1 /(
Boost
S in
D V
where V
1
=0.





Fig.2-22: The visualization of (2-57 to 2-59): the level of output voltage (V
1
,V
2
) for
variable d
1
and different d
Buck
values


164

Case study:
1
1
S
D

With
1
1
S
D
, the second load is disconnected from the inductor continuously;
therefore, the output voltage V
2
is zero. The rest of the circuit acts as a traditional
Boost converter, only with the first load. Therefore, the output voltage V
1
equals
) 1 /(
Boost
S in
D V
.
2.3.2.2 Double-output Boost Converter Analysis with Series
Connected Loads

Double output Boost converter topology with series loads is illustrated in Fig.2-23.
Common
components
R
1
C
1
L
v
in
(t) S
Boost
C
2
R
2
S
1
D
1
D
2
v
2
(t)
v
1
(t)

Fig.2-23: Double-output Boost converter supplying series connected loads

The switching states of the double-output Boost converter with series loads are
illustrated in Fig.2-24. The front side of the converter is similar to the traditional
Boost converter and the output part consists of two switch-capacitor units connected
in series which supply two different loads.
The inductor and the capacitor current and voltage waveforms are illustrated in
Fig.2-25. The name of the switching state for each time interval is also mentioned.
Comparing these waveforms with the waveforms of the double output Boost
converter with parallel loads, the shape of the inductor voltage is similar but the
levels of the voltages are changed.
The waveforms of Fig.2-25 (a) present the step changes of the inductor voltage as a
result of switching and gradual change of inductor current depending on the inductor
voltage. Fig.2-25 (b) and (c) illustrate the waveforms of capacitor currents and
voltages.

165

R
1
C
1
L
v
in
(t) S
Boost
C
2
R
2
S
1
D
1
D
2
v
2
(t)
v
1
(t)

10: SBoost: on , S1: off
(a)
R
1
C
1
L
v
in
(t) S
Boost
C
2
R
2
S
1
D
1
D
2
v
2
(t)
v
1
(t)

01: SBoost: off , S1: on
(b)
R
1
C
1
L
v
in
(t) S
Boost
C
2
R
2
S
1
D
1
D
2
v
2
(t)
v
1
(t)

00: SBoost: off , S1: off
(c)
Fig.2-24: Switching states of a double-output Boost converter supplying series
connected loads




166

V
L
i
L
T
sw
T
sw
I
L
t0 t1 t2
t0 t1 t2
10 01 00
V
in
V
in
-V
1
V
in
-V
1
-V
2
t3
t3


(a)
i
C1
V
1
T
sw
T
sw
I
L-
I
R1
-I
R1
10 01 00
V
1
I
L
t0 t1 t2
t0 t1 t2

(b)
V
2
i
C2
T
sw
T
sw
I
L-
I
R2
-I
R2
V
2
I
L
t0 t1 t2
t0 t1 t2
10 01 00

(c)
Fig.2-25: One switching cycle of a double-output Boost converter supplying series
connected loads a) inductor voltage and inductor current b) C
1
current and voltage
and c) C
2
current and voltage


167

The effect of each switching state on the inductor current and the output voltages are
explained below.

Switching state 10 and time interval T
10
(t
0
-t
1
)
The switch S
Boost
is turned on and the switch S
1
is turned off. As a result, the voltage
across the inductor is v
L
(t)=V
in
and the inductor current is increased [Fig.2-25 (a)].
The inductor current is not supplied to the output capacitors. Therefore, the output
voltages v
1
(t) and v
2
(t) are decreased because of supplying the loads R
1
and R
2

[Fig.2-25 (b) and (c)].

Switching state 01 and time interval T
01
(t
1
-t
2
)
The switch S
Boost
is turned off and the switch S
1
is turned on. As a result, the voltage
across the inductor is v
L
(t)=V
in
-V
1
. Since V
in
<V
1
, the inductor current is decreased
[Fig.2-25 (a)] and supplies the output capacitor C
1
. Therefore, the output voltage
v
1
(t) is increased and the output voltage v
2
(t) is decreased because of supplying the
load R
2
.

Switching state 00 and time interval: T
00
(t
2
-t
3
)
The switch S
Boost
and S
1
is turned off. As a result, the diode D
2
conducts and the
voltage across the inductor is v
L
(t)=V
in
-V
1
-V
2
. Since V
in
<V
1
+V
2
, the inductor current
is decreased [Fig.2-25 (a)] and supplies the output capacitors C
1
and C
2
. Therefore,
the output voltages v
1
(t) and v
2
(t) are increased.
According to the switching state waveforms shown in Fig.2- 25 and (2-7), the steady
state equation can be derived based on the average voltage across the inductor and
the average current through the capacitors over one switching cycle as follows:

0 ) ( ) ( ) (
1
) (
1
) (
0 ) ( ) ( ) (
1
) (
1
) (
0 ) ( ) ( ) (
1
) (
1
) (
3
2
2
2
1
2
1
0
2 2 2
3
2
1
2
1
1
1
0
1 1 1
3
2
2
1
1
0
t
t
C
t
t
C
t
t
C
sw
T t
t
C
sw
C
t
t
C
t
t
C
t
t
C
sw
T t
t
C
sw
C
t
t
L
t
t
L
t
t
L
sw
T t
t
L
sw
L
dt t i dt t i dt t i
T
dt t i
T
t i
dt t i dt t i dt t i
T
dt t i
T
t i
dt t v dt t v dt t v
T
dt t v
T
t v
sw
sw
sw
(2-72)

168

Assuming the ripple is negligible, v
1
(t)=V
1
, v
2
(t)=V
2
, v
3
(t)=V
3
, and v
4
(t)=V
4
,
(2-72) can be rewritten as follows:

0 ) ( ) ( ) (
2 1 00 1 01 10
V V V T V V T V T
in in in
(2-73)
0 ) ( ) ( ) (
1 1 1
00 01 10 R L R L R
I I T I I T I T (2-74)
0 ) ( ) ( ) (
2 2 2
00 01 10 R L R R
I I T I T I T (2-75)

where T
10
, T
00
, and T
01
are the time intervals of switching states 10, 00, and 01,
respectively. By factorizing V
in
, I
L
, V
1
, V
2
and rewriting (2-73 to 2-75):
0 ) ( ) ( ) (
00 2 00 01 1
T V T T V T V
sw in
(2-76)
0 ) ( ) (
1
00 01 sw R L
T I T T I (2-77)
0 ) ( ) (
2
00 sw R L
T I T I (2-78)

Dividing both sides of (2-76 to 2-78) by T
sw
, the duty cycles of the switch S
Buck
and
diode D
2
can be derived as follows:
sw
D
sw
S
T
T
D
T
T
D
) (
) (
00
01
2
1
(2-79)

Assuming that the output voltage ripple is negligible, I
Rj
=V
j
/R
j
, (2-76 to 2-78) can be
rewritten as:

0 ) (
2 1
2 2 1
V D V D D V
D D S in
(2-80)
L D S L D S R L D S
I R D D V
R
V
I D D I I D D
1 1
1
1
) ( 0 ) ( ) (
2 1 2 1 1 2 1
(2-81)
L D L D R L D
I R D V
R
V
I D I I D
2 2
2
2
2 2 2 2
0 (2-82)

where
1
S
D
and
2
D
D
are the duty cycles of the switch S
1
, and the diode D
2
.
The average inductor current and output voltages can be formulated as:
169

2
2
1
2 2
2
1
2
2 2 1
2 2 1
) (
0 ) (
R D R D D
V
I I R D I R D D V
D D S
in
L L D L D S in

(2-83)
Substituting I
L
from (2-83) in (2-81 and 2-82) yields:
2
2
1
2
1
1
2 2 1
2 1
) (
) (
R D R D D
V R D D
V
D D S
in D S
(2-84)
2
2
1
2
2
2
2 2 1
2
) ( R D R D D
V R D
V
D D S
in D
(2-85)

As (2-84 and 2-85) indicate, the output voltages depend on the resistance of the
loads, the duty cycles of the switch S
1
and the diode D
2
and the input voltage
magnitude (V
in
). For a special case where (R
1
=R
2
=R), the output voltages are related
to input voltage magnitude and the duty cycles, as presented in (2-86 and 2-87):

2 2 1
2 2 1
2 1
) (
) (
D D S
in D S
D D D
V D D
V (2-86)
2 2 2
2 2 1
2
) (
D D S
in D
D D D
V D
V (2-87)

For R
1
=2R
2
=2R, the output voltage equations are:
2 2 1
2 2 1
2 1
2 ) (
) (
D D S
in D S
D D D
V D D
V (2-88)
2 2 2
2 2 1
2
2 ) (
2
D D S
in D
D D D
V D
V (2-89)
And for R
2
=2R
1
=2R, the output voltage equations are:
2 2 1
2 2 1
2 1
) ( 2
) ( 2
D D S
in D S
D D D
V D D
V
(2-90)
2 2 2
2 2 1
2
) ( 2
D D S
in D
D D D
V D
V
(2-91)


170

To analyze the effect of the load variations on the steady state operation, Fig.2-26 is
presented. Three different cases R
1
=R
2
, R
1
=2R
2
and 2R
1
=R
2
are considered. For
each case, V
1
/V
in
and V
2
/V
in
are plotted vs.

1
S
D
for four
Boost
S
D
values. Since the
loads are connected in series, V
1
is supplied by the inductor current for
Boost
S
D
<1;
however, V
2
is supplied only when S
Boost
and S
1
are turned off. Therefore, V
2
/V
in
is
lower than V
1
/V
in
for equal resistances. (2-85) indicates that if V
2
needs to be
increased,
2
D
D
must be increased; as a result, the inductor current will decrease
based on (2-83).
Two other case studies have been considered for the results presented in Fig.2-26.

Case study:
0
1
S
D

In all cases considered in Fig.2-26, for
0
1
S
D
, the topology of the double-output
Boost converter with series loads reduces to a traditional Boost converter with both
loads connected in series as one load. Therefore, the summation of the output
voltages would be equal to
) 1 /(
Boost
S in
D V
.

Case study:
1
1
S
D

With
1
1
S
D
, the second load is disconnected from the inductor continuously;
therefore, the output voltage is zero. The rest of the circuit acts as a traditional Boost
converter only with the first load. Therefore, the output voltage V
1
is
) 1 /(
Boost
S in
D V
.

2.3.3 Multi-output Positive Buck-Boost Converters
In a multi-output Positive Buck-Boost converter, S
Buck
, D
Buck
, S
Boost
and an inductor
are common components between loads and a power source. Each load has a
devoted capacitor, a diode, and a switch. Topologies with parallel connected and
series connected loads are explained in this section.

Fig.2-27 shows a multi-output Buck converter topology with parallel loads. The first
part of the circuit is similar to the conventional Buck-Boost converter; and the input
switch, S
Buck
controls the power flow. Similar to a traditional Buck-Boost converter,
171

there is a common inductor for several output filters. Since the inductor current must
be circulated through one of the outputs, one of the output switches, S
1
, S
2
, ,S
n
, or
S
Boost
must be turned on at any instant.







Fig.2-26: The visualization of (2-75 to 2-77): the level of output voltage (V
1
,V
2
) for
variable d
1
and different d
Buck
values
172

The positive Buck-Boost converter may be modified with the same developments to
support multiple loads. In comparison with multi output Buck and multi-output
Boost converters, a multi-output Positive Buck Boost has an advantage of zero
switching state. When S
Buck
is turned off and S
Boost
is turned on, the inductor current
circulates without being charged or discharged; this switching state is named zero
switching state. This switching state may be used to store some energy in the
inductor and uses this energy to improve the dynamic behavior of the converter.
The topology of the multi-output Buck-Boost converter with parallel loads (Fig.2-
27) may perform as a multi-output Buck or a multi-output Boost converter in the
simplest operation modes. In these modes, either Buck switch or Boost switch is
idling. However, as will be explained later, the availability of the zero switching
state allows improving the dynamic performance of this converter. The inductor
current increases when the number of loads increases and the power and the voltage
of each load do not limit the power and the voltage of other loads.

v
in
(t)
S
Buck
D
Buck R
1
C
1
L
S
Boost
S
1
D
1
S
2
R
2 C
2
R
n
C
n
D
2
D
n
v
1
(t) v
2
(t) v
n
(t)
S
n

Fig.2-27: Multi-output Buck-Boost converter supplying parallel connected loads

As may be observed in Fig.2-27, the switches used to supply loads may conduct
current in single direction and may block voltage in both directions. The reason is
that the inductor current flows only from the inductor to loads. However, the voltage
across each switch depends on the operation of other switches; therefore, the voltage
across each switch may be positive or negative.
If one of the output voltages (in this case, v
n
(t)) is known to be more than other
output voltages, the switch conducting the inductor current to that output voltage
(S
n
) may be removed because, when all other switches are turned off, the inductor
current automatically conducts from D
n
and supplies v
n
(t). Since v
n
(t) is more than
173

other output voltages when any other switch (S
k
or S
Boost
) is turned on, the voltage at
the anode of D
n
is v
k
(t) and v
k
(t)<v
n
(t); therefore, D
n
does not conduct and acts like a
turned off switch.
Fig.2-28 shows a multi-output Positive Buck-Boost converter topology with series
loads. Similar to the multi-output Buck-Boost converter with parallel loads, the
inductor current must be conducted through one of the output switches (S
1
to S
n-1
and
D
n
) or S
Boost
. If the inductor current is conducted by S
k
, it supplies the series
connected loads (R
1
-R
k
). This topology may operate the same as the multi-output
Buck or multi-output Boost converter. Nevertheless, applying the zero switching
state, the dynamics of the multi-output Buck-Boost converter can be improved
compared to both the multi-output Buck and multi-output Boost converter.

R
1
C
1
L
v
in
(t)
S
Boost
C
2
R
2
S
1
S
2
D
1
D
2
C
n
R
n
D
n
v
n
(t)
v
2
(t)
v
1
(t)
S
Buck
D
Buck
Fig.2-28: Multi-output Buck-Boost converter supplying series connected loads

As can be seen in Fig.2-28, the last load, R
n
can be connected to the inductor
through only one diode, D
n
and without any switch. The reason is the fact that when
all S
j
and S
Boost
switches are turned off, the current stored in the inductor turns the
diode on and supplies R
n
and the rest of the loads. When any of the switches (S
j
) is
turned on, the voltage across the diode D
n
is negative and D
n
is turned off.
Therefore, there is no need to add a switch in series with D
n
.

174

2.3.3.1 Double-output Positive Buck-Boost Converter Analysis
with Parallel Loads

The topology of a double-output Positive Buck-Boost converter with parallel loads
is illustrated in Fig.2-29 and is driven from the topology of the positive Buck-Boost
converter. Considering that V
2
is more than V
1
, the switch S
2
has been removed.
The switching states of the double-output Buck-Boost converter with two parallel
loads are illustrated in Fig.2-30. The number of the switching states is 6. Except for
switching state (010), all switching states of the double-output Positive Buck-Boost
converter consist of the switching states of either a double-output Buck (001, 000,
101, 100) or a double-output Boost (110, 101, 100) converter.

v
in
(t)
S
Buck
D
Buck
R
1
C
1
L
S
Boost
S
1
D
1
R
2 C
2
D
2
v
1
(t) v
2
(t)
Common
components

Fig.2-29: Double-output Buck-Boost converter supplying parallel connected loads

Considering the switching states illustrated in Fig.2-30, one switching cycle of the
double-output Positive Buck Boost converter with parallel loads including all
switching states is shown in Fig.2-31.
Fig.2-31 (a) illustrates the voltage and current waveforms of the inductor. The
operation of the switches causes the switching states to be changed. In each
switching state, the voltage across the inductor changes. As a result, the inductor
current is changed with a different slope in each switching state.
Fig.2-31 (b) and (c) illustrate the current through each output capacitor over each
switching cycle and the resultant variation of the capacitor voltages. The effect of
each switching state on the inductor current and the output voltages is explained
here in detail.


175

v
in
(t)
S
Buck
D
Buck
R
1
C
1
L
S
Boost
S
1
D
1
R
2 C
2
D
2
v
1
(t) v
2
(t)

(a): 110: SBuck: on , SBoost: on , S1: off
v
in
(t)
S
Buck
D
Buck
R
1
C
1
L
S
Boost
S
1
D
1
R
2 C
2
D
2
v
1
(t) v
2
(t)

(b): 010: SBuck: off , SBoost: on , S1: off
v
in
(t)
S
Buck
D
Buck
R
1
C
1
L
S
Boost
S
1
D
1
R
2 C
2
D
2
v
1
(t) v
2
(t)

(c): 101: SBuck: on , SBoost: off , S1: on
v
in
(t)
S
Buck
D
Buck
R
1
C
1
L
S
Boost
S
1
D
1
R
2 C
2
D
2
v
1
(t) v
2
(t)

(d): 001: SBuck: off , SBoost: off , S1: on
176

v
in
(t)
S
Buck
D
Buck
R
1
C
1
L
S
Boost
S
1
D
1
R
2 C
2
D
2
v
1
(t) v
2
(t)

(e): 100: SBuck: on , SBoost: off , S1: off
v
in
(t)
S
Buck
D
Buck
R
1
C
1
L
S
Boost
S
1
D
1
R
2 C
2
D
2
v
1
(t) v
2
(t)

(f): 000: SBuck: off , SBoost: off , S1: off
Fig.2-30: Switching states of a double-output Buck Boost converter supplying
parallel connected loads


Switching state 010 and time interval T
10
(t
0
-t
1
)
The switch S
Boost
is turned on and the switches S
Buck
and S
1
are turned off. As a
result, the voltage across the inductor is v
L
(t)=0. Therefore, the inductor current is
constant in this time interval [Fig.2-31 (a)]. The inductor current is not supplied to
the output capacitors. Therefore, the output voltages v
1
(t) and v
2
(t) are decreased
because of supplying the loads R
1
and R
2
[Fig.2-31 (b) and (c)].

Switching state 110 and time interval T
110
(t
1
-t
2
)
The switches S
Boost
and S
Buck
are turned on and the switch S
1
is turned off. As a
result, the voltage across the inductor is v
L
(t)=V
in
. Therefore, the inductor current is
increased in this time interval [Fig.2-31 (a)]. The inductor current is not supplied to
the output capacitors. Therefore, the output voltages v
1
(t) and v
2
(t) are decreased
because of supplying the loads R
1
and R
2
[Fig.2-31 (b) and (c)].


177

Fig.2-31: One switching cycle of a double-output Buck-Boost converter supplying
parallel connected loads, a) inductor voltage and current b) capacitor current and
voltages of first load and c) capacitor current and voltages of second



Tsw
Tsw
IL
vL(t)
iL(t)
t0 t1 t2 t3 t4 t5 t6
t0 t1 t2 t3 t4 t5 t6
010 110 101 001 000 100
V
in
V
in
-V
1
-V
1
-V
2
V
in
-V
2

(a)
Tsw
Tsw
IL-IR1
-IR1
V1
iC1(t)
v1(t)
IL
t0 t1 t2 t3 t4 t5 t6
t0 t1 t2 t3 t4 t5 t6
010 110 101 001 000 100

(b)
Tsw
Tsw
IL-IR2
-IR2
010 110 101 001 000 100
V2
v2(t)
iC2(t)
IL
t0 t1 t2 t3 t4 t5 t6
t0 t1 t2 t3 t4 t5 t6

(c)
178

Switching state 101 and time interval T
101
(t
2
-t
3
)
The switches S
1
and S
Buck
are turned on and the switch S
Boost
is turned off. As a result,
the voltage across the inductor is v
L
(t)=V
in
-V
1
. If V
in
>V
1
, the inductor current
increased in this time interval [Fig.2-31 (a)]. The inductor current is supplied to the
output capacitor C
1
. Therefore, the output voltage v
1
(t) is increased and the output
voltage v
2
(t) is decreased because of supplying the load R
2
[Fig.2-31 (b) and (c)].

Switching state 001 and time interval T
001
(t
3
-t
4
)
The switch S
1
is turned on and the switches S
Buck
and S
Boost
are turned off. As a result,
the voltage across the inductor is v
L
(t)=-V
1
. Since 0>-V
1
, the inductor current is
decreased in this time interval [Fig.2-31 (a)]. The inductor current is supplied to the
output capacitor C
1
. Therefore, the output voltage v
1
(t) is increased and the output
voltage v
2
(t) is decreased because of supplying the load R
2
.

Switching state 000 and time interval T
000
(t
4
-t
5
)
The switches S
1
, S
Buck
, and S
Boost
are turned off. As a result, the diode D
2
conducts
and the voltage across the inductor is v
L
(t)=-V
2
. Since 0>-V
2
, the inductor current is
decreased in this time interval [Fig.2-31 (a)]. The inductor current is supplied to the
output capacitor C
2
. Therefore, the output voltage v
2
(t) is increased, and the output
voltage v
1
(t) is decreased because of supplying the load R
1
.

Switching state 100 and time interval T
100
(t
5
-t
6
)
The switches S
1
and S
Boost
are turned off and the switch S
Buck
is turned on. As a
result, the diode D
2
conducts and the voltage across the inductor is v
L
(t)=V
in
-V
2
.
Since V
in
<V
2
, the inductor current is decreased in this time interval [Fig.2-31 (a)].
The inductor current supplies the output capacitor C
2
. Therefore, the output voltage
v
2
(t) is increased and the output voltage v
1
(t) is decreased because of supplying the
load R
1
.

The same calculations developed for the double-output Buck and Boost converters
are required for the double-output Positive Buck-Boost converter to extract the
average levels of the inductor current and the output voltages in steady state
condition. According to the switching states shown in Fig.2-31 and (2-7), the
179

average voltage across the inductor and the average current through each capacitor
over one switching cycle can be determined as follows:
0 ) ( ) ( ) ( ) ( ) ( ) (
1
) (
1
) (
6
5
5
4
4
3
3
2
2
1
1
0
dt t v dt t v dt t v dt t v dt t v dt t v
T
dt t v
T
t v
t
t
L
t
t
L
t
t
L
t
t
L
t
t
L
t
t
L
sw
T t
t
L
sw
L
sw
(2-92)

0 ) ( ) ( ) ( ) ( ) ( ) (
1
) (
1
) (
6
5
1
5
4
1
4
3
1
3
2
1
2
1
1
1
0
1 1 1
t
t
C
t
t
C
t
t
C
t
t
C
t
t
C
t
t
C
sw
T t
t
C
sw
C
dt t i dt t i dt t i dt t i dt t i dt t i
T
dt t i
T
t i
sw
(2-93)
0 ) ( ) ( ) ( ) ( ) ( ) (
1
) (
1
) (
6
5
2
5
4
2
4
3
2
3
2
2
2
1
2
1
0
2 2 2
t
t
C
t
t
C
t
t
C
t
t
C
t
t
C
t
t
C
sw
T t
t
C
sw
C
dt t i dt t i dt t i dt t i dt t i dt t i
T
dt t i
T
t i
sw
(2-94)


The following time intervals are shown in Fig.2-31:

5 6 100
4 5 000
3 4 001
2 3 101
1 2 110
0 1 010
t t T
t t T
t t T
t t T
t t T
t t T


Assuming that the ripple is negligible, v
1
(t)=V
1
, v
2
(t)=V
2
, i
L
(t)=I
L
, v
in
(t)=V
in
.
(2-92 to 2-94) can be rewritten as follows:

0 ) ( ) ( ) 0 ( ) ( ) ( ) 0 (
2 100 2 000 1 001 1 101 110 010
V V T V T V T V V T V T T
in in in
(2-95)

0 ) )( ( ) )( (
1 1
101 001 000 100 110 010 R L R
I I T T I T T T T (2-96)
0 ) )( ( ) )( (
2 2
100 000 101 001 110 010 R L R
I I T T I T T T T (2-97)

where T
010
, T
110
, T
101
, T
001
, T
000
, and T
100
are the time intervals of the switching states
010, 110, 101, 001, 000, and 100, respectively.
By factorizing V
in
, I
L
, V
1
, V
2
and rewriting (2-95 to 2-97) we can simplify these
equations as follows:

180

0 ) ( ) ( ) (
100 000 2 001 101 1 100 101 110
T T V T T V T T T V
in
(2-98)
0 ) ( ) (
1
101 001 sw R L
T I T T I (2-99)
0 ) ( ) (
2
100 000 sw R L
T I T T I (2-100)

Dividing both sides of (2-98 to 2-100) by T
sw
, the duty cycles of the switches S
Buck
,
S
1
, and D
2
can be defined as follows:
sw
D
sw
S
sw
S
T
T T
D
T
T T
D
T
T T T
D
Buck
) (
) (
) (
100 000
001 101
100 101 110
2
1
(2-101)
where,
Buck
S
D ,
1
S
D , and
2
D
D are the duty cycles of switches S
Buck
, S
1
and diode
D
2
, respectively. Considering that

sw
T T T T T T T
010 001 000 100 101 111
(2-102)

and considering that I
Rj
=V
j
/R
j
, (2-98 to 2-100) can be rewritten as:

0
2 1
2 1
V D V D V D
D S in S
Buck
(2-103)
L S L S R L S
I R D V
R
V
I D I I D
1 1
1
1
1 1 1 1
0 (2-104)
L D L D R L D
I R D V
R
V
I D I I D
2 2
2
2
2 2 2 2
0 (2-105)

The average level of the inductor current and output voltages may be formulated as:

2
2
1
2
2
2
1
2
2 1
2 1
0
R D R D
V D
I I R D I R D V D
D S
in S
L L
D
L
S
in S
Buck
Buck
(2-106)
Substituting (2-106) in (2-104 and 2-105), yields:
2
2
1
2
1
1
2 1
1
R D R D
V R D D
V
D S
in S S
Buck
(2-107)
181

2
2
1
2
2
2
2 1
2
R D R D
V R D D
V
D S
in S D
Buck
(2-108)
As (2-107 and 2-108) indicate, the levels of the output voltages depend on the
resistance of the loads, the duty cycles of switches S
Boost
, S
Buck
and S
1
, and the input
voltage magnitude (V
in
). For the special case where (R
1
=R
2
=R), the output voltages
are related to the input voltage and the duty cycles, as presented in the following
equations:
2 2
1
2 1
1
D S
in S S
D D
V D D
V
Buck
(2-109)
2 2
2
2 1
2
D S
in S D
D D
V D D
V
Buck
(2-110)
For R
1
=2R
2
=2R, the output voltage equations are:
2 2
1
2 1
1
2
2
D S
in S S
D D
V D D
V
Buck
(2-111)
2 2
2
2 1
2
2
D S
in S D
D D
V D D
V
Buck
(2-112)
And for R
2
=2R
1
=2R, the output voltage equations are:
2 2
1
2 1
1
2
D S
in S S
D D
V D D
V
Buck
(2-113)

2 2
2
2 1
2
2
2
D S
in S D
D D
V D D
V
Buck
(2-114)

However, since the double output positive Buck-Boost converter has a zero
switching state, there is an extra degree of freedom in (2-107 and 2-108). When
compared with (2-64 and 2-65), this extra freedom shows as the duty cycle
Buck
S
D

which allows controlling the inductor current and output voltages independently.
Therefore, the level of the inductor current in steady state is not determined by input
voltage, output voltages and loads. There is a capacity for extra current storage,
which may improve the dynamic behavior of the converter. As (2-107 and 2-108)
indicate, the level of output voltages depends on the resistance of the loads, duty
cycles of switches S
Buck
and S
1
, and input voltage (V
in
).

182

2.3.3.2 Double-output Positive Buck-Boost Converter Analysis
with Series Loads

A double-output Positive Buck-Boost converter topology with series loads is
illustrated in Fig.2-32. The common components are the same as the topology of the
double-output Positive Buck-Boost converter supplying parallel connected loads.
Common
Components
R
1
C
1
L
v
in
(t) S
Boost
C
2
R
2
S
1
D
1
D
2
v
2
(t)
v
1
(t)
S
Buck
D
Buck
Fig.2-32: Double-output Buck-Boost converter supplying series connected loads


The switching states of the double-output Positive Buck-Boost converter with series
loads are illustrated in Fig.2-33. The front side of the converter is similar to the
traditional Buck-Boost converter and the output part consists of two switch-
capacitor units connected in series which supply two different loads. Except for the
switching state 010, all the switching states presented in Fig.2-33 are the same as the
switching states either in a double-output Buck (000, 001, 1000, 101) or in a double-
output Boost converter (110, 101, 100) with series loads.

The inductor and the capacitor current and voltage waveforms are illustrated in
Fig.2-34. The name of the switching state for each time interval is also mentioned.
Comparing these waveforms with the waveforms of the double output Positive
Buck-Boost converter with parallel loads, the shape of the inductor voltage is
similar, but the levels of the voltages are changed.


183

R
1
C
1
L
v
in
(t) S
Boost
C
2
R
2
S
1
D
1
D
2
v
2
(t)
v
1
(t)
S
Buck
D
Buck
110: SBuck: on , SBoost: on , S1: off
(a)
R
1
C
1
L
v
in
(t) S
Boost
C
2
R
2
S
1
D
1
D
2
v
2
(t)
v
1
(t)
S
Buck
D
Buck
101: SBuck: on , SBoost: off , S1: on
(b)
R
1
C
1
L
v
in
(t) S
Boost
C
2
R
2
S
1
D
1
D
2
v
2
(t)
v
1
(t)
S
Buck
D
Buck
100: SBuck: on , SBoost: off , S1: off
(c)
184

R
1
C
1
L
v
in
(t) S
Boost
C
2
R
2
S
1
D
1
D
2
v
2
(t)
v
1
(t)
S
Buck
D
Buck
010
: SBuck: off , SBoost: on , S1: off
(d)
R
1
C
1
L
v
in
(t) S
Boost
C
2
R
2
S
1
D
1
D
2
v
2
(t)
v
1
(t)
S
Buck
D
Buck
001: SBuck: off , SBoost: off , S1: on
(e)
R
1
C
1
L
v
in
(t) S
Boost
C
2
R
2
S
1
D
1
D
2
v
2
(t)
v
1
(t)
S
Buck
D
Buck
000: SBuck: off , SBoost: off , S1: off
(f)
Fig.2-33: Switching states of a double-output Buck-Boost converter supplying series
connected loads


185



Fig.2-34: One switching cycle of a double-output Buck-Boost converter supplying
series-connected loads a) inductor voltage and inductor current b) C
1
current and
voltage and c) C
2
current and voltage
VL
iL
Tsw
Tsw
IL
t0 t1
t3 t2 t4 t5
t0 t1
t3 t2 t4 t5
100 000 001 101 110 010
Vin
Vin-V1
-V1
-V2-V1
Vin-V1-V2

(a)
iC1
V1
Tsw
Tsw
IL-IR1
-IR1
V1
IL
t0 t1
t3 t2 t4 t5
t0 t1 t3 t2 t4 t5
100 000 001 101 110 010

(b)
V2
iC2
Tsw
Tsw
IL-IR2
-IR2
100
V2
000 001 101 110 010
IL
t0 t1
t3 t2 t4 t5
t0 t1
t3 t2 t4 t5

(c)

186

The effect of each switching state on the inductor current and the output voltages are
explained below.

Switching state 010 and time interval T
010
(t
0
-t
1
)
The switch S
Boost
is turned on and the switches S
Buck
and S
1
are turned off. As a
result, the voltage across the inductor is v
L
(t)=0. Therefore, the inductor current is
kept constant over this time interval [Fig.2-34 (a)]. The inductor current does not
supply the output capacitors. Therefore, the output voltages v
1
(t) and v
2
(t) are
decreased because of supplying the loads R
1
and R
2
[Fig.2-34 (b) and (c)].

Switching state 110 and time interval T
110
(t
1
-t
2
)
The switches S
Boost
and S
Buck
are turned on and the switch S
1
is turned off. As a
result, the voltage across the inductor is v
L
(t)=V
in
. Therefore, the inductor current is
increased over this time interval and it does not supply the output capacitors.
Therefore, the output voltages v
1
(t) and v
2
(t) are decreased because of supplying the
load R
1
and R
2
[Fig.2-35 (b) and (c)].

Switching state 101 and time interval T
101
(t
2
-t
3
)
The switches S
1
and S
Buck
are turned on and the switch S
Boost
is turned off. As a result,
the voltage across the inductor is v
L
(t)=V
in
-V
1
. If V
in
>V
1
, the inductor current is
increased in this time interval. The inductor current does not supply the output
capacitor C
1
. Therefore, the output voltage v
1
(t) is increased and the output voltage
v
2
(t) is decreased because of supplying the load R
2
.

Switching state 001 and time interval T
001
(t
3
-t
4
)
The switch S
1
is turned on and the switches S
Buck
and S
Boost
are turned off. As a result,
the voltage across the inductor is v
L
(t)= -V
1
. Since 0>-V
1
, the inductor current is
decreased in this time interval [Fig.2-35 (a)]. The inductor current is supplied to the
output capacitor C
1
. Therefore, the output voltage v
1
(t) is increased and output
voltage v
2
(t) is decreased because of supplying the load R
2
[Fig.2-35 (b) and (c)].

Switching state 000 and time interval T
000
(t
4
-t
5
)
The switches S
1
, S
Buck
, and S
Boost
are turned off. As a result, the diode D
2
conducts
and the voltage across the inductor is v
L
(t)=-V
1
-V
2
. Since 0>-V
1
-V
2
, the inductor
187

current is decreased in this time interval [Fig.2-35 (a)]. The inductor current is
supplied to the output capacitors C
1
and C
2
. Therefore, the output voltages v
1
(t) and
v
2
(t) are increased.

Switching state 100 time interval: T
100
(t
5
-t
6
)
The switches S
1
and S
Boost
are turned off and the switch S
Buck
is turned on. As a
result, the diode D
2
conducts and the voltage across the inductor is v
L
(t)=V
in
-V
1
-V
2
.
Since V
in
<V
1
+V
2
, the inductor current decreases in this time interval. The inductor
current supplies the output capacitors C
1
and C
2
. Therefore, the output voltages v
1
(t)
and v
2
(t) are increased.

According to the switching states and waveforms shown in Fig.2-34 and (2-7), the
steady state equation can be derived based on the average voltage across the
inductor and the average current through the capacitors over one switching cycle, as
follows:

0 ) ( ) ( ) ( ) ( ) ( ) (
1
) (
1
) (
0 ) ( ) ( ) ( ) ( ) ( ) (
1
) (
1
) (
0 ) ( ) ( ) ( ) ( ) ( ) (
1
) (
1
) (
6
5
2
5
4
2
4
3
2
3
2
2
2
1
2
1
0
2 2 2
6
5
1
5
4
1
4
3
1
3
2
1
2
1
1
1
0
1 1 1
6
5
5
4
4
3
3
2
2
1
1
0
t
t
C
t
t
C
t
t
C
t
t
C
t
t
C
t
t
C
sw
T t
t
C
sw
C
t
t
C
t
t
C
t
t
C
t
t
C
t
t
C
t
t
C
sw
T t
t
C
sw
C
t
t
L
t
t
L
t
t
L
t
t
L
t
t
L
t
t
L
sw
T t
t
L
sw
L
dt t i dt t i dt t i dt t i dt t i dt t i
T
dt t i
T
t i
dt t i dt t i dt t i dt t i dt t i dt t i
T
dt t i
T
t i
dt t v dt t v dt t v dt t v dt t v dt t v
T
dt t v
T
t v
sw
sw
sw


(2-115)
Assuming the ripple is negligible, v
1
(t)=V
1
and v
2
(t)=V
2
, (2-115) may be rewritten as
follows:

0 ) ( ) 0 ( ) ( ) ( ) ( ) 0 (
2 1 100 2 1 000 1 001 101 110 010
V V V T V V T V T v T V T T
in in

(2-116)

0 ) )( ( ) )( (
1 1
000 100 101 001 110 010 R L R
I I T T T T I T T (2-117)
0 ) )( ( ) )( (
2 2
100 000 101 001 110 010 R L R
I I T T I T T T T (2-118)

where T
010
, T
110
, T
101
, T
001
, T
000
, and T
100
are the time intervals of switching states
010, 110, 101, 001, 000, and 100 respectively. By factorizing V
in
, I
L
, V
1
, V
2
and
rewriting (2-116 and 2-117):
188

0 ) ( ) ( ) (
100 000 2 100 000 101 001 1 100 101 110
T T V T T T T V T T T V
in

(2-119)
0 ) ( ) (
1
100 000 101 001 sw R L
T I T T T T I (2-120)
0 ) ( ) (
2
100 000 sw R L
T I T T I (2-121)

Dividing both sides of (2-119 and 2-121) by T
sw
, the duty cycle of switches S
Buck
, S
1
,
D
2
can be defined as follows:
sw
D
sw
S
sw
S
T
T T
D
T
T T
D
T
T T T
D
Buck
) (
) (
) (
100 000
001 101
100 101 110
2
1
(2-122)
where,
Boost
S
D
,
1
S
D
, and
2
D
D
are the duty cycles of the switches S
Boost
, S
1
and the
diode D
2
, respectively.

Considering I
Rj
=V
j
/R
j
, (2-119 and 2-121) can be rewritten as follows:


0 ) (
2 1
2 2 1
V D V D D V D
D D S in S
Buck
(2-123)
L D S L D S R L D S
I R D D V
R
V
I D D I I D D
1 1
1
1
) ( 0 ) ( ) (
2 1 2 1 1 2 1
(2-124)
L D L D R L D
I R D V
R
V
I D I I D
2 2
2
2
2 2 2 2
0 (2-125)

The average inductor current can be formulated by substituting (2-124 and 2-125) in
(2-123):
2
2
1
2 2
2
1
2
2 2 1
2 2 1
) (
0 ) (
R D R D D
V D
I I R D I R D D V D
D D S
in S
L L D L D S in S
Buck
Buck

(2-126)

According to (2-124 and 2-125):

2
2
1
2
1
1
2 2 1
2 1
) (
) (
R D R D D
V R D D D
V
D D S
in S D S
Buck (2-127)
2
2
1
2
2
2
2 2 1
2
) ( R D R D D
V R D D
V
D D S
in S D
Buck
(2-128)
189

Considering (2-127 and 2-128), a special case of equal load resistances (R
1
=R
2
=R)
is considered here. The output voltages would be related to the input voltage and the
duty cycles, as presented in (2-129 and 2-130):
2 2 1
2 2 1
2 1
) (
) (
D D S
in S D S
D D D
V D D D
V
Buck
(2-129)
2 2 2
2 2 1
2
) (
D D S
in S D
D D D
V D D
V
Buck
(2-130)