PHYSICS OF LOW DIMENSIONAL SEMICONDUCTOR

Coulomb blockade
Report

Submitted by : Hussein Ayedh

27/11/2009
Introduction
In this lab exercise, we studied the characteristics of the single
electron transistor and the motion of electrons in nanostructure
where the electron only free to move in one dimension in a
quantum wire rather than three dimensions for the electrons in
large system, the transport of electron in the SET via tunneling
through the barriers if there is an available empty energy level on
the dot in the transport window , but the blocking states occur
when all the energy levels on the dot below the transport window
are occupied .the SET works at very low temperature (liquid
helium temperature in our lab exercise ) because the thermal
energy is dominate at high temperature .

Experimental setup

computer
Current
multimeter
Voltage
He
sample
Measurment
can source
Figure (1) : diagram of the
amplifier
stick
V
experimental
g
Vsd setup
Theory

Nanowire
It is nanostructure where its dimensions are in nanometer and the
properties of the material at this scales are interesting where the
electrons motion is reduced from three dimensions at large scale
to one dimension at nano scale then the electron motion will be
confined in this case to a discrete energy levels therefore the
characteristic of the material is different. At nano scale the rules
of quantum mechanics must be applied,

Capacitance
It is one of the important principles in the electrostatics where it
is measure the capability of the material to store electric charge,
the common shape of the capacitance is represented by two
parallel plates, if there is an applied voltage on the two plates
then a positive charge stays at one plate and a negative charge at
the other plate ,the capacitance is

C=QV…………(1)

Where Q is the charge stored in the plates due to the applied

voltage between them.

In this case the capacitance is proportional to the area of the

plate surface directly but inversely to the distance between the
plates

c=εs*Ad…………….(2)

In our case if the capacitance between the dot (the central InAs
island) and one of the leads is considered as a parallel plate
capacitor, and one of the InP barriers as the insulating dielectric
with thickness is 7 nm and dielectric constant is 12.5 then the
capacitance of this capacitor will be measured By using formula
(2) Where d is the barrier thickness and A is the area of the plate
The quantum wire has cylindrical shape with diameter ( R=50nm)

Then the area of the plate is circular and can be measured as the
following

A=πr2……………(3)

Where r is the radius of the quantum wire

r=R2=50*10-72=25*10-7cm

Then the area is

A=πr2=1.96*10-11cm2

Finally the capacitance is

c=εs*Ad=εo*εr*Ad=3.1*10-2fF=31 aF

And the electrostatic energy stored in the capacitor is defined by

U=Q22C………………(4)

And for our system the energy stored on the quantum dot is
determined by the previous equation with replacing Q2 by Ne2
where N refer to the number of the electrons on the dot

U=Ne22C………………(5)

Single electron transistor (SET)

CsdgFigure
VVDot
Dra
gsd C∑ schematic illustrate the
2):
arrangement
ga
in
Sour of the single electron
transistor
ce
te

The device in which we can observe the effect of coulomb

blockade is called single electron transistor which consists of
semiconductor nanowire with two barriers were formed by
another semiconductor has band gap larger than that for the
nanowire ,both barriers create an island between them .the two
terminals of the nanowire joined to metal contacts as source and
drain ,and the wire is placed on a substrate which refer to the
gate with thin layer of oxide separate between them . The design
of the single electron transistor is illustrative in the fig ( 2) where
the quantum dot (central region of InAs ) with self capacitance C∑
coupled to the source and drain via two tunnel barriers of InP

The next figures illustrate the energy diagram for a quantum dot
where in the fig(3a) blocking state where the transport of
electron from the source to the dot via barrier tunnel is not
allowed because all the energy levels in the island region with
energies lower than μs are filled .in fig (3b) to align the energy
levels in the island by applying positive voltage to the gate
contact and these energy levels are lowered then the electron in
the source can tunnel into the dot and it can tunnel into the drain
contact as in fig(3c) .in this case only one electron can tunnel
through the barrier to the island at time because the size of the
island is small and the repulsion interaction between the
electrons .

μ a
c
b μ
e2/C+Δ
Figure
N
S
D+1 N N+1 (3) : (a) the propagate of electron is not allowed
-1
(b) the electron tunnels from the source to the
island
(c) the transport of the electron to the drain
through the tunnel
In the previous figure if positive bias voltage is applied, then μs
will move up and μd will move down Vsd=μs-μde………………(6a)

If an energy level in the island region is in the transport window

which is lower than μs and upper than μd then the current will
flow .but if the gate voltage which governs the position of energy
level is increased then the energy level will be lower than μd and
the accessible electron from the source to the dot cannot tunnel
to the drain because there is no free state in the drain and it will
be confined in the island region then the number of states will
increase by one therefore there is no current flow .

In the other hand if small negative bias voltage is applied on the

SET then μs will move down and μd will move up ,

Vsd=-(μs-μd)e……………(6b)

μFigure
Sc
D
Na
b
-1
μN (4) : (a) the propagate of electron from the drain to the
dot is not allowed
(b) the electron tunnels from the drain to the
island
(c) the transport of the electron to the source
through the tunnel
In this case the electron will tunnel from the drain to the island
and to the source as in fig (4) and negative current will flow with
process similar that in for positive applied bias voltage
If the applied bias voltage is very small then there is no an energy
level in the transport window therefore there is no current as in
the figures (3a) and (4a) but if we increase the bias voltage to
shift the transport window to the next energy level in the island
then the current in this case will start to flow and the relation
between the current through the device and the applied bias
voltage is the I-V characteristics which is shown in the
measurement part.

to lower the next energy level to the opened transport window

then the chemical potential in the island must be changed

μislandN+1-μislandN=e2C∑=Ec………………(7a)

Where Ec is the charging energy which will added to the island

.Now if one electron is added to the central InAs island on the
quantum wire discussed above when the capacitance of the
capacitors is equal (C1=C2=Cg ) and C∑ is the sum of all those
capacitances which is C∑=3c=93 aF

Then the charging energy is

ECh=e2C∑=2.75*10-22=1.7meV…………(7b)

But it is not good approximation to consider the capacitance of

the all capacitors is equal where Cg is smaller than the others
because the thickness of the oxide layer over the substrate is
much larger than the barrier thickness and we observed that the
gate voltage is larger than the bias voltage .then the best
approximation is to neglect Cg because it’s very small with
comparing to C1 and C2 then C∑≈2c

It is necessary to do the measurement at low temperature i.e. the

thermal energy of an electron must be lower than the charging
energy because at high temperature the thermal energy will be
dominated therefore we put our sample inside a can of helium
liquid. The thermal energy of an electron at liquid helium
temperature (4.2 K) is

Eth=kBT=0.36 meV………………(8a)

Where kB=0.86*10-4eV/K the Boltzmann’s constant

Whereas the thermal energy at room temperature (300 K) is

Eth=kBT=0.0259 eV………………(8b)

With comparing the equations (8a) and (8b) to (7b) we observe

that

At liquid helium temperature Eth≪ECh

But at room temperature Eth≫ECh

by increasing Vg then the next energy level will be in the transport

window and the electron will tunnel to the island and to the drain
and the current will flow again , by iterate this processes the
current through the SET will flow if an energy level in the
transport window unless there is no current will flow this is called
coulomb oscillations.

In our measurements we swept bias and gate voltages and the

smallest bias voltage step size when the sample at liquid helium
temperature is

Vbias=kB Te=0.36 mV
 Measurements
The coulomb oscillations is shown in the figure (5) where the
periodicity is observed and the line width of the oscillations
increases by increasing of the bias voltage Vsd due to the growth
of the regions where flowing the current is allowed whereas the
coulomb blockade region be constant without growth, the
different in line width of the oscillations is clear by compare fig
(5) at Vsd=1mV to fig (6) at Vsd =0-1mV then if we reduce Vsd the
peaks will be narrower and weaker .

From figure (5) one can deduces the periodicity of the gate
oscillations where the distance between two peaks or two buttons
is the period

periodicity=∆Vgnumber of periods=100 mV2.5=40mV

The periodicity is 40mV per period.

Figure (5) :coulomb oscillations in the

current through the SET at Vsd=1mV
And the gate capacitance can be calculated when the gate voltage
is 40mV (the voltage per one period) as

Cg=e∆Vg=1.6*10-194*10-2=0.4*10-17F=4 aF

Figure (6) :coulomb oscillations in the

current through the SET at Vsd=0.1Mv where
the peaks is narrow and weak.
Figure
Isdsd (A)
V (7) :the shape of I-V characteristic if
(mV)
only one state in one energy level According of the
operation of the
single electron
transistor one can
expect the I-V
characteristic if the
energy levels in
the dot are
discrete with
energy interval ∆E
as the fig (7) where
there is only one
allowed electron at
time and the
current will flow
through the device
and stay constant
even with
increasing the bias voltage until the next energy level is in the
transport window then the current will increase abruptly and stay
constant again at the new value and so on. But virtually the I-V
characteristic is as that in the fig (8) because there are many
states in one energy level where the energy intervals between
them are negligible and the energy levels seem as they are
continuous levels then the current will increase linearly with the
bias voltage

The figure (8) illustrates I-V characteristics when the gate voltage
is 1.91 mV where there is no current through the device for small
bias voltage lower than 1mV where there is no energy level in the
transport window ,after that the current will start to flow
 Fig(7): I-V characteristics at gate
voltage 1.91 mV

To observe the coulomb blockade, the resistance of the tunneling

junction must be greater than the quantum resistance which is
he2

We have the charging energy is ΔE=e2C and the life time Δt=RC
then the tunneling resistance according to the uncertainty
principle ΔE.Δt≻h is

ΔE.Δt≻h=e2C.RC≻h=R≻he2
 Fig(9): I-V characteristics at gate
voltage 1.93 mV
From fig (9) we deduce the resistance which is the reciprocal of
the slope whereas the slope correspond to the conductance G

G=1R=∂Isd∂Vsd=dydx=1.146*10-6Ω-1

Then the SET resistance in the conductance state is

R=1slope=11.146*10-6=87.26kΩ

Then it is clear that the SET resistance is larger than the

quantum resistance

R≻(he2=25.8kΩ)

This value of the SET resistance is large then the flowing current
through the SET is very small because there is only one allowed
electron tunnel through the SET, so there is an amplifier of the
current in the experimental setup fig (1).

if the typical measured currents in order of pA then the tunneling

frequency
� is defined by

v=Γℏ

where � is the energy of state is defined by

Γ=ℏIe1TPK=ℏτ=ℏv

Where TPK is transmission coefficients which is equal one and τ is

the life time .

v=Ie1TPK=6.3MHz

Then the corresponding frequency in order of MHz if the current

in order of pA

And the life time is τ=160 ns

In the non conductive state which correspond to the horizontal

line at small bias voltage in fig (8) , the resistance is infinity
where the slope for this region is zero

In figure (10) the differential stability diagram for differential

conductance as a function of the applied bias voltage .The applied
bias voltage shifts up μs the source chemical potential and shifts
down μd the drain chemical potential by the same value where
Vsd=μs-μde

Then the value of μs , μd will change from their steady value μ0

without bias voltage according to the previous equation to

μs=μ0+eVsd2 , μd=μ0-eVsd2

For N electrons on the island region we get

μN≺μ0-eVsd2 , μN+1≻μ0+eVsd2

And
∆VG=1eα(μN+1-μN)

∆VG=∆Vsd α

Where α is the lever arm

α=∆Vsd ∆VG

And we have ∆Vsd=Ece

Then the charging energy and the lever arm can be calculated by
using figure (9) where ∆Vsdand ∆Vg can be taken from the figure
directly because it is the differential diagram of the coulomb
diamond.

By using one light region which is not conductance region i.e (I =

0) where ∆Vg corresponds to the height of this region whereas
∆Vsd corresponds to half width of the same region, then

∆Vg=1.91-1.872=0.038 V

∆Vsd=4-0*10-3=4 mV

then Ec=∆Vsd*e=4 meV

and the charging energy also relate to the total capacitance of the
island C∑ by the following equation

Ec=e2C∑

Then the C∑ can be calculated by the previous relation

C∑=e2Ec=40 aF

The gate capacitance was calculated previously by calculating ∆Vg

from the periodicity in fig (2) where ∆Vg=40mV

We got the same value approximately for ∆Vg from the stability
figure then

Cg=e∆Vg=4 aF

And one can deduce the value of C1 and C2 where C1 = C2

And C∑-Cg=C1+C2=36aF

Then C1 = C2 = 18aF

α can be calculated by the relation

α=∆Vsd∆Vg=0.105

Where ∆Vg=Ece*α

The lever arm of gate on the dot α is also defined by the ratio of
the gate capacitance to the total capacitance of the dot

α=CgC∑=0.1
α Value changes by large changing in the gate voltage

In figure (10) the white region is non conductance whereas the

black one is conductance region and the maximum current at the
meeting of two regions on Vg axis.
Figure (10): differential stability
diagram