Experiment No.

Study of Time Division Multiplexing (TDM)

 TIMING
MARKER AND
SYNC.

AUDIO 1
HS 1 M
U
L
T LINE
AUDIO 2 I CODING
HS 2 P
L
E
X
SWITCHES E
K1 TO K4 R

EXPAN-
SION
CHANNELS

FIBER OPTIC
TRANSMITTER
AND
RECEIVER SYSTEM

AUDIO 1 D
HS 1 E
U
L RECEIVED DATA
T
LINE
AUDIO 2 I
DECODING
HS 2 P
L
E MARKER
X
LEDs E RECEIVED
D5 TO D8 R CLOCK

TIMING
AND
EXPAN- SYNC.
SION
CHANNELS

BLOCK DIAGRAM FOR TIME DIVISION MULTIPLEXING

 JUMPER SETTING DIAGRAM FOR EXPERIMENT NO. 6

1 2
3 4
JP1
Emitter of Q2 (2N2907)
Audio 1 to Codec 1 I/P 1
Cathode of SFH 756V
Ext-Analog to Codec 1 I/P 2
Collector of Q1 (2N3904)
3
4 Cathode of SFH 450V

JP8

1 2 Audio 2 to Codec 2 I/P +5V

1
3 4 Ext-Analog to Codec 2 I/P SFH 756V Anode
2

JP2 +9V
3

JP10

1 2 Audio 1 to Audio 1

Audio 2 to Audio 1

Audio 1 to Audio 2

7 8 Audio 2 to Audio 2

JP3

2.048 MHz 1 2

256 KHz

EXT-TTL

Manchester Coded Data 7

8 Digital Buffer I/P for LED
SFH 756V

JP4

1 Manchester Coded Data Received

From Photodetector
2 Manchester Decoder Circuit I/P

3 Manchester Coded Data (Directly)

JP5
 SWITCH SETTING DIARAM FOR EXPERIMENT NO. 6

Switch Settings for Marker

SW1 SW2 8 7 6 5 4 3 2 1

ON ON L
1 2 3 4 5 6 7 8

1 2 3 4 5 6 7 8
SW3 ON

M L
8 7 6 5 4 3 2 1

SW4 ON

Switch Settings For Audio Channels in Time Zone

M L M L M L M L

4 3 2 1 SW6 ON SW8 ON
4 3 2 1

ON SW5 ON SW7 1 2 3 4 1 2 3 4
Audio 1 Tx setting Audio 2 Tx setting Audio 1 Rx setting Audio 2 Rx setting

Switch Settings For Manchester Coder

4 3 2 1
SW9-2 SW9-1 Data for coding Clock for coding

0 0 TDM data 2.048 MHz

ON SW9
0 1 128 KHz freqn. 256 KHz.

1 0 64 KHz. freqn. 256 KHz.

1 1 32 KHz freqn 256 KHz.

 FIBER TRAINER BLOCK SCHEMATIC

Binary Weighted
Clock at 2.048MHz

Marker_1_Trans
BUFFER

Marker_2_Trans BUFFER Xilinx_Trans Analog/Digital

Line Interface for
4-bit KEY Input
SFH 450/756

O
F
Audio Audio Interface Audio-1 Audio-2 C
Channel- and channel channel
Codec set-up set-up I
N
T
Audio-1 Audio-2 E
Audio Audio Interface channel channel R
Channel- and set-up set-up F
Codec A
C
E
Xilinx_Rec

Marker_1_ Rec Analog/Digital

BUFFER
Line Interface for
Marker_2_Rec BUFFER
SFH 350/551

4-bit LED Array Mono-Shot Clk

Detector

Reference Device Function

Xilinx_Rec / Xilinx_Trans XC9572 Manchester Encoding/Decoding,
32-channel TDM, Clk/Data Recovery
Binary weighted clock Crystal Base Frequency
Marker_X_X DIP Switch Marker for frame identification
Audio Interface & Codec HD44233 A/D & D/A sampling of input voice
Interface for SFH XXX Amp/Gates Signal Compatibility
Mono-shot 74121 Clock Separation
4-bit I/O Switch/LED Data Transmission Verification
OFC Interface Plastic Fiber Transmission Media
Buffer 74245 Buffering to inputs

LEGEND
 EXPERIMENT NO. 6
NAME
Study of Time Division Multiplexing

OBJECTIVE
The objective of this experiment is to study simultaneous transmission of several signals
using synchronous time division multiplexing.

THEORY
In case of communication systems, signals, which are transmitted usually, carry voice or
video information with them & are interpreted by human eye or ears, which has slow
response. Persistence of vision as well as of hearing has given rise to the concept of time
division multiplexing. In time division multiplexing various signals are sampled & transmitted
for a fixed duration of time one after the other. At the receiving end these signals are
extracted in the same order & form of transmission.
To implement this scheme we have used 32 channel digital multiplexer at transmission end
with clock generator for timing of signals. One channel is reserved for marker transmission,
two channels for voice data transmission, four channels take their inputs from four data
switches & other channels are available as expansion channels for user. Each channel has
a data rate of 64 Kbits / Sec.
This multiplexed data is then Manchester coded & fed as digital data to the transmitter. The
received digital data is first Manchester decoded & passed through a clock recovery circuit
& then demultiplexed giving each signal separate in its original form & shape.

CIRCUIT DESCRIPTION
The block diagram given in fig 6.1 clearly indicates the circuit flow.
1. The timing & synchronization circuit generates three clock frequencies -2.048MHz, 256
KHz and 8 KHz. These are generated for the complete time division multiplexed
transmission of the data from 32 channels. The data bits are transmitted at the rate of
2.048 MHz. Each channel is selected for on period of 1/256 KHz. Thus per channel 8
bits of data is transmitted. The channel selection frequency is 8 KHz. Thus a single
frame of 32 channels exists for a period of 125 uS.
2. The marker setting is achieved using switches SW1 & SW2. The two eight bit markers
are alternately transmitted at the start of each frame.

TRANSMITTER SECTION:

3. The voice signals from telephone handsets are processed and applied to CODEC. The
analog to digital conversion process inside the CODEC samples the signal at a
frequency of 8 KHz and this sampled digitized data is applied to the multiplexer input.
4. The marker, the data bits from two audio channels, data from four switches and those
from expansion channels are multiplexed. The multiplexed data is Manchester coded
and transmitted through the fiber.

RECEIVE SECTION:
5. The received data is Manchester decoded to separate clock and data (The detailed
explanation of Manchester coding and decoding is given in expt no. 8) and is applied to
a demultiplexer.
 6. Same received data is applied to the marker detection circuitry where low going pulses
are generated corresponding to the each marker received and are used as
synchronizing signal for timing circuitry.
7. The demultiplexer forms the data distribution system from where the samples are
separated and are applied to corresponding channels.
8. The switch channels directly drive the LEDs and the decoded voice data is again
applied to the CODEC. The converted analog signal is then interfaced with telephone.

EQUPMENTS
Experimenter Kit
20 MHz dual Trace Oscilloscope
1 Meter Fiber Cable
Telephone Handset

PROCEDURE
1. Connect 1 meter optical fiber cable between LED SFH756V & detector SFH551V as
explained in earlier experiments to form 660 nm digital link.
2. Assure the jumper and switch settings as shown in the jumper/switch block diagram.
3. Set Marker1 & Marker2 each for bit pattern shown in the diagram using SW1 & SW2
respectively. Observe the time division multiplexed data at TP10 on CRO.
4. Carefully observe the time duration for which each channel is selected. Observe &
measure the frame period.
5. Change the marker setting & observe the multiplexed data. Observe how both the
markers are alternately transmitted in each frame.
6. Press either of the Topaz keys (K1 - K2) and observe how data is transmitted in the
corresponding time slot. Thus, you can observe the signals at different points of the
transmitter section.
7. Observe the Manchester coded data at TP13. This data is transmitted through the
fiber. The received data, which is still in Manchester coded form, is available at
TP21.
8. Observe the data transmission by pressing keys (K1-K4) & observing the
corresponding LEDs (D5-D8) lit up. The recovered data at the receiver is available at
test point TP16.
9. Hear the voice input at the mouthpiece being looped back through the fiber to the
corresponding earpiece. The voice input at one mouthpiece cannot be heard at the
earpiece of another handset. Observe this TDM effect.
10. Change the jumper connections of JP8 to cross couple the handsets; refer to the
jumper diagram.
This establishes a cross link between the two receivers. The voice input at the
mouthpiece of one handset can now be heard at the earpiece of another handset.
11. The Time Division Multiplexing phenomenon can further be studied by taking
following observations:

In our scheme of TDM we have used two audio and five expansion channels. One Audio
channel ‘Audio-1’ is mapped in first 16 channels and can be set any where in between
channels 6 to 15 (channels 0 to 5 are reserved for marker and four key switches.). This is
achieved using the 4 bit switches SW5 and SW6 as shown in the block diagram. Change
the switch settings for Sw5 and observe how audio data moves in different time slots. To
receive the data in same time slot you must set the SW6 same as that SW5.

SW5 and SW6 are to be down counted in binary sequence for channels 0 to 15, i.e. 1111--
> CH0, 1110 --> CH1,… 0000--> CH15.

Second audio channel ‘Audio-2’ is mapped in next 16 channels and can switched in time
slot using switches SW7 and SW8 same as for audio channels 1.