Automatic Train Speeed Control Based On Signals

AUTOMATIC TRAIN SPEEED CONTROL BASED ON SIGNALS
A.A.N.M. & V.V.R.S.R.POLYTECHNIC, GUDLAVALLERU

CHAPTER 1
INTRODUCTION
Now a days there is a lot of problem with neglecting railway signals by the driver
in day today life. The driver may neglect the train signals or it may not be clear due to
fog etc that reflects accidents of trains at different places. We have taken the above
problem and found a solution that results in automatic speed control of train based on
signals developed with microcontroller.
Here we used an Infra ed !I" transmitter at the signal terminal that
continuously transmits the communication code to the receiver based on the signals
detected !ed# $ellow or %reen". We have established the receiver part in the train that
receives communication code from the transmitter# gives an alarm in the train and
subse&uently displays the signal status on the '()* dot matri+ display. ,long with this
the speed of the train is also controlled by the microcontroller. It reduces the speed of the
train when yellow signal is detected# the train stops when red signal is detected# if green
is detected the train travels with full speed.
-o here we have established asynchronous protocol for transmitting and receiving
data between signal and train with the help of two microcontrollers. The assembly level
program is written in microcontroller for e+ecuting entire operation.
In future same system can be implemented using .re&uency -hift /eying !.-/"
for increasing distance between signals and train.
0'0
CHAPTER 2
BLOCK DIAGRAM
TRANSMITTER:

.I% *.'!,"1 T,N-2ITT3
0*0
RECIEVER:
.I% *.'!4"1 353I63
070
2.2 BLOCK DIAGRAM DESCRIPTION:
Transmittr:
In this transmitter part we have used 895*:;' micro controller for the
purpose of detecting signal status and transmit appropriate 80bit code to the receiver via
I modulator. Here we have used three <3=>s !ed# %reen# yellow " to the input port of
the micro controller when the signal is ?N the input port comes to bit :# if the signal ?..
the input port comes to bit '.
Si!na"in! S#stm:
In the signaling system block the three <3=>s are connected via '/
resistors.
Rst L$!i%:
The reset logic block provides signals to reset the micro controller. This is
constructed with 8.*/ resistors and ':@f capacitors.
Cr#sta" $s%i""at$r:
The necessary fre&uency to the micro controller is generated using )>tal
oscillator. This fre&uency is converted to s&uare wave within the micro controller.
IR M$&'"at$r:
The I modulator is nothing but an astable multivibrator that generates
7;/HA fre&uency while receiving bit : from the micro controller T)= pin. The
fre&uency from multivibrator is decided by # 5 connected to the comparator pins of
;;;. In this module the data is inverted by using one transistor.
IR Dri(r:
I driver is a current cum voltage amplifier !power amplifier". It increases
the input power received from the output of I modulator.
0B0
IR LED:
The I <3= is driven by I driver. It switches at the rate of 7; /HA
received from the I modulator. The I light is emitted in the free space.
Mi%r$ %$ntr$""r )*C+1:
We use 895)) series micro controller to serve the total purpose of
transmission. The assembly program written in the micro controller always scans for
light and transmits the appropriate 80bit code through asynchronous T)= pin of micro
controller at regular intervals.
R%i(r:
The I receiver receives I fre&uency from transmitter and generates a
bit : while I fre&uency focused on the I detector# bit ' when there is no I signal. This
I data is given to the )= pin of the micro controller used in the receiver.
T, Mi%r$ %$ntr$""r:
The micro controller receives I data through )= pin. The received data
is accumulated in serial buffer of 895;* micro controller. It compares the data with the
predefined codes ::H# :'H# :*H. If the code received from I receiver is e&ual to ::H
then the motor will be stopped. If the code is e&ual to :'H a low voltage is applied to the
motor and it rotates with low speed. If the code is e&ual to :*H then the motor rotates
with full speed by getting a voltage of 76.In the first two cases an alarm indication is
given to the driver and subse&uently the relevant signal status is displayed on the '()*
dot matri+ display attached to the output port of the micro controller in all three cases.
1-.2 Matri/ Dis0"a#:
The display connected to the output port of microcontroller displays the
signal information in one or two rows. The details of the display are given in subse&uent
section.
0;0
B'11r &ri(r an& 2'11r:
, buAAer is connected to the output port of micro controller via a buAAer
driver transistor.
T, m$t$r an& its &ri(r:
-peed control of regulator switch1
The speed control regulator is constructed with the help of two relays that
are operated from two transistors. These are connected to the output port of the micro
controller. , train motor is connected at the output of regulator switch.
0(0
3.1 CIRCUIT DESCRIPTION:
Transmittr:
In transmitter section the <3=>s are connected to port'.C'.: to red# C'.'
to yellow# C'.* to green via '/ resistor from ;6. Normally the port maintains logic high
state when the signal light is in ?.. stateD it maintains logic : when it is ?N. The
program written in the micro controller gets the data from the port pin transfers
appropriate code to the serial buffer of 895;'. The serial buffer transmits the data to the
receiver unit via T)= pin of the micro controller with the transmission speed of 7::bps#
data length of 8 bit# no. of stop bits e&ual to *# no parity. The 7::bps is developed from
the basic crystal fre&uency ''.:;*2HA. The fre&uency is divided to 7::bps with the help
of internal timer counter register. The transmitted data is given to the I modulator. Here
we used a crystal oscillator with ''.:;*2HA crystal# 77p. capacitor specified by the
manufacturer connected to pins )T<' and )T<*. ,n active high reset signal is generated
using ':@. capacitor# 8.*/ resistors connected to the -T pin of micro controller.
IR m$&'"at$r:
The I modulator is an astable multivibrator generates 7; /HA fre&uency
while receiving a bit: from the T)= pin of the micro controller. The transmission is
decided by B.E /HA fre&uency while receiving bit' at pinB i.e. -T of ;;;. The data
from T)= pin of micro controller is inverted with the help of 45;BE transistor.
Fltimately bit: at the T)= pin of the micro controller generates 7; /HA I fre&uencies#
the fre&uency is emitted by the I <3= with the help of 45;BE driver transistor# and its
base is connected to the output of ;;;.
0E0
R%i(r:
The receiver is having I photo diode and I processing comparator. It
has 7 pins# one groundD other is 6cc via BEG resistor H ':@. capacitor to reduce 6cc by
'.;6 safety voltage to apply to I receiver. The 7
rd
pin is data pin and is normally high
when there is no signal focused on I receiver and low when there is signal. This
asynchronous data is given to )= pin of micro controller. The data received at )= pin
of the micro controller converts into parallel and subse&uently stored in serial buffer. The
serial setting is same as the setting of transmitter i.e. !7::bps# 8bit# 'stop bit# no parity".
Crogram written in the micro controller takes the data back and transfers it to '()*
matri+ display according to code received from serial buffer. The <5= display is
connected to port *.E# port*.( port *.; at the same time the micro controller operates the
buAAer and speed control relays.
The data pin of <5= is connected to port : and control pins to port* as
shown in the figure. The contrast of crystals can be adIusted to contrast voltage at the pin
7 of micro controller. This can be adIusted by adIusting small preset connected to the
contrast. The '*6 buAAer is connected to port*.: via 45;BE driver transistor# the * relays
are connected to micro controller via 45;BE transistors. When both are Aeros the train is
automatically stopped# the buAAer is ?N# the display shows that 3= signal detected. If
port*.' H*.* pins are : and '# a low voltage is applied# the train is stopped. If the signal
from micro controller is ': then the motor receives nearly about 76 from the relay
switching unit# then the train will move with full speed and <5= displays %33N light
is detected.
080
CHAPTER 4
HARD5ARE DESCRIPTION
4.1: MICROCONTROLLER )*C+2:
4.1.1: 6EATURES:
5ompatible with 25-0;' Croducts.
8/ 4ytes of In0-ystem eprogrammable .lash 2emory.
3ndurance1 '#::: WriteJ3rase 5ycles.
.ully -tatic ?peration1 : HA to *B 2HA
Three0level Crogram 2emory <ock.
*;( + 804it Internal ,2.
7* Crogrammable IJ? <ines.
Three '(0bit TimerJ5ounters.
3ight Interrupt -ources.
Crogrammable -erial 5hannel.
<ow Cower Idle and Cower =own 2odes
4.1.2: PIN DIAGRAM AND ITS DESCRIPTION:
The microcontroller generic part number actually includes a whole family
of microcontrollers that have numbers ranging from 8:7'to 8E;' and are available in N0
5hannel 2etal ?+ide -ilicon !N2?-" and 5omplementary 2etal ?+ide -ilicon
!52?-" construction in a variety of package types with B/bytes of .lash Crogrammable
and 3rasable ead ?nly 2emory !C3?2".
4.1 PIN DIAGRAM:
090
.I% B.'1 CIN =I,%,2
DESCRIPTION:
0':0
The device is manufactured using ,tmel>s high density nonvolatile
memory technology and is compatible with the industry standard 25-0;' instruction set
and pin out. The on0chip .lash allows the program memory to be reprogrammed in0
system or by a conventional nonvolatile memory programmer. 4y combining a versatile
80bit 5CF with .lash on a monolithic chip# the ,tmel ,T895;* is a powerful
microcomputer which provides a highly fle+ible and cost effective solution to many
embedded control applications.
The ,T895;* provides the following standard features1 B /bytes of .lash# *;(
bytes of ,2# 7* IJ? lines# two '(0bit timerJcounters# five vector two0level interrupt
architecture# a full duple+ serial port# an on0chip oscillator and clock circuitry. In
addition# the ,T895;* is designed with static logic for operation down to Aero fre&uency
and supports two software selectable power saving modes. The Idle mode stops the 5CF
while allowing the ,2# timerJcounters# serial port and interrupt system to continue
functioning. The Cower =own mode saves the ,2 contents but freeAes the oscillator
disabling all other chip functions until the ne+t hardware reset.
4.1.3: ARCHITECTURE O6 )*C+2
0''0
.I% B.*1,5HIT35TF3 ?. 895;*
DESCRIPTION:
0'*0
P$rt 7:
Cort : is an 80bit open drain bidirectional IJ? port. ,s an output port each pin can
sink eight TT< inputs. When '>s are written to port :# the pins can be used as high0
impedance inputs. Cort : may also be configured as the multiple+ed low order
addressJdata bus during access to e+ternal program and data memory. In this mode C: has
internal pull0ups. Cort : also receives the code bytes during .lash programming# and
outputs the code bytes during program verification. 3+ternal pull0ups are re&uired during
program verification
P$rt 1:
Cort ' is an 80bit bi0directional IJ? port with internal pull0ups. The Cort ' output
buffers can sinkJsource four TT< inputs. When '>s are written to Cort ' pins they are
pulled high by the internal pull0ups and can be used as inputs. ,s inputs# Cort ' pins that
are e+ternally being pulled low will source current !II<" because of the internal pull0ups.
Cort ' also receives the low0order address bytes during .lash programming and program
verification.
T,4<3 B.' ,<T3N,T3 .FN5TI?N- ?. C?T '
P$rt 2:
0'70
Cort * is an 80bit bidirectional IJ? port with internal pull0ups. The Cort * output
buffers can sinkJsource four TT< inputs. When '>s are written to Cort * pins they are
pulled high by the internal pull0ups and can be used as inputs. ,s inputs# Cort * pins that
are e+ternally being pulled low will source current !II<" because of the internal pull0ups.
Cort * emits the high0order address byte while fetching from e+ternal program memory
and during access to e+ternal data memory that use '(0bit address !2?6) ,#K=CT".
In this application it uses strong internal pull0ups when emitting 's. =uring access to
e+ternal data memory that use 80bit address !2?6) ,# KI"# Cort * emits the contents
of the C* -pecial .unction egister. Cort * also receives the high0order address bits and
some control signals during .lash programming and verification.
P$rt 3:
Cort 7 is an 80bit bidirectional IJ? port with internal pull0ups. The Cort 7 output
buffers can sinkJsource four TT< inputs. When '>s are written to Cort 7 pins they are
pulled high by the internal pull0ups and can be used as inputs. ,s inputs# Cort 7 pins that
are e+ternally being pulled low will source current !II<" because of the pull0ups. Cort 7
also serves the functions of various special features of the ,T895;* as listed below1
0'B0
T,4<3 B.* ,<T3N,T3 .FN5TI?N- ?. C?T 7
RST:
-T means 3-3T. 895;* uses an active high reset pin. It must go high for two
machine cycles. The simple 5 circuit used here will supply voltage !6cc" to reset pin
until capacitance begins to charge. ,t a threshold of about *.;6# reset input reaches a low
level and system begins to run.
.I%1 B.71 3-3T 5?NN35TI?N
ALE8PROG:
0';0
,ddress <atch 3nable output pulse for latching the lower byte of the address
during access to e+ternal memory. This pin is also the program pulse input !C?%"
during .lash programming. In normal operation ,<3 is emitted at a constant rate of 'J(
the oscillator fre&uency# and may be used for e+ternal timing or clocking purposes. Note#
however# that one ,<3 pulse is skipped during each access to e+ternal =ata 2emory. If
desired# ,<3 operation can be disabled by setting bit : of -. location 83H. With the bit
set# ,<3 is active only during a 2?6) or 2?65 instruction. ?therwise# the pin is
weakly pulled high. -etting the ,<30disable bit has no effect if the microcontroller is in
e+ternal e+ecution mode.
PSEN:
Crogram -tore 3nable is the read strobe to e+ternal program memory. When the
,T895;* is e+ecuting code from e+ternal program memory# C-3N is activated twice
each machine cycle# e+cept that two C-3N activations are skipped during each access to
e+ternal data memory.
EA8VPP:
3+ternal ,ccess 3nable. 3, must be strapped to %N= in order to enable the
device to fetch code from e+ternal program memory locations starting at ::::H up to
....H. Note# however# that if lock bit ' is programmed# 3, will be internally latched on
reset. 3, should be strapped to 6cc for internal program e+ecutions. This pin also
receives the '*0volt programming enable voltage !6pp" during .lash programming# for
parts that re&uire '*0volt 6pp.
0'(0
.TAL1: Input to the inverting oscillator amplifier and input to the internal clock
operating circuit
.TAL2: ?utput from the inverting oscillator amplifier.
T2: 3+ternal count input to TimerJ5ounter *# 5lock out.
T2E.: 5ounter * captureJreload trigger H direction control.
4.1.4: THE ON9CHIP OSCILLATORS
Cins )T,<' and )T,<* are provided for connecting a resonant network to form
an oscillator. The crystal fre&uency is basic internal clock fre&uency. The ma+imum and
minimum fre&uencies are specified from 'to *B2HL.
Crogram instructions may re&uire one# two or four machine cycles to be e+ecuted
depending on type of instructions. To calculate the time any particular instructions will
take to be e+ecuted# the number of cycles M5>#
T N 5O'*d J 5rystal fre&uency
Here# we chose fre&uency as ''.:;9*2HL. This is because#
4audN *Oclock fre&uencyJ !7*d. '*d P*;(d0TH'Q".The oscillator is chosen to generate
both standard and nonstandard baud rates. If standard baud rates are desired# an
''.:;9*2HL crystal should be selected. .rom our desired standard rate# TH' can be
calculated. The internally implemented value of capacitance is 77 pf.
0'E0
.I% B.B1?N05HIC ?-5I<<,T?-
Pr$!ram Mm$r# L$%: Bits:
?n the chip there are three lock bits which can be left unprogrammed !F" or can
be programmed !C" to obtain the additional features .When lock bit ' is programmed# the
logic level at the 3, pin is sampled and latched during reset. If the device is powered up
without a reset# the latch initialiAes to a random value# and holds that value until reset is
activated. It is necessary that the latched value of 3, be in agreement with the current
logic level at that pin in order for the device to function properly.
Pr$!ram C$'ntr an& Data P$intr:
The 895;* contains two '(0bit registers1 the program counter !C5" and the data
pointer !=CT"# each used to hold the address of a byte in memory. The C5 is the only
register that does not have an internal address. The =CT is under the control of program
instructions and can be specified by its '(0bit name# =CT# or by each individual byte
name# =CH and =C<. =CT does not have a single internal addressD =CH and =C< are
each assigned an address.
0'80
A ; B R!istrs:
The 895;* contains 7B general0purpose# working registers. Two of these are
registers , and 4 that hold the results of many instructions# particularly arithmetic and
logical operations of the 895;* 5CF. The other 7* are arranged as part of internal ,2
in four banks# 4:047# of eight registers. The , register is also used for all data transfers
between the 895;* and any e+ternal memory. The 4 register is used with the , register
for multiplication and division operations.
6"a!s an& t, Pr$!ram Stat's 5$r& <PS5=:
.lags may be conveniently addressed# they are grouped inside the program status
word !C-W" and the power control !C5?N" registers.
The 895;* has four math flags that respond automatically to the outcomes of
math operations and three general0purpose user flags that can be set to ' or cleared to :
by the programmer as desired. The math flags include 5arry !5"# ,u+iliary 5arry !,5"#
?verflow !?6"# and Carity !C". Fser flags are named .:# %.: and %.'.They are general0
purpose flags that may be used by the programmer to record some event in the program.
4.1.+: MEMOR> ORGANISATION
Intrna" Mm$r#:
The 895;* has internal ,2 and ?2 memory for the functions. ,dditional
memory can be added e+ternally using suitable circuits. This has a hardware architecture#
which uses the same address# in different memories# for code and data.
0'90
Intrna" RAM:
The *;(0byte internal ,2. The upper '*8 bytes occupy a parallel address space
for the -pecial .unction egisters. Instructions that use indirect addressing access the
upper '*8 bytes of ,2. -tack operations are e+amples of indirect addressing.Internal
=ata 2emory addresses are always one byte wide# which implies an address space of
only *;( bytes.
However# the addressing modes for internal ,2 can accommodate 78B bytes#
using a simple trick. =irect addresses higher than E.H access one memory space and
indirect addresses higher than E.H access a different memory space.
Thus figure below shows the Fpper '*8 and -. space occupying the same block
of addresses# 8:H through ..H# although they are physically separate entities.
The <ower '*8 bytes of ,2 are present in all 895;* devices as mapped in
figure. The lowest 7* bytes are grouped into B banks of 8 registers. Crogram instructions
call out these registers as : through E.
Two bits in the Crogram -tatus Word !C-W" are used to select a register bank.
This allows more efficient use of code space# since register instructions are shorter than
instructions that use direct addressing. The ne+t '( bytes above the register banks form a
block of bit addressable memory space. The 895;* instruction set includes a wide
selection of single0bit instructions# and the '*8 bits in this area can be directly addressed
by these instructions. The bit addresses in this area are ::H through E.H. ,ll the bytes in
the lower '*8 can be accessed by either direct or indirect addressing.
0*:0
The upper '*8 can only be accessed by indirect addressing. -.>s include the
port latches# timers# peripheral controls# etc. These registers can only be accessed by
direct addressing. -i+teen addresses in -. space are both byte and bit0addressable. The
bit0addressable -.s are those whose address ends in :H or 8:H.
.I%B.; 232?$ FNIT
0*'0
T, Sta%: an& Sta%: P$intr:
The stack refers to an area of internal ,2 that is used in conIunction with
certain op0codes to store and retrieve data &uickly. The 80bit stack pointer register is used
by the 895;* to hold an internal ,2 address and is called top of the stack. The address
held in the -C register is the location in internal ,2 where the last byte of data was
stored by a stack operation. When data is to be placed on the stack# the -C increments
before storing data on the stack so that the stack grows up as data is stored. ,s data is
retrieved from the stack# the byte is read from the stack# then the -C decrements to point
to the ne+t available byte of stored data.
4.1.-: SPECIAL 6UNCTION REGISTERS
The 895;* operations that do not use the internal '*80byte ,2 addresses from
::h to E.h are done by a group of specific internal registers# each called a -pecial
.unction register# which may be addressed much like internal ,2# using addresses
from 8:H to ..H. C5 is not a part of the -. and has no internal ,2 address.
.I% B.( T*5?N -C35I,< .FN5TI?N 3%I-T3
0**0
.I% B.E T*2?= -C35I,< .FN5TI?N 3%I-T3
T,4<3 B.7 <I-T ?. -C35I,< .FN5TI?N 3%I-T3-
0*70
4.2: MICROCONTROLLER AT)*C27+1:
.eatures1
5ompatible with 25-R0;'Croducts
*/ 4ytes of eprogrammable .lash 2emory
3ndurance1 '#::: WriteJ3rase 5ycles
*.E6 to (6 ?perating ange
.ully -tatic ?peration1 : HA to *B 2HA
Two0level Crogram 2emory <ock
'*8 + 80bit Internal ,2
'; Crogrammable IJ? <ines
Two '(0bit TimerJ5ounters
-i+ Interrupt -ources
Crogrammable -erial F,T 5hannel
=irect <3= =rive ?utputs
?n0chip ,nalog 5omparator
<ow0power Idle and Cower0down 2odes
%reen !CbJHalide0free" Cackaging ?ption
4.2.1: PIN DIAGRAM AND ITS DESCRIPTION:
The microcontroller generic part number actually includes a whole family of
microcontrollers that have numbers ranging from 8:7'to 8E;' and are available in N0
5hannel 2etal ?+ide -ilicon !N2?-" and 5omplementary 2etal ?+ide -ilicon
!52?-" construction in a variety of package types.
0*B0
Pin Configuration:
20-lead PDIP/SOIC:
.I% B.81 CIN =I,%,2 ?. 895;'
0*;0
3.2.2BLOCK DIAGRAM:
.I% B.91 ,5HIT35TF3 ?. 895;'
0*(0
4.2.3 IR RECIEVER TSOP1?33:
DESCRIPTION:
The T-?C'E77 are miniaturiAed receivers for infrared remote control systems.
IN diode and preamplifier are assembled on lead frame# the epo+y package is designed as
I filter.The demodulated output signal can directly be decoded by a microprocessor.
T-?C'E77 is the standard I remote control receiver series# supporting all maIor
transmission codes.
.I% B.':1 I 353I63
0*E0
FEATURES:
Choto detector and preamplifier in one package
Internal filter for C52 fre&uency
Improved shielding against electrical field disturbance
TT< and 52?- compatibility
?utput active low
<ow power consumption
High immunity against ambient light
5ontinuous data transmission possible !up to *B:: bps"
-uitable burst length .': cyclesJburst
.I% B.'' I 353I63 4<?5/ =I,%,2
Here the I receiver receives I fre&uency from transmitter generates a bit :
while I fre&uency focused on the I detector# generates bit ' when there is no I signal.
This I data is given to the )= pin of the micro controller used in the receiver.
0*80
4.2.4 NE+++ TIMER <ASTABLE MULTIVIBRATOR=:
.I%.B.'* N3;;; TI23
DESCRIPTION:
This circuit diagram shows how a ;;; timer I5 is configured to function
as an astable multivibrator. ,n astable multivibrator is a timing circuit whose SlowS and
ShighS states are both unstable. ,s such# the output of an astable multivibrator toggles
between SlowS and ShighS continuously# in effect generating a train of pulses. This circuit is
therefore also known as a Spulse generatorS circuit.
In this circuit# capacitor 5' charges through ' and *# eventually
building up enough voltage to trigger an internal comparator to toggle the output flip0
flop. ?nce toggled# the flip0flop discharges 5' through * into pin E# which is the
discharge pin. When 5'Ss voltage becomes low enough# another internal comparator is
triggered to toggle the output flip0flop. This once again allows 5' to charge up through
' and * and the cycle starts all over again.
0*90
5'Ss charge0up time t' is given by1 t' N :.(97!'T*" 5'. 5'Ss discharge
time t* is given by1 t* N :.(97!*" 5'. Thus# the total period of one cycle is t'Tt* N
:.(97 5' !'T**". The fre&uency f of the output wave is the reciprocal of this period#
and is therefore given by1 f N '.BBJ !5' !'T**""# where f is in HA if ' and * are in
mega ohms and 5' is in microfarads.

4.2.+LI@UID CR>STAL DISPLA>:
In '9(8# 5, <aboratories developed the first li&uid crystal display
!<5=". -ince then# <5=>s have been implemented on almost all types of digital devices#
from watches to computer and proIection T6>s .<5=>s operate as a light valve#
blocking light or allowing it to pass through. ,n image in an <5= is formed by applying
an electric field to alter the chemical properties of each <55 !<i&uid 5rystal 5ell" in the
display in order to change a pi+el>s light absorption properties. These <55>s modify the
image produced by the backlight into the screen output re&uested by the controller.
Through the end output may be in color# the <55>s are monochrome# and the color is
added later through a filtering process. 2odern laptop computer displays can produce
(;#;7( simultaneous colors at resolution of 8:: ) (::.
To understand the operation of an <5=# it is easiest to trace the path of a
light ray from the backlight to the user. The light source is usually located directly behind
the <5=# and can use either <3= or conventional fluorescent technology. .rom this
source# the light ray will pass through a light polariAer to uniformly polariAe the light so it
can be acted upon by the li&uid crystal !<5" matri+. The light beam will then pass
through the <5 matri+# which will determine whether this pi+el should be on or off.
If the pi+el is on# the li&uid crystal cell is electrically activated# and the molecules in
the li&uid will align in a single direction. This will allow the light to pass through
unchanged. If the pi+el is off# the electric field is removed from the li&uid# and the
molecules will scatter. This dramatically reduces the light that will pass through the
display at that pi+el.

07:0
In a color display# after the light passes through the li&uid crystal
matri+# it passes through a color filter !usually glass". This filter blocks all wavelengths
of light e+cept those within the range of that pi+el. In a typical %4 display# the color
filter is integrated into the upper glass colored microscopically to render each individual
pi+el red# green or blue. The areas in between the colored pi+el filter areas are printed
black to increase contrast. ,fter a beam of light passes through the color filter# it passes
through yet another polariAer to sharpen the image and eliminate glare. The image is then
available for viewing.
In an ,2<5=# each <55 is stimulated individually by a dedicated
transistor or diode. The two e+isting ,2<5= technologies are Thin .ilm Transistor
!T.T" and metal0insulator0metal !2I2". In an 2I2 display# dedicated diodes are
fabricated at each pi+el. 2I2 displays# currently being manufactured by Toshiba and
-eiko03pson# are not advantageous that T.T displays.
4.2.- INTER6ACING LCD TO THE MICROCONTROLLER:
This is the first interfacing e+ample for the parallel port. We will start with
something simple. This e+ample does not use the bi0directional feature found on newer
ports# thus it should work with most# if not all parallel ports. It however does not show
the use of the status port as an input. -o what are we interfacingU , '( 5haracter * <ine
<5= 2odule to the parallel port. These <5= 2odules are very common these days# and
are &uite simple to work with# as all the logic re&uired running them is on board.
6EATURES:
Interface with either B0bit or 80bit microprocessor.
=isplay data ,2
8: + 8 bits !8: characters".
5haracter generator ?2
'(: different ; + E dot0matri+ character patterns.
5haracter generator ,2
8 different users programmed ; + E dot0matri+ patterns.
=isplay data ,2 and character generator ,2 may be
,ccessed by the microprocessor.
07'0
o Numerous instructions
5lear =isplay# 5ursor Home# =isplay ?NJ?..# 5ursor
?NJ?..# 4link 5haracter# 5ursor -hift# =isplay -hift.
4uilt0in reset circuit is triggered at power ?N
.I%1B.'7 <5= =I-C<,$ =I,%,2
07*0
4.2.? PIN DIAGRAM:
.I% B.'B CIN=I,%,2 ?. '()* 2,TI) =I-C<,$
0770
T,4<3 B.B 1 CIN- =3.INITI?N ?. <5= =I-C<,$
In the above table 6cc and 6ss are supply pins and 633 !Cin no.7" is
used for controlling <5= contrast. Cin No.B is s pin for selecting the register# there are
two very important registers are there inside the <5=. The - pin is used for their
selection as follows. If -N:# the instruction command code register is selected# allowing
the user to send data to be displayed on the <5=. JW is a read or write pin# which
allows the user to write information to the <5= or read information from it. JWN'
when reading and JWN: when writing. To latch information present to its data pins the
<5= uses the enable !3" pin. The 80bit data pins# =:0=E are used to send information to
the <5= or read the contents of the <5=>s internal registers. To display letters and
numbers# we must send ,-5II codes for the letters ,0L# and number : 09 to these pins
while making -N'.
07B0
ABSOLUTE MA.IMUM RATINGS:
'. 3<35TI5,< ,4-?<FT3 2,)I2F2 ,TIN%-1
.I% B.; 3<35TI5,< ,4-?<FT3 2,)I2F2 ,TIN%-
@UALIT> CONTROL:
-ome <5= panels have defective transistors# causing permanently lit or
unlit pi+els which are commonly referred to as stuck pi+els or dead pi+els respectively.
Fnlike integrated circuits !I5s"# <5= panels with a few defective pi+els are usually still
usable. It is also economically prohibitive to discard a panel with Iust a few defective
pi+els because <5= panels are much larger than I5s.
COLOR DISPLA>S:
In color <5=s each individual pi+el is divided into three cells# or sub
pi+els# which are colored red# green# and blue# respectively# by additional filters !pigment
filters# dye filters and metal o+ide filters". 3ach sub pi+el can be controlled independently
to yield thousands or millions of possible colors for each pi+el. 5T monitors employ a
similar Ssub pi+elS structures via phosphors# although the analog electron beam employed
in 5Ts do not hit e+act Ssub pi+elsS.
5olor components may be arrayed in various pi+el geometries# depending
on the monitorSs usage. If software knows which type of geometry is being used in a
given <5=# this can be used to increase the apparent resolution of the monitor through
sub pi+el rendering. This techni&ue is especially useful for te+t anti0aliasing.To reduce
smudging in a moving picture when pi+els do not respond &uickly enough to color
changes# so pi+el overdrive may be used.
07;0

4.3 PO5ER SUPPL>:
DESCRIPTION:

The Cower -upply is a Crimary re&uirement for the proIect work. The
re&uired =5 power supply for the base unit as well as for the recharging unit is derived
from the mains line. .or this purpose center tapped secondary of '*60:0'*6 transformer
is used. .rom this transformer we get ;6 power supply. In this T;6 output is a regulated
output and it is designed using E8:; positive voltage regulator. This is a 7 Cin voltage
regulator# can deliver current up to 8:: milliamps.
ectification is a process of rendering an alternating current or voltage
into a unidirectional one. The component used for rectification is called Mrectifier>. ,
rectifier permits current to flow only during positive half cycles of the applied ,5
voltage. Thus# pulsating =5 is obtained to obtain smooth =5 power additional filter
circuits re&uired.
5ircuit diagram 1

.I% B.'; 5I5FIT =I,%,2 ?. C?W3 -FCC<$

07(0
, diode can be used as rectifier. There are various types of diodes. However#
semiconductor diodes are very popularly used as rectifiers. , semiconductor diode is a
solid0state device consisting of two elements one being an electron emitter or cathode#
the other an electron collector or anode. -ince electrons in a semiconductor diode can
flow in one direction only from emitter to collector the diode provides the unilateral
conduction necessary for rectification.
The rectified output is filtered for smoothening the =5# for this
purpose capacitor is used in the filter circuit. The filter capacitors are usually connected
in parallel with the rectifier output and the load. The ,5 can pass through a capacitor but
=5 cannot# the ripples are thus limited and the output becomes smoothed. When the
voltage across the capacitor plates tends to rise# it stores up energy back into voltage and
current. Thus# the fluctuation in the output voltage is reduced considerable.
4.4: VOLTAGE REGULATOR:
4.4.1: LM ?).. SERIES VOLTAGE REGULATOR
The <2 E8))) series of the three terminal regulations is available with several
fi+ed output voltages making them useful in a wide range of applications. ?ne of these is
local on card regulation. The voltages available allow these regulators to be used in logic
systems# instrumentation and other solid state electronic e&uipment. ,lthough designed
primarily as fi+ed voltage regulators# these devices can be used with e+ternal components
to obtain adIustable voltages and currents. The <2E8)) series is available in aluminum
to 7 packages which will allow over '.;, load current if ade&uate heat sinking is
provided. 5urrent limiting is included to limit the peak output current to a safe value.
The <2 E8)) is available in the metal 7 leads to ; and the plastic to 9*. .or this type#
with ade&uate heat sinking. The regulator can deliver '::m, output current.
07E0
The advantage of this type of regulator is# it is easy to use and minimiAe the
number of e+ternal components.
The following are the features of voltage regulators1
a" ?utput current in e+cess of '.;, for E8 and E8< series
b" Internal thermal overload protection
c" No e+ternal components re&uired
d" ?utput transistor sage area protection
e" Internal short circuit current limit.
f" ,vailable in aluminum 7 package.
4.4.2: POSITIVE VOLTAGE REGULATOR
The positive voltage regulator has different features like
?utput current up to '.;,
No e+ternal components
Internal thermal overload protection
High power dissipation capability
Internal short0circuit current limiting
?utput transistor safe area compensation
=irect replacements for .airchild micro,E8:: series
0780
Nominal output
voltage
egulator Nominal
output
voltage
egulator
;6 uaE8:;5 ':6 uaE8':5
(6 uaE8:(5 '*6 uaE8'*5
86 uaE8:85 '; uaE8';5
8.;6 uaE88;5 '8 uaE8'85
T,4<3 B.( <I-T ?. C?-ITI63 6?<T,%3 3%F<,T?-
4.4.3 COMPONENTS LIST:
,T T,N-2ITT31
-l.No 5?2C?N3NT N,23 6,<F3-
'. 895;' 2I5? 5?NT?<<3 I5 '
*. <2 ;;; TI23 I5 *
7. 5$-T,< 5' ''.:9;*2HL
B T63 6?<T,%3 3%F<,T?0E8:; I57
;. T,N-I-T?- T'#T* 45 ;BE
(. 5,C,5IT?- 5'#5*
57#5B#5;#5(
5E
77C.
':/C.
':C.
E. 3-I-T?- '#*#7
B
;
(
E#8
'/ ?H2
8.*/ ?H2
*:/ ?H2
*.*/ ?H2
BE ?H2
8. <3= %33N
$3<<?W
3=
I <3=
%
$
I
9. 4,TT3$ 96
AT RECEIVER:
-<.N? 5?2C?N3NT N,23 6,<F3-
'. 895;* 2I5? 5?NT?<<3 I5B
0790
*. '(O* =?T 2,I) <5= =I-C<,$ =I-
7. I -3N-? 0'E77 I-
B. 5$-T,< 0''.:9;*2HL 5*
;. 3<,$- 0'*6 <'#<*
(. T,N-I-T?- 0T7#TB#T; 45 ;BE
E. C3IL? 4FLL3 C4
8. =5 2?T? 2
9. 3-I-T? I5- I5 '#I5 *#I5 7#I5
B
':. 5,C,5IT?- 0 5'#5*
57
5B
77C.
':C.
'::/C.
''. 3--I-T?- 0 '
*
8.*/?H2
BE ?H2
'*. =5 4,TT3I3- 04'#4* '.;6
PO5ER SUPPL> UNIT:
'. T,N-.?23 0 '*0:0'* T'
*. =I?=3- 0 ='#=* 'NB::E
7. 5,C,5IT?- 05'
5*
':::/C.
':/C.
B. T63 6?<T,%3 3%F<,T?0
E8:;
I5;
+. MAKING O6 PCB
0B:0
+.1: INTRODUCTION
?ne of the most discouraging things about making a hardware proIect is
building the printed circuit board0C54. It is sometimes possible to use strip board or
some other pre0fabricated board but more often than not the circuit comple+ity and
performance re&uires a proper C54 to be made .The good news is that due to
improvements in printing and processing technologies it is now relatively easy to make
ine+pensive high &uality C54>s at home.
5ARNING:
2aking C54>s re&uires the use of .erric 5hloride!.e5l7" which is corrosive
so avoid skin and eye contact .emember safety0first so# use glasses# gloves and
protective overalls ..erric 5hloride is also very good at distorting cloths weeks after you
think you have washed it off. If you do get any on your skin then wash it off immediately
with lots of water and soap.
+.2: THE ART5ORK
The first stage is to transfer the circuit layout from the C5 to the
special Cress0n0Ceel film. Cut the film in the laser printer so that the print will appear on
it. This will produce a contact print where the black image will end up as copper on the
final C54.
Now# the artwork can be transferred on to the 5opper board by following the instructions
with the Cress0n0Ceel film1
'. 5lean the copper board very well with the C54 cleaning rubber.
*. Heat the cloths iron to 7:: deg ..
7.Hole the film with the print in contact to the copper and smoothly iron the film
down until the print appears black through the film !about 'min".
B.,llow ;minutes to cool down !speed up this with water" then peel the film off.
0B'0
This should produce a clean black print on to the copper. If you let the film move or
overheat then you will find that the tracks and writing will be smeared and out of focus
also the film may be wrinkled up. If you don>t use enough heat or heat unevenly then the
film may not stick or to be dark enough. In either case clean off the C54 and try again#
you should get it right after a couple of goes.
+.3: THE ETCHING
3tching the C54 is to remove the Fnwanted 5opper.
'. =ilute the concentrated .erric 5hloride fluid with water !'1'" and pour into the one
liter glass Iar.
*. Cut the C54 copper side up on the top tray and pour all .erric 5hloride on top.
7. %ently rock the top tray to keep the etch fluid moving avoiding spillage.
B. ,fter about ';min all of the unwanted copper disappears.
;. emove the board and drop it into a bucket of cold water to clean off.
+.3.1: DRILLING
=rilling with :.8mm drill bits can be bit tricky as it is easy to break the drill bits.
,lways hold the drill straight and do not bend it when the hole has started .Fsing a
:.8mm C54 drill bit# drill out all of the component holes that are re&uired. -o# now the
C54 is finished and it is ready to solder.
+.4: ADVANTAGES O6 PCB
educing wiring errors.
=ecreases assembly cost.
Typically consume less space than traditionally build circuits.

0B*0
). ADVANTAGES AND APPLICATIONS:
ADVANTAGES
-mall in siAe.
3asy to operate from a remote place.
5ost of manufacture is very less and fle+ibility of using in various applications.
APPLICATIONS
,fter some small modifications made# the same kit can find many applications.
,utomation in industries #house hold appliances etc.#
,lso used in a remote areas where the facility of 5ell Network is provided.
0B70
*. CONCLUSION AND 6UTURE SCOPE
CONCLUSION:
This proIect is aimed to conserve the energyJpower in various sectors such
as in railways# home appliances etc and it was successfully completed and implemented.
4y using this system at 6iIayawada ailway station we can save around s.;# ::#:::J0
per annum.
Therefore by implementing this techni&ue we can save large amount of
power and money.
6UTURE SCOPE :
This techni&ue can be e+tended in the future by using .re&uency -hift
/eying !.-/" and Chase -hift /eying !C-/" in the place of I receivers and transmitter
to increase the detection distance of a signal.

0BB0
17. BIBILOGRAPH>
.
2uhammad ,li 2aAidi# Vanice %illispie 2aAidi0TH3 8:;' 2I5? 5?NT?<<3
,N= 3243==3= -$-T32-0CHI0*:::.
=ouglas 60Hall 0 2I5?C?53--?- ,N= INT3.,5IN% 0 Tata 2c %raw
Hill publishing company limited 0 '999 #*
nd
3dition.
,./.ay and 4urichand 0 ,=6,N53= 2I5?C?53--? ,N=
C3ICH3,<- 0 Tata 2c %raw Hill publishing company limited0*:::.
RArn%s $n t, 52:
www.atmel.com
www.alldatasheets.com
www.datasheetarchive.com
www.proIectguidance.com
www.wikipedia.com
0B;0

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AUTOMATIC TRAIN SPEEED CONTROL BASED ON SIGNALS

A.A.N.M. & V.V.R.S.R.POLYTECHNIC, GUDLAVALLERU

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