EC0321 PROCESSOR LAB

LABORATORY MANUAL
SEMESTER V
DEAPRTMENT OF
ELECTRONICS AND COMMUNICATION ENGINEERING
SRM UNIVERISTY
(Under SECTION 3 of the UGC Act, 1956)
S.R.M. NAGAR, KATTANKULATHUR - 603203.
Department of Electronics and Communication Engineering
Department of Electronics and Communication Engineering
EC0321
Processor Lab
Laboratory Manual
1une 2014
Mrs. A Ruhan Bevi. and course committee
2
L T P C
EC0321 PROCESSOR LAB 0 0 3 2
Prerequisite : nil
PURPOSE :
To make the students understand the basic programming of Microprocessor, Micro
controller and Nuvoton processor. Also, to introduce them to Microcontrollers and few
interfacing circuits.
INSTRUCTIONAL OB1ECTIVES
To understand and gain knowledge about
. Microprocessor !"#"$%
2. Microcontroller !"#&%
'. (nterfacing circuits
). Nuvoton *rocessor
LIST OF EXPERIMENTS
Part No Experiment No. Experiment Name
I
"#"$ *rogramming
# $ bit Addition , +ubtraction,
Multiplication and ,ivision
#2 -argest and +mallest number
#' Ascending and ,escending numbers
#) +um of +eries
II
"#"$ (nterfacing
#& *rogrammable peripheral (nterface
#$ +tepper Motor (nterface
#. *rogrammable Timer (nterface
#" A/, and ,/A 0onverters
III
"#& *rogramming
1 Addition , +ubtraction, Multiplication
and ,ivision
# 2ne3s and two3s complement
4ord ,isassembl5
2 ,ecimal to 6e7a decimal 0onversion
IV
"#& interfacing
' "2.1 interface
) "2&' timer interface
& +tepper motor interface
$ ,A0 interface
V
Nuvoton programming
. +even segment displa5 from 8####9 to
811119
" +even segment displa5 from A,0 input
i
EC0321 - Processor Lab
0ourse designed b5 ,epartment of :lectronics ; 0ommunication :ngineering

*rogram
outcome
a b c d e f g h i < k
7 7 7 7 7
2 0ategor5
=eneral
!=%
Basic
+ciences
!B%
:ngineering
+ciences and
Technical
Arts!:%
*rofessional
+ub>ects!*%
?
'
Broad area !for
@*3categor5%
0ommunication
+ignal
*rocessing
:lectronics A-+( :mbedded
?
)
+taff responsible for
preparing the
s5llabus
Mr. A.A.M Manikandan
Mr. +elvakumar
& ,ate of preparation Ma5 2#)
ii
S.R.M University
Faculty of Engineering and Technology
Department of Electronics and Communication Engineering
Sub Code: EC0321 Semester : V
Sub Title: Processor Lab Course Time: 1ul-Dec`14
Pre-requisite : NIL
Co-requisite : EC0309 Microprocessors & Microcontrollers
Program Outcome
b. Graduates will demonstrate the ability to identify, formulate and solve engineering
problems
Experiment 1 to Experiment no. 18 (Please refer Expt. list)
c. Graduate will demonstrate the ability to design and conduct experiments, analyze
and interpret data
Experiment 1 to Experiment no. 18 (Please refer Expt. list)
d. Graduate will demonstrate the ability to design a system, component or process as
per needs and specification
Experiment 5: To interface "2&& *rogrammable *eripheral (nterface with "#"$
microprocessor and to test mode # operation
Experiment 6: To interface a stepper motor with a "#"$ kit and to make it run a% clockwise b% anti
clockwise
Experiment 7: To interface a programmable timer with "#"$
Experiment 8: To interface a A/, 0onverter with "#"$ and to measure the analog voltage and
displa5 digital eBuivalent of it
To interface a ,/A 0onverters with "#"$ and to generate sBuare and triangular waveforms
Experiment 13: To interface Ce5board /,ispla5 to "#& micro controller and to read ke5 and displa5
data in leds.
Experiment 14: To interface "2&' programmable timer with "#& controller and to test the mode #
operation.
Experiment 15: To interface a stepper motor with a "#& kit and to make it run a% clockwise b% anti
clockwise
Experiment 16: To interface a ,/A 0onverters with "#& and to generate sBuare and
triangular waveforms
f. Graduate will demonstrate the skills to use modern engineering tools, software`s and
equipment to analyze problems
Experiment 1: Dsing "#"$ emulator add, subtract, multipl5 and divide two $ bit numbers stored in
the memor5 and save the results of the operation in the memor5.
iii
Experiment 2: To find the largest and the smallest of the given arra5 of numbers stored in memor5
using "#"$.
Experiment 3: To sort the given arra5 of numbers stored in memor5 location into ascending and
descending order using "#"$.
Experiment 4: To find the sum of a series of numbers using "#"$.
Experiment 17: *erform seven segment displa5 from 8####9 to 811113 in Ceil (,:
Experiment 18: *erform seven segment displa5 fetching data from the potentiometer using
Ceil (,:
k. Graduate will show the ability to participate and try to succeed in competitive
examinations
Experiment 1 to Experiment no. 18 (Please refer Experiment list)
iv
S.R.M University
Faculty of Engineering and Technology
Department of Electronics and Communication Engineering
Sub Code : EC0321 Semester : V
Sub Title : Processor Lab Course Time : 1ul-Dec`14
Pre_requisite : NIL
Co_requisite : EC0309 Microprocessors & Microcontrollers
Program Educational Objectives Vs Program Outcome
Program
Outcomes
Program Instructional Objectives
. To
prepare
students
to
compete
for a
successful
career in
their
chosen
profession
through
global
education
standards.
2. To enable
the students
to aptl5 to
appl5 their
acBuired
knowledge
in basic
sciences and
mathematics
in solving
engineering
problems.
'. To produce skill full
graduates to anal5Ee,
design and develop a
s5stem/component/proces
s for the reBuired needs
under the realistic
constraints.
).To train the
students to
approach
ethicall5 an5
multidisciplinar5
engineering
challenges with
economic,
environmental
and social
conte7ts
&. To create
an
awareness
among
students
about the
need for life
long
learning to
succeed in
their
professional
career.
b. =raduates
will
demonstrate
the abilit5 to
identif5
,formulate
and solve
engineering
problems
data
x x x
c. =raduate
will
demonstrate
the abilit5 to
design and
conduct
e7periments,
anal5Ee and
interpret data
x x x
d. =raduate
will
demonstrate
the abilit5 to
x x x x
v
design a
s5stem,
component
or process as
per needs and
specifications
f. =raduates
will
demonstrate
the skills to
use modern
engineering
tools,
software,
eBuipment to
anal5se
problems
x x x
k. =raduate
will show the
abilit5 to
participate
and tr5 to
succeed in
competitive
e7amination
x x x
vi
S.R.M University
Faculty of Engineering and Technology
Department of Electronics and Communication Engineering
Sub Code : EC0321 Semester : V
Sub Title : Processor Lab Course Time : 1ul-Dec`11
Pre_requisite : NIL
Co_requisite : EC0309 Microprocessors & Microcontrollers
Instructional Objective and Program Outcome
S.No
Instructional
Objective
Program Outcome Experiment Details
1
To understand and
gain knowledge
about
Microprocessor
!"#"$%
b. =raduates will demonstrate
the abilit5 to identif5
,formulate and solve
engineering problems data
Ex.No.1F Dsing "#"$ trainer kit, add,
subtract, multipl5 and divide two $
bit numbers stored in the memor5 and
save the results of the operation in the
memor5. c. =raduate will demonstrate
the abilit5 to design and
conduct e7periments, anal5Ee
and interpret data
d. =raduate will demonstrate
the abilit5 to design a s5stem,
component or process as per
needs and specification
Ex.No. 2 F To find the largest and the
smallest of the given arra5 of numbers
stored in memor5 using "#"$.
f. =raduate will demonstrate
the skills to use modern
engineering tools, software3s
and eBuipment to anal5Ee
problems
Ex.No.3 F To sort the given arra5 of
numbers stored in memor5 location
into ascending and descending order
using "#"$
k. =raduate will show the
abilit5 to participate and tr5
to succeed in competitive
e7aminations
Ex.No.4F To find the sum of a series
of numbers using "#"$.
2 To understand and
gain knowledge
about
Microcontroller
!"#&%
b.=raduates will demonstrate
the abilit5 to identif5
,formulate and solve
engineering problems data
Ex.No.9F To perform Addition ,
+ubtraction, Multiplication and
,ivision of two " bit,$ bit numbers
using "#& trainer kit
c. =raduate will demonstrate
the abilit5 to design and
conduct e7periments, anal5Ee
and interpret data
Ex.No.10F To perform one3s and
two3s complement of a given number
using "#&
d. =raduate will demonstrate
the abilit5 to design a s5stem,
component or process as per
needs and specification
Ex.No.11F To perform word
disassembl5 using "#&
k. =raduate will show the
abilit5 to participate and tr5
to succeed in competitive
e7aminations
Ex.No.12F 0onvert the given decimal
number to 6e7adecimal using "#&
3 To understand and
gain knowledge
about interfacing
circuits
b.=raduates will demonstrate
the abilit5 to identif5
,formulate and solve
engineering problems data
Ex.No.6& 15:To interface a stepper
motor with a "#"$/"#& kit and to
make it run a% clockwise b% anti
clockwise
vii
c. =raduate will demonstrate
the abilit5 to design and
conduct e7periments, anal5Ee
and interpret data
Ex.No.7 &14 :To interface a
programmable timer with "#"$/"#&
d. =raduate will demonstrate
the abilit5 to design a s5stem,
component or process as per
needs and specification
Ex.No.8 & 16:To interface a A/,
0onverter with "#"$ /"#&and to
measure the analog voltage and
displa5 digital eBuivalent of it. To
interface a ,/A 0onverters with "#"$
and to generate sBuare and triangular
waveforms
k. =raduate will show the
abilit5 to participate and tr5
to succeed in competitive
e7aminations
ExNo. 5 : (nterfacing **( with "#"$
Ex.No.13: (nterfacing "2.1 with "#&
4
To understand and
gain knowledge
about Nuvoton
*rocessor
c. =raduate will demonstrate
the abilit5 to design and
conduct e7periments, anal5Ee
and interpret data
Ex.No. 17: *erform seven segment
displa5 from 8####9 to 811113 in
Ceil (,:
d. =raduate will demonstrate
the abilit5 to design a s5stem,
component or process as per
needs and specification
f. =raduate will demonstrate
the skills to use modern
engineering tools, software3s
and eBuipment to anal5Ee
problems
Ex.No. 18: *erform seven segment
displa5 fetching data from the
potentiometer using Ceil (,:
viii
S.R.M University
Faculty of Engineering and Technology
Department of Electronics and Communication Engineering
Sub Code : EC0321 Semester : V
Sub Title: Processor Lab Course Time : 1ul-Dec`14
Pre_requisite : NIL
Co_requisite : EC0309 Microprocessors & Microcontrollers
EXPERIMENTS DETAILS
S.No. Experiments Detail Equipments
Required
Components
Required
I. Programming in 8086
Dsing "#"$ trainer kit, add, subtract, multipl5 and divide
two $ bit numbers stored in the memor5 and save the
results of the operation in the memor5.
"#"$
Trainer Cit
*ower 0ables
2 To find the largest and the smallest of the given arra5 of
numbers stored in memor5 using "#"$.
"#"$ Trainer Cit *ower 0ables
' To sort the given arra5 of numbers stored in memor5
location into ascending and descending order using "#"$
"#"$ Trainer Cit *ower 0ables
) To find the sum of a series of numbers using "#"$. "#"$ Trainer Cit *ower 0ables
II. 8086 Interfacing
& To interface "2&& *rogrammable *eripheral (nterface
with "#"$ microprocessor and to test mode # operation
"#"$ Trainer Cit *ower 0ables
$ To interface a stepper motor with a "#"$ kit and to make
it run a% clockwise b% anti clockwise
"#"$ Trainer Cit
stepper motor
interface G add on
card
*ower 0ables
Add on card
connector bus.
. To interface a programmable timer with "#"$. "#"$ Trainer Cit
programmable timerH
add on card
*ower 0ables
Add on card
connector bus.
" To interface a A/, 0onverter with "#"$ and to measure
the analog voltage and displa5 digital eBuivalent of it.
To interface a ,/A 0onverters with "#"$ and to generate
sBuare and triangular waveforms.
"#"$ Trainer Cit
A/,, ,/A interface
boards, 0R2
*ower 0ables
Add on card
connector bus.
III.Programming in 8051
1 To perform Addition, +ubtraction, Multiplication and
,ivision of two " bit, $ bit numbers using "#& trainer
kit.
"#& Trainer kit *ower 0ables
# To perform one3s and two3s complement of a given
number using "#&.
"#& Trainer kit *ower 0ables
To perform word disassembl5 using "#& "#& Trainer kit *ower 0ables
2 0onvert the given decimal number to 6e7a decimal
using"#&.
"#& Trainer kit *ower 0ables
IV.8051 Interfacing
i7
' To interface "2.1 with "#& "2.1 module,
"#& kit
*ower 0ables
) To interface a "2&' programmable timer with "#& "2&' module,
"#& kit
*ower 0ables
& To interface a stepper motor with "#& +tepper motor ,
"#& kit
*ower 0ables
$ To interface an A,0 with "#& A,0 module,
"#& kit
*ower 0ables
V. Programming in Nuvoton Board
. +even segment displa5 using Nuvoton board Nuvoton kit *ower 0ables
" +even segment displa5 for A,0 input using Nuvoton
board
Nuvoton kit,
*otentiometer
*ower 0ables
7
EC0321- Laboratory Policies and Report Format
Reports are due at the beginning of the lab period. The reports are intended to be a complete
documentation of the work done in preparation for and during the lab. The report should be
complete so that someone else familiar with microprocessor and controllers could use it to
verif5 5our work. The prelab and postlab report format is as followsF
. A neat thorough prelab must be presented to 5our +taff (ncharge at the beginning of
5our scheduled lab period. Lab reports should be submitted on A4 paper. Iour
report is a professional presentation of 5our work in the lab. Neatness, organiEation,
and completeness will be rewarded. *oints will be deducted for an5 part that is not
clear.
2. (n this laborator5 students will work in teams of three. 6owever, the lab reports will
be written individuall5. *lease use the following format for 5our lab reports.
a. Cover Page: (nclude 5our name, +ub>ect 0ode, +ection No., :7periment No.
and ,ate.
b. Objectives: :numerate ' or ) of the topics that 5ou think the lab will teach
5ou. ,2 N2T R:*:AT the wording in the lab manual procedures. There
should be one or two sentences per ob>ective. Remember, 5ou should write
about what 5ou will learn, not what 5ou will do.
c. *rogram: This part contains all the steps reBuired to produce the reBuired
operation. The program written should be verified with the staff member to
correct the flow of the code written.. This section should also include a
description of the experiment by writing suitable codes.
e. Questions: +pecific Buestions !*relab and *ostlab% asked in the lab should be
answered here. Retype the questions presented in the lab and then
formally answer them.
'. Iour work must be original and prepared independentl5. 6owever, if 5ou need an5
guidance or have an5 Buestions or problems, please do not hesitate to approach 5our
staff incharge during office hours. 0op5ing an5 prelab/postlab will result in a low
grade. The incident will be formall5 reported to the Dniversit5 and the students should
follow the dress code in the -ab session.
). :ach laborator5 e7ercise must be completed and demonstrated to 5our +taff (ncharge
in order to receive working program credit. This is the procedure to followF
a. *rogram worksF (f the program works during the lab period !' hours%, call
5our staff incharge and he/she will sign and date it. This is the end of this lab,
and 5ou will get a complete grade for this portion of the lab.
b. *rogram does not workF (f the program does not work, 5ou must make use of
the open times for the lab room to complete 5our lab e7ercise. 4hen 5our
program instructions are read5, contact 5our staff incharge to set up a time
when the two of 5ou can meet to check 5our program.
&. Attendance at 5our regularl5 scheduled lab period is reBuired. An une7pected absence
will result in loss of credit for 5our lab. (f for valid reason a student misses a lab, or
makes a reasonable reBuest in advance of the class meeting, it is permissible for the
student to do the lab in a different section later in the week if approved b5 the staff
incharge of both the sections. 6abituall5 late students !i.e., students late more than &
minutes more than once% will receive # point reductions in their grades for each
occurrence following the first.
7i
$. Jinal grade in this course will be based on laborator5 assignments. All labs have an
eBual weight in the final grade. =rading will be based on preHlab work, laborator5
reports, postHlab and inHlab performance !i.e., completing lab, answering laborator5
related Buestions, etc.,%.The +taff (ncharge will ask pertinent Buestions to individual
members of a team at random. -abs will be graded as per the following grading
polic5F
*reH-ab 4ork 2#.##K
(nH-ab *erformance '#.##K
*ost -ab 4ork 2#.##K
-aborator5 Report '#.##K
". Reports Due DatesF Reports are due one week after completion of the corresponding
lab. A late lab report will have 2#K of the points deducted for being one da5 late. (f a
report is 2 da5s late, a grade of # will be assigned.
1. Systems of Tests: Regular laborator5 class work over the full semester will carr5 a
weight of .&K. The remaining 2&K weight will be given b5 conducting an end
semester practical e7amination for ever5 individual student if possible or b5
conducting a to L hours duration common written test for all students, based on
all the e7periment carried out in the semester.
#. General Procedure:
a. Properly use the microprocessor and microcontroller trainer kit and identif5
the starting address of the RAM locations and trainer instructions in advance.
b. Cnow the instruction set of the processor and the controllers to be used in the
lab classes.
c. Aerif5 the function of all the programs scheduled for the lab session.
d. *roperl5 use the interfacing cable to connect the peripherals to the processor.
e. After the completion of the e7periments switch off the power suppl5 and
return the components.
7ii
SRM UNIVERSITY
Department of Electronics and Communication Engineering
EC0321 Processor Lab
Laboratory Report Cover Sheet
ODD SEM - 2011
NameF MMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMM
+ectionF Tick 2ne M ! % TD ! % 4 ! % Th ! % Jr ! %
AenueF MMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMM
Title of -abF MMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMM
Preparation Verification
+taff Name ; +ignatureF MMMMMMMMMMMMMMMMMMMMMM
MMMMMMMMMMMMMMMMMMMMMM
Experiment Completion Verification
+taff Name ; +ignatureF MMMMMMMMMMMMMMMMMMMMMM
MMMMMMMMMMMMMMMMMMMMMM
,ate, TimeF MMMMMMMMMMMMMMMMMMMMMM
Particulars Max Marks Marks Obtained
*relab & marks
-ab *erformance 2#marks
*ost lab &marks
Record 2#marks
Total &# marks
Report Verification
+taff Name ; +ignatureF MMMMMMMMMMMMMMMMMMMMMM
MMMMMMMMMMMMMMMMMMMMMM
,ate, TimeF MMMMMMMMMMMMMMMMMMMMMM
7iii
CONTENTS
Experiments Page No
Lab 1
. !a% (ntroduction
.2 !a% 6ardware reBuirement
.' !a% *rogram logic
.) !a% *rocedure
.& !a% *re lab Nuestions
.$ !a% -ab Assignment
.. !a% *ost lab Nuestions 2
. !b% (ntroduction 2
.2 !b% 6ardware reBuirement 2
.' !b% *rogram logic 2
.) !b% *rocedure 2
.& !b% *re lab Nuestions 2
.$ !b% -ab Assignment '
.. !b% *ost lab Nuestions '
Lab 2
2. (ntroduction )
2.2 6ardware reBuirement )
2.' *rogram logic )
2.) *rocedure )
2.& *re lab Nuestions )
2.$ -ab Assignment &
2.. *ost lab Nuestions &
Lab 3
'. (ntroduction $
'.2 6ardware reBuirement $
'.' *rogram logic $
'.) *rocedure $
'.& *re lab Nuestions $
'.$ *ost lab Nuestions .
Lab 4
). (ntroduction "
).2 6ardware reBuirement "
).' *rogram logic "
).) *re lab Nuestions "
).& *ost lab Nuestions 1
Lab 5
&. (ntroduction #
&.2 6ardware reBuirement #
&.' *rogram logic #
&.) *re lab Nuestions
&.& *ost lab Nuestions 2
7iv
Lab 6
$. (ntroduction '
$.2 6ardware reBuirement '
$.' *rogram logic '
$.'. wave scheme '
$.'.2 2 phase scheme '
$.'.' half stepping scheme )
$.) *re lab Nuestions )
$.& -ab Assignment )
$.$ *ost lab Nuestions )
Lab 7
.. (ntroduction &
..2 6ardware reBuirement &
..' *rogram logic &
..'. Mode # G (nterrupt on terminal count &
..'.2 Mode G *rogrammable one shot &
..'.'. Mode 2 G Rate =enerator &
..'.) Mode ' G +Buare 4ave =enerator &
..'.& Mode ) G +oftware triggered strobe &
..) *re lab Nuestions .
..& *ost lab Nuestions .
Lab 8
". !a% (ntroduction "
".2 !a% 6ardware reBuirement "
".' !a% *rogram logic "
".'. !a% Mode # G sBuare wave generation "
".'.2 !a% Mode G saw tooth wave generation "
".) !a% *re lab Nuestions 1
".&. !a% -ab Assignments 1
".$ !a% *ost lab Nuestions 1
".. !b% (ntroduction 2#
".2. !b% 6ardware ReBuirement 2#
".'. !b% *rogram -ogic 2#
".'.. !b% 0hannel +election 2#
".'.2. !b% A to , 0onversion 2#
".'.'. !b% To measure voltage in channel 2#
".). !b% *re lab Buestions 2
".& !b% *ost lab Nuestions 2
Lab 9
1. (ntroduction 22
1.2 6ardware reBuirement 22
1.' *rogram 22
1.) *relab 22
1.& *ost lab
7v
Lab 10
#. (ntroduction 22
#.2 6ardware reBuirement 22
#.' *rogram 22
#.) *relab 22
#.& *ost lab 22
Lab 11
. (ntroduction 2)
.2 6ardware reBuirement 2)
.' *rogram 2)
.) *relab 2)
.& *ost lab 2)
Lab 12
2. (ntroduction 2&
2.2 6ardware reBuirement 2&
2.' *rogram 2&
2.) *relab 2&
2.& *ost lab 2&
Lab 13
'. (ntroduction 2$
'.2 6ardware reBuirement 2$
'.' *rogram 2$
'.) *relab 2$
'.& *ost lab 2$
Lab 14
). (ntroduction 2$
).2 6ardware reBuirement 2$
).' *rogram 2$
).) *relab 2$
).& *ost lab
21
Lab 15
&. (ntroduction '#
&.2 6ardware reBuirement '#
&.' *rogram '#
&.) *relab '2
&.& *ostlab '2
Lab 16
$. (ntroduction ''
$.2 6ardware reBuirement ''
$.' *rogram ''
$.) *relab ''
$.& *ost lab ''
7vi
Lab 17
.. (ntroduction '&
..2 6ardware reBuirement '&
..' *rogram '&
..) *relab '&
..& *ost lab '&
Lab 18
". (ntroduction '&
".2 6ardware reBuirement '&
".' *rogram '&
".) *relab '&
".& *ost lab
7vii
Lab 1
Ex.No.1: 16-Bit Addition & Subtraction
1.1(a) Introduction:
The purpose of this e7periment is to add and to subtract the given two $ bit numbers
and store them in a memor5 location. The student should also be able to design the addition
and subtraction with carr5 and borrow.
1.2(a) Hardware Requirement:
The "#"$ Microprocessor kit, *ower +uppl5.
1.3 (a) Program Logic:
The add instruction reBuires either the addend or the augend to be in a register, unless
the source operand is immediate since the addressing modes permitted for the source and
destination are registerHregister, memor5 to register, register to memor5, register to
immediate, and finall5 memor5 to immediate.
6ence one of the operands is initiall5 moved to A?. Then using the add instruction,
$Hbit addition is performed.
The ne7t arithmetic primitive is +DB. As discussed in A,, it permits the same modes
of addressing. 6ence moving the minuend to a register pair is necessar5. Then the result is
moved to a location in memor5.
1.4 (a) Procedure
. :nter the opcodes in ram memor5 from location ### using +DB command
2. Dsing +T:* command, e7ecute the program instruction b5 instruction
'. After each instruction verified register contents and see that the5 are initialised to the
reBuired values.
1.5(a) Pre Lab Questions
. ,ifference between Microprocessor ; MicrocontrollerO
2. ,efine BD+ and give the classification of Buses
'. 4hat is an addressing modeO
). 6ow the Microprocessors can be categoriEedO
&. 4hat is stack and +ubroutineO
$. Mention the features of "#"$O
.. ,efine 2pcode and 2perand
8. Explain how physical address is formed in 8086.
1.6(a) Lab Assignment
1. Write an assembly language program to move the content in
memory location 1100h into register B and also move to register
!" and also store the content in ! in memory location 1#00$.
%. Write an assembly language program to add and subtract the two
16&bit numbers using the program logic given in 1.#. '(se
immediate and direct addressing modes)
#. Write an algorithm for the *uestions 1 + %" and also draw the
,owchart-
1.7(a) Post Lab Questions (Refer the program to answer these questions)

. 0alculate the ph5sical address for the given data. ,+P###h, B*P2')h
2. 4hat is the purpose of 6-T instructionO
'. 4hat happens if the result is greater than $bitO
). =ive the steps to calculate ph5sical addressO
&. (f carr5 is set to before subtraction what is the instruction to be usedO
$. 4hat is the difference between M2A A?, Q##R and M2A Q2##R, A?O
Ex.No:1-B (Multiplication And Division)
1.1.(b)Introduction
The purpose of this e7periment is to multipl5 and to divide the given two $ bit
numbers and store them in a memor5 location.
1.2 (b) Hardware Requirement
The "#"$ Microprocessor kit, *ower +uppl5.
1.3(b) Program Logic
The "#"$ *rocessor provides both signed and unsigned multipl5 in their instruction
set to overcome the loss of efficienc5 in performing the repeated addition.
The MD- instruction can have both $ and " bit operands and the multiplicand is A?
or A-, accordingl5 the result for a b5te multipl5 is a $ bit number in A? while that for a
word multipl5 is a '2 bit number, the lower word of which is in A? and the higher word in
,?.
1.4(b) Procedure
. :nter the opcodes in ram memor5 from location ### using +DB command
2. Dsing +T:* command, e7ecute the program instruction b5 instruction
a. After each instruction verified register contents and see that the5 are initialised to
the reBuired values.
1.5(b) Pre-Lab Questions
. A single instruction ma5 use more than one addressing modes or some instructions
ma5 not reBuire an5 addressing modes. 4h5O
2. 6ow is the addressing mode of an instruction communicated to the 0*DO
'. 6ow does the 0*D identif5 between "Hbit and $Hbit operationO
). 4hat do 5ou mean b5 pipelined architectureO
&. 4hat is a Jlag registerO
$. 4hat is a machine c5cleO
.. 4hat is a status signalO
". 4hat is minimum mode operation of "#"$O
1. 4hat is the ma7imum memor5 addressing and (/2 addressing capabilities of "#"$O
#. Jrom which address the "#"$ starts e7ecution after resetO
1.6(b) Lab Assignment
2
1. Write an assembly language program to move the content in
memory location 1100h into register B and also move to register !"
and also store the content in ! in memory location 1#00h.'(se based
indexed addressing mode)
%. Write an assembly language program to multiply and divide
the two 16&bit numbers using the program logic given in 1... '(se
immediate and direct addressing modes)
#. Write an algorithm for the *uestions 1 + %" and also draw the
,owchart-
1.7(b) Post-Lab Questions (Refer the program to answer these questions)
. -ist out the t5pe of addressing modes used in 5our program.
2. (f result e7ceeds '2 bit where is it storedO
'. 4hat is the name given to the register combination ,?FA?O
). 4hat is the instruction used for signed divisionO
&. (n the above program instead of ,(A B?, is it possible to use ,(A num2O
'
Lab 2
Ex.No.2: Largest and Smallest number in an array
2.1 Introduction:
The purpose of this e7periment is to find the larger and the smaller numbers from an
arra5 which is stored in a memor5 location.
2.2 Hardware Requirement:
The "#"$ Microprocessor kit, *ower +uppl5.
2.3 Program Logic:
To find the largest number in an5 given arra5, the contents of the arra5 must be
compared with an arbitrar5 biggest number. The first number of the arra5 is taken in a register
A-. The second number of the arra5 is compared with the first one. (f the first one is greater
than the second one, it is left unchanged. 6owever if the second one is greater than the first,
the second number replaces the first one in the A- register. The procedure is repeated for
ever5 number in the arra5 and thus it reBuires n iterations. At the end of nth iteration the
largest number will reside in the register A-.
Jor smallest number the above said logic is repeated but, (f the first number is smaller
than the second one it is left unchanged. 2therwise the second number replaces the first
number in the A- register
2.4 Procedure:
. :nter the opcodes in ram memor5 from location ### using +DB command
2. Dsing +T:* command, e7ecute the program instruction b5 instruction
'. After each instruction verified register contents and see that the5 are initialiEed to the
reBuired values
). :7ecute the program and check for results.
2.5 Pre-Lab Questions:
. ,raw the flowchart to find the largest and smallest number of an arra5O
2. 4hat is the similarit5 and difference between +ubtract and 0ompare (nstructionO
'. 4hat are the addressing modes are used in our programO
). (nitialiEe register 0? to value JJJJ and register A? to value ####, write a program to
e7change the contents of both these registerO
&. (llustrate the use of -:A, -,+, and -:+ instruction and to initialiEe registers using
these instructionsO
$. -ogic calculations are done in which t5pe of registersO
.. (n an "#"$ microprocessor program, data and stack memor5 occupies uniform
memor5 space. +tate true or falseO
". :7plain crossHcompiler, linker, editor and debuggerO
1. +uppose that ,+P###h, ++P2###h, B*P###h and ,(P###h. ,etermine the
memor5 address accessed b5 each of the following instructions.
M2A A-, QB* S ,(R
M2A 0?, QB*R
#. Jorm a >ump instruction that >umps to the address pointed b5 the B? registerO
)
2.6 Lab Assignment
1. Write an assembly language program to sort the numbers of an array
in a memory location 1100h and store the largest number of the array in
1%00h and smallest number in the location 1#00h.
2.7 Post-Lab Questions:
. 4hat is the purpose of M2A ,+, A?O
2. 4hat will be the status of flags after e7ecuting the programO
'. 4hat are the addressing modes are used in our programO
). 4hat is the difference between <DM* and -22* instructionsO
&. 4hat instructions are needed to add A-, '- and ,- together, and place the result in
0-O ,o not destro5 B- or ,-.
$. +how the instruction needed to count the number of 3s found in A-. Jor e7ample if
A- contains ####, the number of 3s is ).
&
Lab 3
Ex.No.3: Sorting of an array in ascending and descending series
3.1 Introduction:
The purpose of this e7periment is to sort the seBuence of numbers from the arra5
stored in a memor5 location into ascending and descending series.
3.2 Hardware Requirement:
The "#"$ Microprocessor kit, *ower +uppl5.
3.3 Program Logic:
To arrange the given numbers in ascending and descending order, the bubble sorting
method is used. (nitiall5 the first number of the series is compared with the second one. (f the
first number is greater than second, e7change their positions in the series otherwise leave the
position unchanged. Then compare the second number in the recent form of the series with
third and repeat the e7change part that 5ou are carried out for the first and second number,
and for all the remaining number of the series. Repeat this procedure for complete series !nH%
times. After nH iterations 5ou will get the largest number at the end of the series. Again start
from the first number of the series. Repeat the same procedure right from the first element to
the last element. After nH2 iteration 5ou will get the second highest number at the last but one
place in the series. Repeat this till the complete series is arranged in ascending order.
3.4 Pre-Lab Questions:
. ,raw the flow chart to arrange a given series of numbers in ascending and
descending order.
2. (n a given program how man5 times ,:0 and <NT instructions are e7ecutedO
4hat will be content in A? register after e7ecuting the programO
M2A A?, ##JJ
M2A 0-, #&
R:*:ATF (N0 A?
,:0 0-
<NT R:*:AT
'. 4rite a small program using ,AA instructionO
). 4hich t5pe of >ump instruction !short, near or far% assembles for the followingF
(f the distance is #2#6 b5tes
(f the distance is ##2#6 b5tes
(f the distance is #####6 b5tes
&. (f ,- P #J'6 and ,6 P .26, -ist the difference after ,6 subtracts from ,-,
and show the contents of the flag register bits.
$. 6ow is register A- is used during e7ecution of ?-ATO
.. 4hat conditional >ump instruction should be used after 0M* A-, '#6 to >ump
when A- eBuals '#6O
$
3.5 Post-Lab QuestionsF
. 4hat is the purpose of ?06= instructionO
2. 4hat is the use of *D+6 and *2* instructionO
'. 4rite an assembl5 language program in "#"$ to sort the given arra5 of $Hbit
numbers in descending order.
). 4hat do sBuare brackets means when the5 appear in an operandO
&. 4hat is the difference between M2A A?, # and +DB A?, A?O There ma5 be more
than one difference to comment on.
$. 4rite a routine to swap nibbles in A-. Jor e7ample if A- contains ':, then it will
contain :' after e7ecution.
.
Lab 4
Ex.No.4: Sum of series
4.1 Introduction:
The purpose of this e7periment is to find the sum of seBuence of numbers from the
arra5 stored in a memor5 location and store the result in a specified location.
4.2 Hardware Requirement:
The "#"$ Microprocessor kit, *ower +uppl5.
4.3 Program Logic:
(n this program we show the addition of # numbers and is used as count for number
of additions. The initial sum is assumed as Eero. (nitiall5, the resulting sum of the first two
numbers will be stored. To this sum, the third number will be added. This procedure will be
repeated till all the numbers in the series are added. A conditional <DM* instruction will be
used to implement the counter checking logic.
4.4 Pre-Lab Questions
. ,raw the flowchart to find the sum of series of "Hnumbers in a given arra5 of #
numbersO
2. 4rite a program to find the sum of series with carr5 and verif5 the answer with "#"$
processor kitO
'. =iven an instruction, how do 5ou identif5 the addressing mode of the instruction,
e7plain with e7ampleO
). (dentif5 the t5pe of addressing modes used in the following data transfer operations.
4hen data is moved from A? register to :? and when the data is moved from :7
register to a memor5 location whose address is given b5 ,? register.
&. A 2#Hbit address bus allows access to a memor5 of capacit5
!a% MB
!b% 2 MB
!c% ) MB
!d% " MB
$. *rograms are written in assembl5 language because the5
!a% run faster than 6ighHlevel language
!b% are portable
!c% easier to write than machine code programs
!d% the5 allow the programmer access to registers or instructions that are not
usuall5 provided b5 a 6ighHlevel language
.. 4hat is meant b5 Maskable interruptsO
!a% An interrupt that can be turned off b5 the programmer.
!b% An interrupt that cannot be turned off b5 the programmer.
!c% An interrupt that can be turned off b5 the s5stem.
!d% An interrupt that cannot be turned off b5 the s5stem
8. /s overlapping of segment possible in 8086-
"
4.5 Post-Lab Questions
. 6ow man5 times the <NT instruction e7ecuted in our programO
2. (n our program, -ist out the instructions which are not affected b5 the flags.
'. 4hich are pointers present in this "#"$O
). 4hich Jlags can be set or reset b5 the programmer and also used to control the
operation of the processorO
&. Jind the error in this programO
M2A A-, ##6
M2A B-, #&6
M2A 0-, #26
A=A(NF A,, A-, B-
<NT A=A(N
,:0 0-
M2A ,(, '##6
M2A Q,(R, A-
6-T
$. -ist the instructions that can be used to clear the accumulator or an5 registersO
1
Part II-8086 Microprocessor Interfacing
EXPERIMENT: 5 8255- PROGRAMMABLE PERIPHERAL INTERFACE (PPI)
5.1 Objective
To interface "2&& *rogrammable *eripheral (nterface with "#"$ microprocessor and
to test mode # operation
5.2 Hardware requirements
The "#"$ Microprocessor kit, "2&& *rogrammable *eripheral (nterface add on card,
(nterface cable and *ower +uppl5.
5.3 Theory
The "2&& is a widel5 used, programmable, parallel (/2 device.(t can be programmed to
transfer data under various conditions, from simple (/2 to interrupt (/2.
Jeatures
Three "Hbit (2 ports *A, *B, *0
*A can be set for Modes #, , 2. *B for #, and *0 for mode # and for B+R. Modes
and 2 are interrupt driven.
*0 has two )Hbit portsF *0 upper !*0D% and *0 lower !*0-%, each can be set
independentl5 for (nput or 2utput. :ach *0 bit can be set/reset individuall5 in B+R
mode.
*A and *0D are =roup A !=A% and *B and *0- are =roup B !=B%
Address/data bus must be e7ternall5 demultiple7ed.
"2&& can be operated in two modes
BSR (Bit Set Reset ) mode or
i. (/2 mode
ii. B+R mode
Bit set/reset, applicable to *0 onl5. 2ne bit is +/R at a time.
0ommand word
,. ,$ ,& ,) ,' ,2 , ,#
# !#PB+R% ? ? ? B2 B B# +/R !P+,#PR%
#
Bit selectF !Taking ,onUt careUs as #%
B2
B

B
#
*0
bit
0ontrol word
!+et%
0ontrol word
!reset%
# # # # #### ### P #h #### #### P ##h
# # #### ## P #'h #### ### P #2h
# # 2 #### ## P #&h #### ### P #)h
# ' #### # P #.h #### ## P #$h
# # ) #### ## P #1h #### ### P #"h
# & #### # P #Bh #### ## P #Ah
# $ #### # P #,h #### ## P #0h
. #### P #Jh #### # P #:h
I/O mode
The (/2 mode is further divided into three modesF
Mode # F all ports function as simple (/2 ports
Mode F 6and shake mode whereb5 *orts A and/or B use bits from port 0 as handshake
signals
Mode 2. F *ort A can be set up for bidirectional data transfer using handshaking signals from
*ort 0, and *ort B can be set up either in Mode # or Mode .
Command word
,. ,$ ,& ,) ,' ,2 , ,#
!P(/2% =A mode select *A *0D =B mode select *B *0-
,$, ,&F =A mode selectF
o ## P mode#
o # P mode
o ? P mode2
,)!*A%, ,'!*0D%F Pinput #Poutput
,2F =B mode selectF #Pmode#, Pmode
,!*B%, ,#!*0-%F Pinput #Poutput
*ort Address
Register Address
0ontrol word register 0$
*ort A 0#
*ort B 02
*ort 0 0)
5.4 Pre-lab Questions

. 4hat is control word registerO

2. Name the two operating modes of "2&&
'. 4hat is B+R modeO
). =ive control word format of B+R mode.
&. 4hat is (nput output modeO
5.5 Program
. (nitialiEe port A as input port and port B as output port in mode # , to input the data
at port A as set b5 the +*,T switches and to output the same data to port B to glow
the -:, accordingl5.
2. (nitialiEe port A as input port and port c as output port in mode # , to input the data at
port A as set b5 the +*,T switches and to output the same data to port B to glow the
-:, accordingl5.
'. (nitialiEe port 0 as input port and port B as output port in mode # , to input the data
at port A as set b5 the +*,T switches and to output the same data to port B to glow
the -:, accordingl5.
5.6 Procedure
. :nter the opcodes in RAM memor5 from location ### using the Assembler !A%
command
2. Dsing =2 command, e7ecute the program instruction b5 instruction
'. After e7ecution verif5 register contents and see that the5 are initialiEed to the reBuired
values and transfer the output to RAM memor5 .
5.7 Post-lab Questions
. (nitialiEe the control word register for port A as input and port B as output in mode
2. 0ompare mode #, mode and mode 2 of "2&& ( /2 mode.
'. (nitialiEe the control word register for port 0 as input and *ort B as output in mode#
). (nitialiEe "2&& for bidirectional data transfer *ort A as input and port B as output.
&. 4hich control word is reBuired to transfer a data from *ort B to *ort 0 in mode
2
Lab 6
Ex.No.6: Stepper Motor Interface
6.1 Introduction:
To interface a stepper motor with a "#"$ trainer kit and to run the motor in clockwise
and anticlockwise directions with a controlled speed.
6.2 Hardware Requirement:
The "#"$ Microprocessor kit, +tepper motor interface add on card, interface cable,
*ower +uppl5.
6.3 Program Logic:
A motor in which the rotor is able to assume onl5 discrete stationar5 angular position
is a stepper motor. The rotor motion occurs in a stepwise manner from one eBuilibrium
position to the ne7t. The5 are widel5 used in open and closed looped s5stems in a variet5 of
applications. (t is either of reluctance t5pe or permanent magnet t5pe. The four poles structure
is continuous with the stator frame and the magnetic field passes through the c5lindrical
stator annular ring. The stator poles and three pairs of rotor poles, there e7ists 2 possible
positions in which a south pole of the rotor can lock with the north pole of the stator. Jrom
this it can be noted that the step siEe is '$#! in degrees%/ Ns 7 Nr
where Ns P number of stator poles
Nr P number of pair of rotor poles.
There are three different stepping schemes for a stepper motor.
. 4ave scheme
2. 2H phase scheme
'. half stepping and mi7ed scheme
6.3.1 Wave scheme
The stepper motor windings A,A2,B,B2 can be c5clicall5 e7cited with a ,0 current to
run the motor in the clockwise direction. 0onsider the four rotor positions of the motor
along with the stator e7citations. The switching scheme for the wave mode e7citation is
given as follows.
Anti clockwise 0lockwise
+tep A A2 B B2 +tep A A2 B B2
# # #
2 # # #
' # # #
) # # #
# # #
2 # # #
' # # #
) # # #
6.3.2 2- Phase schemeF
(n this scheme the two ad>acent stator windings are energiEed. There are two magnetic
fields achieved in Buadrature and none of the rotor pole faces can be in a direct alignment
with the stator poles.
The switching scheme for the 2H phase mode e7citation is given as follows.
'
Anti clockwise 0lockwise
+tep A A2 B B2 +tep A A2 B B2
# #
2 # #
' # #
) # #
# #
2 # #
' # #
) # #
6.3.3 Half stepping scheme
The previousl5 discussed two schemes have a step siEe of '# degrees for the stepper motor
under consideration. 6owever there is a offset of & degrees between these two schemes. B5
interleaving these two schemes , the step siEe can be reduced to & degrees there b5
improving the accurac5 of the motor. This is called half stepping scheme.
The switching seBuence is as follows.
. A on
2. A and B on
'. B on
). B and A2 on
&. A2 on
$. A2 and B2 on
.. B2 on
". B2 and A on
1. A on etc.
Pre-Lab Questions:
. 4hat is the specific propert5 of the stepper motor which makes it compatible to
interface with the processorO
2. 0an a single phase motor or a ,0 motor be interfaced with a "#"$ processorO
'. 4hat is the operating voltage of a stepper motorO
). 4hat are the different t5pes of stepper motorO
&. +tate an5 two applications of stepper motor interfaced with "#"$.
6.5 Lab assignments:
. 4rite a program to interface the stepper motor with "#"$ and make it run in
clockwise direction.
2. 4rite a program to interface the stepper motor with "#"$ and make it run in anti
clockwise direction.
6.6 Post-Lab Questions:
. 4rite a program to run the stepper motor for an5 number of steps and to stop it.
2. <ustif5 the look up table listed in 5our program.
'. 4hat do 5ou mean b5 the instruction out 0# in the programO
). 4hat is the value of the dela5 element used in the programO
)
Lab 7
Ex.No.7: Programmable Interval timer Interface
7.1 Introduction:
To interface a programmable timer interface with a "#"$ trainer kit and to operate it in
various modes.
7.2 Hardware Requirement:
The "#"$ Microprocessor kit, *rogrammale Timer interface add on card, interface
cable, *ower +uppl5.
7.3 Program Logic:
The main features of "2&' are as followsF
. Three independent $ bit counters
2. (nput clock
'. *rogrammable counter modes
The clk# can be connected either to the pclk or to the debounce circuit. Dsing the debounce
circuit we can generate a pulse and clock the timer. +imilarl5 clock can be connected to pclk
and clock2 can be connected to either pclk or out#. (n a microprocessor based application,
interrupting the processor after a time dela5 is essential which is achieved using a timer.
7.3.1 Mode 0 - Interrupt on terminal count
The output will be initiall5 low after mode set operation. After loading the counter,
the output will remain low while counting and on terminal count the output will become high,
until reloaded again. 0hannel # is in mode # and the program is e7ecuted. 2utput is observed
through a 0R2.
Program:
2R= ###6
M2A A-,'#
2DT 0:,A-
M2A A-,#&
2DT 0",A-
M2A A-,##
2DT 0",A-
6-T
7.3.2 Mode 1 - Programmable one shot
After loading the counter, the output will remain low following the rising edge of the
gate input. The output will go high on the terminal count. (t is retriggerable, hence the output
will remain low for the full count after the rising edge of the gate input.
:7ecute the program, give the clock pulses through the debounce logic and observe the
output at the 0R2.
Program:
&
2R= ###6
M2A A-,'2
2DT 0:,A-
M2A A-,#&
2DT 0",A-
M2A A-,##
2DT 0",A-
2DT ,#,A-
6-T
7.3.3 Mode 2 - Rate generator
(t is a divide b5 N counter. The output will be low for for one period of the clock
input. The period from one output pulse to the ne7t eBuals the number of input counts in the
count register. (n the 0R2 observe the input at channel and the output at out.
Program:
2R= ###6
M2A A-,.)
2DT 0:,A-
M2A A-,#A
2DT 0A,A-
M2A A-,##
2DT 0A,A-
6-T
7.3.4 Mode 3 - Square Wave Generator
(t is similar to mode 2 e7cept that the output will remain high for one half of the count
and go low for the other half for even number count.
(f the count is odd, the output will remain high for !countH%/2 counts.
PROGRAM:
2R= ###6
M2A A-,'$
2DT 0:,A-
M2A A-,#
2DT 0",A-
M2A A-,##
2DT 0",A-
6-T
7.3.5 Mode 4 - Software triggered strobe
(n this method , the output is high after mode is set and also during counting. 2n terminal
count , the output will go low for one clock period and becomes high again. This mode is
used for interrupt generation.
$
PROGRAM:
2R= ###6
M2A A-,'$
2DT 0:,A-
M2A A-,#A
2DT 0",A-
M2A A-,##
2DT 0",A-
M2A A-,B"
2DT 0: ,A-
M2A A-,1"
2DT 00,A-
M2A A-,'A
2DT 00,A-
6-T
7.4 Pre-Lab Questions:
. 4hat are the main features of "2&' timersO
2. -ist out the basic operations that can be performed b5 the timers.
'. ,raw the control word format of timerO
). ,efine baud rate factor
&. 4hat is +0# and +0O
$. ,efine the functions of R:A, and -2A, functions of the timerO
.. 6ow man5 channels are available in the "2&' (0O
7.5 Post-Lab Questions:
. (s it possible to transmit and receive serial data using "#"$ processorsO
2. (f it possible, e7plain howO
'. 4rite a program to generate a sBuare wave of freBuenc5 &# ChE at channel #.
.
Lab 8
Ex.No.8: A/D and D/A Interface
8.1(a) Introduction:
To interface a digital to analog interface with "#"$ and to perform the lab assignments.
8.2 (a) Hardware Requirement:
The "#"$ Microprocessor kit, ,/A add on card, interface cable, *ower suppl5.
8.3(a) Program Logic:
The ph5sical Buantities like temperature, pressure etc are reBuired for the electronic
circuit for data processing. The electrical eBuivalent of such parameters are obtained b5 the
use of transducers. (t is difficult to process or store the analog values so there is a conversion
of analog signals to the digital domain for the ease of processing and again converting it into
the analog domain for the real time output . This is of course achieved b5 the use of
converters. The circuit which is used to convert a digital value into a analog value is a digital
to analog converter.
8.3.1 (a) Square wave generation
The basic idea behind the generation of the waveform is the continuous generation of
analog output at ,A0. 4ith ##!he7% as the input to the ,A02, the analog value is H&v.
similarl5 , with JJ !he7% as input, the output of the ,A0 is S&v. 2utputting the digital data ##
and JJ at regular intervals at ,A02, results in a sBuare wave generation.
Program:
M2A A-,##
2DT 0",A-
0A-- ##
M2A A-,JJ
2DT 0",A-
0A-- ##
<M* ###
M2A 0?, #&JJ
-22* #'
R:T
8.3.2 (a) Saw tooth wave generation
2utput digital data from ## to JJ in constant steps of # to ,A0.Repeat this
seBuence again and again. As a result a saw tooth is generated at ,A0 output.
"
Program:
M2A A-,##
2DT 02,A-
(N0 A-
<NT ##2
<M* ###
M2A B-,##
M2A A-,B-
2DT 0",A-
(N0 B-
<NT ##2
M2A B-,JJ
M2A A-,B-
2DT 0",A-
,:0 B-
<NT ##0
<M* ###
8.4(a) Pre-Lab Questions:
. 4hat is the basic principle of digital to analog converterO
2. 4h5 ,A0 is interfaced with "#"$O
'. +tate an5 two applications where ,A0 is usedO
). 6ow man5 waveforms are generated in the program stated aboveO
&. (s it possible to generate a sine wave using a ,A0O
8.5(a) Lab Assignments
. To generate the sBuare wave at the ,A02 output.
2. To generate a saw tooth wave at the ,A0 output.
8.6 (a) Post-Lab Questions:
.4rite a program to generate a triangular wave
2. 4hat do 5ou mean b5 ,A0 and ,A02O
'. Jor a digital value of .J ,the appro7imate analog voltage is HHHHHHHHHH
1
8.1(b) Introduction:
The purpose of this e7periment is to convert the analog input given in the channel to a
digital value and glow the -:,s accordingl5 using A,0 interfaced with "#"$
microprocessor.
8.2 (b) Hardware Requirement:
The "#"$ Microprocessor kit, A/, add on card, interface cable, *ower suppl5.
8.3(b) Program Logic:
A,0 #"#1 is a monolithic 0M2+ device with a " bit analog to digital converter, "
channel multiple7er and microprocessor compatible interface logic.
The main features of A,0 are
. " bit resolution
2. ## microsec conversion time
'. low power consumption
). latched tristate outputs
8.3.1 (b)The following program selects channel # and start analog to digital conversion b5
using A-: signal.
Program:
M2A A-,#
2DT 0",A-
M2A A-,"
2DT 0",A-
M2A A-,#
2DT 0",A-
6-T
8.3.2 (b): (nitiating the analog to digital conversion process b5 giving the analog input at
channel # and observing the output at -:,s.
Program:
M2A A-,#
2DT 0",A-
M2A A-,"
2DT 0",A-
M2A A-,#
2DT ,#,A-
M2A A-,##
M2A A-,##
2DT ,#,A-
6-T
8.3.3 (b) To measure the voltage at channel and store the eBuivalent in the memor5
location.
Program:
M2A A-,#'
2DT 0",A-
2#
M2A A-,2'
2DT 0",A-
M2A A-,#'
2DT 0",A-
M2A A-,#
2DT ,#,A-
M2A A-,##
2DT ,#,A-
-22*F(N A-,:#
AN, A-,#
0M* A-,#
<NT -22*
(N A-,02
M2A B?,##
M2AQB?R,A-
6-T
8.4 (b) Pre-Lab Questions:
. ,efine +20 and :20.
2. 4hat t5pe of A,0 have 5ou used in the programO
'. 4hat are the t5pes of A,0s available in the electronic marketO
). 4hat is conversion timeO
8.5 (b) Post-Lab Questions:
. 4rite a program to convert a analog input to digital value and store the result in a
RAM location
2. 6ow man5 channels are available in the A,0 used in the programO
2

Lab 9
Part III- 8051Microcontroller
Ex.No.9: Addition, Subtraction, Multiplication and Division using 8051
9.1 Introduction:
The purpose of this e7periment is to add, subtract, multipl5 and divide the given two "
bit numbers and store them in a memor5 location. The student should also be able to design
the addition and subtraction with carr5 and borrow.
9.2 Hardware Requirement:
The "#& Microcontroller kit , *ower suppl5.
9.3 Program Logic:
To perform addition in "#& one of the data should be in accumulator, another data
can be in an5 of the general purpose register or in memor5 or immediate data. After addition
the sum will be in accumulator. The sum of two "Hbit data can be either "Hbits!sum onl5% or 1H
bits!sum and carr5%. The accumulator can accumulate onl5 the sum and there is a carr5 the
"#& will indicate b5 setting carr5 flag. 6ence one of the register is used to account for carr5.
The "#& has MD- instruction unlike man5 other "Hbit processors. MD- instruction
multiplies the unsigned "Hbit integers in A and B. The lower order b5te of the product is left
in A and the higher order b5te in B.
The "#& has ,(A instruction unlike man5 other "Hbit processors. ,(A instruction
divides the unsigned "Hbit integers in A and B. The accumulator receives the integer part of
the Buotient and the register B receives the remainder.
9.4 Procedure:
i% :nter the opcodes from memor5 location )2##
ii% :7ecute the program
iii% 0heck for the result at )## and )#
Dsing the accumulator, subtraction is performed and the result is stored. (mmediate
addressing is emplo5ed. The +DBB instruction drives the result in the accumulator.
9.5 Pre-Lab Questions:
. +how the status of carr5 flag, au7iliar5 carr5 and parit5 flags after the addition of '"6
and 2J6 in the following instructions
M2A A, V'"6
A,, A, V2J6
2. A programmer puts the first opcode at address at ##6. 4hat happens when the
microcontroller is powered upO
'. what is the result of the following code and where is it kept
M2A A, V&
22
M2A R&, V&
A,, A, R&
). 4rite a program if R& contains the value #. (f so put &&h in it.
&. 4hat do the mnemonics -0A-- and A0A-- stands for.
$. 6ow does the 0*D know where to return after e7ecuting the R:T instruction.
.. Jind the number of times the following loop is performed
M2A R$, V2##
BA0CF M2A R&, V##
6:R:F ,<NT R&, 6:R:
,<NT R$, BA0C
9.6 Post-Lab Questions:
. :7amine the following code then answer the following Buestions
A. 4ill it >ump to N:?TO
B. 4hat is in A after 0<N: instruction is e7ecuted
M2A A, V&&6
0<N: A, V116, N:?T
W.
N:?TFW
2. Assume that * is an input port connected to a temperature sensor. 4rite a program to
read the temperature and test it for the value .&. According to the test results place the
temperature value in to the registers indicated b5 the following.
(f T P .& then A P .&
(f T X .& then R P T
(f T Y .& then R2 P T
'. 4rite a program to monitor * continuousl5 for the value $'6. it should be get out of
monitoring onl5 if * P $'6
). Jind the contents of register A after e7ecuting the following code
0-R A
2R- A, V116
0*- A
&. (n the absence of a +4A* instruction how would 5ou e7change the nibblesO
4rite a simple program to show the process.
2'
Lab 10
Ex.No.10: Ones and twos complement of a number
10.1 Introduction:
The purpose of this e7periment is to add and subtract the given two " bit numbers
and store them in a memor5 location using a ,+* processor. The student should also be able
to design the addition and subtraction with carr5 and borrow.
10.2 Hardware Requirement:
The "#& Microcontroller kit , *ower suppl5.
10.3 Program Logic:
The one3s complement of a number is obtained b5 inverting all the bits in that
number, i.e. replacing all one3s b5 Eero and all Eero b5 one3s. The Two3s complement is the
negative of that number. The 0*- instruction is emplo5ed to find the one3s complement.
+ince the Two3s complement of a number is its one3s complement S , The (N0 instruction is
emplo5ed.
10.4 Pre-Lab Questions:
. 4hat is the ma>or difference between "#& and "#"$O
2. 4hat is meant b5 the term immediate addressingO
'. There is no stop instruction in the "#& instruction. ,escribe a method for
implementing a program stop.
). :7plain what the 0<N: instruction doesO And show an e7ample program using 0<N:
instructionO
&. The "#& address bus is $Hbits wide and the data bus is "Hbits wideHwhat is the
ma7imum siEe for the e7ternal 02,: memor5 or ,ATA memor5. +how 5our
calculation.
$. -ist out the directives of "#& microcontroller.
10.5 Post-Lab Questions:
. 4rite an assembl5 language program to find one3s and two3s complement without using 0*-
instruction.
2. 4hat are the two registers in "#& which are used for indirect addressingO
'. Jind the value of the 0I flag after the e7ecution of the following code
. M2A A V"&6
2. A,, A V.26
). 4hat is the function of program counter in "#&O
&. :7plain the bit level logical instructions of "#&.
2)
Lab 11
Ex.No.11: Word Disassembly
11.1 Introduction:
+plit the contents of )&## into two nibbles !)Hbit numbers% and store the. higher
nibble at )&# and the lower nibble at )&#2.
11.2 Hardware Requirement:
The "#& Microcontroller kit, *ower suppl5.
11.3 Program Logic:
The data is fetched from memor5 and +4A* instruction of "#& is used which will
interchange the low and highHorder nibbles of the accumulator. The higher nibble of the result
is masked off and is stored in memor5. Then, the higher nibble in the original data is masked
off and is stored in memor5.
11.4 Pre-Lab Questions:
. (pon reset" all ports of the 8001 are con1gured as 2222222222222 'output"
input).
%. Which ports of the 8001 have internal pull&up resistors-
#. Which ports of the 8001 re*uire the connection of external pull&up
resistors in order to be used for /34- 5how the drawing for the connection.
6. /n the 8001" explain why we must write 717 to a port in order for it to be
used for input.
0. Explain why we need to bu8er the switches used as input in order to
avoid damaging the 8001 port.

11.5 Post-Lab Questions:
. 6ow the ,*TR register is classified, e7plain its functionsO
2. 4hat is the function of :A pin in "#&O
'. -ist out the special function registers in "#&.
2&
Lab 12
Ex.No.12: Hexadecimal To Decimal Conversion
12.1 Introduction:
The purpose of this e7periment is to obtain the decimal eBuivalent of an "Hbit he7
number stored in memor5 using "#& micro controller trainer kit.
12.2 Hardware Requirement:
The "#& Microcontroller kit , *ower suppl5.
12.3 Program Logic:
(n this program, the he7 number is converted to its eBuivalent decimal number. The
algorithm followed is ver5 simple. The he7 number to be converted is brought to the
accumulator and is divided b5 ## , to find the number of hundreds in it. ,(A instruction of
"#& is used in this program. The remainder is now divided b5 # , to count the number of
tens in it. Jinall5, the remainder obtained from the above division gives the number of units
in the given he7 number. The result is stored in memor5 in the unpacked form.
12.4 Pre-Lab Questions:
. 4rite an Assembl5 language program to convert the given ,ecimal number in to
6e7adecimal number.
2. 4h5 are program counter and stack pointer are $Hbit registersO
'. 4hat are register banksO
). Mention an5 ' applications of microcontrollerO
&. 6ow to program the microcontroller "10&O
12.5 Post-Lab Questions:
. 4rite an assembl5 -anguage program to convert the given he7adecimal number
in to decimal number.
2. Mention the difference between AT"10&, AT"10&2 and AT"102#&.
'. :7plain power down mode of "#&.
). :7plain the function of R?, and T?, pins of "#& microcontroller.
&. :7plain the reset circuit in "#&.
$. 4hat is the difference between powerHon reset and manual resetO
2$
Part - IV : Interfacing with 8051
EXPERIMENT: 13 8279 INTERFACE
13.1 Objective
To interface "2.1 Ce5board (nterface with "#& microcontroller
13.2 Hardware requirements
The "#& Microcontroller kit, "2.1 (nterface add on card, (nterface cable and *ower
+uppl5.
13.3 Theory
The "2&& is a widel5 used for debouncing ke5s, coding of the ke5pad matri7 and
refreshing the displa5 elements in the microprocessor development s5stem.
Jeatures
A#F +elects data !#% or control/status !% for reads and writes between micro and "2.1.
B,F 2utput that blanks the displa5s
0-CF Dsed internall5 for timing. Ma7 is ' M6E.
0N/+TF 0ontrol/strobe, connected to the control ke5 on the ke5board
0+F 0hip select that enables programming, reading the ke5board, etc
,B
.
G ,B
#
F 0onsists of bidirectional pins that connect to data bus on microcontroller
(RNF (nterrupt reBuest, becomes when a ke5 is pressed, data is available.
2DT A
#H
A
'
/B
'
HB
#
F 2utputs that sends data to the most significant/least significant nibble of
displa5.
R,!4R%F 0onnects to microUs (2R0or R,signal, reads data/status registers.
R:+:TF 0onnects to s5stem R:+:T.
RF Return lines are inputs used to sense ke5 depression in the ke5board matri7.
+hiftF +hift connects to +hift ke5 on ke5board.
+-
'
G +-
#
F +can line outputs scan both the ke5board and displa5s.
Keyboard Interface of 8279
The ke5board matri7 can be an5 siEe from 272 to "7". *ins +-2H +-# seBuentiall5 scan each
column through a counting operation. The .)-+'" drives #Us on one line at a time. The "2.1
scans R- pins s5nchronousl5 with the scan.R- pins incorporate internal pullHups, no need for
e7ternal resistor pullHups.
2.
Display mode set up:
DD- Display mode:
##H " bit character displa5 !left%
#H $ H" bit character displa5 !left%
#H " bit character displa5 !right%
H$ H" bit character displa5 !right%
KKK- Keyboard Interface
### G :ncoded +can Ce5board G 2 ke5 lock out
##H ,ecoded +can Ce5board G 2 ke5 lock out
##H :ncoded +can Ce5board G N ke5 roll over
#H ,ecoded +can Ce5board G N ke5 roll over
##H :ncoded +can sensor matri7
#H ,ecoded +can sensor matri7
#H +trobed input, :ncoded displa5 +can
H +trobed input, ,ecoded displa5 +can
Sample program to display ~A
M2A ,*TR, V JJ02
M2A A, V##
M2AZ,*TR, A
M2A A,V00
M2AZ,*TR, A
M2A A,V1#
M2AZ,*TR, A
M2A ,*TR, V JJ0#
M2A A,V""
M2AZ,*TR, A
M2A R#, V#&
M2A A, JJ
-22*F M2A? Z,*TR, A
,<NT R#, -22*
6:R:F +<M* 6:R:
0 0 0 D D K K K
2"
13.4 PreLab:
. +tate the operating modes of "2.1
2. 4hat are the use of 0+, A#, R, and 4R linesO
'. 4hat is N ke5 lock outO
). 4hat is N ke5 roll overO
13.5 Post Lab:
. ,efine 0lock pre scaling.
2. 4hat is B,O
21
EXPERIMENT: 14 8253- PROGRAMMABLE TIMER INTERFACE
14.1 Objective
To interface "2&' Ce5board (nterface with "#& microcontroller
14.2 Hardware requirements
The "#&Microcontroller kit, "2&' (nterface add on card, (nterface cable and *ower
+uppl5.
14.3 Theory
The main features of "2&' are as followsF
. Three independent $ bit counters
2. (nput clock
'. *rogrammable counter modes
The clk# can be connected either to the pclk or to the debounce circuit. Dsing the debounce
circuit we can generate a pulse and clock the timer. +imilarl5 clock can be connected to pclk
and clock2 can be connected to either pclk or out#. (n a microprocessor based application,
interrupting the processor after a time dela5 is essential which is achieved using a timer.
14.3. 1 MODES
Mode 0 - Interrupt on terminal count
The output will be initiall5 low after mode set operation. After loading the counter,
the output will remain low while counting and on terminal count the output will become high,
until reloaded again. 0hannel # is in mode # and the program is e7ecuted. 2utput is observed
through a 0R2.
Program:
M2A ,*TR, JJ0:
M2A A, V '#
M2A? Z,*TR, A
M2A ,*TR, JJ0"
M2A A, V #&
M2A? Z,*TR, A
M2A A, V ##
M2A? Z,*TR, A
6:R:F +<M* 6:R:
'#
Mode 1 - Programmable one shot
After loading the counter, the output will remain low following the rising edge of the
gate input. The output will go high on the terminal count. (t is retriggerable, hence the output
will remain low for the full count after the rising edge of the gate input.
:7ecute the program, give the clock pulses through the debounce logic and observe the
output at the 0R2.
Program:
M2A ,*TR, JJ0:
M2A A, V '2
M2A? Z,*TR, A
M2A ,*TR, JJ0"
M2A A, V #&
M2A? Z,*TR, A
M2A A, V ##
M2A? Z,*TR, A
M2A ,*TR, JJ,#
M2A? Z,*TR, A
6:R:F +<M* 6:R:
Mode 2 - Rate generator
(t is a divide b5 N counter. The output will be low for for one period of the clock
input. The period from one output pulse to the ne7t eBuals the number of input counts in the
count register. (n the 0R2 observe the input at channel and the output at out.
Mode 3 - Square Wave Generator
(t is similar to mode 2 e7cept that the output will remain high for one half of the count
and go low for the other half for even number count.
(f the count is odd, the output will remain high for !countH%/2 counts.
PROGRAM:
M2A ,*TR, JJ0:
M2A A, V '$
M2A? Z,*TR, A
M2A A, V #A
M2A ,*TR, JJ0"
M2A? Z,*TR, A
M2A A, V ##
M2A? Z,*TR, A
'
6:R:F +<M* 6:R:
Mode 4 - Software triggered strobe
(n this method , the output is high after mode is set and also during counting. 2n terminal
count , the output will go low for one clock period and becomes high again. This mode is
used for interrupt generation.
14.4 Pre Lab:
. 4hat is R+ 2'2 and state the use of RT+ and 0T+O
2 4hat is the use of select counter +0 in timerO
' ,raw the control word format of timer.
14.5 Post Lab:
4hat is ,ebouncing of ke5sO
'2
Lab 15
Ex.No.15: Stepper Motor Interface
15.1 Introduction:
To interface a stepper motor with a "#& trainer kit and to run the motor in clockwise
and anticlockwise directions with a controlled speed.
15.2 Hardware Requirement:
The "#& Microcontroller kit, +tepper motor interface add on card, interface cable,
*ower +uppl5.
15.3 Program Logic:
A motor in which the rotor is able to assume onl5 discrete stationar5 angular position
is a stepper motor. The rotor motion occurs in a stepwise manner from one eBuilibrium
position to the ne7t. The5 are widel5 used in open and closed looped s5stems in a variet5 of
applications. (t is either of reluctance t5pe or permanent magnet t5pe. The four poles structure
is continuous with the stator frame and the magnetic field passes through the c5lindrical
stator annular ring. The stator poles and three pairs of rotor poles, there e7ists 2 possible
positions in which a south pole of the rotor can lock with the north pole of the stator. Jrom
this it can be noted that the step siEe is '$#! in degrees%/ Ns 7 Nr
where Ns P number of stator poles
Nr P number of pair of rotor poles.
There are three different stepping schemes for a stepper motor.
). 4ave scheme
&. 2H phase scheme
$. half stepping and mi7ed scheme
15.3.1 Wave scheme
The stepper motor windings A,A2,B,B2 can be c5clicall5 e7cited with a ,0 current to run
the motor in the clockwise direction. 0onsider the four rotor positions of the motor along
with the stator e7citations. The switching scheme for the wave mode e7citation is given as
follows.
Anti clockwise 0lockwise
+tep A A2 B B2 +tep A A2 B B2
# # #
2 # # #
' # # #
) # # #
# # #
2 # # #
' # # #
) # # #
''
15.3.2 2- Phase schemeF
(n this scheme the two ad>acent stator windings are energiEed. There are two magnetic
fields achieved in Buadrature and none of the rotor pole faces can be in a direct alignment
with the stator poles.
The switching scheme for the 2H phase mode e7citation is given as follows.
Anti clockwise 0lockwise
+tep A A2 B B2 +tep A A2 B B2
# #
2 # #
' # #
) # #
# #
2 # #
' # #
) # #
15.3.3 Half stepping scheme
The previousl5 discussed two schemes have a step siEe of '# degrees for the stepper motor
under consideration. 6owever there is a offset of & degrees between these two schemes. B5
interleaving these two schemes , the step siEe can be reduced to & degrees there b5
improving the accurac5 of the motor. This is called half stepping scheme.
The switching seBuence is as follows.
#. A on
. A and B on
2. B on
'. B and A2 on
). A2 on
&. A2 and B2 on
$. B2 on
.. B2 and A on
". A on etc.
15.4 Pre-Lab Questions:
+tate applications of stepper motor in control s5stems
2 ,raw the ) possible rotor positions and the corresponding stator e7citations in a
stepper motor
15.5 Post Lab:
. 4rite a program to interface the stepper motor with "#& and make it run in
clockwise and anti clock wise direction.
')
Lab 16
Ex.No.16: A/D and D/A Interface
16.1(a) Introduction:
To interface a digital to analog interface with "#& and to perform the lab assignments.
16.2 (a) Hardware Requirement:
The "#& Microcontroller kit, ,/A add on card, interface cable, *ower suppl5.
16.3(a) Program Logic: !Refer -ab "%
The ph5sical Buantities like temperature, pressure etc are reBuired for the electronic
circuit for data processing. The electrical eBuivalent of such parameters are obtained b5 the
use of transducers. (t is difficult to process or store the analog values so there is a conversion
of analog signals to the digital domain for the ease of processing and again converting it into
the analog domain for the real time output . This is of course achieved b5 the use of
converters. The circuit which is used to convert a digital value into a analog value is a digital
to analog converter.
16.3.1 (a) Square wave generation
The basic idea behind the generation of the waveform is the continuous generation of
analog output at ,A0. 4ith ##!he7% as the input to the ,A02, the analog value is H&v.
similarl5 , with JJ !he7% as input, the output of the ,A0 is S&v. 2utputting the digital data ##
and JJ at regular intervals at ,A02, results in a sBuare wave generation.
16.3.2 (a) Saw tooth wave generation
2utput digital data from ## to JJ in constant steps of # to ,A0.Repeat this
seBuence again and again. As a result a saw tooth is generated at ,A0 output.
16.4(a) Pre-Lab Questions:
. 4hat is the basic principle of analog to digital converterO
2. 4h5 ,A0 is interfaced with "#&
'. (s it possible to generate an5 wave using ,A0 interface
8.6 (a) Post-Lab Questions:
.4rite a program to generate a triangular wave in "#&
2. Jor a digital value of $J ,the appro7imate analog voltage is HHHHHHHHHH
'&
Lab 17
Part IV - Nuvoton Processor
Ex.No.17: Seven segment display from ~0000 to ~9999
17.1 Introduction:
The purpose of this e7periment is to displa5 the number from #### to 1111 in the )
-:,3s in the Nuvoton Nu-LB-NUC140series Board
17.2 Tool Requirement:
C:(- Dversion ).#, Nuvoton 0M+(+ -ibrar5 Jiles, ,rv+I+ -ibrar5 Jiles,
ND0)#-B +eries ARM Target Board.
17.3 Program :
+mplM.seg F counting from # to 1111 and displa5 on .Hsegment -:,s
Vinclude X+tdio.hY
Vinclude [ND077.h[
Vinclude [,rv+I+.h[
Vinclude [+evenM+egment.h[
// displa5 an integer on four .Hsegment -:,s
void segMdispla5!int$Mt value%
\
int"Mt digit]
digit P value / ###]
closeMsevenMsegment!%]
showMsevenMsegment!',digit%]
,rv+I+M,ela5!&###%]
value P value H digit ^ ###]
digit P value / ##]
closeMsevenMsegment!%]
showMsevenMsegment!2,digit%]
,rv+I+M,ela5!&###%]
value P value H digit ^ ##]
digit P value / #]
closeMsevenMsegment!%]
showMsevenMsegment!,digit%]
,rv+I+M,ela5!&###%]
value P value H digit ^ #]
digit P value]
closeMsevenMsegment!%]
showMsevenMsegment!#,digit%]
,rv+I+M,ela5!&###%]
int'2Mt main !void%
\
int'2Mt i P#]
DN-20CR:=!%]
,rv+I+M2pen!)"######%]
-20CR:=!%]
while!iX#7####%
\
'$
segMdispla5!i%] // displa5 i on .Hsegment displa5
,rv+I+M,ela5!2####%] // dela5 for keeping displa5
iSS] // increment i
_
_
RESULT F The +imple +even +egment displa5 to displa5 the value 0000 to 9999 was
e7ecuted on C:(-uAersion) and successfull5 ported verified on Nu-LB- NUC140 series
board.
17.4 Pre-Lab Questions:
. 4hat is the processor used in Nuvoton boardO
2. 4hat is =*(2 and where it is usedO
'. ,ifferentiate R(+0 and 0(+0 machine.
17.5 Post-Lab Questions:
. 6ow seven segment displa5 is interfaced in Nuvoton series
'.
Lab 18
Ex.No.18: Seven segment display using ADC input
18.1 Introduction:
The purpose of this e7periment is to displa5 the digital value obtain from inbuilt A,0 in the
) -:,3s in the NuvotonNuH-BHND0)# series Board.
18.2 Tool Requirement:
C:(- Dversion ).#, Nuvoton 0M+(+ -ibrar5 Jiles, ,rv+I+ -ibrar5 Jiles
ND0)#-B +eries ARM Target Board.
18.3 Program :
/^ +ample 0ode F +mplM.segMA,0. ^/
/^ input F A,0Q.R !2Hbit% ^/
/^ output F Jour ,igit on .Hsegment displa5 ^/
Vinclude Xstdio.hY
Vinclude [ND077.h[
Vinclude [+evenM+egment.h[
Vdefine BAD,RAT: 1$##
void (nitA,0 !void%
\
/` Step 1. GPIO initial `/
=*(2AHY2JJ,`P#7##"#####] //,isable digital input path
+I+HY=*AMJ*.A,0.M++2MA,$P] //+et A,0 function
/^ Step 2. Enable and Select ADC clock source, and then enable ADC module `/
+I+0-CHY0-C+:-.A,0M+ P 2] //+elect 22MhE for A,0
+I+0-CHY0-C,(A.A,0MN P ] //A,0 clock source P 22MhE/2 PMhE]
+I+0-CHYA*B0-C.A,0M:N P ] //:nable clock source
A,0HYA,0R.A,:N P ] //:nable A,0 module
/^ Step 3. Select Operation mode `/
A,0HYA,0R.,(JJ:N P #] //single end input
A,0HYA,0R.A,M, P #] //single mode
/` Step 4. Select ADC channel `/
A,0HYA,06:R.06:N P #7"#]
/^ Step 5. Enable ADC interrupt `/
A,0HYA,+R.A,J P] //clear the A/, interrupt flags for safe
A,0HYA,0R.A,(: P ]
'"
// NA(0M:nable(RN!A,0M(RNn%]
/^ Step 6. Enable WDT module `/
A,0HYA,0R.A,+TP]
_
void ,ela5!int'2Mt count%
\
while!countHH%
\
// MMN2*]
_
_
void segMdispla5!int$Mt value%
\
int"Mt digit]
digit P value / ###]
closeMsevenMsegment!%]
showMsevenMsegment!',digit%]
,ela5!&###%]
value P value H digit ^ ###]
digit P value / ##]
closeMsevenMsegment!%]
showMsevenMsegment!2,digit%]
,ela5!&###%]
value P value H digit ^ ##]
digit P value / #]
closeMsevenMsegment!%]
showMsevenMsegment!,digit%]
,ela5!&###%]
value P value H digit ^ #]
digit P value]
closeMsevenMsegment!%]
showMsevenMsegment!#,digit%]
,ela5!&###%]
_
/^HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH
MA(N function
HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH^/
int'2Mt main !void%
\
int'2Mt adcMvalue]
'1
DN-20CR:=!%]
+I+0-CHY*4R02N.?T-2MM:N P ] //:nable 2MhE and set 60-CHY2MhE
+I+0-CHY0-C+:-#.60-CM+ P #]
-20CR:=!%]
(nitA,0!%]
while!%
\
while !A,0HYA,+R.A,JPP#%] // A,0 Jlag, wait till !A/,0 conversion done%
A,0HYA,+R.A,JP] // write to A,J is to clear the flag
adcMvaluePA,0HYA,,RQ.R.R+-T] // input 2Hbit A,0 value
segMdispla5!adcMvalue%] // displa5 value to .Hsegment displa5
A,0HYA,0R.A,+TP] // activate ne7t A,0 sample
// F conversion start] // # F conversion stopped, A,0 enter idle state
_
_
RESULT F The +imple +even +egment displa5 to displa5 the value #### to JJJJ was
e7ecuted on C:(-uAersion) and successfull5 ported verified on ND0)# series board.
18.4 Pre Lab Questions:
.4hat does ARM meanO
2. +tate the specifications of the Nuvoton processorO
'. ,ifferentiate Nuvoton and "#"$ trainer boards
18.5 Post Lab Questions
. 4hat is (,: and wh5 it is neededO
2. 4hat is meant b5 in circuit programmingO
)#
)