Beruflich Dokumente
Kultur Dokumente
1.66x10e6
True Power (Pt) = 1.58 x 10
6
Load resistance =
Pt
=
(3.81103)2
1.58x10e6
= 9.18
9
Load Inductance =
9.18
2xx60
= 0.02437 H = 24.37mH.
B1). The Simulation results using In Phase Disposition modulation scheme f m =
60, fcr = 900 and ma = 1.0 are as shown below
Arranged as (vg1, vg2, vAN, vAB, and iA) respectively.
Harmonic spectra of vAB
10
and iA
B2) scheme f m = 20, fcr = 900 and ma = 0.3
Arranged as (vg1, vg2, vAN, vAB, and iA) respectively.
11
Harmonic spectra of vAB
12
And harmonic spectra of iA shown below
C1)
The Simulation results using Alternate Phase Opposition Disposition modulation
scheme f m = 60, fcr = 900 and ma = 1.0 are as shown below
Arranged as (vg1, vg2, vAN, vAB, and iA) respectively.
13
Harmonic spectra of vAB
and iA
14
C2) scheme f m = 20, fcr = 900 and ma = 0.3
Arranged as (vg1, vg2, vAN, vAB, and iA) respectively.
15
Harmonic spectra of vAB
And harmonic spectra of iA shown below
16
Analysis:
The inverter conditions are same the only change is the modulation scheme. In part
C1 we can observe the vAB THD for C1 is 39.86% which is higher than the vAB THD
for B1 which is 34.83%. Also the higher order harmonics are more prominent in C1
than that of B1. On the other hand when we compare the iA THD for C1 is 17.37%
which is also slightly higher than the THD for B1 which is 17.17%. This proves that
B1 which uses IPD modulation scheme gives a much better harmonic profile than
APOD.
Also on general comparison between the waveforms obtained at various modulation
indices. It is found that the harmonics are much better at higher modulation index as
in the case C1 and B1 than the lower modulation index (C2, B2) This is probably
because as the modulation index increases the Amplitude of the modulating wave is
greater.
D1) Four level Inverter with IPD modulation scheme.
The Simulation results using In Phase Disposition modulation scheme f m = 60, fcr
= 900 and ma = 1.0 are as shown below
Arranged as (vg1, vg2, vAN, vAB, and iA) respectively.
17
Harmonic spectra of vAB
18
and iA
D2) scheme f m = 20, fcr = 900 and ma = 0.3
Arranged as (vg1, vg2, vAN, vAB, and iA) respectively.
19
Harmonic spectra of vAB
And harmonic spectra of iA shown below
20
Analysis
On comparing the three level and four level inverters under the same modulating
scheme and operating conditions it is observed that the iA THD of D1 is 13.17%
which is much lower than the iA THD of B1 which is 17.17%. Also the harmonics
vAB of D1 is 29.01% which is much lower than the vAB THD of B1 34.83%. This
shows that the higher level filters have lower THD than the lower level filters.
However it comes at a cost as the higher level filters become increasingly difficult
to design as they employ more clamping diodes than the lower level diodes.
However when the waveforms at lower modulation indices are compared it is found
that the four level inverters (D2) have a little lower iA THD than the three level
inverter (B2). Though it is a little lower the corresponding Current waveforms are
almost the same. But the vAB THD of D2 is a lot lower than that of B2.
CONCLUSION
Thus, a simple Matlab Simulink model is built to implement a three level and four
level diode clamped inverter. A brief overview of the modulation scheme is
explained and the IPD and APOD modulation schemes are tested on both the
inverters. A Matlab/Simulink based model for implementation is presented in the
appendix that follows. The simulations are done for varying values of ma, fm and fcr.
Also the values of are plotted in the sequence specified in the book. The presented
model gives an insight into the multilevel inverters and the modulation schemes
employed thereof. By varying the magnitude of the carrier and modulating wave the
21
different modulation index can be achieved. Also the carrier frequency and the
frequency of the modulating wave is specified. From the results obtained it can be
concluded that the IPD scheme gives an overall better harmonics than APOD. Also
the Four level inverter gives much lower THD than the three level inverter.
APPENDIX
Top-Level block diagram of the three level Inverter.
22
Three level Diode clamp inverter implementation.
In phase disposition modulation scheme implementation.
23
Alternative phase opposite disposition implementation.
Top level diagram of four level inverter.
24
Four level diode clamped inverter implementation.