Chapter 8 : Transistor Biasing and Thermal Stability

Section 8.5 :
Ex. 8.5.2 : The fixed bias circuit of Fig. P. 8.5.2 uses a silicon transistor. The component values are
RC = 5 and R! = " #. dc of the transistor is " at $C and increases to "2 at a
temperature of 8

C. %etermine the percent change in the & point values over this
temperature range. 'ssume that (!) and *C!+ remain constant. .Page No. 8!".
(F-292)Fig. P. 8.5.2
Soln. :
Steps to be followed :
Step 1 : Obtain the Q point at 30C.
Step 2 : Obtain the Q point at 80C.
Step 3 : Calculate the percent change in Q point values.
Step 1 : To obtain the point at 3!" :
Obtaining Q point values means to calculate VCEQ and ICQ. Let us use dc = 00.
!ppl"ing #VL to the base circuit o$ %ig. &. 8.'.( )e get*
VCC + I, -, + V,E = 0
I, = = = 3 ! ..../
0o) neglecting ICEO )e can )rite*
ICQ = dc I, = 00 3 0
+ 1
= .3 m! ....(/
!ppl" #VL to the collector circuit o$ %ig. &. 8.'.( to get*
VCC + VCEQ + ICQ -C = 0
VCEQ = VCC + ICQ -C = ( + ..3 0
+ 3
'00/ = 1.3' V ....3/
2hus the Q point co3ordinates at 30C are 4
Q point at 30C = .VCEQ* ICQ/ = .1.3' V* .3 m!/
!nita 4 546(0367u8arat6#atre6,asic Electronics .9ith C5/6C5 E:amples6chp86chp8.doc
2
nd
p#oof
!asic )lectronics ,-T./ 802 Transistor !iasing 1 Thermal 2tabilit3
Step 2 : To obtain the point at 8!" :
Let us use dc = (0. 0o) $rom E;uation ./* I, = 3 !.
2here$ore the ne) value o$ ICQ is given b"*
ICQ .80C/ = dc I, = (0 3 0
+ 1
ICQ .80C/ = 3.'1 m! ....</
!ppl"ing #VL to collector circuit )e get*
VCEQ .80C/ = VCC + ICQ-C = ( + .3.'1 0
+ 3
'00/
VCEQ .80C/ = '.(( V .....'/
2hus the Q point values at 80C are 4
Q point at 80C = .VCEQ* ICQ/ = .'.(( V* 3.'1 m!/
Step 3 : To $al$%late pe#$ent $hange in point &al%es :
&ercent change in ICQ = 00=
= 00=
&ercent change in IC = (0= .increase/ ...'ns.
&ercent change in VCEQ = 00= = 00=
&ercent change in VCEQ = + >.>?= .decrease/ ...'ns.
Ex. 8.5.# : %erive the expression for the stabilit3 factor 425 of a fixed bias circuit. Comment on the
result. .Page No. 8!".
Soln. :
9e have de$ined the stabilit" $actor @AB as $ollo)s 4
A =
A gives us the change in IC due to change in the reverse saturation current IC,O. !s IC,O changes
b" IC,O* the base current I, )ill change b" I, and the collector current IC changes b" IC.
%or a CE con$iguration )e Cno) that*
IC = dc I, D ICEO = dc I, D . D dc/ IC,O
2here$ore change in IC is given b"*
IC = dc I, D . D dc/ IC,O
5ividing both the sides b" IC )e get*
= dc D . D dc/
+ dc = . D dc/
=
,ut* A =
A = ....8.'.'/
!asic )lectronics ,-T./ 80$ Transistor !iasing 1 Thermal 2tabilit3
,ut $or the $i:ed bias circuit*
I, =
In this e;uation VCC* V,E and -, all are $i:ed. 2here$ore I, cannot change. I, = 0.
Aubstituting this in E;uation .8.'.'/ )e get*
A = . D dc/ ....8.'.1/
"o((ent on the e)p#ession fo# S :
Aubstitute dc = <? in E;uation .8.'.1/. 2he value o$ A = '0. i.e. collector current change is '0
times as large as change in the reverse saturation current IC,O. %i:ed bias circuit thus gives a ver" poor
stabilit" o$ the Q point. It is the )orst con$iguration as $ar as the stabilit" o$ Q point is concerned.
Ex. 8.5.$ : %erive the expression for the stabilit3 factor 2 of a fixed bias circuit. 'lso derive the
relation bet6een 2 and 2 for the same. .Page No. 8!!.
Soln. :
9e have de$ined the stabilit" $actor A as
A =
%or a common emitter con$iguration* )e have
IC = dc I, D . D dc/ ICO ..../
9e )ill substitute I, in terms o$ V,E into E;uation ./. %or
this* re$er %ig. &. 8.'.< and appl" #VL to get*
VCC = I, -, D V,E ....(/
I, = ....3/ (F-2*12)Fig. P. 8.5.+ : ,ase loop
Aubstitute E;uation .3/ into E;uation ./ to get*
IC = dc D . D dc/ IC,O
0ote that ICO and IC,O are one and the same.
IC -, = dc VCC + dc V,E D . D dc/ IC,O -, ....</
5i$$erentiate this e:pression )ith respect to V,E to get*
-, = 0 + dc D 0
-, A = + dc
A = ....8.'.>/
2his is the re;uired e:pression. 2he negative sign indicates that IC decreases as temperature
increases due to reduction in V,E at increased temperature.
%elation bet&een S and S :
9e have alread" derived the e:pression $or A as A = . D dc/. In this e:pression substitute
dc = + A -, to get*
A = + A -,
or A =
2his is the re;uired relation.
Ex. 8.5.5 : %erive the expression for the stabilit3 factor 2 for a fixed bias circuit. .Page No. 8!!.
!asic )lectronics ,-T./ 807 Transistor !iasing 1 Thermal 2tabilit3
Soln. :
9e have alread" de$ined the stabilit" $actor A as
A =
%or a common emitter con$iguration.
IC = dc I, D . D dc/ IC,O
= dc I, D dc IC,O D
IC,O
5i$$erentiate both sides partiall" )ith respect to dc )e get*
= I, D IC,O D 0
0eglecting IC,O )e get*
A = = I, =
A = E.8.'.8/
2his is the re;uired e:pression.
Note : +ut of 28 2 and 2 the stabilit3 factor 2 is significantl3 higher than the remaining t6o.
Ex. 8.5.' : Calculate the stabilit3 factor 2 for the fixed bias circuit sho6n in Fig. P. 8.5.9.
.Page No. 8!!.
(F-29+)Fig. P. 8.5.*
Soln. :
2he stabilit" $actor A $or the $i:ed bias circuit is given b" 4 A = D dc
2here$ore )e must $ind the value o$ dc.
,ut dc =
Ao )e have to obtain the values o$ IC and I,.
9e Cno) that*
IC = =
= 1 m!
!asic )lectronics ,-T./ 805 Transistor !iasing 1 Thermal 2tabilit3
!nd I, = = = 3 !
2here$ore* dc = = = '3.0?
Fence the stabilit" $actor A = D '3.0? = '<. ...'ns.
Ex. 8.5.8 : For the device characteristics sho6n in Fig. P. 8.5.8,a/ calculate (CC8 R! and RC for the
fixed bias circuit of Fig. P. 8.5.8,b/. .Page No. 8!#.
(a) (b)
(F-29-)Fig. P. 8.5.8
Soln. :
Step 1 : Find ."" and /" ((a)) :
%rom the dc load line o$ %ig. &. 8.'.8.a/ )e get*
VCC = ' V and IC .ma:/ = 0 m!* I,Q = '0!
Step 2 : "al$%late 0, and 0" :
-, = = = (81 C 1'ns.
-C = = = .' C 1'ns.
Section 8.( :
Ex. 8.(.# : ' 2i transistor used in self bias has (CC = 2 (8 RC = 2 #. The nominal operating point
is (C) = " ( and *C = 7 m'. *f = 58 Calculate R"8 R2 and R) if stabilit3 factor 2 = " is
desired. *f 2 $ is re:uired8 6hat 6ill be the price paid for achieving this stabilit3 ; Refer
Fig. P. 8.<.$,a/. .Page No. 825.
!asic )lectronics ,-T./ 809 Transistor !iasing 1 Thermal 2tabilit3
(F-329)Fig. P. 8.-.3(a)
Soln. :
Steps to be followed :
Step 1 : Calculate I,.
Step 2 : !ppl" #VL to the collector loop and calculate -E.
Step 3 : Gsing the e:pression $or @AB calculate -, i.e. - HH -(.
Step + : Calculate the values o$ - and -(.
Step 1 : "al$%late /, :
I, = IC I dc = = 80 ! ..../
Step 2 : 'ppl2 3.4 to the $olle$to# loop and $al$%late 05 :
VCC = IC -C D VCE D IE -E = IC -C D VCE D .IC D I,/ -E ...'ns.
-E = = = <?0.(
Step 3 : "al$%late 0, :
2he e:pression $or stabilit" $actor o$ @AB $or sel$ bias circuit is given b"*
A = . D dc/ ....(/
A = . D '0/ = 0
' D = '0 D
= <'?
-, = '.<8' C 1'ns.
,ut* -, = - HH -( =
= '.<8' C ....3/
= ....</ (F-33!)Fig. P. 8.-.3(b)
Step + : To $al$%late the &al%es of 01 and 02 :
2he 2heveninJs e;uivalent circuit is as sho)n in %ig. &. 8.>.3.b/.
!ppl" #VL to the base loop to )rite*
V2F + I, -, + V,E + IE -E = 0
,ut I, = 80 ! and IE = . D / I, = ' 80 0
+ 1
= <.08 m!
Aubstituting the values )e get*
V2F + 80 0
+ 3
'.<8' + 0.> + <.08 0.<?0( = 0
V2F = 3.> Volts
,ut V2F = VCC
= = 0.'8
= 3.>
and -, = = '.<8' 0
3

Aubstituting the value o$ = 0.'8 into e:pression $or -, )e get
- 0.'8 = '.<8' 0
3

!asic )lectronics ,-T./ 80< Transistor !iasing 1 Thermal 2tabilit3
- = 3<.> C ...'ns.
= 0.'8
-( = 0.'8 -( D '.<8(1
-( = = 1.' C ...'ns.
5ffe$t of #ed%$ing S to 3 :
I$ A 3 then*
. D / 3
3
%or A = 3* ' D = '3 D
-, = .0< C $or A = 3.
2he e$$ect is reduction in the input impedance. 2hus the stabiliKation is improved at the cost o$
reduced input impedance.
Ex. 8.(.$ : The silicon transistor sho6n in Fig. P. 8.<.7 has = ==8 *!& = $ '8 (!)& = .<(. Find R2
and (C)&. .Page No. 825.
(F-331)Fig. P. 8.-.+
Soln. :
Step 1 : "al$%late /" :
IC = I, = ?? 30 0
+ 1
= (.?> m! ..../
Step 2 : "al$%late ."5 :
!ppl" #VL to collector circuit to )rite 4
VCC = IC -C D VCE D .IC D I,/ -E
VCE = VCC + IC .-C D -E/ + I, -E
= ' + (.?> .( D / + 30 0
+ 1
0
3
= 1.01 V ...'ns.
Step 3 : "al$%late the &al%e of 02 :
!ppl" #VL to the base3emitter loop to )rite*
V-( = V,E D IE -E = V,E D . D / I, -E
V-( = 0.> D .00 30 0
+ 1
0
3
/ = 3.> V
,ut* V-( = VCC ... Gsing appro:imate anal"sis
3.> = 3.> - D 3.> -( = ' -(
-( = = 3.(> C ...'ns.
Ex. 8.(.( : The transistor sho6n in the circuit in the
!asic )lectronics ,-T./ 808 Transistor !iasing 1 Thermal 2tabilit3
Fig. P. 8.<.< has hF) = 5 at 25 C and hF)
= 2 at <5 C. Reverse saturation
current *C+ = ." ' at 6ith 25 C a
temperature coefficient of <>C and
(!) = .< ( at 25. Temperature
coefficient of (!) is ? 2.5 m(@C.
Calculate A ". &uiescent currents 2.
&uiescent collector current drift at <5C.
.Page No. 82(.
(F-32*)Fig. P. 8.-.- : 6i&en $i#$%it
Soln. :
Steps to be followed :
Step 1 : Calculate the values o$ I, and IC at ('C.
Step 2 : Calculate the changes in ICO* and V,E )ith temperature.
Step 3 : Calculate the values o$ A* A and A.
Step + : Obtain the value o$ IC = A IC,O 7 A V,E D A
Step 1 : "al$%late /, and /" at 25 " :
," appl"ing #VL around base loop* )e get*
+ D I, -, D V,E D .
I, D IC/
-E = 0
I, = = = <? ! E./
IC =
I, = '0 <? ! = (.<' m!
E.(/
Step 2 : "hanges in hF5 8 /"9 and .,5
:
%rom the data* the changes in di$$erent parameters are as $ollo)s 4
hF5 () /"9 .,5
(' C '0 0.0 ! 0.>
>' C (00 0.3( ! 0.'>'
Fence* = h%E( +
h%E
= (00 + '0 = '0
ICO =
ICO( +
ICO
= 0.3( + 0.0 = 0.3 !
V,E = 0.'>' + 0.> = + 0.(' V
!asic )lectronics ,-T./ 80= Transistor !iasing 1 Thermal 2tabilit3
Step 3 : "al$%late the &al%es of S8 S and S :
A = . D /
A = . D '0/ = ?.(
A = = = + 8.?1 0
+ 3
A = = = 8.8< 0
+ 1
Step + : To $al$%late $hange in /"
:
IC = A ICO D A V,E D A
= .?.( 0.3 0
+ 1
/ D .+ 8.?1 0
+ 3
+ 0.('/
D .8.8< 0
+ 1
'0/
IC = (.8'( ! D .0(<' m! D .3(1 m! = (.3'33 m! ...'ns.
Ao ne) value o$ IC = (.<' D (.3'33 = <.8033 m! ...'ns.
Section 8.!! :
Ex. 8.!!.# : The reverse saturation current of germanium transistor in Fig. P. 8."".$,a/ is 2 ' at room
temperature and increases b3 a factor of 2 for each temperature increase of "C. The
bias (!! = 5(. Find the maximum allo6able value of R! if the transistor is to remain cutoff
at a temperature of <5C. .Page No. 8$#.
(F-3+8)Fig. P. 8.11.3(a) : 6i&en $i#$%it
Soln. :
Step 1 : .al%e of /",9 at -5 " :
Let the room temperature be ('C.
at ('C 4 IC,O = ( !
IC,O doubles $or ever" 0C increase in temperature.
at >'C 4 IC,O = 1< !.
Step 2 : "al$%late &al%e of 0, :
In order to Ceep the transistor o$$* it is necessar" to Ceep V,E + 0. V.
-e$er %ig. &. 8..3.b/ and appl" #VL to the input loop to get*
V,, D V,E = IC,O -,
!asic )lectronics ,-T./ 80" Transistor !iasing 1 Thermal 2tabilit3
V,E = + V,, D -, IC,O + 0.
+ ' D .-, (8 0
+ 3
/ + 0.
-, (F-3+8)Fig. P. 8.11.3(b) : /np%t loop
-, 38.(8 C or -,ma: = 38.(8 C ...'ns.
Ex. 8.!!.$ : Fig. P. 8."".78 a circuit using p0n0p germanium
transistor 6ith dc = "5 and *C+ = 2.5 m'.
The :uiescent collector current is 5 m' Find A
,a/ The value of resistor R!.
,b/ The largest value of that can result in
a thermall3 stable circuit. Page No. 8$$.
Soln. :
6i&en : dc = '0* ICO = (.' m!* ICQ = '00 m!.
Step 1 : "al$%late 0, :
. "al$%late /, :
IC = I, D .D / ICO
'00 = '0 I, D .' (.'/
I, = 0.81 m! ..../ (F-3+9)Fig. P. 8.11.+
(. !ppl" #VL to the base emitter circuit to )rite*
VCC = I, -, D VE, D IE -E
(0 = 0.81 0
+ 3
-, D 0.3 D .IC D I,/ -E
-, =
= (.0>3 C ...'ns.
3. "al$%late .5" :
VCC = .IC 0/ D VEC D IE '
VEC = VCC + 0 IC + ' IE = (0 + .0 0.'/ + .' 0.'0081/
VEC = (.<? V
VCE = + (.<? V
!s H VCE H L H VCCI( H the circuit o$ %ig. &. 8..< is not inherentl" stable.
Step 2 : "al$%late the stabilit2 fa$to# (S) :
A = . D /
A = .'/ = <'.8
Step 3 : "al$%late :
Aubstitute @AB in the $ollo)ing e;uation 4
MVCC + ( IC .-E D -C/N .A/ .0.0> ICO/ O
M(0 + ( 0.' .' D 0/N .<'.8 0.0> (.' 0
+ 3
/ O
0.(>' O
O >.8< CI9 ma: = >.8< CI9.
!asic )lectronics ,-T./ 80"" Transistor !iasing 1 Thermal 2tabilit3
Ex. 8.!!.5 : *n a circuit sho6n in Fig. P. 8."".5,a/ determine the co0ordinates of operating point of the
transistor. %ra6 the %C load line on output characteristics and sho6 the location of &
point. Comment on the region of operation. %etermine 2*C+. .Page No. 8$$.
(a) 6i&en $i#$%it (b) The&enin:s e;%i&alent $i#$%it
(F-23+9)Fig. P. 8.11.5
Soln. :
Step 1 : <#aw the The&enin:s e;%i&alent $i#$%it :
2o obtain the Q point o$ the given circuit* remove all the capacitors and dra) the 2heveninPs
e;uivalent circuit as sho)n in %ig. &. 8..'.b/.
V2F = VCC = 1
V2F = <.3 V ..../
and -, = - HH -( = = 8.3 C ....(/
Step 2 : "al$%late /, :
!ppl" #VL to the base loop o$ %ig. &. 8..'.b/ to )rite*
V2F + I, -, + V,E + IE -E = 0
V2F + I, -, + V,E + . D / I, -E = 0
I, = =
/, = 2.12 1!
> 5
'
Step 3 : "al$%late /" :
ICQ = I, = 00 (.( 0
+ '
= (.( m!
Step + : "al$%late ."5 :
VCEQ = VCC + IC -C + IE -E
,ut IE = . D / I, = 0 (.( 0
+ '
= (.<( 0
+ 3

VCEQ = 1 + .(.( (.'/ + .(.<( .'/ = >.<88( Volts.
Fence the Q3point is given b" 4 .>.<88( V* (.( m!/ ...'ns.
Step 5 : To d#aw the load line and lo$ate point :
!asic )lectronics ,-T./ 80"2 Transistor !iasing 1 Thermal 2tabilit3
(F-2*1+)Fig. P. 8.11.5($) : 4oad line and -point
2he load line is as sho)n in %ig. &. 8..'.c/. 2he t)o e:treme points ! and , are given b"*
Point ' : IC ma: = VCC I .-C D -E/ = = < m!.
Point , : Corresponds to VCE = VCC = 1 V.
0egion of ope#ation : '$ti&e 0egion
Step * : "al$%late S/"9 :
AICO is A* and the e:pression $or A o$ a voltage divider bias circuit is given b"*
A = . D /
A = . D 00/ = .>8 ...'ns.
Ex. 8.!!.' : ' p0n0p germanium transistor is used in the self biasing arrangement 6ith
(CC = 5(8 R" = 2<#8 R2 = $#8 R) = 2< 8 RC = 2# and = 5.
Find (C)& and *C&. .Page No. 8$5.
Soln. :
6i&en : VCC = 'V* - = (> C * -( = 3C* -E = (>0 * -C = ( C and = '0.
Step 1 : <#aw the $i#$%it :
2he circuit is as sho)n in %ig. &. 8..1.a/.
Step 2 : <#aw The&enin:s e;%i&alent $i#$%it :
2heveninPs e;uivalent circuit is sho)n in %ig. &. 8..1.b/* in )hich
V2F = VCC = + ' = 0.' volts
-, = - HH -( = = (.> C
(a) 6i&en $i#$%it (b) The&enin:s e;%i&alent $i#$%it
(F-2*15)Fig. P. 8.11.*
!asic )lectronics ,-T./ 80"$ Transistor !iasing 1 Thermal 2tabilit3
Step 3 : "al$%late /,8 /" and ."5 :
!ppl" #VL to the base loop o$ %ig. &. 8..1.c/ to )rite*
V2F = IE -E D VE, D I, -, ,ut IE = . D / I,
V2F + VE, = . D / I, -E D I, -,
I, = = = (.< !
($) ,ase loop (d) "olle$to# loop
(F-2*1*)Fig. P. 8.11.*
Collector current* IC = I, = '0 (.< 0
+ 1
= 0.1 m! ...'ns.
!ppl" #VL to the collector loop o$ %ig. &. 8..1.d/ to get*
VCC = IE -E D VEC D IC -C
VEC = VCC + IE -E + IC -C = ' + .D / I, -E + IC -C
= ' + ' (.< 0
+ 1
(>0 + 0.1 0
+ 3
( 0
3
VEC = ' + 0.1 + .( = 3.1 V
VCE = + VEC = + 3.1 V ...'ns.
Ex. 8.!!.( : For the biasing arrangement as sho6n in Fig. P. 8."".<8 assume that the reverse
saturation currents of diode and transistor are e:ual. 2ho6 that A
2 = = " and 2 = .Page No. 8$5.
Soln. :
'ss%(ptions :
. 2he diode 5 is made o$ same material as that o$ the
transistor.
(. 2he reverse saturation current o$ the diode i.e. Io is
e;ual to the reverse saturation current o$ the transistor
i.e. ICO.
Io = ICO
To p#o&e that S = 1 :
LooCing at %ig. &. 8..> )e can )rite that* (F-352)Fig. P. 8.11.- : 6i&en $i#$%it
!asic )lectronics ,-T./ 80"7 Transistor !iasing 1 Thermal 2tabilit3
I, = I + Io ..../
2he collector current IC is given as 4
IC = dc I, D . D dc/ ICO ....(/
Aubstitute the value o$ IC $rom E;uation ./ to get 4
IC = dc .I + Io/ D . D dc/ ICO
IC = dc I + dc I0 D ICO D dc ICO ....3/
,ut Io = ICO
IC = I dc D ICO ....</
A = = 0 D
A = &roved ...'ns.
!asic )lectronics ,-T./ 80"5 Transistor !iasing 1 Thermal 2tabilit3
To p#o&e that S = :
A is de$ined as 4 A =
Consider the base circuit o$ %ig. &. 8..> and appl" #VL to )rite*
VCC = I - D V,E
I - = VCC + V,E
I = ....'/
,ut $rom E;uation .</*
IC = I dc D ICO
Aubstituting value o$ I )e get*
IC = D ICO
= + V,E D ICO
!s dc and ICO are assumed to be constants*
A = = 0 + D 0
A = + ...&roved. ...'ns.
Ex. 8.!!.8 : For the circuit sho6n in Fig. P. 8."".8,a/.
%etermine A ". *C 2. (C $. () 7. (C) 'ssume
dc
= ". .Page No. 8$5.
(F-353)Fig. P. 8.11.8(a)
!asic )lectronics ,-T./ 80"9 Transistor !iasing 1 Thermal 2tabilit3
Soln. :
Step 1 : <#aw the d$ e;%i&alent $i#$%it :
%or dc anal"sis all the capacitors o$$er in$inite impedance.
Fence the" are replaced b" open circuit in the dc
e;uivalent circuit o$ %ig. &. 8..8.b/.
2he <>0 C and ((0 C resistances )ill appear in series )ith
each other in the dc e;uivalent circuit.
Step 2 : To obtain the base $%##ent /
,
and /
"
:
!ppl"ing the #VL to the base circuit o$ %ig. &. 8..8.b/ )e
can )rite*
V
CC
= .I
C
D I
,
/ -
C
D I
,
-
,
D V
,E
D I
E
-
E
..../
I
,
.-
,
D -
C
/ = V
CC
+ V
,E
+ I
E
-
E
+ I
C
-
C
....(/
(F-2*1-)Fig. P. 8.11.8(b) : Si(plified $i#$%it
fo# d$ anal2sis
,ut* I
C
=
dc
I
,
and I
E
= . D
dc
/ I
,

Aubstituting these values in E;uation .(/ )e get*
I
,
. -
,
D -
C
/ = V
CC
+ V
,E
+ . D
dc
/ I
,
-
E
+
dc
I
,
-
C

I
,
M-
,
D -
C
D . D
dc
/ -
E
D
dc
-
C
N = V
CC
+ V
,E
I
,
= ....3/ Aubstituting the values )e get*
I
,
=
I
,Q
= ?.?1 ! Q (0 R! ....</
Collector current I
CQ
=
dc
I
,Q
= 00 (0 0
+ 1

I
CQ
= ( m! ...'ns.
2he emitter current I
E
= . D
dc
/ I
,
= 0 (0 0
+ 1
= (.0( m! ....'/
Step 3 : To $al$%late .
5
8 .
"5
and .
"
:
To $al$%late .
5
:
V
E
= I
E
-
E
= (.0( .' V
E
= 3.03 Volts ...'ns.
To $al$%late .
"5
:
!ppl" #VL to the collector circuit o$ %ig. &. 8..8.b/ to )rite*
V
CC
= . I
C
D I
,
/ -
C
D V
CE
D V
E

V
CE
= V
CC
+ V
E
+ . I
C
D I
,
/ -
C

Aubstituting values )e get*
V
CE
= 30 + 3.03 + . (.0( 1.( / = <.<' Volt ...'ns.
!asic )lectronics ,-T./ 80"< Transistor !iasing 1 Thermal 2tabilit3
To $al$%late .
"
:
V
C
= V
CE
D V
E

V
C
= <.<' D 3.03 = >.<>1 Volts ...'ns.
Ex. 8.!!.!" : *n the self bias circuit sho6n in Fig. P. 8."".",a/8 R" = RC = 5 8 R2 = 5 #8
R) = " " 8 hF) = <58 *C!+ = .2 ' and (CC = 2 (.
". Find an expression for change in *C& due to change in R) alone.
2. Calculate change in *C& 6hen R) changes from minimum to maximum value.
'll other parameters are constant. .Page No. 8$(.
(a) 6i&en $i#$%it (b) The (odified $i#$%it of Fig P. 8.11.1!(a)
(F-359)Fig. P. 8.11.1!
Soln. :
Step 1 : 2he simpli$ied 5C e;uivalent circuit is sho)n in %ig. &. 8..0.b/.
Step 2 : !ppl" #VL around the base loop to obtain e:pression $or V, 4
V, = I, -, D V,E D .I, D IC/ -E ..../
V, = I, .-, D -E/ D V,E D IC -E
V, = I, .-, D -E/ D V,E D I, -E
V, = I, M-, D . D / -EN D V,E ....(/
Step 3 : 6et the e)p#ession fo# /" :
9e Cno) that* IC = I, D . D / IC,O ....3/
%rom E;uation .(/ )e get
I, =
!asic )lectronics ,-T./ 80"8 Transistor !iasing 1 Thermal 2tabilit3
0o) substitute this e:pression into E;uation .3/ to get*
IC = D . D / IC,O
%or LL * . D /
IC = D IC,O
=
IC =
Step + : 9btain the stabilit2 fa$to# S05 :
5i$$erentiating both sides o$ the above e;uation )ith respect to -E )ith IC,O* V, and constants
)e get stabilit" $actor A-E.
= A-E = M IC,O -, + S V, D -, IC,O + V,ETN ....</
Aubstitute -E = 00 + 0 = ?0 * = h%E = >'
-, = - HH -( = '00 HH ' C = <'<.'
V, = VCC = (0V
V, = .8( V * IC,O = 0.( !
Step 5 : "al$%late the &al%e of S05 :
Aubstituting the values into E;uation .</ )e get*
A-E = M 0.( 0
+ 1
<'<.' + >' ..8( D <'<.( 0.( 0
+ 1
+ 0.> N
S05 = > 1.1*59 1!
> +
'?
2his is the value o$ stabilit" $actor.
Step * : 9btain /" :
Change in collector current is given b"*
IC = A-E -E = + .1'? 0
+ <
.0 + ?0/
IC = + (.338 m! ...'ns.
Ex. 8.!!.!! : The silicon transistor sho6n in Fig. P. 8."".""
has *C!+ = .5 '8 (!) = .< ( and = <5 at
room temperature. Calculate the value of *C&.
*f *C!+ doubles for ever3 " C rise in
temperature and (!) has a temperature
coefficient of 2 m(@C. Calculate value of *C& if
!asic )lectronics ,-T./ 80"= Transistor !iasing 1 Thermal 2tabilit3
the temperature rises b3 2C. 'ssume to
be constant. .Page No. 8$(.
(F-235!)Fig. P. 8.11.11
Soln. :
Step 1 : To $al$%late /, and /" at #oo( te(pe#at%#e :
," appl"ing #VL around the base loop )e get*
+ 1 D I, -, D V,E D .I, D IC/ -E = 0
,ut IC = I, D . D / ICO I,
+ 1 D I, -, D V,E D I, -E D I, -E = 0
I, M-, D -E D -EN = 1 + V,E
I, = ..../
= = <( ! ....(/
Our assumption is 8usti$ied.
IC = ICQ = I, = >' <( 0
+ 1

IC = 3.' m!. ....3/
Step 2 : @ew &al%es of .,5 and /",9 at in$#eased te(pe#at%#e :
IC,O( = IC,O = IC,O (
(0I0
= 0.' ! (
(
= ( ! ....</
V,E( = V,E + ( mVIC (0 C
= 0.> V + <0 mV = 0.11 V ....'/
Step 3 : @ew &al%e of /, :
%rom E;uation ./* )e can get the ne) value o$ I, as*
I, =
I, = <(.< ! ....1/
Step + : @ew &al%e of /" :
IC = I, D . D / IC,O
= .>' <(.< !/ D .>1 ( !/ = 3.33( m! ...'ns.
Ex. 8.!!.!2 : 'n amplifier circuit is sho6n in Fig. P. 8.""."2,a/. %etermine the co0ordinates of the
operating point & and the thermal stabilit3 factor 2*C+. .Page No. 8$(.
!asic )lectronics ,-T./ 802 Transistor !iasing 1 Thermal 2tabilit3
(a) 6i&en $i#$%it (b) <" e;%i&alent $i#$%it
(F-3*!)Fig. P. 8.11.12
Soln. :
Step 1 : <#aw the <" e;%i&alent $i#$%it :
2he 5C e;uivalent circuit is as sho)n in %ig. &. 8..(.b/. 2his is obtained b" replacing all the
capacitors in the given circuit b" open circuit.
Step 2 : <#aw the The&enin:s e;%i&alent $i#$%it :
2he 2heveninPs e;uivalent circuit is as sho)n in %ig. &. 8..(.c/.
Step 3 : 9btain /, :
!ppl" #VL to the base loop to )rite
V2F + I, -, + V,E + IE -E D 1 = 0
+ (.?( + I, -, + 0.> + . D / I, -E D 1 = 0
(.38 + I, M-, D . D / -EN = 0
I, =
%rom the data sheet .t"pical/ = 80 * and -E = ?<0 or 0.?< C
I, = = (.18 !
(F-2*19)Fig. P. 8.11.12($) : The&enin:s e;%i&alent $i#$%it
Step + : "al$%late /" and ."5 :
IC = I, = 80 (.18 0
+ 1
= (.(83 m! ...'ns.
IE = . D / I, = 8 (.18 0
+ 1
= (.(?' m!
!ppl" #VL to the collector loop to )rite
1 + IC -C + VCE + IE -E D 1 = 0
VCE = ( + IC -C + IE -E = ( + .(.(83 (.'/ + .(.(?' 0.?</
VCE = <.3' Volts ...'ns.
Step 5 : "al$%late S/"9 :
%or a voltage divider bias circuit AICO is given b"*
AICO = = . D /
= . D 80/
AICO = >.>? ...'ns.
!asic )lectronics ,-T./ 802" Transistor !iasing 1 Thermal 2tabilit3
Ex. 8.!!.!# : *n the circuit of Fig. P. 8.""."$8 transistor has = " and (!) ,active/ = .9 (. Calculate
the values of R" and R$ such that collector current is of " m' and (C) = 2.5 (.
.Page No. 8$8.
(F-3*2)Fig. P. 8.11.13 : 6i&en $i#$%it
Soln. :
1. To $al$%late &al%e of 03 :
It is given that IC = m! and VCE = (.' V.
!ppl" #VL to the collector circuit o$ %ig. &. 8..3 to get*
VCC = IC -3 D VCE D IE -<
Aubstitute IE = .IC D I,/ and I, = IC I
VCC = IC -3 D (.' D -<
Aubstituting the other values* ' = . 0
+ 3
-3/ D (.' D 300
' = . 0
+ 3
-3/ D (.803
-3 = (.?> C ...'ns.
2. To $al$%late the &al%e of 01 :
- = =
,ut V, = IE -< D V,E
,ut IE = .0 m!
V, = ..0 0.3/ D 0.1 = 0.?03 volt
and I, = = = 0.0 m! = 0!
!s -( = 0 C ...given
I( = = = 0.0?03 0
+ 3

I( = ?0.3 !
Aubstituting all these values )e get*
- = = <0.8 C ...'ns.
Ex. 8.!!.!$ : The circuit sho6n in Fig. P. 8.""."7,a/ uses a 2i transistor 6ith = 2 and it is designed
to ma#e (o = and (C)& = $ (. ,a/ %etermine RC and R) ,b/ .sing the values obtained in
,a/ find the change in (o if is halved. .Page No. 8$8.
!asic )lectronics ,-T./ 8022 Transistor !iasing 1 Thermal 2tabilit3
(F-3*3)Fig. P. 8.11.1+(a) : 6i&en $i#$%it
Soln. :
)a* %edra& the o+tp+t circ+it o, the -ig. P. 8.!!.!$)a* :
-edra) onl" the output circuit o$ %ig. &. 8..<.a/ as sho)n
in %ig &. 8..<.b/. 0o) appl" #VL to )rite*
1 + IC -C + VCEQ + IE -E D 1 = 0 ..../
,ut VCEQ = 3 V
( + IC -C + 3 + IE -E = 0
? + IC -C + IE -E = 0 ....(/
(F-2*2!)Fig. P. 8.11.1+(b)
LooCing at %ig. &. 8..<.b/ )e can )rite that*
Vo = VCEQ D IE -E + 1 ....3/
,ut Vo = 0 and VCEQ = 3 V
0 = 3 D IE -E + 1
IE -E = 3 V ....</
Aubstitute E;uation .</ into E;uation .(/ to get*
? + IC -C + 3 = 0
IC -C = 1 V ....'/
9e Cno) that = (00 but )e do not Cno) the value o$ I, to calculate IC and IE.
1. To obtain the &al%e of /, :
-edra) onl" the input side o$ the given circuit as sho)n in
%ig. &. 8..<.c/.
!ppl"ing #VL )e get*
0 + M.?0 C HH ?0 C/ I,N + 0.> + IE -E D 1 = 0
Aubstitute IE -E = 3 V
!nd .?0 HH ?0/ = <' C to get (F-2*21)Fig. P. 8.11.1+($)
0 + .<' C I,/ + 0.> + 3 D 1 = 0
I, = '. ! ....1/
2. To obtain the &al%e of 05 :
!asic )lectronics ,-T./ 802$ Transistor !iasing 1 Thermal 2tabilit3
IE -E = 3 V
-E = =
-E = = (?( ...'ns.
3. To obtain the &al%e of 0" :
IC -C = 1 V
-C = = = = '81.?1 ...'ns.
)b* To obtain the change in .o i, / !"" :
2he ne) values o$ IC and IE are as $ollo)s 4
IC = 00 '. ! = '. m!
and IE = 0 '. ! = '.1 m!
%rom E;uation .3/ )e have*
Vo = VCEQ D IE -E + 1 = 3 D .'.1 0
+ 3
(?(/ + 1
Vo = + .<?3( Volts
Fence change in Vo = + .<?3( + 0 = + .<?3( Volts ...'ns.