n
 (10)
I
C
=
V
CC
V
CE
R
C
(11)
So, form previous discussion we have
19
5.2.1 Saturation Current
When Vds increases to the point where the potential drop across the oxide ot the drain terminal is
equal to Vt, the induced inversion charge density is zero at the drain terminal. The following gures
show these eects
When Vds Becomes large than Vds(sat) value, the point in the channel at which the inversion
charge is just zero moves towards the source terminal. In this case, e enter the channel at the source,
travel through the channel towards the drain and then, at the point where the charge goes to 0, the
e injected into the space charge region where they are swept by the Eeld to the drain contact. The
region of Id vs Vds characteristic is referred to as the saturation region. When Vgs changes, the Id
vs Vds curve will increase so we have
20
5.2.2 Derivation
From Ohms law we have
J
x
= E
x
(12)
where
= e
n
n(y) (13)
The total current is found by
I
x
=
_
y
_
z
J
x
dydz (14)
So,
Q
n
=
_
en(y)dy (15)
where Qn is inversion layer charge per unit area. So,
I
X
= W
n
Q
n
E
x
(16)
From Charge neutrality
Q
m
+ Q
ss
+ Q
n
+ Q
sd
(max) = 0 (17)
From Gausss law _
s
E
n
dS = Q
T
(18)
21
Now, from surfaces 1 & 2, we assume that Ex is essentially a constant along the channel length. The
contributions of surfaces 1 & 2 cancel each other. Surface 3 is in the neutral pregion, so the electric
eld is zero at this surface. Only surface 4 contributes.
_
s
E
n
dS =
0x
E
ox
Wdx = Q
T
(19)
Where, epsillon ox is the permitting of the oxide. The total charge enclosed is
Q
T
= (Q
ss
+ Q
n
+ Q
SD
(max))Wdx (20)
So, from the previous two equations we have
0x
E
0x
= Q
ss
+ Q
n
+ Q
SD
(max) (21)
Now,
E
FP
E
FM
= e(V
GS
V
x
) (22)
Considering the potential barriers we have,
V
GS
V
x
= (V
0x
+
m
) (
E
g
st
fp
)
V
GS
V
x
= V
0x
+ 2
fp
+
mx
where, phi ms is the metal semiconductor work function dierence.
s
= 2
fp
for the inversion condition.
The electric eld in oxide is
E
0x
=
V
0x
t
0x
On combining the equations we have
0x
E
0x
=
0x
t
0x
[(V
GS
V
x
) (
ms
+ 2
fp
)]
So,
I
x
= W
n
C
0x
dV
x
dx
[(V
GS
V
x
) V
T
] (23)
22
Where Ex = dVx/dx and Vt is the threshold Voltage.
So, on integrating
L
_
0
I
x
= W
n
C
0x
Vx(L)
_
Vx(0)
[(V
GS
V
x
) V
T
]dV
x
(24)
Assuming mu n to be a constant above.
For the nchannel device the drain current enters the drain terminal and is a constant along the
entire channel length. Letting Id = Ix the equation becomes
I
D
=
W
n
C
0x
2L
[2(V
GS
V
T
)V
DS
V
2
DS
] (25)
which is valid for V
GS
V
T
and V
DS
(sat) V
DS
.
5.2.3 Finding the Saturation Current
The above equation of current through the drain can be plotted as follows
Since Id is valid below Id(sat)
Id sat can be found by taking the maxima of the above plots. So, from
dI
D
dV
DS
= 0
we get
V
DS
= V
GS
V
T
(26)
The value of Vds is just Vds(sat). For Vds is graVds(sat) the ideal drain current is a constant
and is equal to
I
D
(sat) =
W
n
C
0x
2L
(V
GS
V
T
)
2
(27)
So, nally the plots we obtain are
23
[24,25]
5.3 Characteristics of MESFET (MEtal Semiconductro Field Eect Tran
sistor)
When negative voltage is applied to the gate the e below the gate feels repulsion and positive charge
is left near the schottky junction. This region thus forms a depletion region where no free charge
is present. As the negative voltage magnitude increases the width of depletion layer increases and
nally covers completely the n channel. Thus making the gate to close the conduction. Such gates
are active low gates which are activated only at zero magnitude of applied potential.
Now when nchannel is not depleted then even on the application of small positive voltage at the
drain the majority carrier negative move from the source through nchannel to the drain and thus
conduct electricity and cause current ow. Now, if Vd(Drain Voltage) is increased then the region
near the drain will become reverse biased and thus the depletion region width near this region will
increase.
24
Now if Vd is increased further then a voltage will come at which the depletion region near the
drain will completely cover the n channel. At this condition it is presumed that current will halt at
once, but due to strong electric ied the e will be pulled. Under this condition we reach the saturation
current value and even on any further increase of Vd we wont get any increase in value of Id. Thus
we get the saturation region.
5.3.1 Saturation Voltage
The depletion region width will vary with distance h(x) throughout the channel. hi is function of
Vbi(built In Voltage) and Vgs(Gate Voltage) and hm(max. depletion region width) is given by
h
m
=
2
s
(V
bi
+ V
DS
V
GS
)
eN
d
(28)
Pincho occurs when hm = a. At this point we reach the Saturation condition. So,
a =
2
s
(V
bi
+ V
DS
(sat) V
GS
)
eN
d
(29)
Or,
V
bi
+ V
DS
(sat) V
GS
=
ea
2
N
d
2
s
= V
p0
(30)
So,
V
DS
(sat) = V
p0
(V
bi
V
GS
) (31)
25
5.3.2 Saturation Current
From Ohms Law, the dierential resistance of the channel at a point x in the channel is
dR =
dx
A(x)
(32)
where p is the resistivity and A(x) is cross sectional area.
Also,
=
1
e
n
N
d
A(x) = (a h(x))W
So,
dR =
dx
e
n
N
d
(a h(x))W
(33)
also
dV = I
D1
dR(x)
where Id1 is the constant current throughout the channel.
So,
dV (x) =
I
D1
dx
e
n
N
d
W(a h(x))
(34)
Idx = e
n
N
d
W(a h(x))dV (x) (35)
Using,
h(x) =
_
2
s
(V (x) + V
bi
V
GS
)
eN
d
_
1/2
Where V(x) is the potential in the chennel due to the draintosource voltage. Solving for V(x)
and taking dierential we have,
dV (x) =
eN
d
h(x)dh(x)
s
(36)
and using this in Id1 equation we have
I
D1
=
n
(eN
d
)
2
W
s
[ah(x)dh(x) h(x)
2
dh(x)]
On Integration, we have,
I
D1
=
n
(eN
d
)
2
W
s
_
a
2
(h
2
m
h
2
i
)
1
3
(h
2
m
h
2
i
)
_
(37)
Using
h
2
m
=
2
s
(V
DS
+ V
bi
V
GS
)
eN
d
h
2
i
=
2
s
(V
bi
V
GS
)
eN
d
26
and
V
p0
=
ea
2
N
d
2
s
We can rewrite the above Idq equation as,
I
D1
=
n
(eN
d
)
2
Wa
3
2
s
L
_
_
_
V
DS
V
P0
2
3
_
V
DS
+ V
bi
V
GS
V
p0
_
3/2
+
2
3
_
V
bi
V
GS
V
p0
_
3/2
_
_
_
(38)
we say,
I
P1
n
(eN
d
)
2
Wa
3
6
s
L
as the pinch o current.
And thus we have
I
D1
= I
P1
_
_
_
V
DS
V
P0
2
3
_
V
DS
+ V
bi
V
GS
V
p0
_
3/2
+
2
3
_
V
bi
V
GS
V
p0
_
3/2
_
_
_
(39)
The above equation is valid for
0 V
GS
 V

and
0 V
DS
V
DS
(sat)
Now, as we have shown earlier that the drain becomes pinched o, for the nchannel MESFET
when
V
DS
= V
DS
(sat) = V
P0
(V
bi
V
GS
)
So, in the saturation region the saturation drain current is determined by using Vds=Vds(sat)
I
D1
= I
D1
(sat) = I
P1
_
1 3
_
V
bi
V
GS
V
p0
__
1
2
3
V
bi
V
GS
V
p0
__
(40)
27
For MESFETs the pincho voltages are known as threshold voltages so we have
V
T
= V
bi
V
P0
So,
V
bi
= V
T
+ V
P0
Using this value in the previous equation we have
I
D1
(sat) = I
P1
_
_
_
1 3
_
1
_
V
GS
V
T
V
p0
__
+ 2
_
1
_
V
GS
V
T
V
p0
__
3/2
_
_
_
(41)
The above equation is valid for Vgs is greater than Vt.
When transistor turns on, we have (VgsVt) is less than Vp0. So, the above equation can be ex
panded using Taylor Series and we obtain
I
D1
(sat) I
P1
_
3
4
_
V
GS
V
T
V
P0
__
2
(42)
Substituting Ip1 and Vp0 the above equation becomes
I
D1
(sat) =
n
W
2aL
(V
GS
V
T
)
2
(43)
This can further be written as
I
D1
(sat) = k
n
(V
GS
V
T
)
2
(44)
k
n
=
n
s
W
2aL
The factor kn is called conduction parameter. [24,25]
6 Simulations for MOSFET Using COMSOL Multiphysics
R
In order to get a better picture of how the device is going to perform for a given set of device param
eters, various simulation softwares are available which can help us get a glimpse of how the device
may react on application of certain parameters. This enables us to drive away many of the possible
errors which might come due to petty human error. Such errors can cause huge waste of both human
labour and money. Thus they can increase the manufacturing time signicantly. To overthrow these
sorts of errors, we can rely on good simulation softwares like Comsole Multiphysics
R
.
Now in the following semiconductor device simulation, we will be simulating the DC characteris
tics of a MOSFET.
6.1 Model Specications
This model calculates the DC characteristics of a MOS (metaloxide semiconductor) transistor using
standard semiconductor physics. In normal operation, a system turns on a MOS transistor by applying
a voltage to the gate electrode. When the voltage on the drain increases, the drain current also
increases until it reaches saturation. The saturation current depends on the gate voltage.
28
6.1.1 Parameters Used during the Simulation
Vds = 0[V] is the Draintosource voltage
Vbs = 0[V] is the Basetosource voltage
Vgs = 2[V] is the Gatetosource voltage
phim = 5.0535[V] the Metal work function
Na = 1E17[1/cm3] is the Background doping
Nd = 1E18[1/cm3] is the Maximum donor doping concentration
W mos = 1e6[m] is the width of MOSFET
h mos = 0.2[um] is the height of MOSFET
L mos = 1[um] is MOSFET length
Lg = 0.24e6[m] is Gate length
L s = 0.32[um] is Source length
L d = 0.32[um] is Drain length
eps ins = 4.2 is Insulator relative permittivity
d ins = 5E9[m] is Insulator thickness
6.2 Energy Level Diagram of MOSFET along the center of the device
form the Gate Contact
Form the above gure obtained we can see the energy diagram along the center of the device
from the gate contact for Vgs = 2 V and Vds = 3 V. This gure shows the separation of the quasi
Fermi levels (size of the depletion region) as well as the inversion region where the intrinsic energy
level crosses the electron quasiFermi level (Efn).From this gure one can see the length of inverted
region starting from the surface (y = 0) to the crossing of the intrinsic energy level with the electron
quasiFermi level (y approx  0.03 um).
29
6.3 Current Density of MOSFET and nchannel
The above gure displays the logarithm of the norm of the current density in the device under
the specied conditions. In the gure, one can notice the inverted region that allows the current to
pass between the ndoped regions (drain and source). Here we can clearly see the inverted nchannel
between the two ndoped regions.
30
6.4 Electron Concentration for dierent Drain to Source Voltages
The above gure shows the logarithm of the electron concentration along the inverted channel for
dierent draintosource voltages. We can clearly see that a reduction of the electron concentration
near the drain creating the saturation of the drain current. The gure shows the electrons pinchedo
as the charge near the drain end is reduced by the channel potential, i.e. as the draintosource voltage
increases.
31
6.5 Surface Charge Density of MOSFET
The gure shows the inverted channel (in blue) as well as the depletion region (orange). The red
regions show the closeto neutral areas. The drainside of the device shows a larger depletion region
to compensate the vanishing space charge at the pincho point. We can see a larger depletion width
on the drainside of the MOSFET compared to the source side. This is a consequence of the electrons
drawn from the drainside of the inverted channel.
32
6.6 Current(I
D
) vs Voltage Characteristics(V
DS
)
The above gure shows the I
D
vs V
DS
curve of the device where a the current rises linearly at
low draintosource voltage to slowly saturates as the electron concentration vanishes at the pincho
point
7 Semiconductor Heterostructures
The previous sections helped us get a good understanding of how the basic transistors work. For
us to understand this we must be clear with what is the physics associated with Semiconductor
Heterostructures.
7.1 Heterojunctions
Heterojunctions are two types
Iso type Conductivity types are same bot n or both p.
Aniso type Conductivity types are dierent. One is p and other is n.
33
For Heterostructures to form, both the joining materials must have similar thermal properties. So
that while operation one might not crack over the operation of other.
For Heterojunction the most important requirement is that their lattice should match. If not so,
we will have defective regions. And if the interface is defected we have mobility eects which is not
permissible. Similar to what happens during high doping AlGaN/GaN have perfect match of lattice.
Homojunctions are formed from same material doped dierently. Heterojunctions are formed by
dierent materials which may or may not be dierently doped.
7.1.1 Band Diagram
Let us consider two semiconductors with X1 is greater than X2; Eg1 is smaller than Eg2; then
34
So, here we see a discontinuity in the energy band diagram. This 5 or notch is caused due to
Notch Eect which is explained below.
7.1.2 Understanding the Notch Eect
Let us rst take the example of homojunction. The diagram below describes pn homojunction (The
conduction band only)
The e will keep transferring from the n side to p side till the maximum energy of e concentration
on both sides are equal. And that is when we get the built in potential.
Now in Heterojunction
If notch was not to be considered then only Vbi would have been the built in potential but due
to the notch the built in potential is actually increased.
So, band bending in case of heterojunction is more that that of homojunction. Now, as were the
case in MOSFET here too due to the extra band bending the notch might cross the fermi level and
35
so the portion lower to the fermi level will be accumulated of e. So, basically we try to maximize the
delta Ec. So that e concentration in unbiased condition increases.
Due to the discontinuity delta Ec in the conduction band of AlGaAs and GaAs, the band bend
ing in the undoped GaAs is more than in the GaAs homojunctions of similar doping levels.
Due to this eect, large concentration of e are present at the GaAs surface adjacent to AlGaAs and
they remain there due to the notch in the cconduction band.
The e have been supplied form the doped layer to undoped region (or where doping concentration is
low) as a result ionied impurity scattering eect is absent.
8 HEMT Working Principle
The HEMT is a peculiar device, since it can oer optimal characteristics in terms of both high
voltage, highpower and high frequency operation. Its operation principle is founded on the presence
of the 2DEG at interface of an heterostructure, like for example an AlGaN/GaN system. It is a
three terminal device where the current between the two Ohmic contacts of source and drain, owing
through the 2DEG, is controlled by the electrode of gate (typically a Schottky contact). Practically,
the bias applied to the gate controls the ow of electrons through the channel. The gure shows a
schematic of an HEMT device. To conne the electron ow in the 2DEG and isolate HEMT devices,
deep trenches (cutting the 2DEG) or ion implantation are typically used.
36
The below gure illustrates, in a schematic band diagram of an AlGaN/GaN HEMT structure,
how the 2DEG is inuenced by the dierent gate bias conditions. This schematic is reported for the
case of a ntype doped AlGaN barrier layer. At Vg = 0V there are allowed levels below the Fermi level
in the subbands of the quantum well, resulting in the presence of a high sheet carrier concentration
and in the onstate of the device. By increasing the gate bias (Vg is greater than 0 V), the Fermi
level rises, increasing the density of allowed states below the Fermi level in the conductive band,
and therefore increasing the sheet carrier concentration of the 2DEG. By decreasing the gate bias
V towards negative values (V is less than 0 V) the Fermi level drops depleting the 2DEG, until the
position of the Fermi level lies below the quantum well Under this condition, the level in the energy
subbands are completely empty and the device is in the ostate.
In the following gure we can see the Ids vs Vds characteristics of a HEMT. In the IdsVds
characteristics by applying a positive potential dierence between source and drain (Vds ), the current
will start to ow in the 2DEG. By increasing the drain bias, the current ow in the channel will increase
linearly up to certain value. After this value the current through the channel starts to saturate. The
maximum saturation value Idss depends on the sheet carrier concentration n of the channel. Looking
at the trans characteristics, for a xed Vds the drain current I rises with a parabolic behaviour with
increasing gate bias.
37
The drain current(Ids) can be controlled by the bias applied to the gate electrode. In particular,
Ids decreases with increasing the negative value of the gate bias (Vg), since the region of the channel
under the gate is depleted. The value of Vg which determines the pincho of the channel (where the
sheet carrier concentration in the channel becomes zero) is called threshold voltage (Vth) of the device.
In a AlGaN/GaN HEMT at any point x along the channel, neglecting the extrinsic series resistance
of source and drain, the sheet carrier concentration depend by the applied Vg
n
s
(x) =
0
AlGaN
qd
AlGaN
[V g V th V (x)] (45)
where d
AlGaN
is the distance of the gate to the 2DEG channel, corresponding to the AlGaN
thickness. The gatetochannel capacitance (per unit of area) can be approximately assumed as
independent of n
s
using the expression C
2DEG
=
0
AlGaN
/qd
AlGaN
.
It is now possible to dene the threshold voltage of the device, as the gate bias necessary to turno
the 2DEG, resulting in a n
s
=0. Looking at the AlGaN/GaN schematic band diagram showed in above
gure, it is clear that the threshold voltage depends on dierent parameters like the Schottky barrier
height
B
, the conduction band oset at the AlGaN/GaN interface delta Ec, the concentration of
38
donor atoms in the AlGaN layer N
D
, the relative dielectric constant
AlGaN
, the thickness d
AlGaN
and
the Al concentration of the AlGaN. Besides these parameters, in order to have a complete expression
of the threshold voltage the contribution of the polarization induced charge density must be taken
into account. Thus simply the threshold voltage can be expressed as
V
th
=
B
E
C
qN
D
AlGaN
d
2
AlGaN
2
0
AlGaN
d
AlGaN
(46)
Assuming a constant mobility and remembering the Ohmic law, for a twodimensional electron
gas the conductivity of the channel will be directly proportional to the sheet carrier concentration
n
s
and to the electrons mobility in the channel
= q.n
s
. (47)
It is possible to write the drain current as:
I
D
= .W.Q(x)
dV (x)
dx
(48)
where Q(x) is the charge considered in the channel. Integrating both sides in the all length of the
channel and considering the expression of Q(x) we have
I
D
= .
W
L
.C
2DEG
_
V
g
V
th
V
DS
2
_
V
DS
(49)
The drain current of a HEMT in linear region is often expressed in a form similar to that used for
a MOSFET, i.e., :
I
D
= .
W
L
.C
2DEG
_
V
g
V
th
V
DS
2
_
V
DS
(50)
Increasing V
DS
upto certain value called V
DSsat
, the drain current I
D
is constant and so the derivate
of I
D
will be zero.
dI
D
dV
DS
= q
W
L
C
2DEG
(V
g
V
th
V
DS
) = 0 (51)
and V
DSsat
is given by
V
DSsat
= V
g
V
th
(52)
At bias condition of V
DSsat
the I
D
will be expressed as
I
DSS
=
1
2
W
L
C
2DEG
(V
g
V
th
)
2
(53)
The above equation is approximation valid for long channel devices. However, for HEMTs with
a short gate length (l is less than 10 um) the electron transport occurs under high electric elds and
the expression of the saturation current is dierent. If the electric elds exceeds a certain critical
value, the speed of the electrons in the 2DEG begins to saturate. Taking into account the eects of
the saturation velocity model the saturation current is expressed as
I
DSS
= q.n
s
.v
sat
(54)
Considering the expression of the drain current, it is also possible to dene the transconductance
of the device as the change in drain current I
D
resulting from a variation of gate voltage V
g
for a xed
V
DS
:
g
m
=
I
D
V
g
(55)
39
at constant V
DS
.
Similarly the output conductance of the device is dened as the I
D
response to a V
DS
variation
for a xer gate bias V
g
g
d
=
I
D
V
DS
(56)
at constant V
g
. [26]
9 Conclusion
As the need for power is ever growing, present technology based on Si is not able to provide sucient
power handling and high frequency operation capabilities. Therefore better alternative to the domi
nant Si based technology has to be looked forward to. For this purpose we explored some alternatives
and came to the conclusion that WBG semiconductor like GaN can help us in this deed.
We saw that 2DEG which is formed at the interface of AlGaN/GaN heterostructure can be used
to make high power, high frequency transistors, based on HEMT principle. In order to understand
about the working principle of HEMTs we went to the basics and started with BJT then proceeding
to MOSFETs, MESFETs and nally came to HEMT. On understanding the working principles of all
the devices we came to know that in both MOSFET and HEMT 2DEG are formed, but because in
MOSFET the 2DEG is formed in the doped region, the scattering there is high, which results in lower
saturation velocity. Where as in HEMTs the 2DEG is formed in the undoped region which leads to
lack of ion scattering and thus the mobility can be raised highly. Although the low eld mobility
of GaN is lower as compared to other IIIIV materials, but the high saturation velocity and higher
bandgap makes it ideal candidate for high power and high frequency device.
We compared the various gure of merits for dierent capable contenders and again came to the
conclusion that our choice for GaN was the best. Further the possibility increasing the polariza
tion (piezoelectric polarization) by inducing stress or strain on the material makes route for further
possibilities which can help in tweaking or enhancing the properties of AlGaN/GaN HEMTs.
40
10 References
[1] J. Millman and C.C. Halkias in Electronic Devices and Circuits, Tata McGrawHill
Publishing Company Ltd., New Delhi, 1991.
[2] http://www.cree.com/LEDChipsandMaterials
[3] Wide Energy Bandgap Electronic Devices Fan Ren and John C. Zolper (Pg. 13 15)
(Book Source: books.google.co.in/books?isbn=9812382461)
[4] http://www.ioffe.ru/SVA/NSM/Semicond/GaN/bandstr.html
[5] GaNBased RF Power Devices and Amplifiers By Umesh K. Mishra, Fellow IEEE,
Likun Shen, Thomas E. Kazior, and YiFeng Wu. (Source: http://ieeexplore.ieee.org/
stamp/stamp.jsp?tp=&arnumber=4414367)
[6] Power Electronic Europe Issue 4, 28 (2010), Alberto Guerra and Jason Zhang,
International Rectifier, El Segundo, USA (Source: http://www.powermag.com/pdf/
feature_pdf/1283339996_IR_Feature_Layout_1.pdf)
[7] Growth of GaN on SiC(0001) by Molecular Beam Epitaxy
(Source: http://onlinelibrary.wiley.com/doi/
10.1002/1521396X(200112)188:2%3C595::AIDPSSA595%3E3.0.CO;2S/pdf)
[8] High quality AIN and GaN epilayers grown on (001) sapphire (100) and (111)
silicon substrates (Source: http://scitation.aip.org/content/aip/journal/apl/
66/22/10.1063/1.114242)
[9] Effect of Si doping on strain, cracking, and microstructure in GaN thin films
grown by metalorganic chemical vapor deposition (Source: http://scitation.aip.org/
content/aip/journal/jap/87/11/10.1063/1.373529)
[10] Metalorganic Chemical Vapor Phase Epitaxy of CrackFree GaN on Si (111)
Exceeding 1 m in Thickness (Source: http://iopscience.iop.org/13474065/39/11B/
L1183)
[11] Metalorganic chemical vapor deposition of GaN on Si111: Stress control and
application to fieldeffect transistors (Source: http://scitation.aip.org/content/
aip/journal/jap/89/12/10.1063/1.1372160)
[12] The nature of arsenic incorporation in GaN (Source: http://scitation.aip.org/
content/aip/journal/apl/79/20/10.1063/1.1418030)
[13] AlGaN/GaN High Electron Mobility Transistors Grown on 150 mm Si(111)
Substrates with High Uniformity (Source: http://iopscience.iop.org/
13474065/47/3R/1553)
41
[14] Influence of sapphire nitridation on properties of gallium nitride grown by
metalorganic chemical vapor deposition (Source: http://scitation.aip.org/content/
aip/journal/apl/68/11/10.1063/1.115687)
[15] GaNBased Devices on Si (Source: http://onlinelibrary.wiley.com/doi/
10.1002/1521396X(200212)194:2%3C361::AIDPSSA361%3E3.0.CO;2R/pdf)
[16] Effect of the N/Al ratio of AlN buffer on the crystal properties and stress
state of GaN film grown on Si(111) substrate (Source: http://
www.sciencedirect.com/science/article/pii/S0022024803017433)
[17] Activation energies of Si donors in GaN (Source: http://scitation.aip.org/
content/aip/journal/apl/68/22/10.1063/1.115805)
[18] Thick GaN Epitaxial Growth with Low Dislocation Density by Hydride Vapor Phase
Epitaxy (Source: http://iopscience.iop.org/13474065/36/7B/L899)
[19] Wide Energy Bandgap Electronic Devices Fan Ren and John C. Zolper (Book
Source: books.google.co.in/books?isbn=9812382461)
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polarization charges in N and Gaface AlGaN/GaN heterostructures (http://
scitation.aip.org/content/aip/journal/jap/85/6/10.1063/1.369664)
[21] Optical constants of epitaxial AlGaN films and their temperature dependence
(Source: http://scitation.aip.org/content/aip/journal/jap/82/10/10.1063/1.366309)
[22] Polarizationinduced electron populations (Source: http://scitation.aip.org/
content/aip/journal/apl/77/7/10.1063/1.1288817)
[23] Spontaneous polarization and piezoelectric constants of IIIV nitrides
(Source: http://journals.aps.org/prb/pdf/10.1103/PhysRevB.56.R10024)
[24] Semiconductor Physics and Devices: Basic Principles  Donald A. Neaman (Book)
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Circuits (Video Lectures form IIT Madras) (Source: http://nptel.ac.in/video.php?
subjectId=117106089)
[26] AlGaN/GaN heterostructures for enhancement mode transistors (Source: http://
dspace.unict.it/bitstream/10761/1347/1/GRCGPP82S30C35MAGiuseppe%20Greco%
20AlGaNGaN%20heterostructures%20for%20enhancement%20mode%20transistors.pdf
42
11 Important Points
Si based technology has lived through its glorious period and because of its low power handling
capacity, its low band gap and intrinsic carrier concentration of the material it has a to have a
junction temperature less than 200 C to work properly.
WBG semiconductors like SiC, GaN etc. overcome the above short comes of Si and can copeup
with increased power, frequency and operating temperatures. SiC technology is the most ad
vance amongst all the WBG SCs but it too suers from micropipes crystal defect.
GaN and its alloys have not been able to advance as much as SiC because of various physical
issues realted to their surface and interface. Also, because of the lack of free standing GaN
substrate heteroepitaxy has to be performed on substrates like Al2O3, SiC or Si.
Although the bulk mobility of GaN at low elds is much lower than that of other IIIIV materials,
but the high saturation velocity and higher band gap makes it an ideal contender for high
frequency power devices. Also ability to form heterostructures of AlGaN/GaN leads to the
formation of 2DEG at the interface which can be further used in the fabrication of HEMT
devices.
2DEG is due to the formation of both spontaneous and piezoelectric polarization. Which can
be used to make HEMTs.
There are three possibilities for IIINitrides namely zincblend, wurtzite and rock salt, of which
GaN exists in the wurtzite form which is thermodynamically most stable at room temperature
and pressure.
Because of the absence of inversion symmetry along the caxis it is easily possible to distinguish
between dierent orientations of GaN namely Gfaced and Nfaced, depending if the material
is grown with Ga on top or N on top corresponding to (0001) and (0001) crystalline faces.
There exists a polarization in the GaN crystal due to the dierence in the electronegativity
of the atoms. This leads to a polarization known as spontaneous polarization which in turn
depends on the c/a ratio. The less the ratio the more the polarization.
There exists another polarization because of the induced stress and strain which leads to change
in the c/a ratio. This becomes considerably important in AlGaN/GaN heterostructres for 2DEG.
The wide band gap of GaN (3.30 eV) is responsible for the high value of critical electric eld
(3.3 MV/cm) which is order of magnitude higher than that of Si. The high critical electric eld
makes it suitable for high voltage devices.
Also, because of low intrinsic electron concentration the maximum operation temperature can
be made to rise without leading to rise in leakage current.
The relatively good value of relative permittivity makes it a good contender for capacitive loading
of transistor and passive components. Also, the thermal conductivity value being almost equal
to that of Si makes it capable to better transfer the heat produced and thus not making it to
degrade at high temperature working conditions.
Also, its capability to form AlGaN alloys makes the band gap alteration easy which comes handy
for the formation of heterostructures needed for the formation of 2DEG.
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In principle the on state resistance at a given voltage of GaN can outperform competing Si and
SiC devices. Which will reduce the power losses.
In order to better compare the power electronic performance for dierent semiconductor ma
terials gure of merit are employed. In particular for high power and high frequency JFOM is
an indication of the maximum capability to energize carriers by electric eld, BFOM measures
the minimum conduction losses during DC operation and BHFOM give information about the
minimum conduction losses during high frequency operation. On comparing these values with
Si and SiC we can easily come to the conclusion that GaN is a better choice.
The inability to form free standing GaN substrate, other materials must be used as substrate
for the growth of GaN.
Hexagonal silicon carbide (6HSiC) can be used as a substrate as the lattice mismatch for (0001)
oriented GaN lms is small and the thermal conductivity is higher. But the catch here is the
high defect density (10
7
cm
2
for screw dislocations and 10
9
cm
2
for edge dislocation density).
Si can also be used as a substrate. But owing to large lattice and thermal expansion coecient
mismatch can lead to defects and cracks on the material.
To relieve the tensile stress and achieve crackfree GaN heterostructures, several kind of tran
sition layers can be used, such as low temperature AlN, graded AlGaN buers or AlGaN/GaN
superlattices.
MOCVD is now the most popular method to grow GaN owing to its good quality and reasonable
growth rates.
By the formation of 2DEG at the junction interface we have a pool of electrons captured in the
quantum well which is free to ow in the plane parallel to the junction interface.
The benet of 2DEG is that because of the absence of ionic counterparts in the well the scattering
is reduced signicantly which contributes to better eciency.
It is because of the piezoelectric polarization the formation of high sheet charge density is
possible even without using undoped layers.
Saturation of current in BJT (NPN) happens when base is higher than emitter, but collector is
not higher than base.
Saturation in case of MOSFET happens when the width of the channel below the oxide layer
near the collector becomes zero, this width is related to Vds and Vgs.
Saturation current in case of MESFET is because of the depletion of nchannel below the Gate,
where on the application of required voltage Vgs the width of nchannel can be controlled. Also
the potential dierence Vds causes the nchannel to pinch o near the drain.
It is the formation of Notch near at the interface of heterojunction which acts as the place for
formation of 2DEG.
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