555 timer IC

Internal block diagram

The 555 timer IC is an integrated circuit (chip) used in a variety of timer, pulse generation, and oscillator
applications. The 555 can be used to provide time delays, as an oscillator, and as a flip-flop element.
Derivatives provide up to four timing circuits in one package.
Introduced in !"# by $ignetics, the 555 is still in %idespread use, thanks to its ease of use, lo% price, and
good stability. It is no% made by many companies in the original bipolar and also in lo%-po%er &'($
types. )s of #**+, it %as estimated that billion units are manufactured every year.
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Usage
Pins
.inout diagram
Pin
Name Purpose
/0D /round, lo% level (* 1)
# T2I/ (3T rises, and interval starts, %hen this input falls belo% 4+ V
&&
.
+ (3T This output is driven to appro5imately ."1 belo% 6 V
&&
or /0D.
7 28$8T
) timing interval may be reset by driving this input to /0D, but the timing does not begin again
until 28$8T rises above appro5imately *." volts. (verrides T2I/ %hich overrides T92.
5 &T2: ;&ontrol; access to the internal voltage divider (by default, #4+ V
&&
).
< T92 The interval ends %hen the voltage at T92 is greater than at &T2:.
" DI$ (pen collector output= may discharge a capacitor bet%een intervals. In phase %ith output.
> V
&&
.ositive supply voltage is usually bet%een + and 5 1.
0ote-.I0 5 is also called control voltage pin? @y applying a voltage to the &(0T2(: 1(:T)/8 input, pin
5, you can alter the timing characteristics of the device. In most applications, the &(0T2(: 1(:T)/8

input is not used. It is usual to connect a * nA capacitor bet%een pin 5 and * 1 to prevent interference. The
&(0T2(: 1(:T)/8 input can be used to build an astable %ith a freBuency modulated output.
Modes
The 555 has three operating modesC
Monostable modeC in this mode, the 555 functions as a ;one-shot; pulse generator. )pplications
include timers, missing pulse detection, bouncefree s%itches, touch s%itches, freBuency divider,
capacitance measurement, pulse-%idth modulation (.D') and so on.
AstableC free running modeC the 555 can operate as an oscillator. 3ses include :8D and lamp
flashers, pulse generation, logic clocks, tone generation, security alarms, pulse position modulation
and so on. The 555 can be used as a simple )D&, converting an analog value to a pulse length. 8.g.
selecting a thermistor as timing resistor allo%s the use of the 555 in a temperature sensorC the period
of the output pulse is determined by the temperature. The use of a microprocessor based circuit can
then convert the pulse period to temperature, lineariEe it and even provide calibration means.
Bistable mode or $chmitt triggerC the 555 can operate as a flip-flop, if the DI$ pin is not connected
and no capacitor is used. 3ses include bounce-free latched s%itches.
Monostable
$ee alsoC 2& circuit
$chematic of a 555 in monostable mode
The relationships of the trigger signal, the voltage on & and the pulse %idth in monostable mode
In the monostable mode, the 555 timer acts as a ;one-shot; pulse generator. The pulse begins %hen the 555
timer receives a signal at the trigger input that falls belo% a third of the voltage supply. The %idth of the
output pulse is determined by the time constant of an 2& net%ork, %hich consists of a capacitor (&) and a
#
resistor (2). The output pulse ends %hen the voltage on the capacitor eBuals #4+ of the supply voltage. The
output pulse %idth can be lengthened or shortened to the need of the specific application by adFusting the
values of 2 and &.
,5-
The output pulse %idth of time t, %hich is the time it takes to charge & to #4+ of the supply voltage, is given
by
%here t is in seconds, 2 is in ohms and & is in farads.
Dhile using the timer I& in monostable mode, the main disadvantage is that the time span bet%een any t%o
triggering pulses must be greater than the 2& time constant.
,<-
Bistable
$chematic of a 555 in bistable mode
In bistable mode, the 555 timer acts as a basic flip-flop. The trigger and reset inputs (pins # and 7
respectively on a 555) are held high via .ull-up resistors %hile the threshold input (pin <) is simply
grounded. Thus configured, pulling the trigger momentarily to ground acts as a GsetG and transitions the
output pin (pin +) to 1cc (high state). .ulling the reset input to ground acts as a GresetG and transitions the
output pin to ground (lo% state). 0o capacitors are reBuired in a bistable configuration. .in 5 (control) is
connected to ground via a small-value capacitor (usually *.* to *. uA)= pin " (discharge) is left floating.
Astable
$tandard 555 astable circuit
+
In astable mode, the 555 timer puts out a continuous stream of rectangular pulses having a specified
freBuency. 2esistor 2

is connected bet%een 1
&&
and the discharge pin (pin ") and another resistor (2
#
) is
connected bet%een the discharge pin (pin "), and the trigger (pin #) and threshold (pin <) pins that share a
common node. 9ence the capacitor is charged through 2

and 2
#
, and discharged only through 2
#
, since pin
" has lo% impedance to ground during output lo% intervals of the cycle, therefore discharging the capacitor.
In the astable mode, the freBuency of the pulse stream depends on the values of 2

, 2
#
and &C
,"-
The high time from each pulse is given byC
and the lo% time from each pulse is given byC
%here 2

and 2
#
are the values of the resistors in ohms and & is the value of the capacitor in farads.
The po%er capability of 2

must be greater than .

.articularly %ith bipolar 555s, lo% values of 2 must be avoided so that the output stays saturated near Eero
volts during discharge, as assumed by the above eBuation. (ther%ise the output lo% time %ill be greater than
calculated above. It should be noted that the first cycle %ill take appreciably longer than the calculated time,
as the capacitor must charge from *1 to #4+ of 1
&&
from po%er-up, but only from 4+ of 1
&&
to #4+ of 1
&&
on
subseBuent cycles.
To achieve a duty cycle of less than 5*H a diode (that is fast enough for the application) can be added in
parallel %ith 2
#
to%ards the capacitor. This bypasses 2
#
during the high part of the cycle so that the high
interval depends appro5imately only on 2

and &. The presence of the diode is a voltage drop that slo%s
charging on the capacitor so that the high time is longer than the often-cited ln(#)I2

& J *.<! 2

&. The lo%

time is the same as %ithout the diode as sho%n above. Dith a diode, the high time is
%here 1
diode
is determined %hen the diode has a current of 4# of 1
cc
42

. )s a e5treme e5ample, %hen 1

cc
J 5
and 1
diode
J *.", high time J .** 2

& %hich is 75H longer than the ;e5pected; *.<!+ 2

&. )t the other

e5treme, %hen 1
cc
J 5 and 1
diode
J *.+, high time J *."#5 2

&, 7.<H longer. The eBuation reduces to *.<!+

2

& if 1
diode
J *.
The operation of 28$8T in this mode is not %ell defined, some manufacturersG parts %ill hold the output
state to %hat it %as %hen 28$8T is taken lo%, others %ill send the output either high or lo%.
Specifications
7
These specifications apply to the 08555. (ther 555 timers can have different specifications depending on
the grade (military, medical, etc.).
$upply voltage (V
&&
) 7.5 to 5 1
$upply current (V
&&
J 65 1) + to < m)
$upply current (V
&&
J 65 1) * to 5 m)
(utput current (ma5imum) #** m)
'a5imum .o%er dissipation <** mD
.o%er consumption (minimum operating) +* mDK51, ##5 mDK51
(perating temperature * to "* L&
Example applications
Pulse-idt! modulator
The 555 can be used to generate a variable .ulse-%idth modulation (.D') signal using a fe% e5ternal
components. The chip alone can drive small e5ternal loads or an amplifying transistor for larger loads.
The reset pin is connected to 61, so it has no effect on the circuitGs operation.
Dhen the circuit po%ers up, the trigger pin is :(D as capacitor & is discharged. This begins the oscillator
cycle, causing the output to go 9I/9.
Dhen the output goes 9I/9, capacitor & begins to charge through the right side of 2 and diode D#.
Dhen the voltage on & reaches #4+ of 61, the threshold (pin <) is activated, %hich in turn causes the output
(pin +), and discharge (pin ") to go :(D.
Dhen the output (pin +) goes :(D, capacitor & starts to discharge through the left side of 2 and D.
Dhen the voltage on & falls belo% 4+ of 61, the output (pin +) and discharge (pin ") pins go 9I/9, and
the cycle repeats.
5
.in 5 is not used for an e5ternal voltage input, so it is bypassed to ground %ith an *.*uA capacitor.
0ote the configuration of 2, D, and D#. &apacitor & charges through one side of 2 and discharges
through the other side. The sum of the charge and discharge resistance is al%ays the same, therefore the
%avelength of the output signal is constant. (nly the duty cycle varies %ith 2.
The overall freBuency of the .D' signal in this circuit is determined by the values of 2 and &. In the
schematic above, this has been set to 77 9E.
To compute the component values for other freBuencies, use the formulaC
AreBuency J .77 4 (2 I &)
In this circuit, the output pin is used to charge and discharge &, rather than the discharge pin. This is done
because the output pin has a ;totem pole; configuration. It can source and sink current, %hile the discharge
pin only sinks current. 0ote that the output and discharge pins go 9I/9 and :(D at the same time in the
oscillator cycle.
The discharge pin is used to drive the output. In this case, the output is a I2AM7<0 '($A8T. The gate of
the '($A8T must be pulled high as the discharge pin is open collector only. @eing an 0 channel '($A8T,
the I2AM7<0 %ill conduct from drain to source %hen the gate pin rises above 7 volts or so. It %ill stop
conducting %hen the gate voltage falls belo% this voltage. The configuration of the output also serves to
invert the signal from the 555 circuit.
There you have it, a simple 555 .D' oscillator? I hope this is helpful and generates more interest in
electronics and robotics. Nuestions and suggestions can be posted to the D.2/ mailing list. &omplaints
should be kept to yourself. C-)
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