NATIONAL INSTITUTE OF TECHNOLOGY, ARUNACHAL PRADESH
(Established by Ministry of Human Resources Development,
Govt. Of India) End Semester Examination 2013 5 th Semester Microprocessor, Microcontroller & Embedded System (ECE - 501) Full Marks: 100 Time Allowed: 3 hours
(Answer as much as you can)
1. Answer the following: (1 x 10 = 10)
a) How many T-states are required to execute the instruction LHLD 2005 H .? b) In 8085 which pin is used to suspend the current task & execute the emergency task? c) Draw the execution diagram of LDAX B. d) During POP ing, the stack operates in a ------------- style. i) Use then decrement ii) Decrement then store iii) Increment then store iv) Use then increment e) Give an example of non maskable interrupt. f) What is the value of D 7 bit of CWR in IO mode? g) What is the full form of ICW in 8259A chip? h) What is the function of PC? i) What do you mean by a machine cycle? j) How many memory locations are available in 8085 microprocessor?
2. Answer the following: (2 x 5 = 10) a) Differentiate between Microprocessor and Microcontroller. Draw the timing diagram of Memory Write Cycle. b) Why demultiplexing of AD 0 AD 7 is done? State the function of the pin INTR in 8085. c) Calculate the number of flipflops required to design a memory organization of 64 kB, where each block of memory consists of 1024 byte.
3. Answer the following: (2 x 5 = 10) a) What do you mean by polling? What do you mean by mode set register of 8257. b) What do you mean by branching and looping in a program? Write a program to mask off higher and lower 2 bits of 1s complement value of 54H available in memory location 201B H . c) State the function of this program. Will it be executed? MVI B, 0A H
XRA A Loop : MOV A, B ADI 01 H
MOV B, A DCR B JNZ Loop HLT
4. Discuss the necessity of all the bits of CWR in 8255. Explain Mode 2 & Mode 0 with their bus interface diagram. (4+3+3) 5. Explain the interfacing diagram of seven segment display. Write a program to perform addition between two array, each array is having 12 numbers. 1 st array starts from 2000H, 2 nd array starts from 2010H. Store the result in the 3 rd array which starts from 2020H. What do you mean by a tri-state buffer? (5+4+1)
6. Discuss the memory mapped IO technique. Differentiate it with IO mapped IO. Find the hexadecimal value of X in the following program if the CLK frequency is 2 MHz and the total delay is 100.46 ms.
MVI B, X ----------- 7 T LOOP2 : MVI C, FF H ----------- 7 T LOOP1 : DCR C ----------- 4 T JNZ LOOP1 ----------- 10 / 7 T DCR B ----------- 4 T JNZ LOOP2 ----------- 10 / 7 T (3+3+4)
7. Draw the internal architecture of 8085. Discuss all the status flags of 8085 with example. (5+5)
8. Design a memory organisation of 64 kB, where each block of memory is of 16 kB. Calculate the number of chips needed to design 8 kB memory if the memory chip size is (1024 x 1). Write a program to count the number of 1s available in a particular number using RAL instruction. Set the higher & lower three bits of the result you have obtained and store it in any memory locations. (4+3+3)
9. Draw and discuss the timing diagram of MOV M, A. Discuss the generation of control signals in 8085. Design a diagram so that 8 electricals components can be controlled through programming in 8085. (4+3+3)
10. State the BSR mode of 8255. What is a stack? On what principle does it work? Analyse the following program and find the content of accumulator after execution. (3+2+1+4) MVI C, 0A H
MVI A, 07 H
RLC LOOP: DCR C JNZ LOOP MOV B, A RLC RLC RLC ORA B HLT 11. Explain the block diagram of chip 8259A. State RAL instruction with example. Briefly discuss the DMA operation. (5+2+3)
12. Explain the operation of a Bi-directional Buffer Chip. Discuss the operation of RIM & SIM instruction. Differentiate between Maskable and non-maskable interrupt. (3+(2+2)+3)
13. Explain the addressing modes of 8051 microcontrollers. Write a program to perform Fibonacci Series upto 25 th
term without storing a 0 or 1 in any memory location. Write a program to demonstrate the following series upto 10 th term and show them in the successive memory locations 12, 27, 57, 117 .. (4+3+3)
14. State vectored interrupt. Control bus is always unidirectional. Justify the statement. Design a interfacing diagram for the DIP switches. Write a assembly language program to perform multiplication between two 8 bit numbers. (2+2+3+3)