ECE4321/5321 Design and Analysis of Analog Integrated Circuits

Fall 2014
Department of Electrical and Computer Engineering, Texas Tech University

Instructor: Dr. Changzhi Li
Office: EE211
Email: changzhi.li@ttu.edu
Tel: 806-834-8682

Class Meeting Time: TR 9:30~10:50AM
Class Room: Terry Fuller Petroleum Engineering Research 110
Office Hours: T 3~4 pm @ EE211, or by appointment
Class Website: Blackboard
Teaching Assistant: Chenhui Liu (chenhui.liu@ttu.edu), office hour Wednesday 1:30~2:00 pm @ EE250

Prerequisite: EE 3312 or equivalent

Required Textbooks:
o Behzad Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, 2000

Reference Books:
o David A. Johns and Ken Martin, Analog Integrated Circuit Design, Wiley, 1996.
o Paul R. Gray, Paul J. Hurst, Stephen H. Lewis, and Robert G. Meyer, Analysis and Design of Analog
Integrated Circuits, John Wiley & Sons, fourth edition, 2001.

Expected Learning Outcomes
Upon completion of this course, students will be able to analyze and design analog integrated circuit
subsystems. Students will also be able to apply CAD tool (Cadence) and write Skill script for schematic
simulation and layout of analog IC subsystems.

Grading for EE4321:
Homework (7-8 assignments), 15 %
In-class exams (three exams counted at 25% each), 75 %
Final exam (design project): 10%

Grading for EE5321:
Homework (7-8 assignments), 10 %
In-class exams (three exams counted at 25% each), 75 %
Final exam (design project and presentation): 15%

Exam Policy:
Four in-class exams will be offered (80 minutes each). The three with the highest score will be automatically
counted to a students final grade. Student can skip the last exam, which is a makeup exam, if he/she is
satisfied with the previous three. Refer to Preliminary Course Schedule for tentative exam dates.

Academic Honesty
It is the aim of the faculty of Texas Tech University to foster a spirit of complete honesty and a high standard of
integrity. The attempt of students to present as their own any work that they have not honestly performed is
regarded by the faculty and administration as a serious offense and renders the offenders liable to serious
consequences, possibly suspension.

Accommodations for Students with Disabilities
Any student who because of a disability may require special arrangements in order to meet course requirements
should contact Dr. Li as soon as possible to make any necessary accommodations. The student should present
appropriate verification from the ACCESS TECH office.

Methods of Assessment of Learning Outcomes
The learning outcome will be evaluated based on students performance in homework and exams (fundamental
knowledge) and design projects (practical skills).

Preliminary Course Outline (subject to changes)
1 Introduction
2 PN junction, FET I-V models, and small-signal analysis
3 CMOS amplifiers, cascodes, differential amplifier, active loads
4 Feedback, current mirrors, bias circuits
5 Frequency response, stability, and frequency compensation
6 Noise and mismatch
7 Operational amplifiers, differential circuits, common-mode feedback (CMFB)
8 Filter introduction
9 Active filters
10 Gm-C filters, gyrator, TIA, and fully differential filters
11 Switched-capacitor circuits
12 Switched-capacitor filters, amplifiers, and comparators
13 Data converter fundamental
14 DACs
15 ADCs: Nyquist rate ADCs and sigma-delta converters
16 Project presentation

Preliminary Course Schedule (subject to change)
August
M Tuesday W Thursday F
27: Introduction, PN junction 29: FET I-V model, small signal analysis

September
M Tuesday W Thursday F
3: Single stage amplifiers 5: Cascode, current mirror, differential amplifier
10: Two stage amplifier/EDA tutorial 12: Feedback
17: Exam #1 19: Feedback
24: Frequency response 26: Frequency response

October
M Tuesday W Thursday F
1: Frequency response of feedback 3: Frequency response of feedback
8: Stability and frequency compensation 10: Stability and frequency compensation
15: EDA tutorial, review 17: Exam #2
22: Slew rate, PSRR, more opamp examples 24: Noise
29: Noise, voltage and current reference 31: Integrated filter design

November
M Tuesday W Thursday F
5: Integrated filter design 7: EDA tutorial, review
12: Exam #3 14: Nyquist rate ADCs
19: Oversampling ADCs, sigma-delta converters 21: Oversampling ADCs, sigma-delta converters
26: EDA tutorial, review 28: Thanksgiving no class

December
M Tuesday W Thursday F
3: Exam#4
Final Exam: Monday December 9, 7:30am~10:00am