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RFIC Design Challenges and Future Trends

LIANG Beici
(Tianjin University, School of Electronic Information Engineering, Class 1 of IC, 3010204330)

AbstractThe explosion of interest in radio
frequency integrated circuits (RFIC) in the last
decade has been driven by the expansion of the
market for untethered communications in a variety
of forms. I n this paper, we review the history of
wireless communication. The current state of RFIC
design directions are discussed, such as SoC, SiP,
UWB and so on. Finally, with the list of the
challenges we are facing now, future trends are
predicted.
Key wordswireless communication, SoC, SiP,
CMOS, 3-D, UWB, challenges, future trends.

I Introduction
Nowadays, there is a increasing development and
research in the area of RF, which has progressed
significantly because of the growing demand for
applicability in wireless communication technologies.
Both in wireless systems as well as semiconductor
processes, wireless solutions have become a
manifestation of integrated design philosophies in the
areas of analog, microwave, and communication
system theory.
RFIC is an integrated circuit to deal with the radio
frequency and analog signals with the methods of
amplification, transformation, calibration, compare
and so on, based on the CMOS, SiGe, GaAs and some
other advanced semiconductor technologies.
The passage will focus on the reality when we start
describing choices, compromises, and challenges that
a design engineer will face during the process of
developing a cost-effective and marketable receiver
product in the form of an integrated circuit.

II The History of Wireless
Communication
The basic developments in the area of wireless
communication date back to the early 20
th
century.
Most of the basic principles of sophisticated radio
architecture, as we see it today, were developed using
vacuum tubes around 1930. Wireless technology was
born around 1900 in a very primitive form according
to the foundation laid down by Maxwell (1883), the
wave propagation and wireless telegraphy by Hertz,
Marconi, and others. During the 1920s and 1930s,
Armstrongs superheterodyne receiver demonstrated in
1924 underwent refinement for single vacuum tube
receivers. Then a system of five vacuum tubes was
used by the standard low-end consumer AM tunable
radio for over two decades
[1]
. The invention of the
transistor by Bardeen, Brattain, and Schockley in 1948
changed the world of vacuum tubes as a major
milestone. However, implementing radios was still a
farsighted vision at that time. More mature the
semiconductor technologies became, more circuit
integration took place, and more high speed
microprocessors the trend moved forward. Started
with small-scale integration in the standard IC, then
demands for ubiquitous computing and wireless
applications increased with the tremendous growth in
the VLSI side. During the early 1980s, direct
conversion receivers were developed at Motorola
which may implement compact radios. To date, the
superheterodyne architecture dominates the industry in
wireless communication technologies, as most of the
direct conversion architecture realizations are still
researching.
With the growing demand for wireless technology,
direct conversion architecture is attractive for the
future. Emerging applications including wideband
code division multiplexing (WCDMA), multiband,
ultrawide band (UWB), and 60GHz WLAN
technology, are being targeted to low supply voltages,
as a consequence of shrinking dimensions of the
transistors, and to realize low-power solutions. The


direct conversion architecture has the potential to meet
the needs of most of the above mentioned
applications.
Semiconductor technologies have also experienced
tremendous evolution over the past decade. Starting
with GaAs based technologies for high-frequency
design, the focus has slowly shifted from -
semiconductors to silicon-based technologies for
lower cost and higher integration during the early
1990s. Currently available silicon-based technologies,
which show enormous potential for RF technologies,
include standard digital CMOS, silicon-on-insulator
(SOI), and silicon-germanium (SiGe). Bulk CMOS
technologies have been much more attractive for RF
design during recent times because of low cost and
other potential advantages related to continued scaling
in the deep-submicron (DSM) regime. RF circuit
implementations in standard CMOS technologies have
developed considerably well over the past couple of
years
[2]
. However, there is still a question about how
much of the RF CMOS implementation will be indeed
adopted by the industry, considering the lower yield
and reliability of such technologies for high-frequency
analog and RF applications.
Therefore, think carefully about advances in the
RFIC world. It is noteworthy that the very basic
principles of circuit design have not changed
significantly from the 1920s, but their applications
have.

III Current State of RFIC
With the development described above, the RFIC
has been converted from a discrete device into a
multifunction integrated circuit. In sum, there are five
significant directions in RFIC according to the papers
I read
[3-18]
.
A. RF System-on-Chip
RFSoC is a system-level integrated circuit that
integrates the RF front end with the digital baseband
part on the same chip, which semiconductor process
can be CMOS and SiGe. It can largely reduce the
number and area of the devices in a system at a lower
cost, as well as improving the reliability, compared
with the off-chip radiating elements that suffer from
additional interconnect losses and cannot duplicate the
reproducibility of on-chip antennas because of the
extremely tight dimension control necessary in the
off-chip radiators and their high frequency
connections to the chip
[4]
.
With the development of the integration of a RF
chip, a single chip is able to contains both the
downstream and upstream parts of the small signals.
The downstream integrates the LNA, mixer, gain
controlled amplifier and even the high performance
ADC, etc. The upstream integrates the generating,
amplifying and mixing of signals and so on.
Paper [19] presents a Ku-band SiGe BiCMOS
phased array receive chip capable of forming
four-simultaneous beams from two antenna inputs.
The design is based on the all-RF architecture with
4-bit active phase shifters and 4-bit variable gain
amplifiers in each channel. The four-beam chip results
in a gain of 4-6 dB per channel at 13-15 GHz, a noise
figure of 10-11 dB, a worst case input P-1 dB of -14.3
dBm per channel (input third-order intercept point of
-7 dBm), and an rms phase and gain error of <12
and 1.5 dB, respectively. A gain control of 17 dB is
also achieved with a phase change of <5. The
principle is shown in Fig.1.

Fig.1 Proposed single-chip two-antenna phased array
receiver with 4 simultaneous beams.
Recently, Raytheon
[20]
designs a 4 channel X-band
DS module has a 5mm x 6mm chipscale package and a
mass of under 60 mg. The module has a 3 bit phase
shifter, a 3.4 dB NF, and a total receive and overhead
power draw of only 5 mW. Raytheon achieved
tremendous cost reduction by replacing the
conventional multi-component T/R module with a
single IC. This is possible only with a fabrication
process supporting both RF and digital circuits. The


IBM 8HP SiGe processes is a high-yield mature
process on 200 mm wafers, resulting in very low IC
cost. The process includes SiGe HBTs for RF circuits
and 130 nm Si CMOS for digital circuits. This enables
RF performance comparable to GaAs, with low
module cost, and low LNA and control circuit power
consumption. The principle is shown in Fig.2.

Fig.2 X-Band 4-Element T/R Module
B. RF Multi-channel Integration
It means integrating multiple channels in a single
chip. Although the multi-channel chip does not
integrate as many features as in RF SoC chip, it adopts
advanced System-in-Package(SiP) technology to
reduce the size of RF circuit and mixed-signal circuit
and realize the integration of multiple channels in a
single module.
Demands for the advancement of electronic
packaging technology are relentless, from pursuing
smaller package size with greater functionality to
lowering the package cost. Notwithstanding, compared
with "all in-one" system-on-chip (SOC) technology,
system-in-package (SiP) obviously demonstrates its
own distinctive advantages where functions per unit
area and costs are both reasonably justified, not to
mention the favorable shorter development cycle time
by using commercial off-the-shelf components
[21]
.
C. CMOS RFIC
Nowadays, many kinds of process technologies can
be applied to RFIC, such as CMOS, BiCOMS, BJT
and GaAs technology. Since the bulk CMOS
technology still follows Moores Law that the feature
size of COMS is calling down, it has repeatedly
challenged the limits successfully, which means the
clock cycle can reach GHz and make it possible to
apply in the RFIC.
Considering the scalability
[12]
of RF CMOS, scaled
CMOS transistors offer higher f
T
and f
max
as well as
lower NF. The bias current could be reduced for
similar level of performance. However, scaled
transistors also have degraded linearity, voltage gain
and voltage handling capability, and potentially higher
1/f noise. I/O transistors with relaxed geometries or
increasing circuit complexity may be required to
mediate the shortcomings. Passive component
performance does not improve with technology scaling
unless all metal layers available are used. As a result,
the area of RF front end is not expected to scale at the
same rate as digital baseband blocks. Hence, for
front-end dominant RFICs, other benefits such as
reduction in the power consumption are necessary to
justify the adoption of scaled technology. For fully
integrated RFICs with sizable digital baseband blocks,
area reduction through scaling will prevail. However,
whether cost reduction, especially including the high
investment in masks, will result must be carefully
considered.
In the past few years, there were amount of papers
that reported the receivers based on CMOS process
technology. In paper[22], it presents that a receiver in
65nm digital CMOS is 19GHz, from 76 to 95GHz,
with a 12.5 dB peak gain and the 3dB bandwidth. In
paper [23], it introduces a 1.2V, 140GHz receiver with
on-die antenna in 65nm CMOS.
Table 1 summarizes reports of direct conversion
solutions to date, along with key distinguishing
technological features.
References Technical Approach Process
Technology
Application
[24] UCLA 1. Active circuitry in
the front-end
2. Single balanced
mixer
0.6 um
CMOS
GSM(0.9
GHz),
1.9GHz
[25]
Toshiba
Active circuitry in
the front-end
0.8 um
SiGe
PCS,
1.9GHz


R&D BiCMOS
[26]
Mitsubishi
1.
Passive-circuit-based
front-end
2. Subharmonic
APDP-based
topology
GaAs
MESFET,
SiGe
WCDMA
[27]
Helsinki U.
of
Technology
1. Active circuitry in
the front-end
2. Uses off-chip
inductors
3. Modified Gilbert
cell mixer
0.35 um
SiGe
BiCMOS
WCDMA
[28]
Georgia
Tech
Subharmonic
APDP-based
topology
GaAs
MESFET
Cband,
5.8GHz

D. 3-D RFIC
There is a strong demand for high-speed wireless
applications which has stimulated the development of
low cost and compact millimeter-wave wireless
equipment. Especially in the 60-GHz band, wireless
communication systems call upon miniaturization,
portability, cost-saving, and performance improvement
to satisfy the specifications of the next-generation
multigigabit per second wireless transmission
[29]
. The
three-dimensional (3-D) integration approach using
multilayer low-temperature co-fired ceramic (LTCC)
technologies has emerged as an attractive solution for
these systems due to its high level of compactness and
mature multilayer fabrication capability. However, the
optimal integration of RF passives including duplexers
and antennas into a 3-D 60-GHz (V-band) front-end
module is significantly challenging since the electrical
performance can be degraded by severe parasitic,
interconnection, and radiation losses. The stringent
isolation requirement between Rx (5961.5 GHz) and
Tx (61.564 GHz) channel signals of 5-GHz-band
transceivers also requires the design of a highly
integrated duplexer consisting of on-package low-loss
and narrowband filters. The duplexer not only serves
as a 3-D interconnect between the Rx/Tx
monolithic-microwave integrated-circuit (MMIC)
chipsets and the antenna, but also as an effective
means to minimize the level of the interference
between two channels
[6]
.
A typical example is a v-band fully-integrated
60GHz single-chip 3-D MMIC using 0.15um GaAs
pHEMT technology
[30]
. Fig.3 shows the structure of
the 3-D MMIC combined with the commercial
foundry device. The 3-D interconnection layer consists
of four layers of 2.5-pm-thick polyimide film and
1-pm-thick metal (2-pm-thick for top metal). Such 3-D
interconnect technology have many advantages,
including narrow linewidth and interval, stackable
passive device, and a better isolation between passive
devices and substrates.

Fig.3 Structure of 3-D MMIC fabricated by combining
commercial foundry process with 3-D MMIC interconnection
process.
E. Ultrawideband Technology
UWB radio technology differs from conventional
narrowband radio and spread-spectrum technologies in
that the half power bandwidth of the signal is typically
from 25% to 100% of the center frequency. Instead of
transmitting a continuous carrier wave modulated with
information (or with information combined with a
spread code), which determines the bandwidth of the
signal, a UWB radio transmits a series of very narrow
impulses. The UWB radio has a distinct advantage
over narrowband radio systems in resistance to signal
degradation by multipath propagation. In
environments having reflecting objects, the continuous
carriers of narrowband systems are susceptible to
destructive interference due to multipath signals. In an
UWB radio system, the multipath signal energy arrives
at a different time than the direct path energy, and
cannot create destructive interference. A multiple
correlator system can recover the multipath energy to
enhance the system performance
[31]
.
These systems use very low transmission power,
spread over a bandwidth of several gigahertz. The very
low transmission power and the large bandwidth usage


enable UWB radio systems to coexist with other
narrowband systems over the same frequency band
without interfering with the narrowband systems.
However, the narrowband systems may cause
interference that can jam the UWB receiver. There
have been efforts to develop narrowband interference
suppression techniques for UWB radio systems
[32]
.
The table 2
[33]
above summarizes the measurement
results, along with a figure-of-merit, of the ABCS
LNA at different dc power consumption and compares
them with previous reported wideband LNA amplifiers
using different device technologies and circuit
topologies. The figure-of-merit is as defined in [36].
Although the silicon CMOS LNA may have low
power consumption, wideband silicon CMOS LNA
has less bandwidth, less gain, and worse noise figure
[34]
. For comparable bandwidth and gain, the dc power
consumption of the ABCS LNA is lower than the SiGe
LNAs
[35-36]
and GaAs HBT
[37]
. Furthermore, the
ABCS HEMTs high gain allows a single-stage ABCS
LNA to achieve the same gain as an metamorphic high
electron-mobility transistor (MHEMT) two-stage LNA
[38]
. The FOM confirmed that the ABCS LNAs have
the best compromise in gain, bandwidth, noise figure,
and dc power consumption. Based on this comparison,
it is the authors belief that the ABCS wideband LNAs
reported here have the lowest dc power consumption
and the highest gain-bandwidth product ever reported.

IV Future Trends
The need for low-cost, low-voltage, low-power
consumption ICs are pushing the designers towards
new architectures and new semiconductor processes as
well as high levels of integration. The RF technology
is no longer an esoteric and marginal technology. It
is the technology that will ultimately allow for the
development of 1) extremely low-cost hardware
wireless transceivers on one hand, and 2) highly
programmable software terminals on the other hand.
Learning from Prof. Ma, the existing and future
challenging stated as follows decide the future trends
to some degree.
The existing challenging (~2013)
1)Scaling of MOSFET to 32nm (Process integration,
devices, and structures);
2)Signal isolation (RF and analog/MS-technologies
for wireless communications);
3)High-performance and low-cost RF and analog/MS
solutions;
4)Management of overall power consumption;
5)High-frequency circuits and devices modeling for
5~100GHz applications;
6)Enabling test of increasingly complex devices;
7)Continued economic scaling of test;
8)Signal to noise ratio (Yield).
Future Challenging (2014~2020)
1)Implementation of advanced, non-classical CMOS
devices with enhanced drive current;
2)Dealing with fluctuations and statistical process
variation in sub-15nm gate-length MOSFETs;
3)Identify solutions that address global wiring scaling
issues (Interconnects);
4)Management of leakage power consumption


(design);
5)Design for manufacturability;
6)Process stability versus absolute contamination level
include correlation to yield.
Therefore, the future trends may be stated as
follows.
As silicon based technologies have become more
attractive due to the use of their micromachining
capabilities, mechanical capabilities defining the
MEMS technologies and also due to the emergence of
the Silicon Germanium based and advanced CMOS
technology that make possible the fabrication of
device featuring cut-off frequency larger than 100
GHz. The main limitations today come from the
performance of passive components and the lack of
real solutions for making "smart"' RF and
millimeterwave modules. Concerning the
reconfigurability, flexibility, it has been demonstrated
that Micro-Electromechanical Systems (MEMS)
technologies were a good candidate to fulfill these
requirements. It has been already presented a lot of
results in the field of RF MEMS but there is today a
lack of data concerning the integration of MEMS with
Integrated Circuit to fabricate very compact smart
modules
[39]
.
Many discrete components in the RF section of
mobile phones have been replaced by advanced RFIC
technology and system architecture in the past years.
This is especially true for discrete low noise amplifiers
(LNAs) and for intermediate frequency (IF) filters in
receivers which have been swallowed by the RFICs.
Even though further steps in monolithic integration of
RF-functions into standard BiCMOS or CMOS ICs
are anticipated there are several types of
RF-components which cannot be integrated easily.
Among these components are the RF-filters. All
mobile phones need RF-filters to protect the sensitive
receive (Rx) path from interference by transmit (Tx)
signals from other users and noise from various RF
sources. The minimum Rx signal strength at which a
phone must still operate can be 120 dB lower than the
strength of interfering signals. No affordable
preamplifier will generate sufficiently small
intermodulation effects to deal with such a situation.
Bulk-Acoustic-Wave (BAW) respectively
Film-Bulk-Acoustic-Resonator (FBAR) filters are
determined to replace conventional RF-filters in the
mobile phones as they have now evolved in
performance beyond Surface-Acoustic-Wave (SAW)
filters and can be manufactured in a very cost
competitive way using standard IC manufacturing
[40]
.
We are convinced that the convergence between
MEMS and advanced IC's will result to very
innovative architecture featuring enhanced
performances in the future trend.

V Conclusion
RFICs are the critical components of the terminal
hardware, processing the signal coming from the
terminal antenna and delivering bits to the digital data
receiver. The ideal goal of a low-cost single-chip
radio is becoming increasingly plausible, as research
groups from all over the world are dedicated to
developing improved techniques for minimizing the
limitations of integrated circuit technology for the
wide variety of functions required of a radio unit. The
choice of technology to implement these radios is
complicated by a variety of factors, including
performance in each of the critical functional areas, as
well as final production price and time to market.

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