Flexible High-Power Multi DC-DC

Converters for Train Systems

Student:
Arash Abbasalizadeh Boora (B.Eg. M.Sc.)

Engineering Systems / Built Environment and Engineering


PhD Thesis by publication

2010



Supervisors:
A/Prof. Firuz Zare
Prof. Arindam Ghosh
Prof. Gerard Ledwich






I
Abstract
This thesis reports on the investigations, simulations and analyses of novel power
electronics topologies and control strategies. The research is financed by an
Australian Research Council (ARC) Linkage (07-09) grant. Therefore, in addition to
developing original research and contributing to the available knowledge of power
electronics, it also contributes to the design of a DC-DC converter for specific
application to the auxiliary power supply in electric trains. Specifically, in this
regard, it contributes to the design of a 7.5 kW DC-DC converter for the industrial
partner (Schaffler and Associates Ltd) who supported this project.
As the thesis is formatted as a thesis by publication, the contents are organized
around published papers. The research has resulted in eleven papers, including seven
peer reviewed and published conference papers, one published journal paper, two
journal papers accepted for publication and one submitted journal paper
(provisionally accepted subject to few changes).
In this research, several novel DC-DC converter topologies are introduced, analysed,
and tested. The similarity of all of the topologies devised lies in their current
circulating switching state, which allows them to store some energy in the inductor,
as extra inductor current.
The stored energy may be applied to enhance the performance of the converter in the
occurrence of load current or input voltage disturbances. In addition, when there is an
alternating load current, the ability to store energy allows the converter to perform
satisfactorily despite frequently and highly varying load current. In this research, the
capability of current storage has been utilised to design topologies for specific
applications, and the enhancement of the performance of the considered applications
has been illustrated.
The simplest DC-DC converter topology, which has a current circulating switching
state, is the Positive Buck-Boost (PBB) converter (also known as the non-inverting
Buck-Boost converter). Usually, the topology of the PBB converter is operating as a
Buck or a Boost converter in applications with widely varying input voltage or
output reference voltage. For example, in electric railways (the application of our
industrial partner), the overhead line voltage alternates from 1000VDC to 500VDC
and the required regulated voltage is 600VDC. In the course of this research, our
industrial partner (Schaffler and Associates Ltd) industrialized a PBB converterthe
II
Mudo converteroperating at 7.5 kW. Programming the onboard DSP and testing
the PBB converter in experimental and nominal power and voltage was part of this
research program.
In the earlier stages of this research, the advantages and drawbacks of utilization of
the current circulating switching state in the positive Buck-Boost converter were
investigated. In brief, the advantages were found to be robustness against input
voltage and current load disturbances, and the drawback was extra conduction and
switching loss. Although the robustness against disturbances is desirable for many
applications, the price of energy loss must be minimized to attract attention to the
utilization of the PBB converter.
In further stages of this research, two novel control strategies for different
applications were devised to minimise the extra energy loss while the advantages of
the positive Buck-Boost converter were fully utilized. The first strategy is Smart
Load Controller (SLC) for applications with pre-knowledge or predictability of input
voltage and/or load current disturbances. A convenient example of these applications
is electric/hybrid cars where a master controller commands all changes in loads and
voltage sources. Therefore, the master controller has a pre-knowledge of the load and
input voltage disturbances so it can apply the SLC strategy to utilize robustness of
the PBB converter.
Another strategy aiming to minimise energy loss and maximise the robustness in the
face of disturbance is developed to cover applications with unexpected disturbances.
This strategy is named Dynamic Hysteresis Band (DHB), and is used to manipulate
the hysteresis band height after occurrence of disturbance to reduce dynamics of the
output voltage. When no disturbance has occurred, the PBB converter works with
minimum inductor current and minimum energy loss.
New topologies based on the PBB converter have been introduced to address input
voltage disturbances for different onboard applications. The research shows that the
performance of applications of symmetrical/asymmetrical multi-level diode-clamped
inverters, DC-networks, and linear-assisted RF amplifiers may be enhanced by the
utilization of topologies based on the PBB converter.
Multi-level diode-clamped inverters have the problem of DC-link voltage balancing
when the power factor of their load closes to unity. This research has shown that this
problem may be solved with a suitable multi-output DC-DC converter supplying DC-
link capacitors. Furthermore, the multi-level diode-clamped inverters supplied with
III
asymmetrical DC-link voltages may improve the quality of load voltage and reduce
the level of Electromagnetic Interference (EMI). Mathematical analyses and
experiments on supplying symmetrical and asymmetrical multi-level inverters by
specifically designed multi-output DC-DC converters have been reported in two
journal papers.
Another application in which the system performance can be improved by utilization
of the current circulating switching state is linear-assisted RF amplifiers in
communicational receivers. The concept of linear-assisted is to divide the signal
into two frequency domains: low frequency, which should be amplified by a
switching circuit; and the high frequency domain, which should be amplified by a
linear amplifier. The objective is to minimize the overall power loss. This research
suggests using the current storage capacity of a PBB based converter to increase its
bandwidth, and to increase the domain of the switching converter.
The PBB converter addresses the industrial demand for a DC-DC converter for the
application of auxiliary power supply of a typical electric train. However, after
testing the industrial prototype of the PBB converter, there were some voltage and
current spikes because of switching. To attenuate this problem without significantly
increasing the switching loss, the idea of Active Gate Signalling (AGS) is presented.
AGS suggests a smart gate driver that selectively controls the switching process to
reduce voltage/current spikes, without unacceptable reduction in the efficiency of
switching.
IV
Keywords

Active gate signalling
Asymmetrical multi-level inverter
Auxiliary equipment
Auxiliary power supply
DC-DC converter topologies
DC-link voltage balancing
Electric railway
Electric vehicle
Electromagnetic compatibility (EMC)
Electromagnetic interference (EMI)
Hybrid vehicle
Hysteresis current control
Input voltage disturbance
Load current disturbance
Multi-level diode-clamped inverter
Multi-output DC-DC converter
Multi-voltage DC-network
Overhead voltage
Renewable energy
Residential PV
Switching loss









V
Contributions
Improving the effect of overhead voltage disturbance (at least 50% reduction)
on the auxiliary power supplies used in electric trains by fast response control
strategies implemented in a Positive Buck Boost (PBB) converter
Developing and validating a new multi-output PBB-based DC-DC converter
with load prioritization and disturbance rejection for multi-voltage DC-
networks
Developing and validating a novel topology based on PBB converter with
high bandwidth and bidirectional power flow for linear assisted RF amplifiers
Developing and validating two multi-output DC-DC converters based on
PBB converter for symmetrical and asymmetrical multi-level diode-clamped
inverters
Reducing the EMI noise by utilizing an Active Gate Signalling (AGS)
technique
Design and programming of a PBB converter with a current control for
auxiliary power supply at 7.5 kW. (Mudo converter)















VI

Scholarships and grants
This project has been supported by the Australian Research Council Linkage grant
(07-09) and Schaffler Associates Ltd in Sydney.

























VII
List of publications

* Arash A. Boora, Firuz Zare, Arindam Ghosh, Gerard Ledwich,
Utilizing robustness of positive buck-boost converter against input voltage
and load current disturbances Australian Journal of Electrical and
Electronics Engineering (AJEEE) Vol. 6 No. 2

* Arash A. Boora, Firuz Zare, Arindam Ghosh, A New Family of Multi-
Output DC-DC Converter Topologies to Supply an Asymmetrical Four-Level
Diode-Clamped Inverter The international journal for computation and
mathematics in electrical and electronic engineering. (Accepted for
publication)

* Arash A. Boora, Firuz Zare, Arindam Ghosh, Gerard Ledwich,
Applications of Power Electronics in Railway System Australian
Universities Power Engineering Conference, 2007. AUPEC 2007.
Australasian 9-12 Dec. 2007 Page(s):1 9 (peer reviewed)

* A. Boora, Firuz Zare, Arindam Ghosh, Gerard Ledwich, A General
Approach to Control a Positive Buck-Boost Converter to Achieve Robustness
against Input Voltage Fluctuations and Load Changes Power Electronics
Specialists Conference, 2008. PESC 2008. IEEE 15-19 June 2008
Page(s):2011 2017 (peer reviewed)

* Boora, A. A.; Zare, F.; Ledwich, G.; Ghosh, A.; A new DC-DC
converter with multi output: Topology and control strategies Power
Electronics and Motion Control Conference, 2008. EPE-PEMC 2008. 13th 1-
3 Sept. 2008 Page(s):468 474 (peer reviewed)

* Boora, A. A.; Zare, F.; Ledwich, G.; Ghosh, A.; Bidirectional
positive buck-boost converter Power Electronics and Motion Control
Conference, 2008. EPE-PEMC 2008. 13th 1-3 Sept. 2008 Page(s):723 727
(peer reviewed)

* Alireza Nami, Arash. A. Boora , Firuz Zare, A. Ghosh, F. Blaabjerg
A Novel Configuration for Voltage Sharing in Diode-clamped Topology
International conference on renewable energies and power quality
(ICREPQ'9) selected for journal publication in ICREPQ. (peer reviewed)

* Boora, Arash A.; Zare, Firuz; Ghosh, Arindam; Application of
dynamic hysteresis band height control to improve output voltage transient in
boost and Positive Buck-Boost converters 13th European Conference on
Power Electronics and Applications, 2009. EPE'09. 8-10 Sept. 2009 Page(s):1
8 (peer reviewed)

* Arash A. Boora, Firuz Zare, Arindam Ghosh, Efficient Voltage/Current
Spike Reduction by Active Gate Signalling EMC symposium Adelaide 2009
(peer reviewed)
VIII

* Arash A. Boora, Firuz Zare, Arindam Ghosh, Multi-Output Buck-Boost
Converter with Enhanced Dynamic Response to Load and Input Voltage
Changes The journal of Institution of Engineering & Technology on Power
Electronics (Former IEE). (Provisionally accepted for publication)

* Arash A. Boora, Alireza Nami, Firuz Zare, Arindam Ghosh, Frede Blaabjerg
Voltage Sharing Converter to Supply Single-Phase Asymmetrical Four-Level
Diode-Clamped Inverter with High Power Factor Loads IEEE Transaction on
Power Electronics. (Provisionally accepted for publication)









































IX
A view of the industrial contributions and publications
Investigating the Positive Buck Boost (PBB)
converter
PESC 2008 Conf.
(peer reviewed)
Investigating advantage and disadvantages of extra
inductor current storage
AJEEE Journal
(Vol.6 No. 2 2009)
Detailing the control system of PBB converter
with Smart Load Controller (SLC)
EPE 2009 Conf.
(peer reviewed)
Presentation of Dynamic Hysteresis Band (DHB)
Introducing
Multi-Output PBB
(MOPBB) converter
EPE-PEMC 2008 Conf.
(peer reviewed)
Presenting the new
topology of Multi-
Output PBB converter
(MOPBB)
ICREPQ 2009 Conf.
(peer reviewed)
Selected for journal
publication
Comparing Multi-output
development of Basic
DC-DC converters
IET Trans.
(provisionally accepted
for publication on
18 Dec. 2010)
Implementation of SLC
and DHB immediate
dynamic enhancement
strategies on MOPBB
converters.
Introducing
Bidirectional PBB
converter
EPE-PEMC 2008 Conf.
(peer reviewed)
Presenting the new
topologies of
Wideband PBB
converter (WPBB)
and
Bidirectional PBB
converter (BiPBB)
Contribution to Industrial
Partner:
Schaffler and Association
First travel to Sydney
(17-21 Sep 2007)
Agreement on the
topology of PBB
converter
Second travel to Sydney
(12-20 Nov 2008)
Learning the
TMS320F28335 DSP
An receiving the Modu
converter Board
Work at QUT
(20 Nov 20 Dec 2008)
Programming the Mudo
Converter Board and
achieving the results
presented
Third travel to Sydnay
(8-13 Feb 2009)
Performing final test at
Schaffler and
Assossiations
Literature Review
AUPEC 2007 Conf.
(peer reviewed)
A literature review on the applications of power
electronics in rail way systems
Contribution to
Active Gate Signalling
Adelaide EMC
Symposium 2009 Conf.
(peer reviewed)
Implementation of Active
Gate Signalling to reduce
voltage and current spikes
if DC-DC converters
efficiently
Modification of PBB
converter for
Asymmetrical
Multi-level inverter
COMPEL Journal
(Accepted for
publication
15 Jan. 2010)
Presentation of Three-
Output Voltage Sharing
converters (3OVS)
IEEE Power Electronics
Trans.
(Provisionally accepted
on 25 Jan. 2010)
Application of Boost-
3OVS converter for
residential PV utilization

X
Summary of publications
Literature review on application of power electronics in railway
systems
First Paper
Chapter 3
Positive Buck Boost (PBB) converter
Disturbance removing control strategies for Positive Buck Boost
(PBB) converter
Advantages and disadvantages of current storage in the inductor
of PBB converter
Second
Paper
Chapter 4
Development of Smart Load controller for PBB converter to
improve performance of systems with pre-known disturbances
Fifth Paper
Chapter 1
Development of Dynamic Hysteresis Band (DHB) for PBB
converter to improve performance of systems with unexpected
disturbances
Sixth Paper
Chapter 8
Multi-Output Positive Buck Boost (MOPBB) converter
Analysis and modelling of novel multi-output voltage sharing
DC-DC converters to supply asymmetrical diode-clamped
inverters
Fourth
Paper
Chapter 5
Comparing performance of multi-output Buck, Boost, and PBB
converter, in presence of input voltage fluctuations
Seventh
Paper
Chapter 7
Application of SLC and DHB fast response control strategies on
multi-output Buck-Boost converter (with hardware
implementation)
Eighth
Paper
Chapter 10
Three -output Voltage Sharing (3OVS) converters
Analysis and modelling of novel multi-output voltage sharing
DC-DC converters to supply asymmetrical diode-clamped
inverters
Ninth Paper
Chapter 2
A three-output voltage sharing DC-DC converter has been
applied to an asymmetrical single-phase four-level diode-
clamped inverter. (with hardware implementation)
Eleventh
Paper
Chapter 11
Wideband Positive Buck-Boost (WPBB) converter
Introduction of the new topologies of wideband PBB (WPBB)
and Bidirectional PBB (BiPBB) converters to contribute to the
application of linear assisted RF amplifiers.
Third Paper
Chapter 6
Utilization of Active Gate Signalling
Utilization of Active Gate Signalling (AGS) to reduce
voltage/current spikes generated because of switching and
parasitic elements of the circuit.
Tenth Paper
Chapter 9


XI
Acknowledgement

In the three-year course of my PhD, several people have helped. First of all, I
appreciate concerns of my supervisor Associate Professor Firuz Zare and may
associate supervisors Professor Arindam Ghosh and Professor Gerard Ledwich.
Secondly, I thank Queensland University of Technology for providing equipments
necessary for my research.
I also like to recall all the people how have worked on the same field of power
electronics. After all, all of my works are extensions to achievements of the past.
I also like to thank my parents who supported me all the way with their kindness and
understandings. Finally yet importantly, I thank my lovely wife for being here and
being so amazing.


















XII
Statement of Original Authorship
The work contained in this thesis has not been previously submitted to meet
requirements for an award at this or any other higher education institution. To the best of
my knowledge and belief, the thesis contains no material previously published or written
by another person except where due reference is made.


Signature: _________________________
Date: _________________________





















XIII
Table of contents
Abstract I
Keywords IV
Contributions V
Scholarships and grants VI
List of publications VII
A view of the industrial contributions and publications IX
Summary of publications X
Acknowledgement XI
Statement of original Authorship XII
General literature review 1
Introduction 7
Description of research problem 9
Overall objectives of the study 12
Specific aims of the study 12
Account of research progress linking the research papers 13
References 48
Publications 52
Published journal papers
Chapter 1 53
Journal papers accepted for publication
Chapter 2 77
Published conference papers
Chapter 3 115
Chapter 4 137
Chapter 5 157
Chapter 6 175
Chapter 7 189
Chapter 8 209
Chapter 9 223
Journal papers under review
Chapter 10 237
Chapter 11 263
Conclusion 293

1
General literature review
Switching DC-DC converters have applications ranging from low voltage power
supplies to High Voltage DC (HVDC) transmission systems. For any particular
application of switching DC-DC converters, there are limitations to be reduced,
problems to be solved, and opportunities to be utilised for better quality and/or lower
cost. Therefore, there is a diverse range of switching DC-DC topologies designed for
different applications. This research has contributed to a few of these applications.
While the addressed applications are diverse, they nevertheless have common
characteristics. This commonality allows for the development of a category of
converters for those applications. The similarity of these applications lies in their
frequent input voltage or load current disturbance, and the similarity between
introduced topologies is their capability of storing extra inductor current. The
applications addressed in this research are:
Auxiliary power supplies used in electric/hybrid vehicles
Symmetrical/asymmetrical multi-level diode-clamped inverters
Linear-assisted RF amplifiers
A comprehensive literature review has been undertaken to cover these applications
and their related issues.

1. Auxiliary power supply of electric/hybrid vehicles
Electric vehicles range from trains to cars which are solely supplied by a battery or
an external power supply. In the state-of-the-art cases, magnetic energy transfer is
utilized [1-3]. These systems are called magnetic levitation (Maglev). Hybrid
vehicles have another power source in addition to a battery or external power supply.
Fuel cell and PV are common alternative power sources [4, 5].

Several power stations distributed throughout the railway network supply travelling
electric trains. The electric power is usually transferred to the trains by overhead
lines [6-8]. The travelling trains are situated at varying distances from power stations
and other trains and.
In electric railway systems, trains may recuperate energy when they are travelling
downhill. Therefore, two trains travelling on a ramp in different directions may
transfer energy [9]. The alternating situation of travelling trains changes the
2
characteristics of the loads of each power station and, as a result, the voltage profile
between each two power stations [10, 11] also changes. Therefore, the input voltage
is severely variable and there is the persistent problem of voltage regulation because
of disturbances present on the overhead voltage. For example, in the case of the
application of the industrial partner of this project, the overhead voltage could vary
between 1000VDC and 500VDC, while the desirable voltage for auxiliary equipment
was 600VDC. The auxiliary power supply needs to be robust in the face of these vast
changes in its input voltage (Fig. 1). In addition, the auxiliary equipment of an
electric train varies in power demand and power conditions [12-15], and the auxiliary
loads change frequently because they are individually controlled by passengers (as in
the case of personal lighting and air conditioning needs) [16-18]. Therefore, in some
cases, there is a load current disturbance which needs to be handled satisfactorily by
the auxiliary power supply [19-20].
Power
Station
Power
Station
Voltage Profie
Voltage Profie
Train
Train
Fig. 1: a partition of electric railway

The capability of the Positive Buck-Boost (PBB) converter (Fig. 2) to store extra
energy in the form of extra inductor current can contribute to problems of frequent
input voltage and load current disturbances. The PBB converter and the tri-state
Boost converter [21-23] have a current circulating switching state which can be
utilized to enhance the dynamic response of the converter when there is disturbance
[24, 25]. As a part of this research, the advantages and disadvantages of the
utilization of the current circulating switching state have been investigated.

Fig. 2: Positive Buck-Boost converter. The current circulating loop is also shown.
3

2. Symmetrical/asymmetrical multi-level diodeclamped inverters
Multi-level inverters have applications in different levels of voltage and power [26-
28]. Advantages of the multi-level inverters are lower voltage blockage for each
switch, higher load voltage quality for lower switching frequency, and less
Electromagnetic Interference (EMI) [31]. However, usually one or two of these
advantages are the reason to use multi-level inverters in any application that has
adopted them. For high voltage grid-connected application (for example FACTS
equipment), the lower voltage blockage of each switch is the main reason of utilizing
multi-level inverters [29-30]. For residential utilization of photovoltaic cells, the
multi-level inverters may help to improve the quality of load voltage and reduce EMI
noise [32]. As a more specific application, multi-level inverters may supply three-
phase electric motors with less common mode voltage and less shaft voltage, which
results in longer life span of the motor and attenuation of EMI noise [33, 34].

There are different topologies of multi-level inverters. Three well-known categories
of multi-level inverters are diode-clamped, flying capacitor, and hybrid. A three level
version of these categories is illustrated in Fig. 3. Reference [35] compares these
three general topologies from different technical aspects of application such as
switching strategies, efficiency, and EMI noise.
Fig. 3: a) diode-clamped multi-level inverter b) flying capacitor multi-level inverter c) Hybrid multi
level inverter

Although many switching strategies may be suggested for several switches included
in the topologies of multi-level inverters, the crucial importance of minimal
V
dc
a
C
1
C
2
b
(a)
(b)
(c)
4
switching loss limits applicable switching strategies to those that manage to keep the
number of switching per cycle to a minimum [36, 37].

Besides advantages, there are also limitations to the operation of multi-level inverters
that operate with minimal switching loss. The most fundamental limitation is the
dependency of the modulation index of the inverter and the power factor of the load
[37-40]. The problem is that the voltage balancing of the DC-link capacitors becomes
more limited when the power factor of the load increases. To reduce this dependency
and solve the DC-link voltage balancing problem, two general approaches have been
developed during the last two decades. Firstly, the control strategies are optimized to
achieve higher modulation indices [41-44]. Secondly, auxiliary hardware is
introduced to regulate DC-link voltages and increase the modulation index [45, 46].
For the specific application of residential PV utilisation, the output voltage of the PV
is not usually adequate to supply the inverter [36]. Therefore, a step-up DC-DC
converter is required to intermediate between PV and the inverter. A multi-output
DC-DC converter with series-connected outputs may perform both tasks of step-up
conversion and DC-link voltage balancing.

From the point of view of the multi-output DC-DC converter supplying the multi-
level diode-clamped inverter, the current driven by the inverter is variable and
unbalanced [37]. The capability of PBB-based converters to store extra current in the
inductor contributes to this application because, when the current driven by the
inverter reduces, the DC-DC converter can control its inductor current and
sufficiently supply the inverter. Since the current driven by the inverter is also
subject to increase, the DC-DC converter stores some extra current in its inductor to
supply the inverter satisfactorily when the demanded current increases.

As a result of the research presented in this thesis, a novel multi-output DC-DC
converter is introduced to supply a symmetrical multi-level diode clamped inverter,
and a family of three-output DC-DC converters are proposed to supply asymmetrical
four-level diode-clamped inverters. The results of analysing and testing these
converters have been documented in several conference and journal papers (as
previously indicated).

5
3. Linear-assisted RF amplifiers
The linear-assisted RF amplifier is a communication receiver that utilizes both
switching and linear converters to amplify the received signal. The concept of linear
assisted RF amplifiers is to divide the received signal into portions of high frequency
and low frequency [47-49]. The switching amplifiers are more efficient when the
frequency of their signal is lower; however, to amplify higher frequency signals,
their switching frequency should increase [50]. Consequently, their switching loss
increases, and their efficiency decreases. Therefore, after a critical frequency, the
linear amplifiers become more efficient. Depending on the available semiconductors
and required amplification, the efficiency of switching and linear amplifiers are
determined for a given frequency domain [51].
The linear-assisted RF amplifier combines linear and switching amplifiers to
optimize the efficiency of the whole system. Linear circuit amplifies the higher
frequencies, and the lower frequencies are amplified by switching circuit. The
boundary between lower and higher frequencies is determined according to the
available technology and the aiming to maximize efficiency [52]. Fig. 4 illustrates a
schematic of a linear-assisted amplifier system.

Fig. 4: Schematic of a Linear assisted amplifier

The contribution of this research to linear-assisted amplifiers has also been presented
in a conference paper. The suggestion is to utilize the current storage capacity of
PBB based converters to increase the bandwidth of the switching circuit without
increasing its switching frequency. As a result, the level of current storage as another
freedom degree is added to problem variables and allows resolution of the efficiency
optimization problem to achieve a better combination.

4. Active Gate Signalling
6
After completion of experiments on the industrial prototype of the PBB converter,
some voltage/current spikes were observed. Utilization of the Active Gate Signalling
(AGS) technique is suggested to efficiently reduce the voltage/current spikes. The
AGS technique is suggested for insulated gate power switches (IGBTs and
MOSFETs) because their switching interval has an identical characteristic of
separated dv/dt and di/dt. When the switch turns on, the drain current first increases
to approximately its final level; then, the source-drain voltage drops to approximately
zero. Likewise, when the switch turns off, the voltage across the switch initially rises
and then the switch current drops [53-56]. Fig. 5 illustrates a simplified schematic of
the turn off and turn on intervals of an insulated gate switch.

Fig. 5: turn off and turn on intervals of an insulated gate switch

The voltage/current spikes are generated when di/dt and dv/dt caused by switching
are exposed to inductive and capacitive parasitic elements of the circuit [57-60].
Having separated dv/dt and di/dt in insulated gate switches, the idea of selective
reduction of dv/dt or di/dt inspires the AGS technique [61-66]. For instance, when
the voltage spike is generated because of a switching di/dt and presence of a parasitic
inductance, the AGS reduces di/dt by slowing down the switching when the current
is changing. However, if the generated dv/dt does not cause any problem, the
switching may be performed faster when the voltage is changing. In this way, the
voltage spike is removed without dramatically increasing the switching loss.





7
Introduction
This research started with the purpose of investigating power electronic circuit
topologies and control strategies to enhance the performance of power supply used in
train systems under input voltage and load current disturbance conditions. This
purpose was motivated by the requirements of the projects industrial partner whose
industrial client demanded a high power (7.5 kW) medium voltage (600 V) DC-DC
converter that could perform robustly against wide range disturbances in input
voltage.

The research began with a general literature review of the application of power
electronics to electrical railways. A summary of the literature review is presented in
Chapter (3). After this primary literature review and experimental simulations, the
topology of the Positive Buck-Boost (PBB) converter was suggested for operation in
two modes of step-up and step-down conversions according to the level of overhead
line voltage. This topology was first analysed, designed, and tested on a laboratory
prototype and, finally, on an industrial prototype.

The advantageous characteristic of the PBB converter is its capability to store energy
as extra current charged in the inductor. The extra inductor current may be applied to
avoid fluctuation of output voltage because of disturbances in input voltage and load
current. However, the extra current causes switching and conduction loss. To create a
functional design, a trade-off between the advantages and disadvantages has been
determined. Analysis and simulations of these determinations have been presented in
Chapter (4).

To attenuate the problem of switching and conduction loss, a load control strategy
for systemsincluding several loads managed by a master controllerhas been
suggested. The essence of this ideacalled Smart Load Controller (SLC)is to store
extra inductor current just prior to the expected disturbance. In this way, the
disturbances are reduced while the loss is minimized. The concept of SLC for the
PBB converter and its confirmation by experimental results has been presented in
Chapter (1).

8
To cover a wider range of applications, a fast response control strategy based on
hysteresis current controlDynamic Hysteresis Band (DHB)has been proposed for
applications subjected to frequent unexpected disturbances. In this control strategy,
there is no pre-knowledge about disturbance; however, manipulating the hysteresis
band allows the enhancement of the dynamic response of the system. Analysis,
simulations and experimental results for this strategy are presented in Chapter (8).

To address the demands of specific loads commonly utilized in electric vehicles and
trains, some multi-output topologies have been introduced, analysed, and tested. To
address multi-voltage DC-networks and single-phase symmetrical four-level diode-
clamped inverters, a multi-output PBB (MOPBB) converter has been introduced,
analysed, and simulated in Chapters (5). Implementation and experimental results of
the MOPBB converter being dynamically enhanced with SLC and DHB fast
response control strategies are presented in Chapter (10).

Chapter (7) compares the performance of multi-output Buck and multi-output Boost
converters with MOPBB converters in the presence of a highly varying input voltage.
Single-phase AC-voltage conversion from DC source is a widespread application in
electrical vehicles and trains. However, when the loads of the multi-level inverters
are resistive, the problem of DC-link capacitor balancing arises. The MOPBB
converter is suggested as a solution to this problem. This application is suggested in
Chapter (10).

The performance of the single-phase four-level diode-clamed inverter improves in
quality and EMI profile if DC-link voltages are regulated asymmetrically. To provide
asymmetrical DC-link voltages where the inverter is supplying resistive loads, a
family of novel multi-output DC-DC converters are introduced, analysed, simulated
and tested, as presented in Chapters (2) and (11).

Although this research concentrated on supplying auxiliary equipment for electric
vehicles and trains, two other conference papers have been submitted regarding
topics indirectly related to the focus of this project. Firstly, the current storage
capacity of the PBB converter could contribute to the development of wideband DC-
DC converters which are used in linear-assisted RF amplifiers. The details of this
9
contribution are presented in Chapter (6). Secondly, during experiments on industrial
prototypes, some voltage/current spikes were observed. These spikes are generated
because of switching and may have undesirable effects on the EMI profile of the
system. An efficient approach to solving this problem is to shape gate voltage in
order to selectively control the switching speed. The details of this study are
presented in Chapter (9).

1. Description of the research problem
This research aimed to investigate power electronic circuit topologies and control
strategies to improve the performance of the power supply used in electric trains
under input voltage and load current disturbance conditions. This was in response to
the requirement of the projects industrial partner whose client was seeking a high
power (7.5 kW) medium voltage (600 V) DC-DC converter that could perform
robustly in the face of wide ranging disturbances in input voltage. The level of the
overhead voltage varied between 500VDC and 1000VDC, while the auxiliary power
system of the train supplying lighting and air conditioning demanded a 600VDC
voltage. Therefore, the suggested converter needed to be able to perform both step-
up and step-down conversions.

As a result of the primary literature review and simulations, it was suggested that the
topology of the Positive Buck-Boost (PBB) converter be controlled in two modes of
step-up and step-down conversions according to the level of overhead line voltage.
This topology has been designed, analysed, tested initially on a laboratory prototype
and, finally, on an industrial prototype.

The PBB converter may store extra energy in the inductor as extra inductor current.
This extra energy may be utilized to improve the dynamic performance of the
converter in the presence of input voltage or load disturbances. The problem is that
the extra inductor current causes extra switching and conduction loss. To resolve this
problem, two fast response control strategies have been suggested for applications
which are prone to expected and unexpected disturbances. The general concept of
fast response is to use extra current capacity of the PBB converter slightly in advance
of an expected disturbance or as a response to an unexpected disturbance. In this
way, the dynamic enhancement is achieved with a minimized power loss.
10

After suggestion and analysis of PBB converter, other applications, which were
included in auxiliary equipment of an electric vehicle and could suffer input voltage
and load current heavy variations, were reviewed. Subsequently, as a complementary
part of this project, DC-DC converter topologies to supply specific loads of electric
vehicles, which were subject to disturbances in input voltage, and load current were
suggested, tested and developed. Specifically, contributions have been made to
applications of multi-voltage DC-networks (for example, the DC-network of E-cars
or electric trains), single-phase symmetrical/asymmetrical multi-level diode clamped
inverters (which can provide the single-phase AC source of the electric vehicle), and
linear-assisted RF amplifiers. The problems or limitations of these applications that
may be resolved or attenuated by PBB based DC-DC converters are briefly explained
below.

Multi-voltage DC-networks are composed of several loads with different power
requirements and different sensitivities to disturbances in their supply. Having a
single main power source, a significant change in any of the loads of the power
network may affect the power quality of other loads. A multi-output PBB-based DC-
DC converter may provide a robustness margin, which avoids disturbances in input
voltage or load current that affect the quality of load voltages. In addition, a multi-
output DC-DC converter, which can prioritize different loads, may contribute to
sensitive loads in the presence of the disturbances produced by other loads. As a
product of this research, a Multi-Output PBB (MOPBB) converter is suggested and
tested to address this problem.

Symmetrical and asymmetrical multi-level diode-clamped inverters have the problem
of DC-link capacitor voltage balancing. This problem increases when the power
factor of the load of the inverter closes to unity. For example, in the auxiliary power
system of an electric train, most of the loads are highly resistive and this fact limits
the utilization of multi-level inverters. Asymmetrical multi-level diode-clamped
inverters may increase the quality of the load voltage without adding any switch or
diode to the topology of the inverter. However, the problem of DC-link voltage
balancing is even more critical for asymmetrical multi-level diode-clamped inverters.

11
A multi-output DC-DC converter with outputs connected in series may provide a
suitable supplier for a symmetrical/asymmetrical multi-level diode-clamped inverter.
The MOPBB converter could perform as the supplier of a symmetrical multi-level
diode-clamped inverter. To supply an asymmetrical diode-clamped inverter, a multi-
output DC-DC converter with specific properties should be designed. To supply an
asymmetrical four-level diode-clamped inverter, three topologies for different
conversion ratios are suggested, designed, and tested. These converters have the
characteristic of robustness in the face of frequently and heavily varying load
currents. This property makes them suitable for supplying multi-level diode-clamped
inverters.

Linear-assisted RF amplifiers have a linear and a switching amplifier working
together to amplify a high frequency signal. The benefit of a combination of linear
and switching amplifiers is to maximize the efficiency of the whole system by
managing linear and switching amplifiers to operate in their maximum efficiency
frequency domains. Although the load resistance and input voltage of linear-assisted
amplifiers are almost constant, the output voltage varies as the received signal varies.
Therefore, the load current varies. The problem of linear-assisted amplifiers is the
dependency between the bandwidth of the switching converter and its switching
frequency. To have higher bandwidth, the switching frequency must increase. As a
result, the switching loss increases and the efficiency decreases. This problem may
be attenuated by utilizing current storage capacity of PBB-based DC-DC converters.
Having extra current stored in the inductor of the DC-DC converter, the bandwidth
of the switching converter may increase without increasing the switching frequency.

This research is mostly concerned with power electronic topologies and control
strategies which can enhance the performance of applications currently utilized in
auxiliary power systems of electric trains. However, in the last stages of the research,
a contribution to the switching process has been made. The incentive for this part of
the research was the observation of voltage/current spikes in the experiments on the
industrial prototype. These spikes, which can generate electromagnetic noise, are
caused by switching. There is a dilemma in determining the desired switching
behaviour of any power electronic switch: because the switching loss increases as the
switching speed decreases and the EMI noise increases as the switching speed
12
increases, there is a trade-off between the switching loss and emitted EMI.
Conventionally, the switching speed is controlled by changing the gate resistance.
However, the switching speed may be controlled by shaping the gate signal as well.
The advantage of the latter technique is that the switching interval may be controlled
selectively to attain a better optimization between switching loss and emitted EMI.
The technique of shaping gate signal is called Active Gate Signalling (AGS). This
research has contributed to the concept of AGS by proposing efficient
voltage/current spike reduction by means of AGS.

2. Overall aim of the study
The overall aim of this research was to investigate possibilities for power electronics
topologies and control strategies to improve performance of DC-DC and DC-AC
converters for auxiliary power supply of electric trains. The main problem to be
addressed was to devise topologies and control strategies to provide regulated DC
voltages despite heavy disturbances in input voltage and load currents. The research
specifically aimed to assist the projects industrial partner by designing and testing
an appropriate power supply for a specific electric tram.

3. Specific objectives of the study
The specific aim of this research was to contribute to the performance improvement
of particular applications involving power electronics circuits widely utilized in
electric vehicles; namely, the auxiliary power supply of electric trains and multi-
voltage DC-networks (as in E-cars, electric trains). Accordingly, the research
objectives were to investigate applications which suffer from disturbances in input
voltage and load currents, to perform tests on laboratory prototypes of the suggested
topologies, and to validate the proposed topologies and control strategies. To this
end, speculation, analysis, simulation and laboratory tests of novel power electronic
topologies and control strategies (specifically designed for investigated applications)
were conducted.

As complementary research objectives, contribution to linear-assisted amplifiers, and
active gate signalling were also considered.


13
4. Account of research progress linking the research papers
This project started with the purpose of investigating medium voltage high power
DC-DC converters that could perform suitably in the application of supplying the
auxiliary equipment of electric trains. The first step was to review available
literature regarding the auxiliary power supply of electric trains and the contributions
of power electronic circuits to this application.

4.1. Preliminary literature review on power electronics in railways
The preliminary literature review was concerned with power system interface with
electrified railways (ER), auxiliary power, hybrid trains, electromagnetic interface
(EMI) and traction for diesel and electric railways. However, its linkage to the rest of
the project is related to the auxiliary power supply, which is developed as a DC/DC
or DC/AC converter.
Auxiliary power supply is a medium/low voltage AC/DC or DC/DC power supply
for onboard devices with a special consideration for safety equipment. In diesel and
electric railways, because of variable operation of traction systems and variation of
overhead voltage, a sort of compromise is taking place between traction and auxiliary
power, which usually affects the performance of auxiliary equipment. The energy
storage unit of hybrid trains can compensate for this deficiency. Other challenges in
railways concern their compatibility with power and communication systems.
The resultant literature review is published in Australasian Universities Power
Engineering Conference (AUPEC) 2007 under the title of Applications of Power
Electronics in Railway System. This paper is presented in Chapter (3).
AS a result of the preliminary literature review, the requirements of the DC/DC
converter suitable for the application of the auxiliary power supply, have been
determined as follows:
Robustness against frequently and significantly variable input voltage
The catenary voltage of electric railways varies significantly depending on
the position of each train in relation to power stations and other travelling
trains.
Robustness against frequently variable load current
Auxiliary load on a train may be partly controlled by passengers. Lightings
and air conditioning loads vary frequently. In addition, the travel condition of
the vehicle (up-hill, downhill, accelerating, decelerating, etc.) varies the
14
power demand of the traction unit; therefore, the auxiliary loads may be
limited by the power demand of the locomotive.
Considering the power network of a railway system, there are several trains
travelling and fewer power stations supplying them. Few power stations distributed
in the network cannot regulate the voltage magnitude over the whole network of
travelling trains; therefore, it is standard to have a wide range of catenary voltage.
For the system considered in this project, the catenary voltage can vary between
1000VDC and 500VDC while the nominal voltage of the auxiliary power is
600VDC. The schematic of the considered electric tram is illustrated in Fig. 1.
Fig. 1: the schematic of the Yarra tram auxiliary power system

Since both step-up and step-down conversions are required, a Positive Buck-Boost
(PBB) converter is chosen to convert variable catenary voltage and supply the
auxiliary equipments with 600VDC. The topology of PBB converter is illustrated in
Fig. 2.

Fig. 2: Positive Buck Boost converter


4.2. Positive Buck Boost (PBB) converter and current storage capacity
With the simplest operation mode, the PBB converter may operate as Boost
converter or a Buck converter depending on the level of input voltage. When the
15
input voltage is more than the desired output voltage (600VDC), the Boost switch
(S
Boost
) turns off and the Buck switch (S
Buck
) operates to chop input voltage same as a
conventional Buck converter (Fig. 3a). On the other hand, when the input voltage is
less than desired output voltage, S
Buck
turns on continuously and S
Boost
operates to
step-up input voltage same as a conventional Boost converter (Fig. 3b).
Studying switching configurations of the PBB converter, flexibility and robustness of
this converter against sudden changes of input voltage and load current has been
examined.
V
out
S
Buck
V
in
R
C
L
D
Buck
S
Boost
D
Boost
V
out
V
in
R
C
L
(a)
(b)

Fig. 3: a) Conventional Buck converter b) conventional Boost converter

The switching configurations of a PBB converter are illustrated in Fig. 4. Switching
configurations which provide operation of a conventional Buck converter are 10
and 00 and switching configurations that realise operation of a conventional Boost
converter are 10 and 11. The switching configuration named 01 is not possible
in conventional Buck or Boost converters. This switching configuration provides a
current circulating loop and as a result, flexibility and robustness against sudden
change of input voltage or load current.
The steady state equations of a PBB converter prove the capability of this converter
to respond immediately when there is a sudden change in input voltage or load
current and show robustness against such disturbances. The output voltage (V
out
) and
the inductor current (I
L
) are formulated as functions of input voltage (V
in
), load
current (I
out
) and duty cycles of S
Buck
and S
Boost
(d
Buck
and d`
Boost
=1-d
Boost
respectively):
16
in
Boost
Buck
out
V
d
d
V

=

(1)

out
Boost
L
I
d
I

=
1

(2)

Equations (1) and (2) imply that if for a given d
Buck
and d`
Boost
, the desired output
voltage is achieved, by multiplying d
Buck
and d`
Boost
in k (where k<1) the output
voltage does not change but the inductor current is multiplied by the factor of 1/k as
is illustrated in Equation (3):

1
1
2 1
1 2 1
1 1

> =

=
=

=
L
L
out
Boost
L out
Boost
L
out in
Boost
Buck
out in
Boost
Buck
out
I
k
I
I
d k
I I
d
I
V V
d k
kd
V V
d
d
V

(3)
Therefore, the PBB converter has the capacity to store some extra current in its
inductor without affecting output voltage. Conventional Buck and Boost converters
do not have such a capacity because they do not have the switching configuration
01.
Having extra current stored in the inductor, the sudden drop of input voltage and
sudden rise of load current may be handled by the extra current and prevent
disturbances affect output voltage.
Fig. 4: switching configurations of PBB converter
17

The capabilities of a PBB converter have been investigated and the results have been
published as a paper titled A General Approach to Control a Positive Buck-Boost
Converter to Achieve Robustness against Input Voltage Fluctuations and Load
Changes in Power Electronics Specialists Conference (PESC) 2008. This paper is
presented in Chapter (4). In this paper, after mathematically proving capacity of the
PBB converter for disturbance rejection, two control strategies have been proposed.
Hysteresis control for its simplicity and vector control (sliding mode control) for its
accuracy are suggested. In addition, the extra switching and conduction loss resulted
from current storage in the inductor is investigated.
The work on PBB converter continued by implementing the proposed control system
on a laboratory prototype to utilize the disturbance rejection capability of PBB
converter. In addition, two fast response control strategies are suggested to minimise
the power loss resulted from extra current storage.

4.3. Fast response control strategies
To minimize the power loss due to extra current storage, fast response control
strategies have been suggested, developed, and tested in this research. By increasing
the inductor current slightly prior to occurrence of an expected disturbance, or as a
response to fluctuations caused by an unexpected disturbance, dynamic performance
of the PBB converter improves while the power loss is minimized. For two
categories of application with expected and unexpected disturbances, Smart Load
Controller (SLC) and Dynamic Hysteresis Band (DHB) are presented.

4.3.1. Smart Load Controller (SLC)
SLC is suggested for applications where there is a pre-knowledge of disturbances in
input voltage and/or load current. As has been mentioned previously, the fluctuation
of overhead voltage for each train in electric railway networks is a result of the
traveling of that train toward or away from the power stations. In addition, operation
of other trains in viscosity affects the overhead voltage. Having a master control
system, trains may be informed of upcoming voltage drops or rises. The SLC may
use this information to apply current storage capacity of a PBB converter to avoid
disturbances that could cause auxiliary voltage fluctuation and cause some internal
system to malfunction or trip.
18
In addition, in case the load changes happen frequently and through a master
controller on board, the SLC may increase the inductor current prior to load change
and avoid disturbances that could cause auxiliary voltage fluctuations. A schematic
of suggested SLC is presented in Fig. 5.

Fig. 5: schematic of the Smart Load Controller (SLC)

In Fig. 5, signal 1 is the load demand or warning of input voltage drop. Signal 2 is
the command of the SLC to the controller of the PBB converter to increase the
inductor current. Signal 3 is the confirmation of the controller of the PBB converter
after the inductor current has been increased sufficiently. Signal 4 is the permission
of the SLC to increase the load. Signal 5 is the signal sent from the controller to the
PBB converter. Wide arrows in Fig. 5 show the power flow.

(a)

(b)
Fig. 6: a) the disturbance caused by load change without SLC and extra current
b) The improvement achieved by utilization of extra current storage with SLC.
The scales are:
For output voltage (Ch 1) is 5V, for output current (Ch 3) is 0.5A, for inductor current (Ch 4) is 2A
19



A laboratory prototype of the PBB converter with SLC is designed to validate the
proposed topology and control strategy. To control the PBB converter a NEC 32-bit
64 MHz micro-controller named V850E/IG3 has been utilized. Some experimental
results are presented in Fig. 6.
In Fig. 6(a) the performance of the converter without SLC after a sever load change
is shown. In Fig. 6(b) the performance of the system has been improved significantly
as a result of utilization of SLC. The SLC signal and increase in the inductor current
prior to load change are illustrated in Fig. 6b.
The results and details of control strategies and power loss reduction achieved by
SLC, are published in a journal paper titled Utilizing Robustness of Positive Buck-
Boost Converter against Input Voltage and Load Current Disturbances published in
Australian Journal of Electrical Engineering Vol. 6 No. 2. 2009. This paper is
presented in Chapter (1).
Investigation of capability of the PBB converter to minimize the dynamics caused by
disturbances in input voltage and load current, shows that the extra current storage
causes extra switching and conduction loss as has been detailed in Chapter (4). A
remedy suggested was to use the extra current storage and its advantages for
applications, where the disturbance is pre-known or predictable (Chapter (1)).
However, there is a variety of applications without either of these characteristics. The
next subsection addresses those applications.

4.3.2. Dynamic Hysteresis Band (DHB)
A general strategy, to use the disturbance rejection capability of the PBB converter
without prerequisite of pre-knowledge or predictability of disturbances, has been
developed to suggest the PBB converter to a wider range of applications. This
strategy is based on the hysteresis method but the hysteresis band is dynamically
varying to enhance the dynamic response of the PBB converter in case of
disturbances.
Since this strategy does not store extra inductor current, it does not need a current
circulating switching state and it may help the performance of basic converters as
well. The strategy has been applied to a conventional Boost converter as well as PBB
20
converter and the achieved enhancements have been compared. Fig. 7 illustrates the
experimental results for load disturbances applied to PBB converter and Boost
converter and the enhancements gained owing to new dynamic hysteresis band
technique.
Fig. 7 (a) illustrates the response of a Boost converter to sudden rise and fall of its
load current. The load current doubles and consequently, the output voltage drops.
The steady state level of output voltage is 20V and it drops to 15V because of load
rise. When the load decreases to its initial level, the output voltage rises to 23V and
slightly oscillates to its steady state level.
Fig. 7 (b) shows the performance of the Dynamic Hysteresis Band (DHB) strategy
when the same load disturbance has happened. The output voltage of the Boost
converter has dropped to 17V after load rise and it has risen to 21V after load current
reduction.
The same disturbance has been applied to the PBB converter with and without DHB
strategy. The voltage drop is same as that for the Boost converter when the load has
increased. Nevertheless, as can be observed in Fig. 7 (c), (d), there is no overvoltage
when the load drops. The reason is that the DHB strategy for PBB converter utilizes
the Buck switch (S
Buck
) to control the inductor current without supplying it to the
output capacitor. In other words, the state 01, which is the current circulating
switching state, has been used to avoid over voltage without excessively charging the
inductor. Fig. 7 (e) illustrates the switching of S
Buck
to avoid over voltage.
The fast response strategy of DHB may be applied to other DC-DC converters as
well. However, since basic DC-DC converters like Buck and Boost do not have a
current circulating switching state, the DHB strategy decreases the lower hysteresis
band when there is an overvoltage (Fig. 7b).






21

a) The overshoot and undershoot of a boost
converter after load change
b) Reduction of output voltage transient by
changing the hysteresis bands After occurrence of
disturbance in Boost converter load


c) The overshoot and undershoot of a PBB
converter after load change.
d) Reduction of output voltage transient by
changing the hysteresis bands After occurrence of
disturbance in PBB converter load


e) Reduction of overshoot by utilization of Buck
Switch in PBB converter

Fig. 7: Experimental results: dynamic hysteresis band for PBB and Boost converters.
The scales are:
For output voltage (Ch 2) is 5V , for inductor current (Ch 1) is 0.5A


Detailed analysis and results of DHB strategy for Boost and PBB converter has been
published in a conference paper entitled Application of Dynamic Hysteresis Band
iL
Vout
Vout
iL
Buck Switch
22
Height Control to Improve Output Voltage Transient in Boost and Positive Buck-
Boost Converters in EPE 2009 conference. The paper is presented in chapter (8).

4.4. Industrial 7.5 kW Prototype
Results and analysis regarding PBB converter were presented to our industrial
partner to receive their agreement on the desirability of the PBB converter and
proposed control strategy for their application. A picture of the industrial prototype
and some of the experimental results are presented here.
Although I had implemented the PBB converter for low voltages and with NEC
microcontroller as a laboratory prototype, for the industrial version of PBB converter
made by our industrial partner, I needed to learn to program another micro-
controller. Schaffler and Associations use TMS320F28335 DSP for their products.
Consulting with engineers at Schafflers company and using their knowledge and
experience I programmed the industrial board of the PBB converter, named Mudo
converter by Schaffler. A picture of the first version of this product is illustrated in
Fig.8.

Fig. 8: Mudo converter: the industrial prototype of the PBB converter

The TMS320F28335 DSP is at the upper end of the picture and is mounted vertically
on the main board. The IGBTs are mounted under the board but drivers may be
recognized by the white transformer box on them.
23
Tests have been carried out to validate the performance of the controller on the
industrial layout. Some results of experiments directed in the laboratory are
presented in Fig. 9.

(a) input voltage sudden changes

(b) Load change in step-up

(c) Load change in step-down

(d) Switching in step-up

(e) Switching in step-down
Fig. 9: experimental results with industrial layout
The scales are:
For output voltage (Ch 1) is 50V, for input voltage (Ch 2) is 50V, for Boost switch voltage (Ch 4) is
50V, for Buck switch voltage (Ch 3) is 50 V, for output current (Ch 4 in b) is 2A, for inductor current
( Ch 4 in a) is 2A.


24
As may be observed in Fig. 9 (b) and (c), the load changes cause small disturbance in
output voltage, which is acceptable by the industrial customer. The noise examined
in input voltage and inductor current in Fig. 9 (c) was resulted from the stray
inductance of the wire connecting the input source to the converter. This issue was
removed when the test was repeated in Schafflers factory with actual voltage
required by the application and the standard connection to loads. Fig 9 (d) and (e)
illustrate the input voltage, output voltage and the voltage across the D
Buck
in Fig. 9
(e) and the voltage across S
Boost
in Fig. 9 (d). These measurements have been carried
out to show the switching of the S
Buck
and S
Boost
switches.
The control strategy of the industrial layout of the PBB converter operates step-up
and step-down conversions depending on the level of input voltage. The controller
generates gate signals by the PWM method. The transition from step-down operation
to step-up operation, is programmed to be smooth, with minimal dynamic oscillation.

4.5. Multi-Output DC-DC converters
In power-systems where there are several loads with different demands and
sensitivities, the structure of the power supplies should be engineered based on
characteristics of the main power supply and requirements of the loads. A general
structure is a single inductor multi-output DC-DC converter. As has been found
during this research, single inductor multi-output DC-DC converters may provide
advantageous properties to loads which are sensitive to voltage fluctuations. In this
section two general topology of single-inductor multi-output DC-DC converters
_developed and investigated during this research, are presented. Each general
topology is suggested for a specific range of applications.

4.5.1. Multi-output PBB converters to supply multi-voltage DC-networks
Studying requirements of different loads commonly utilized in electric vehicles and
electric trains, the main problem was found to be main voltage source fluctuations
and load disturbances. The PBB converter is a good base to devise novel topologies
to address this problem for various onboard loads.
A Multi-Output PBB (MOPBB) converter is suggested for applications of
symmetrical multi-level diode-clamped inverter and multi-voltage DC-networks.
Both of these applications are used in electric trains. The topology of the proposed
converter is presented in Fig. 10a.
25
S
Boost
S1
S
2
S
n-1
D
n
V
n
V
n-1
V2
V1
S
Buck
V
in
Vk
S
k
L
C
2
C
1
C
k
C
n-1
Cn

(a)



(b)
Fig. 10: a) Multi-output PBB converter b) a MOPBB converter connected to a four-level diode
clamped inverter

This converter is suggested to enhance performance of multi-level diode-clamped
inverters utilized for single-phase applications. When multi-level diode-clamped
converters supply highly resistive loads they tend to lose their DC-link capacitors
voltage balance. The MOPBB converter is suggested to supply the DC-link
capacitors by controlled inductor current to balance them despite resistive loads
supplied by the inverter. The connection of the MOPBB converter to a four-level
diode-camped inverter is illustrated in Fig. 10b.
The results of this study are published in a conference paper in EPE-PEMC 2008
tilted A New DC-DC Converter with Multi Output: Topology and Control
Strategies. This paper is presented in Chapter (5).
To investigate the advantages of the multi-output PBB converter, other multi-output
topologies, based on Buck converter and Boost converter, are investigated and
compared with the MOPBB converter in another paper published in ICREPQ 2009.
The title of that paper is A Novel Configuration for Voltage Sharing in Diode-
clamped Topology. This paper is presented in Chapter (7) and it has been accepted
for publication in the ICREPQ journal.
Three topologies of multi-output Buck converter, multi-output Boost converter and
MOPBB converter are introduced and their performance in converting a highly
26
variable input voltage to two regulated output voltages are compared. The capability
of the MOPBB converter to store extra current in the inductor has been shown to be
an advantage for this application.
Both strategies, of Smart Load Controller (SLC) and Dynamic Hysteresis Band
(DHB), have been theorized and experimentally tested on the Multi-Output Positive
Buck-Boost (MOPBB) converter. Both categories of applications with pre-
knowledge or predictability of input voltage or load current disturbance and
applications having unexpected disturbances are covered in this study. The SLC
strategy is more suitable for systems with several loads, which frequently change and
switch, while, the load commands come from a master controller. Therefore, the
master controller may utilize SLC strategy by informing the controller of the DC-DC
converter to store extra current temporarily. When the load change is complete, the
master controller commands the DC-DC converter to reduce the inductor current to
minimize the conduction and switching loss. Such a master controller exists in
electric or hybrid vehicles ranging from E-cars to electric trains.
On the other hand, there are applications where there are too many unexpected
disturbances to let SLC improve the performance of the whole system. In these cases,
the strategy of DHB is suggested. The DHB strategy does not store extra current in
the inductor when the converter is operating in steady state; therefore, the switching
and conduction loss is minimized. The DHB strategy activates when the disturbance
causes an overvoltage or under-voltage. When the output voltage rises over or drops
below a certain band, the hysteresis band changes to alternate the average level of the
inductor current immediately and enhance the dynamic performance of the MOPBB
converter. When the output voltage drops, the higher hysteresis band rises to increase
the average inductor current immediately and when the output voltage rises, the S
Buck

is utilized to avoid over voltage without over charging the inductor. Switching
combinations of a double-output PBB converter is illustrated in Fig. 11.
The analysis has been developed for both step-up and step-down conversions. In
step-down conversion, the Boost switch S
Boost
in Fig. 11 is turned off continuously
and in step-up conversion, the S
Buck
turns on continuously. Fig. 11 (b) and Fig. 11 (c)
illustrate steady state equivalent of MOPBB converter in step-down and step-up
conversions respectively.
27
S
Boost
S
1
D
2
V
2
V
1
S
Buck
V
in
R
2
R
1
C
1
C
2
L
Continusly turned on in step up
(Idling switch)
Switching in step down
Switching in step up
Continusly turned off in step down
(Idling switch)
Operating to perform voltage sharing

(a)

(b)

(c)

(d)

(e)
Fig. 11: a) double-output Buck-Boost converter
b) double-output-Buck equivalent circuit in step-down c) double-output-Boost equivalent circuit in step-up
d) Switching configurations of double-output-Buck e) switching configurations of double-output-Boost

The switching state named 010 in Fig. 11 (d) and (e) is the equivalent of state 01
in the PBB converter and provides the capability of extra inductor current storage
28
and enhancing the dynamic response of the MOPBB converter. This state is only
utilized when there is disturbance. The disturbance may be pre-known or not. In
either case, the 010 state is activated by SLC or DHB strategies to enhance the
dynamics.
After designing a laboratory prototype of a double-output PBB converter (Fig. 12),
experimental results carried out to validate capability of the topology of MOPBB
converter and the functionality of proposed control strategies of SLC and DHB. The
results are presented here in Fig. 13.

Fig. 12: the laboratory prototype of the double output Positive Buck-Boost converter

Fig. 13 (a) illustrates the performance of DHB strategy on MOPBB converter in step-
down operation when the load disturbance happens. When the load current has raised
suddenly, the output voltage V
1
have dropped, immediately, the DHB has activated
and increased the upper hysteresis band to reduce output voltage drop. When the load
has decreased back to its initial level, the output voltages have increased and the
DHB has reduced the lower hysteresis band to avoid voltage overshoots.
29
Fig. 13: experimental results
Response of double-output-Buck-Boost converter with DHB and over-voltage reduction a) step-down b) step-up
Response of double-output-Buck-Boost converter with SLC and over-voltage reduction c) step-down d) step-up
Response of e) double-output-Buck f) double-output-Boost to same load disturbances
Transition between step-up and step-down conversions with over-voltage reduction and g) DHB h) SLC


(a)

(b)

(c)

(d)

(e)

(f)

(g)

(h)
30

Fig. 13 (b) illustrates the performance of the MOPBB converter in step-up
conversion. As with the step-down operation, the DHB strategy has been activated
when under voltage or over voltage has happened because of load disturbance. The
output voltage fluctuations have been effectively attenuated.
Fig. 13 (c) illustrates the performance of the MOPBB converter in same step-down
conversions and same load disturbances, but this time the disturbances have been
pre-known and the SLC strategy has been realized. The inductor current has been
increased prior to disturbance and the output voltages have been preserved.
Fig. 13 (d) shows the step-up conversion when the SLC is applied. The inductor
current has been increased prior to load change and the disturbance has not affected
the output voltages as a result.
To illustrate the effectiveness of SLC and DHB strategies, the switch S
Buck
in step-up
conversion and the switch S
Boost
in step-down conversion has not been operating in
experiments resulted in Fig. 13 (e) and (f) which are same step-down and step-up
conversions with same disturbances respectively. As can be observed, the dynamics
are much more than cases where either of DHB or SLC strategies had been applied.
In the last two traces of Fig. 13, the performance of the MOPBB converter is
examined when the input voltages change suddenly. In Fig. 13 (g), DHB strategy has
altered the hysteresis band to enhance the dynamics and in Fig. 13 (h) the SLC
strategy has monitored the input voltage and has increased the inductor current to
avoid output voltage fluctuations because of input voltage disturbances.
Separate from the dynamics enhancements achieved by DHB and SLC strategies, the
MOPBB converter has another interesting capacity, which is promising for
applications that may be categorized as multi-voltage DC-networks, like hybrid
vehicles. In DC-networks, there are several DC voltages required for different loads.
As may be observed in all of traces of Fig. 13 the level of V
2
has not been disturbed.
The reason is the inductor current is time-shared between output voltages; therefore,
the controller may prioritize outputs when there is a lack or excess of inductor
current. In all cases shown in Fig. 13, V
2
has been prioritized and has been kept
steady by the controller while V
1
has dynamics. Nevertheless, the severity of
dynamics in V
1
may be reduced by a suitable control strategy like SLC or DHB.
The analysis and results of this study have been submitted to the IET Journal of
Power Electronics. This paper has been provisionally accepted for publication.
31
Currently, the paper titled Multi-Output Buck-Boost Converter with Enhanced
Dynamic Response to Load and Input Voltage Changes is under review. This paper
is presented in Chapter (10).

4.5.2. Multi-output DC-DC converters to supply diode-clamped inverters
The capacity of energy storage in PBB-based converters may contribute to the
application of multi-level diode-clamped inverters supplying high power factor
loads.
In the application of multi-level diode-clamped inverters, there is a strong
dependency between the modulation index of inverter, the power factor of the load
and the switching loss. To minimize the switching loss, adjacent switching must be
considered. Adjacent switching combinations are transferable to each other by
turning only one switch on or off. By switching between adjacent switching
combinations, the switching loss is minimized. The switching loss minimization is
important because it saves energy and increases the average working life of switches
by decreasing their working temperature. Therefore, realistic switching strategies do
not switch between non-adjacent switching combinations. However, the limitation of
switching with adjacency, leads to dependency of DC-link voltage balancing to the
power factor of the load of multi-level inverter. As a result, the stable modulation
index of multi-level inverters is limited by the power factor of their load. Fig. 14
illustrates this dependency for a single-phase and a three-phase multi-level inverter.
The black curve shows the maximum possible modulation index as a function of the
angle of the load current in relation to the load voltage. The dashed line shows the
same dependency for three-phase multi-level inverter. As may be observed, the
modulation index is not limited for low power factor loads. For applications with low
active power flow and high reactive power flow, like the Static VAR Compensator
(SVC), and Unified Power Flow Controller (UPFC) the conventional topology of the
multi-level diode-clamped inverter performs with high modulation indices. However,
when the majority of the transferred power is active, like the single-phase AC
voltage provided in electric trains, the modulation index drops and reduces the
quality. A specially designed multi-output DC-DC converter may regulate DC-link
voltages while the inverter is supplying highly resistive loads. As a result, the
modulation index may increase close to one and the quality of load voltage may
32
increase. As has been mentioned before the MOPBB converter may serve for this
application.

Fig. 14: Modulation index of single-phase symmetrical diode-clamped inverter versus R-L load power
factor

Multi-level diode-clamped inverters, which are supplied with asymmetrical DC-link
voltages, can increase the number of load voltage levels without increasing the
number of switches or diodes. The concept of asymmetrical multi-level diode-
clamped inverters has been addressed in the literature. When the inverter is
connected to a constant DC source and the constant voltage divides equally between
DC-link capacitors, there is not an option of asymmetrical multi-level inverter.
However, when a multi-output DC-DC converter is installed to connect the main DC
source to the multi-level inverter, the DC-link capacitor voltages may be regulated
asymmetrically.
The advantage of asymmetrical DC-link voltages over symmetrical DC-link voltages
is illustrated in Fig. 15. The left hand side circuit and adjacent vector diagram (Fig.
15 (a)); illustrate the topology of the symmetrical diode-clamped inverter and its
adjacent switching combinations.
33
sym asym
V V
4
3
=
(a) (b)
Fig. 15: Single-phase four-level diode clamped inverter configuration and adjacent vectors
a) Symmetrical b) Asymmetrical DC-link voltages

As can be observed for DC-link voltages equal to V
sym
the voltage levels of the
inverter are 0, V
sym
, 2V
sym
,

and

3V
sym.
When the DC-link voltages are regulated
asymmetrically and V
1
is charged to have a voltage twice as V
2
and V
3
(V
1
=2V
asym
,

V
2
=V
3
=V
asym
), the load voltage levels achievable by the inverter are 0, V
asym
,
2V
asym
,

3V
asym
, 4V
asym
. The extra two levels achieved by asymmetrical four-level
diode-clamped inverter, improve the quality of load voltage and reduce the filter size.
Another advantage of the asymmetrical multi-level inverter is smaller voltage levels
(a) (b)
34
for equal total DC-link voltages. The smaller voltage level results in lower dv/dt and
less EMI emission.
As is illustrated in Fig. 15 V
asym
=V
sym
. The topology and the adjacent switch
combinations of the asymmetrical four-level diode-clamped inverter are illustrated in
Fig. 15 (b).
The advantages of asymmetrical multi-level inverters justify designing a multi-output
DC-DC converter to perform both tasks of DC-link voltage balancing and
asymmetrical regulation of DC-link capacitor voltages. This converter has been
driven from the basic topology of PBB converter. The current circulating state in
topologies based on PBB converter gains flexibility for the converter, which helps in
applications where the load current varies frequently and quickly. In these cases, the
current circulating switching combination holds the inductor current when the load
current has been reduced. When the load current is likely to rise frequently, the
current circulating may store extra current to enhance the dynamic response of the
DC-DC converter when the load current rises quickly. Frequent and severe changes
in load current is a characteristic of the multi-level inverters, therefore the PBB
converter is an appropriate base for the voltage sharing converter designed to supply
the asymmetrical multi level inverter. The Basic Three-Output Voltage-Sharing
(3OVS) converter is illustrated in Fig. 16 (a). The PBB converter, as the base of the
Basic-3OVS converter is illustrated in Fig. 16 (b).
In the topology shown in Fig. 16(a) by turning S
3
on and turning all other switches
off, the current circulating switching combination occurs and the inductor current
closes its path through S
3
and D
2

Other switching combinations direct the inductor current to one, two, or all outputs to
regulate them asymmetrically and despite imbalance current demanded by the
inverter.
Although, three switches and three diodes have been consumed to develop the Basic-
3OVS multi-output DC-DC converter, the advantages of high modulation index
despite highly resistive load is achieved owing to balanced DC-link capacitor
voltages. In addition, the higher quality and lower EMI profile compensate for the
expenses of the elements. The expense of the inductor of the Basic-3OVS converter
is compensated by smaller capacitors used for DC-links.
35

(a)

(b)
Fig. 16: a) the Basic Three-Output Voltage Sharing (3OVS) converter
b) Positive Buck-Boost converter as the core of Basic-3OVS converter.

Although the Basic-3OVS can regulate DC-link voltages asymmetrically, the range
of the total output voltages is limited by the level of input voltages. To widen the
operation range of the 3OVS converters, two complementary topologies are
suggested to perform voltage sharing for lower and higher input voltages. When the
input voltage is too low for the Basic-3OVS converter to regulate DC-link capacitor
voltages to the level demanded by the inverter, the topology of the Boost-3OVs
converter is suggested. When the level of the input voltage is too high to let the
Basic-3OVs converter regulate the DC-link voltage to the level required by the
inverter, the Buck-3OVS converter is suggested. The topologies of Buck-3OVS
converter and the Boost-3OVS converter are presented in Fig. 17 (a) and (b)
respectively.
36
(a)
(b)
Fig. 17: a) Buck-3OVS converter b) Boost-3OVS converter

The switches and diodes added to the topology of the Basic-3OVS converter to
develop Buck and Boost 3OVS converters are colored in red.
To validate the proposed converters, a Boost-3OVS converter has been designed
(Fig. 18) and an extreme test has been performed to examine if the Boost-3OVS
converter can step-up the input voltage and regulate DC-link voltages
asymmetrically. The test was to regulate DC-link voltages at V
1
=20V, V
2
=10V, and
V
3
=10V from an input voltage of 25V. Then a 100 resistance is connected to
different combinations of DC-link capacitors as happens when a four-level diode-
clamped inverter is connected and operating. To have assuring results, the connection
37
to each terminal lasted for 4sec therefore, the capability of the Boost-3OVS converter
in maintaining DC-link voltages when the output currents are imbalanced is
confirmed. Fig. 18 illustrates the laboratory prototype of 3OVS converters. The
results of this test are presented in Fig. 19.



Fig. 18: the laboratory prototype of the Boost 3OVS converter








38
(a)


(b)

(c)
Figure 19: a) load connections b) load voltage and current c) inductor current and output voltages
39
In Fig. 19 the DC-link voltages, the load current and the connection of 100 resistor
to output terminals is shown. Furthermore, for application with variable load
voltages, like drive control, the capability of the Boost-3OVS converter to follow a
varying voltage reference is investigated. The experimental result assuring this
capability is illustrated in Fig. 20.


Figure 20: Boost-3OVS following varying reference voltages.

The output voltages of the Boost-3OVS converter are following a triangular wave
with two frequencies. The ratio of V
1
=2V
asym
, V
2
=V
asym
, V
3
=V
asym
are preserved.
The new topologies of three 3OVS converters and analytic and experimental results
of this study are presented in a journal paper accepted to be published in the
international journal for computation and mathematics in electrical and electronic
engineering (COMPEL). The paper is titled A New Family of Multi-Output DC-DC
Converter Topologies to Supply an Asymmetrical Four-Level Diode-Clamped
Inverter and it has been accepted for publication. In Chapter (2), this paper is
presented. Mathematical modeling confirming mentioned capabilities of 3OVS
converters is carried out in that paper.

40
For the specific application of residential photovoltaic cell utilization, there is a need
for stepping up the voltage produced by the PV cell to have appropriate DC-link
voltages for the inverter to perform. The quality of the load voltage of the inverter
may improve by adopting multi-level topologies. The fact that the majority of single-
phase loads are highly resistive, demands voltage balancing which may be
effectively performed by the Boost-3OVS converter. The advantage of a better EMI
profile is also useful for train systems with communicational and signaling
applications in viscosity. To address this application, the Boost-3OVS converter is
suggested for the particular application of single-phase PV utilization. The topology
of the Boost-3OVS converter connected to the single-phase four-level diode-clamped
inverter is illustrated in Fig. 21.

Fig. 21: Boost Three-Output Voltage Sharing (Boost-3OVS) topology connected to four-level
inverters

The analysis has been directed to examine the performance of the combination of the
Boost-3OVS converter and an asymmetrical four-level diode-clamped inverter
supplying a highly resistive load. Afterwards, the performance of this combination is
tested using laboratory prototypes of the Boost-3OVS converter and asymmetrical
four-level diode-clamped inverter. The tests included varying the input voltage,
which is the case with PV cell in varying sunlight intensity. The experimental results
are presented in Fig. 22.



41


(a)

(b)

(c)

(d)
Fig. 22: Experimental results a) DC-link voltages and inductor current. b) Input voltage, the load
voltage, and the load current c) zooming of input voltage drop d) zooming of input voltage rise.

As may be observed in Fig. 22, the load voltage and current are almost in phase. The
load is almost resistive and its power factor is 0.999. Since the power factors of all of
the residential appliances are not this close to unity, it is useful to examine the
42
performance of suggested combination for loads with lower power factors. Two tests
with different power factors and different load current magnitudes have been directed
and results are presented in Fig. 23.


(a)

(c)

(b)

(d)
Fig. 23: Experimental results
Low inductive load (PF=0.95, I
M
=0.8A): a) DC-link voltages and inductor current b) load voltage and load current
High inductive load (PF=0.8, I
M
=4A): c) DC-link voltages and inductor current d) load voltage and load current

Fig. 23 illustrates that for higher load currents and lower power factors, the
combination of Boost-3OVS converter and single-phase four-level diode-clamped
inverter operates satisfactorily. The results of this study have been submitted to IEEE
Transaction on Power Electronics. The paper is titled: Voltage Sharing Converter
to Supply Single-Phase Asymmetrical Four-Level Diode-Clamped Inverter with High
Power Factor Loads and it has been provisionally accepted for publication. This
paper is presented in Chapter (11).



43

4.7. Wideband and bidirectional positive Buck-Boost converters
Another DC-DC converter based on PBB converter proposed and analyzed during
this research, was Wide-band PBB converter (WPBB). This converter is proposed for
a type of communicational receivers called linear assisted switching RF amplifiers.
In these amplifiers, the received signal is divided into two domains of low frequency
and high frequency. A linear amplifier amplifies the high frequency partition and the
low-frequency is amplified by a switching circuit. The advantage of such a hybrid
amplifier is to use a switching circuit with higher efficiency where the linear
amplifier may be replaced by a switching DC-DC converter. The design challenge is
to determine the switching frequency of the switching circuit correctly, to optimize
the power loss and maximize the tracking ability of the whole system. The border
between high frequency and low frequency elements of the received signal is
determined according to the optimum switching frequency.
The WPBB converter is suggested to be utilized as the switching circuit. The
advantage of this circuit is its ability to store extra inductor current and increase the
maximum traceable frequency without increasing the switching frequency.
To utilize the capacity of extra inductor current storage, the vector control strategy is
developed for WPBB converter to maximize its tracking frequency. The topology of
the proposed converter is illustrated in Fig. 24.

Fig. 24: wide-band PBB

As may be followed from Fig. 24, by turning S
W
on the inductor current conducts
through the output capacitor reversely and the energy stored in the capacitor transfers
to the inductor. The power transfer may quicken by increasing the inductor current.
By transferring the energy stored in the inductor to the input power source when the
level of the inductor current is too high, the efficiency of the system may be
improved further. To achieve this advantage a recuperation switch is added to
44
provide a power path from inductor to initial DC voltage source. The Bidirectional
PBB (BiPBB) converter is proposed. The topology of BiPBB converter is illustrated
in Fig. 25.

Fig. 25: Bidirectional PBB

When S
Bi
is turned on the inductor current is directed to input voltage to transfer the
power from the inductor to the main source .To show the performance of the
proposed converter a simulation result is presented in Fig. 26.

45
Fig. 26: performance of a) conventional PBB b) WPBB c) BiPBB when the voltage reference changes
from 20V to 90V and back to 20V

As can be observed in Fig. 26, the conventional PBB converter takes a long time to
change its output voltage from 90V to 20V (Fig. 26 (a)). In comparison, WPBB
converter uses the inductor current to discharge the output capacitor and decreases
the transition time significantly. Although, the inductor current may increase since
the energy of the output capacitor charged to 90V is transferred to the inductor (Fig.
26 (b)). Having bidirectional PBB converter, the extra energy may transfer to input
voltage source and the inductor current may reduce quickly (Fig. 26c).
The results of this study are published in the paper titled: Bidirectional Positive
Buck-Boost Converter submitted to EPE 2008. This paper is presented in Chapter
(6).

4.8. Efficient spike reduction by Active Gate Signalling (AGS)
In the last months of this research, some studies on gate signaling of isolated gate
power switches have been done. The motivation of this part of research was the
experimental results conducted on the industrial prototype of PBB converter.
The spikes observed in Fig. 9 (d) and (e) are important because they may cause
Electromagnetic Interference (EMI) issues. For the application aimed by our
industrial partner, the spikes were acceptable because there were not any system in
viscosity vulnerable to EMI noise produced by Mudo converter.
However, investigating this problem in general view, the voltage spikes may be
reduced by increasing the gate resistance. A higher gate resistance reduces the
switching speed. Therefore, it reduces di/dt, which is the physical cause of the
voltage spikes when it is exposed to stray inductances of connecting wires. However,
simple remedy of increasing gate resistance increases the switching loss
significantly. The extra switching loss affects the efficiency of the system severely.
The other solution is to tailor the gate signal in a way to reduce di/dt with minimum
reduction in switching speed and efficiency. This method is called Active Gate
Signaling (AGS) and has been mainly investigated in academic publications. The
AGS technique is utilized to reduce the voltage and current spikes. A general circuit
of a converter with stray inductance and inherent capacitor of an insulated-gate
switch is illustrated in Fig. 27.
46

Fig. 27: simplified clamp inductive switching circuit

The investigation results are published as a conference paper in EMC symposium
Adelaide Australia 2009. The paper is titled Efficient Voltage/Current Spike
Reduction by Active Gate Signaling. This paper is presented in Chapter (9).
Further investigation show that the larger oscillating voltage and current spikes may
generate because of resonance between stray inductances and inherent capacitors of
isolated gate switches (MOSFET, IGBT) in the several nanosecond interval of
switching. The simulations show that the increased gate resistance does not reduce
the resonant spikes efficiently while the AGS method may target the EMI causing
resonance accurately.
Some simulations are presented to show the performance of increased resistance and
AGS in reduction of such high frequency noises.
Fig. 28 illustrates three cases compared together. Fig. 28 (a) illustrates the resonant
high frequency noises in three cases:
Original case: the fast switching without AGS.
Increased resistance: the slow switching without AGS
Active Gate Signaling
As may be observed, the oscillations are in the range of 20MHz frequency. The
original case has high frequency noise comparable with the DC signal in magnitude.
The magnitude of the noise may be reduced either by increasing the gate resistance
or AGS. However, the oscillations are much more persistent when the gate resistance
is increased. The oscillation is efficiently damped with utilization of AGS. Fig. 28
(b) compares these three cases in frequency domain. As may be observed the
increased resistance case shows better noise attenuation in lower frequencies but the
AGS reduces the resonant frequency much better. Of course, the advantage of higher
efficiency of AGS is valid as is illustrated in Fig. 28(c).


47

(a) Resonant noises

(b) Frequency domain comparison

(c) Switching power
Fig. 28: comparison between three cases of fast switching, slow switching with increased gate
resistance and active gate signaling












48
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[38] J. Pou, R. Pindado, & D. Boroyevich, Voltage-balance limits in four-level diode-clamped
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[39] G. P. Adam, , S. J. Finney, A. M. Massoud, & B. W. Williams, Capacitor balance issues of the
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[40] A. Yazdani, & R. Iravani, An accurate model for the dc-side voltage control of the neutral
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[41] Grzesiak, L.M.; Tomasik, J.; DC Link Balancing Method in Back-to-Back UPS System with
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[42] Liu, Y.H.; Arrillaga, J.; Watson, N.R.; Capacitor voltage balancing in multi-level voltage
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[43] C. Newton & M. Sumner A novel arrangement for balancing the capacitor voltages of a five
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[45] A. Von jouanne, S. Dai ,and H. Zhang, A multilevel inverter approach providing dc-link
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[47] Sahu, B.; Rincon-Mora, G.A.; A high-efficiency linear RF power amplifier with a power-
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[48] Cesari, Albert; Cid-Pastor, Angel; Alonso, Corinne; Dilhac, Jean-Marie; A DSP structure
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52
Publications
















































53
Chapter 1

This chapter presents the first journal paper published during my research. In
this paper, experimental results of implementation of the current storage
capacity of PBB converter have been presented. In addition, the concept of
Smart Load Controller (SLC) has been introduced and tested.
This paper has been published in Australian Journal of Electronic and
Electrical Engineering Vol. 6No. 2.























54
Utilizing Robustness of Positive Buck-Boost Converter against Input
Voltage and Load Current Disturbances


Arash A Boora, Student member, IEEE, Firuz Zare, Senior member, IEEE, Gerard Ledwich,
Senior member, IEEE, Arindam Ghosh, Fellow, IEEE
School of Engineering Systems, Queensland University of Technology
arash.boora@student.qut.edu.au


Abstract
A Positive Buck- Boost (PBB) converter is a known DC-DC converter that can
operate in step up and step down modes. Unlike Buck, Boost, and Inverting Buck
Boost converters, the inductor current of a PBB can be controlled independently of
its voltage conversion ratio. In other words, the inductor of PBB can be utilised as an
energy storage unit in addition to its main function of energy transfer.
In this paper, the capability of PBB to store energy has been utilised to achieve
robustness against input voltage fluctuations and output current changes.
The control strategy has been developed to keep accuracy, affordability, and
simplicity acceptable.
To improve the efficiency of the system a Smart Load Controller (SLC) has been
suggested. Applying SLC extra current storage occurs when there is sudden loads
change otherwise little extra current is stored.


Due to copyright restrictions, this
article is not available here.
Please consult the hardcopy thesis
available from QUT Library
77

Chapter 2
This chapter presents the last manuscript of a journal paper submitted to the
international journal for computation and mathematics in electrical and
electronic engineering (COMPEL). This paper introduces a family of multi-
output voltage sharing DC-DC converters to supply asymmetrical diode-
clamped inverters.
























78

A New Family of Multi-Output DC-DC Converter Topologies to
Supply an Asymmetrical Four-Level Diode-Clamped Inverter

Arash A. Boora, Firuz Zare, Arindam Ghosh
Abstract-Multi-level diode clamped inverters have the challenge of capacitor
voltage balancing when the number of DC-link capacitors is three or more. On
the other hand, asymmetrical DC-link voltage sources have been applied to
increase the number of voltage levels without increasing the number of switches.
An appropriate multi-output DC-DC converter can resolve the problem of
capacitor voltage balancing and utilize the asymmetrical DC-link voltages
advantages. Furthermore, there is a possibility of operation at high modulation
index despite reference voltage magnitude and power factor variations.
A family of multi-output DC-DC converters is presented in this paper. The
application of these converters is to convert the output voltage of a PV panel to
regulate DC-link voltages of an asymmetrical four-level diode clamped inverter
utilized for domestic applications. To verify the versatility of the presented
topology, simulations have been directed for different situations and results are
presented. Some related experiments have been developed to examine the
capabilities of the proposed converters.

I. Introduction
Symmetrical Diode-clamped multi-level inverters (Fig.1a) with n equal DC-link
voltages may produce up to 2n+1 voltage levels at their outputs. Having
asymmetrical DC-link voltages either by several input voltage sources or DC-DC
converters, may increase the number of output voltage levels with the same number
of switches (Nami et al., 2008, Kadir and Hus
sien, 2005, Mariethoz and Rufer, 2004, Song-Manguelle, 2001)
Conventionally, there is a single DC source (V
in
) connected to several capacitors
with no DC-DC converter. The capacitors must be balanced to be equal to V
in
/n by
the inverter control strategy (dashed lines show the conventional method of
connection without DC-DC converter).
According to literature (Pou et al., 2005, Adam et al., 2008, Yazdani and Iravani,
2006) large input capacitors are required to keep the ripple of DC-link voltages at
79

acceptable levels. Also there is a considerable dependency between modulation
index, power factor, and the possibility of DC-link capacitor voltage balancing
(Khajehoddin et al., 2008, Busquets-Monge et al., 2008). The modulation index is
defined as the ratio of the magnitude of the fundamental component of the inverter
load voltage to total DC-link voltages.



Figure 1: four-level diode-clamped multi-level inverter with DC-DC converter as supplier


Having a control strategy, which considers switching between adjacent switch
combinations to minimize switching loss, the modulation index is limited by load
current angle and should be below specific limits to let the DC-link voltage balancing
strategy perform. For example, for pure resistive load, the modulation index is
below 0.637.
Some works suggesting auxiliary hardware to balance DC-link voltages are
presented in (Nami et al., 2008, von Jouanne et al., 2002, Newton and Sumner, 1998,
Busquets-Monge, S. et al.). In (von Jouanne et al., 2002, Newton and Sumner, 1998,
Busquets-Monge, S. et al.), there is no step up/down and the total DC-like voltages
are equal to input voltage. Therefore, they are not perfect designs for circumstances
with highly variable input voltage (PV source multi-level inverters) or applications of
multi-level inverters with highly variable output voltage (motion control).
In (Nami et al., 2008), a multi-output Boost converter is presented and has been
suggested to supply a four-level single-phase diode-clamped inverter. However, with
80

deeper circuit analyses, it can be observed that multi-output Boost topology fails to
supply a middle DC-link capacitor for high power factor loads. The reason may be
observed in Fig. 2a. When C
2
is charging, C
1
is also charging. Therefore, the load
connected across C
1
must be more than the load for C
2
to let the converter operate in
steady state.
The reference (von Jouanne et al., 2002) has not suggested any topology for more
than two DC-link capacitors. The capacitor voltage balancer introduced in (Busquets-
Monge, S. et al.) is shown in Fig. 2b.
A combination of the balancer introduced in (Busquets-Monge, S. et al.) with a
conventional boost converter which steps up the source voltage, consumes more
passive (two inductors) and active (2 diodes and 1 or 2 switches) elements than the
topology presented in this paper. The extra inductors increase the size, weight, and
expense of the whole system. The topology presented in this paper is single-inductor,
which is preferred to the topology illustrated in Fig. 2b because of its physical
characteristics and from commercial point of view.
In addition, the concept of the topology presented in this paper is to supply DC-link
capacitor as much as the inverter demands directly from the inductor current.
However, the balancer allows the DC-link voltage to turn unbalanced and then
operates the balancer switches to regulate output voltages. Therefore, there is
redundant power transfer (from the main source to DC-link capacitors by the Boost
converter and then, between DC-link capacitors through the balancer) which causes
more ripple on DC-link voltages compared to the topology presented in this paper.
Additionally, higher number of switches and redundant power transfer causes extra
switching and conduction loss.
Investigating other multi-output DC-DC converter topologies in literature, separate
loads are usually considered to be supplied by multi-output converters (Chen;, 2009,
Yilei et al., 2005, Oliver et al., 2006, , Parayandeh et al., 2006). Therefore, their
outputs are not connected in series as in (Nami et al., 2008, Boora et al., 2008) and
they are not designed to supply multi-level inverters.
81


(a)

(b)
Figure 2: a) multi-output Boost converter b) DC-link voltage balancer and Boost converter.

Presented topologies in this paper can regulate DC-link voltages asymmetrically and
independent from input voltage variation so they may boost input voltage to achieve
DC-link voltages higher than the (von Jouanne et al., 2002, Newton and Sumner,
1998, Busquets-Monge, S. et al.) for the same input voltage. Additionally, it has
been designed to supply more current to C
2
than C
1
. On the other hand, the proposed
converter may utilise a higher modulation index since the level of DC-link voltages
may be reduced when the magnitude of reference voltage of the multi-level inverter
is reduced.
A family of DC-DC converters have been proposed to supply the mentioned 4-level
diode-clamped inverter with asymmetrical DC-link voltages to achieve an extra level
and balance the voltages of the DC-link capacitors. The proposed topologies are
shown in Fig. 3. The aimed application is residential utilization of PV panels, which
requires operating with residential voltage and unidirectional power flow. Utilizing
the combination of asymmetrical four-level diode-clamped inverter and proposed
converters as the intermediate between PV panel and the final load, high power
factor loads may be supplied with higher quality and lower Electro-Magnetic
Interference (EMI).
82


(a) Basic three-output voltage-sharing converter

(b) Buck three-output voltage-sharing converter

(c) Boost three-output voltage-sharing converter

Figure 3: Proposed voltage sharing topologies

A four-level diode-clamped inverter (Fig. 1) can be connected to one of the 3-Output
Voltage Shearing (3OVS) converters, which are illustrated in Fig. 3.
In this paper, steady-state equations for the above-mentioned cases are extracted to
show the operating range of the converters, with an asymmetrical four-level diode-
clamped inverter as the main application.
Since the 3OVS converters can control the level of their output voltages, there is the
possibility of working with a high modulation index despite varying reference
83

voltage of the inverter and high power factor of the load. High modulation index has
advantages of lower THD. Varying input voltage (for example, PV applications in
different shading conditions) may force conventional multi-level inverters to widely
change their modulation index and affect output quality and THD (Daher et al.,
2008). Moreover, utilising a DC/DC converter which can regulate DC-link voltage
to keep the modulation index high, can reduce the shaft voltage of inverter driven
motors (Erdman et al., 1996, Fei, 2000) while their speed is controlled by voltage
amplitude and frequency (for example constant V/f speed control).

II. Switching configurations
Switching configurations of the proposed multi-output DC-DC converters are
illustrated in Fig. 4.

Figure 4: Switching configurations of the proposed converters


The configurations in the solid blue box are possible switching configurations of
Basic-3OVS converter. The red (-.-) box is for the Boost-3OVS converter. Green (--)
box is for the Buck-3OVS converter.
84

On examining the six switching configurations of Basic-3OVS, it can be observed
that C
2
(by switching state 1), and C
1
(by switching state 3) can be charged
individually. Besides, C
1
may be excluded when C
2
and C
3
are charging (by
switching state 2). As will be confirmed with steady state equations, these
switching configurations for the 3OVS converters provide promising candidates for
supplying an asymmetrical four-level diode-clamped inverter.
The switching states 6, 7, and 8 let the Buck-3OVS chop the input voltage and
step down output voltages. The switching state 10 lets the Boost-3OVS converter
increase the inductor current and step up output voltages.
Examining the converter presented in (Nami et al., 2008) (Fig. 2a), switching states
3, 4, 5, and 10 are all possible power paths of that topology. Here it is clear that there
is no path to charge C
2
without charging C
1
. Therefore, when the power factor of the
inverter load is close to 1, the multi-output Boost topology fails to balance
asymmetrical DC-link voltages.
Table I shows the switching states in relation to the condition of each switch.
Additionally, the charging or discharging of capacitors and the inductor in each state
are shown. The name of each switching state is noted in Table I which, corresponds
with Fig. 4 and Fig. 5.

Table 1: switching state of each switch at each switching configuration
and charging condition of capacitors an inductor.















Fig. 5 illustrates the switching states in relation to output currents and the input
current in the steady state. The narrow-dashed red line is the inductor current when
the ripple is neglected. The output currents and the input current are illustrated in the
bold red line.
S7 S3 S4 D5 S1 D6 S2
D2
name
C1 C2 C3 L
- 1 0 0 0 - 1 0
- 0 1 0 0 - 1 1
- 0 0 1 0 - 1 2
- 1 0 0 1 - 0 3
- 0 1 0 1 - 0 4
- 0 0 1 1 - 0 5
- 1 0 0 0 1 0 6
- 0 1 0 0 1 0 7
- 0 0 1 0 1 0 8
1 0 0 0 0 - 1 9
1 0 0 0 1 - 0 10
Discharge 1 conducting
Charge 0 blocking
Steady - No Switch
85

Basic
Buck
Boost
5 4 3 2 1 0 6 7 8 10 9
i
3
(t)
i
2
(t)
Gate signal of S
3
Gate signal of S
4
Switching of D
5
Gate signal of S
7
Gate signal of S
1
Switching of D
6
Gate signal of S
2
i
1
(t)
i
0
(t)
i
in
(t)
i
L
(t)
i
L
(t)
i
L
(t)
i
L
(t)
i
L
(t)
-i
L
(t)
-i
L
(t)
0
0
0
0
0
Switching state

Figure 5: Gate signals, switching states and output currents for Basic, Buck, and Boost 3OVS
converters

Comparing output currents and input current with the switching of input and output
switches, it may be observed that Input switches (S
1
, S
2
/D
2
, and D6) are
complementary and output switches (S
3
, S
4
, D
5
, S
7
) are complementary. i
2
(t) and i
3
(t)
are totally controlled by output switch S
4
and diode D
5
. i
in
(t) is solely controlled by
input switch S
1
. i
0
(t) and i
1
(t) are controlled by both input and output switches.
To realise the proposed converter requirements, forward blocking voltage is listed in
Table 2.






86

Table 2: Blocking voltages
Basic-3OVS
S
1
S
2
D
2
S
3
S
4
D
4
D
5
D
6
S
7

V
in
-V
1
No Switch V
in
-V
1
V
2
+V
3
V
3
V
2
V
2
+V
3
No Switch No Switch
V
in
-2V No Switch V
in
-2V 2V V V 2V No Switch No Switch
Boost-3OVS
S
1
S2 D
2
S
3
S
4
D
4
D
5
D
6
S
7

V
in
-V
1
No Switch V
in
-V
1
V
2
+V
3
V
3
V
1
+V
2
V
1
+V
2
+V
3
No Switch V
1
+V
2
+V
3

V
in
-2V No Switch V
in
-2V 2V V 3V 4V No Switch 4V
Buck-3OVS
S
1
S2 D
2
S
3
S
4
D
4
D
5
D
6
S
7

V
in
V
1
V
in
-V
1
V
2
+V
3
V
3
V
2
V
2
+V
3
V
in
No Switch
V
in
2V V
in
-2V 2V V V 2V V
in
No Switch

III. Four-level single-phase inverter as the load
As presented in (Nami et al., 2008) and will be considered in this paper, the DC-link
voltages of the asymmetrical inverter are V
1
=2V, V
2
=V, and V
3
=V where V is the
voltage level. This pattern of voltages is not definite and may be altered to achieve a
higher quality or lower reverse voltage blockage on switches. For the proposed DC-
link voltages (V
1
=2V, V
2
=V, V
3
=V), the output voltages of the inverter would be 0,
V, 2V, 3V, and 4V. In addition, with the mentioned inverter DC-link voltages,
the inverter may be switching with adjacent switch combinations. When the voltage
level changes, only one switch of the inverter turns on/off so, the switching loss will
be minimised. The adjacent switch combinations are illustrated in Fig. 6b by double-
sided arrows.
Before formulating the equations, it is required to model the asymmetrical four-level
diode-clamped inverter as a load for the proposed 3OVS converters. Fig. 6 shows the
instantaneous load of Basic-3OVS converter when the inverter operates between
adjacent output voltage levels. Let us assume the fundamental component of the
output voltage of the inverter is;

( ) t sin V ) t ( v
M
=

(1)

Where, V
M
and are the magnitude and frequency of the fundamental component of
the reference output voltage of the inverter. For example, when the inverter load is
connected to switch combination of 4V in Fig. 6b, output currents are given as
follows.

87

( ) ( )
( )
( )
( ) ( )

= =
=
=
= =


t sin I ) t ( i t i
t i
t i
t sin I ) t ( i t i
M
M
3
2
1
0
0
0

(2)


Where, I
M
and are the magnitude and the phase of the load current. Output currents
for other load connections are given in Fig. 6b.
Explaining the operation of the asymmetrical four-level diode-clamped inverter
shown in Fig. 6b, the double-sided arrows illustrate the switching between output
voltage levels (4V, 3V, 2V, V, 0). As far as v(t) is between each two levels,
switching between the two relevant configurations (Fig. 6b) is performed by the
inverter. By switching the inverter according to double-sided arrows in Fig 6b, the
adjacency between voltage levels will be guaranteed.
As may be observed in Fig. 6b when the inverter switches between its voltage levels,
the output currents (i
3
(t)-i
0
(t)) of the 3OVS converters switch between i(t), 0, and
i(t). Where, i(t) is the inverter load current.
Negative levels will be achieved with the same connections as positive levels. The
only difference is that the inverter flips the load polarity for negative voltage levels.

1
,
2
, and
3
illustrated in Fig 6a are the exact phases during which the inverter
reference crosses the output voltage levels (V, 2V, and 3V).
( )
( )
( )

=
=
=
M
M
M
V V sin Arc
V V sin Arc
V V sin Arc
3
2
3
2
1

(3)


So for 3V<V
M
<4V;
( )
( )
( )
( )
( )
( )
( )
( )

< < < <

< < < <
< < < <

)
`

< < < <

< < < <
< < < <
< < < <
< < < <
V t v t
V t v V t
V t v V t
level
V t v V t
V t v V t
V t v V t
V t v V t
V t v t
0
2
3 2
5
4 3
4 3
3 2
2
0 0
1
1 2
2 3
3 2
2 3
3 2
2 1
1

(4)
These equations are directly extracted from Fig. 6. For 2V<V
M
<3V, the 5-level
portion in Eq. 4 will be omitted and, the inverter will be working with 4-level
88

performance. Steady state equations are developed for Basic, Buck, and Boost 3OVS
together.
Considering steady state condition which implies that capacitor voltages are constant
and capacitor currents are zero, output currents (i
0
(t), i
1
(t), i
2
(t), and i
3
(t)) are given as
functions of the inductor current and duty cycles in Eq. 5. This equation is sufficient
to develop the model of the combination of 3OVS converters and single-phase
asymmetrical four-level diode-clamped inverter. However, dynamic equations of the
proposed converters, which may be used to study dynamic aspects of the
combination and present the proposed converters from a functional point of view, are
presented in the Appendix.












89

(b)
Figure 6: a) the voltage levels of the inverter b) connection of inverter load to 3OVS in different
levels. Double-sided arrows show adjacent switch configurations. Faded switches are turned off.

( ) ( ) ( ) ( ) ( ) ( )
( ) ( ) ( ) ( ) ( )
( ) ( ) ( )
( ) ( ) ( )

=
=
=
+ =
t i t D t i
t i t D t i
t i t D t D t i
t i t D t D t D t i
L
L
L
L
5 3
4 2
2 3 1
7 6 1 0
(5)

Where, D
j
(t) is the duty cycle of switch S
j
or diode D
j
. The duty cycle of each
switch/diode is defined as the ratio of the on-time of that switch/diode to the

(a)

AC
V
V
2V
Vin
v(t)
+
_
0
AC
V
V
2V
Vin
v(t)
+
_
i
2
=i(t)
i
1
=-i(t)
V
AC
V
V
2V
Vin
v(t)
+
_
i
3
=i(t)
i
1
=-i(t)
2V
AC
V
V
2V
Vin
v(t)
+
_
i
3
=i(t)
i
0
=i(t)
4V
AC
V
V
2V
Vin
v(t)
+
_
i
2
=i(t)
i
0
=i(t)
3V
AC
V
V
2V
Vin
v(t)
+
_
i
1
=i(t)
i
0
=i(t)
2V

90

switching cycle (sum of on-time and following off-time) of that switch/diode. In the
Basic-3OVS converter, D
7
(t) and D
6
(t) are zero. In the Boost-3OVS converter, D
6
(t)
is zero and in the Buck-3OVS converter, D
7
(t) is zero. Assuming an inverter as a
load for the 3OVS converters, input/output power equality is valid in a half period of
inverter voltage reference. Thus:
( ) ( ) t t P
T
t t P
T
T T
out in


=
2 2
0 0
2 2

(6)

( ) cos I V t t i V
T
M M in in
T
2
1 2
2
0
=

(7)


To complete power equality equations, input current (i
in
(t)) must be calculated as a
function of the inverter load current and the duty cycles. The input current as a
function of the inductor current is;

( ) ( ) ( ) t i t D t i
L in 1
=

(8)


According to Eq. 5 and Eq. 8, i
in
(t) is given as follows.

( )
( ) ( ) ( )
( ) ( )
( )
( ) ( ) ( )
( ) t i
t D t D t D
t D
t i t i
t D t D t D
t i
in L 0
7 6 1
1
0
7 6 1
1

+
=
+
=

(9)


Thus;
( )
( ) ( ) ( )
( ) cos I V t t i
t D t D t D
t D
T
V
M M in
T
2
1 2
2
0
0
7 6 1
1
=
+

(10)


i
0
(t) is included in Fig. 6a. Examining Fig. 6a in relation to Fig 6b, i
0
(t) is determined
as Eq. 11 because the load current is conducted to i
0
(t) when v(t) is above 2V and
i
0
(t) is 0 for v(t) below 2V. Therefore;

( )

< <
< <
< <
=



t
t t sin I
t
) t ( i
M
2
2 2
2
0
0
0 0

(11)


An example of i
0
(t) is illustrated in Fig. 6a.
91

Therefore, the power equality equation is:

( )
( ) ( ) ( )
( )

cos I V t t sin
t D t D t D
t D
T
I V
M M M in
2
1 2 2
2
7 6 1
1
=
+

(12)


In equation 12, between
2
and -
2
;
( )
( ) ( ) ( )
( )
( ) ( )
( )
( ) ( )

>

=
<
+
=
=
=
+
OVS Boost
t D t D
t D
OVS Buck
t D t D
t D
OVS Basic
; Therefore
t D t D t D
t D
3 1
3 1
3 1
7 1
1
6 1
1
7 6 1
1

(13)


Where, for steady state condition is constant because S
1
, D
6
or S
7
are operating to
validate power equality. The ratio of D
1
(t )/(D
1
(t)+D
6
(t)) in Buck-3OVS is kept
constant to reduce the average of the input voltage and reduce the input power and
the ratio of D
1
(t )/(D
1
(t)-D
7
(t)) in Boost-3OVS is kept constant to boost the inductor
current and increase the input power. So;
( )

cos I V t t sin
T
I V
M M M in
2
1 2 2
2
=

(14)

Solving this equation results in:
in
M
in
M
V
) t ( D ) t ( D ) t ( D
) t ( D
V
V
V
cos
7 6 1
1
2
4
4
+
= =

(15)

Applying Eq. 3 for
2
;
2
7 6 1
1
2
4
1
2 4
1
2
|
|
|
|
|

\
|
+
=
|
|

\
|
=
|

\
|
|

\
|
|

\
|
|

\
|
in
M M
in
M M
V
t D t D t D
t D
V V
V
V V
V

(16)

Where, the fraction of D
1
(t)/(D
1
(t) +D
6
(t)-D
7
(t)) is considered constant. Examining
the topology of Boost-3OVS in Fig.3c, when S
1
is turned on D
2
should not be
conducting. Therefore;
2
2
in
in
V
V V V < <

(17)
92

Interestingly based on averaging over fundamental frequency, it is evident from (16)
that V is not constrained by and thus the performance of the 3OVS converters is
not affected by the power factor of the load.
Fig. 7a shows V
M
and voltage levels of V, 2V, 3V, and 4V. To have a measure of
output voltage levels in comparison with V
in
, the level of V
in
is given in Fig. 7a.
This level is equal to V
in
for Basic-3OVS (D
6
(t)=D
7
(t)=0). V
in
is more than V
in
for
Boost-3OVS and less than V
in
for Buck-3OVS.

(a)

(b)
Figure 7: a) the graph of the relationship between voltage levels and V
M

b) The relationship between the angle of load current and modulation index with and without 3OVS
converters

93

The number of the levels the inverter can use depends on Eq. 16. Formulating the
condition of over modulation (V
M
>4V) and the condition of 5-level (0, V, 2V, 3V,
4V) performance (4V>V
M
>3V) Eq. 18 is developed. The fact that by the reduction of
V
M
the number of voltage levels do not drop below four levels (0, V, 2V, 3V) is
another advantage of the combination of the 3OVS converter and asymmetrical four-
level inverter.
Fig. 7b shows the dependency of the modulation index (V
M
/4V) to the load current
angle in cases of conventional four-level diode clamped inverter (in Black line), 4-
level performance of the combination of the proposed converters and four-level
diode-clamped inverter (in Blue line), and 5-level performance of the combination of
the proposed converters and four-level diode-clamped inverter (in Red line).
Downward arrows on the black line show that this line is the maximum possible
modulation index. Upward arrows on blue and red lines show that those lines are the
minimum possible modulation index.
As illustrated in Fig. 7b with 4-level and 5-level operations, the modulation index has
increased to above 0.75 and 0.8 respectively. The bold black curve shows the limit
of the modulation index as a function of load angle for the direct connection of input
voltage to DC-link capacitors (conventional four-level diode-clamped inverter).

+
= =
+
= =
= =

in
M M
in
M M
M M
V
D D D
D
V V V
V
D D D
D
V V V
V V V
7 6 1
1
7 6 1
1
3 2
4
3
5 4
3
0 2

(18)


For Basic-3OVS, where D
6
(t)=D
7
(t)= 0, thresholds of over modulation (V
M-OM
) and
4-level performance (V
M-4L
) are constant. (Eq. 19)

= <
= >

modulation over no V V V
e performanc level 5 V V V
in OM M M
in L M M

3 2
3
5 4
4

(19)


For V
M
>V
M-OM
,

over modulation happens and for V
M
<V
4L
,

4-level performance
happens. On the other hand, Buck-3OVS converter applies D
6
(t) and reduces V

to
94

increase the 5-level working area, when V
M
is reduced below V
M-4L
and Boost-
3OVS applies D
7
(t) to increase V when V
M
is increased

over V
M-OM
to increase
modulation

range.
As a result, the inverter can have 5-Level performance for V
M
>V
M-OM
with a Boost-
3OVS, and 5-Level performance for V
M
<V
M-4L
with a Buck-3OVS.


From an economical point of view, the combination of 3OVS and four-level diode-
clamped inverter has three or four extra switches and an inductor in comparison with
conventional four-level structure. However, by controlling the asymmetrical DC-link
voltages of the inverter, an extra level will be achieved which improves the quality of
the combination compared with symmetrical five-level diode-clamped inverters, and
economically justifies the proposal of this combination. Besides, advantages of
balanced inverter DC-link voltages, with small capacitors and a high modulation
index for a wide range of V
M
(0 to 4V), are also achievable.
Next section describes the control strategy proposed to realize capabilities of
proposed 3OVS converters for supplying an asymmetrical four-level diode-clamped
inverter.

IV. Control Strategy
As the modelling suggests there is the capability to supply DC-link capacitors of an
asymmetrical four-level diode- clamped inverter with proposed topologies. However,
a simple hysteresis based control strategy may operate the proposed converters to
supply an asymmetrical four-level diode-clamped inverter. The single parameter,
which needs to be determined before applying the hysteresis method, is the voltage
level (V). As has been mathematically carried out, the Basic-3OVS converter
monitors V
M
and V
in
and uses Equation (16) for =1 to calculate V. on the other
hand, Buck-3OVS converter applies D
6
(t) to reduce to below 1 and reduce voltage
level from Equation (16) as a result. Boost-3OVS converter applies D
7
(t) to increase
to above 1 and increase the voltage level (V) as a result.
For each one of the three introduced converters, a control strategy has been
developed and applied in simulation results. The control strategies are designed to
handle the combination of four-level diode-clamped inverter and one of 3OVS
converters. A simplified block diagram and a flowchart for the control strategy of
each 3OVS are presented. In the flowchart, v
B
is allowed voltage error for DC-link
95

voltages V
2
and V
3
. For V
1
, 2v
B
is considered as the allowed voltage error. i
B
is the
allowed current error in cases of Buck-3OVS and Boost-3OVS converters. In the
flowchart, v
B
is allowed voltage DC-link voltages V
2
and V
3
. For V
1
, 2v
B
is
considered as the allowed voltage error. i
B
is the allowed current error in cases of
Buck-3OVS and Boost-3OVS converters. The choice of v
B
and i
B
depends on the
particular application.
k
vi
is the gain applied to modify the reference voltage level (V). k
iv
is the gain
applied to modify the reference of the inductor current based on DC-link voltage
errors. k
ii
is the gain applied to modify the reference of the inductor current based on
the difference between the inductor current and output current magnitude (I
M
).

A. Basic-3OVS
As clarified in the previous section, the DC-link capacitor voltages are dependant on
V
M
when a Basic-3OVS controls them (Eq. 15, 16 when D
6
(t)=D
7
(t)=0). Therefore,
the reference voltage level V is the controlling parameter to keep the input power
equal to the output power (P
out
=

V
M
I
M
cos).
Fig. 8a shows the block diagram of control strategy for the Basic-3OVS.
The Reference V block collects the inductor current (i
L
(t)) and the inverter load
current (i(t)). As mentioned before, the inductor voltage average in steady state is
zero in a half period of the inverter reference, therefore i
L
(t) has some harmonics
with 2 frequency in addition to its DC level and switching frequencies (Fig. 9).
Therefore, the Reference V block in Fig. 8 tries to stabilise the inductor current in
a half cycle of the inverter reference period by changing the reference V as illustrated
in Fig. 9. The reference V is changed when the reference voltage of the inverter
crosses zero. i(t) and i
L
(t) are shown in Fig .8 and Fig. 9.

96


Figure 8: a) the block diagram of Basic-3OVS control strategy
b) The control flowchart of Basic-3OVS control strategy

The S
1
and S
4


switches and diode D
5
are operating to control the DC-link voltages
(V
1
=2V, V
2
=V, V
3
=V). Moreover, switching signals come from Voltage Control
block, which collects the DC-link voltages and drives the switching signals
accordingly. A flowchart detailing the control strategy of the Basic-3OVS converter
is presented in Fig. 8b. Explaining the decisions made in the flowchart, when V
1
drops below 2V-2v
B
the controller

interprets that output current i
1
(t) driven by the
inverter has been increased. From equation (5), D
1
(t) should increase to compensate
for increased i
1
(t).

Therefore, switch S
1
turns on to increase D
1
(t). On the other hand,
when V
1
has increased over 2V+2v
B
, S
1
turns off to decrease D
1
(t) and decreased
i
1
(t) according to (5). Other decisions made in the flowchart can be explained by
equation (5) as well. Decrease and increase in V
2
and V
3
are compensated by
increase and decrease in D
4
(t) and D
5
(t) respectively.
Examining Fig. 9, the function of 3OVS converter can be understood as transferring
the ripple on the DC-link capacitors to the current ripple on the inductor.
This improvement preserves the quality of the inverter performance when the power
factor and V
M
change.
97



Figure 9: The current of 3OVS inductor in relation to output voltage and current of the inverter and
reference voltage level (V)


B. Buck-3OVS
Buck-3OVS has an input switch which can chop the input voltage to satisfy the
power equation by utilising D
6
(t) in (Eq. 15, 16 when D
7
(t) =0). So, the voltage level
(V) may be chosen arbitrarily as far as:

2
4
1
2
|
|

\
|
<
in
M M
V
V V
V


(20)

In other words, the control system applies diode D
6
to stabilize the inductor current
by controlling the input power of the Buck-3OVS. According to equations (13, 14)
when D
6
(t) increases the input power reduces.
Fig. 10a shows the block diagram of Buck-3OVS control strategy. Comparing the
control strategy of Basic-3OVS and Buck-3OVS, the main difference is the constant
reference V in Buck-3OVS. The extra switch of Buck-3OVS is used to control power
equality. So, the controlled parameter in Buck-3OVS converter is output voltages,
and its reference may be chosen according to V
M
(Eq. 21) to set the modulation
index to 1.
98

= =
=
4
2
2 3
1
M
M
V
V V
V
V

(21)

A flowchart detailing the control strategy of the Basic-3OVS converter is presented
in Fig. 10b. The controller generates the reference of the inductor current by
examining the sum of DC-link voltages and inverter load current. The reference
inductor current will be increased when DC-link voltages have not reached their
reference. The reference inductor current will be reduced when the inductor current
is more than the peak of the inverter load current. The inductor current is controlled
by switching the inductor current path between S
1
and D
6
. When the inductor current
increases over i
ref
(t)+i
B
, the controller turns S
1
and S
2
off to force the inductor current
to conduct from D
6
and decreases since the inductor voltage is negative when D
6
is
conducting. According to equation (16), increase in D
6
(t) reduces , V, and input
power (P
in
). When the inductor current reduces to below i
ref
(t)-i
B
, the controller turns
S
1
on to increase the inductor current by increasing the input power.
The controller controls output voltages based on equation (5) and utilizing a
hysteresis method as has been explained for Basic-3OVS converter and is illustrated
in Fig. 10b.
99


Figure 10: a) the block diagram of Buck-3OVS control strategy
b) The control flowchart of Buck-3OVS control strategy

C. Boost-3OVS
Boost-3OVS has an extra output switch, which can be utilized to increase the
inductor current the same as a conventional boost converter. According to (16, 17),
the voltage level (V) may be chosen arbitrarily as far as:
2
4
1
2 2
|
|

\
|
> >
in
M M in
V
V V
V
V

(22)

The control system produces the reference inductor current by examining output
voltages (controlled parameters with references suggested in Eq. 21). Moreover, it
utilises switch S
7
to control the inductor current. Fig. 11a shows the block diagram of
the Boost-3OVS control strategy.
100

V1,V2,V3
iref=iref+kiv(4V-V1-V2-V3)
iL(t)<iref(t)-iB
Turn S3 off
Turn S4 off
Turn S7 on
iL(t)>iref(t)+iB Turn S7 off
v(t)
Current
Control
V
3
V
2
V
1
i
L
V
in
i(t)
Reference V
Equation (21)
iref=iref -kii(iL(t)-IM)
(a)
(b)
V1<2V-2vB
Turn S2 off
Turn S1 on
V1>2V+2vB
Turn S2 on
Turn S1 off
V2<V-vB
Turn S3 off
Turn S4 on
V2>V+vB Turn S4 off
V3<V-vB
V3>V+vB
Turn S4 off
Turn S3 on
y
y
y
y
y
y
y
y
S
1
D
2
S
3
S
7
S
4
D
5
Turn S3 off
V1+V2+V3
iL(t),i(t)
Four
Level
Diode
Clamped
Inverter
i(t)
V1+V2+V3
iL(t)
V3
V2
V1
S7 Signal
Voltage
Control
VM

Figure 11: a) the block diagram of Boost-3OVS control strategy
b) The control flowchart of Boost-3OVS control strategy

As observed in Fig. 11a, the controller requires examining the total DC-link voltage
to decide if it has reached the voltage reference. Accordingly, the Current Control
block varies the inductor current reference and utilises S
7
to reach the inductor
current reference.
The same as the Basic-3OVS control strategy, the DC-link voltages are controlled by
the switching of S
3
, S
4
, S
1
with signals coming from Voltage Control block. The
controller regulates output voltages based on equation (5) and utilizing a hysteresis
method as has been explained for Basic-3OVS converter and is illustrated in Fig.
11b.
A flowchart detailing the control strategy of the Boost-3OVS converter is presented
in Fig. 11b. The controller generates the reference of the inductor current by
examining the sum of DC-link voltages and inverter load current. The reference
inductor current will be increased when DC-link voltages have not reached their
reference. The reference inductor current will be reduced when the inductor current
101

is more than the peak of the inverter load current multiplied by the factor of V
M
/V
in
.
When v(t) is close to V
M
, Boost-3OVS

is operating like a boost converter with an
output voltage of V
M
, output current of I
M
, and input voltage of V
in
,

so the inductor
current must be V
M
/V
in
times more than load current.
The inductor current is controlled by operation of S
7
and

S
1
as is illustrated in Fig.
11b. Same as a conventional Boost converter when S
7
and S
1
are turned on the
inductor voltage is positive and its current increases linearly with time. D
7
(t)
increases , V, and input power (P
in
) according to equation (16).
The block diagrams presented in this section are representative of the performance of
the control system when the converter is settled in steady state condition. The start-
up routine of the proposed combination of 3OVS converters and four-level diode-
clamped inverter is not included in this paper for the sake of simplicity.

V. Simulation Results
Simulations have been directed to illustrate the performance of the proposed
converters for variable V
M
and loads with different power factors. In addition, a
simulation with non-linear load has been conducted.
The inverter voltage reference has been changed to show different working points of
the 3OVS converters and transients from one voltage reference to another.
Additionally, the load power factor has been changed during the operation to
illustrate the dynamic of the proposed converters when load changes. Moreover,
output currents are illustrated.
In the simulation results shown in Fig 12, Fig. 14, and Fig. 15, the reference
frequency is 50Hz and the load is 10 resistance in series with 2mH inductance. The
capacitance at the output of the 3OVS converters are C
1
=1mF, C
2
=2mF, and
C
3
=1mF. The middle capacitor is larger to support the output current i
2
(t) which is
more than the other output currents. The switching frequency of the inverter is 5kHz
and the switching frequency of 3OVS converters does not rise above 2kHz because
of adjusted hysteresis band. V
in
in all cases is 200V.
102


(a)

(b)
Figure 12: the simulation result for Basic-3OVS a) output voltage of the inverter, load current of the
inverter and DC-link voltages b) output currents of the Basic-3OVS converter in comparison with load
current


Fig. 12a illustrates the steady state performance of Basic-3OVS. At 0.1s the
reference voltage magnitude has changed from 210V to 100V, and at 0.16s the
voltage magnitude has changed from 100V to 210V. V
1
, V
2
, and V
3
have change
according to Eq. 16 to keep power equality. When the reference voltage is 210V, the
inverter is working in 5- level area (5L in Fig. 7). However, when the reference drops
to 100V the inverter is working in a 4-level area (4L in Fig. 7). Fig. 12b illustrates
103

the average of output currents. The load current is also shown in all of slides to ease
comparison. The Basic-3OVS converter has achieved to balance DC-link voltages
despite imbalanced output currents.

(a)

(b)
Figure 13: the simulation result for Basic-3OVS. Output voltage of the inverter, load current and DC-
link voltages,
a) when the power factor of the load changes during operation
b) when the characteristic of non-linear load changes

104

Fig. 13a illustrates the response of the proposed combination to change of the power
factor of the load. PF starts with the value of 0.8 lagging at 0.5sec it changes to 0.99
lagging and at 0.56sec changes to 0.8 leading. The Basic-3OVS converter has
regulated DC-link voltages regardless of PF changes. The PF of the load has changed
by adding inductors parallel with the initial inductor of an RLC load.
To examine the robustness of the proposed converters, a simulation has been
developed to investigate the performance of the Basic-3OVS converter when the load
is non-linear. Fig. 13b illustrates the results. The characteristics of the load have
changed during the simulation and Basic-3OVS converter has achieved regulating
DC-link voltages. However, for the Basic-3OVS converter the level of V changes
slightly to keep power equality valid.
Unlike Basic-3OVS, Buck-3OVS can apply D
6
(t) and reduce its output voltages to
allow the inverter to work in a 5-level area when the voltage reference magnitude has
reduced below V
M-4L
in Eq. 19 for D
6
(t)=D
7
(t)=0.
Fig. 14 illustrates the steady state performance of Buck-3OVS. The input voltage of
3OVS converter is 200V. The reference voltage has dropped from 210V to 100V at
0.1s and has risen to 210V from 100V at 0.16s but the inverter has worked with five
voltage levels at all times. Buck-3OVS can achieve a higher modulation index for
lower V
M
.

Figure 14: The simulation result for Buck-3OVS. Output voltage of the inverter, load current and DC-
link voltages.
105

Boost-3OVS applies S
7
to boost DC-link voltages and increase the modulation range
of the inverter. Considering Eq. 17, the Boost-3OVS converter is simulated and the
results are presented in Fig 15.

Figure 15: The simulation result for Boost-3OVS: Output voltage of the inverter, load current and DC-
link voltages

Fig. 15 demonstrates the performance of Boost-3OVS (Fig. 3c). The input voltage of
3OVS is 200V. The voltage reference of the inverter has dropped from 350V to
250V at 0.1s and has risen from 250V to 350V at 0.16s.
The Boost-3OVS converter has applied S
7
to increase the DC-link voltages of the
inverter, so it has achieved working in the 5-level area (Fig. 7).

VI. Experimental results
A laboratory prototype of Boost-3OVS is designed (Fig. 16). The controller has been
developed using an NEC 32-bit 64MHz V850/IG3 microcontroller. Output
capacitors are 2.2mF and the inductor is 7mH. Voltage level is 10V (V
1
=20V,
V
2
=V
3
=10V) and input voltage is 25V. Switching frequency is around 3kHz.
106


Figure 16: hardware setting
To validate the claimed capabilities of the proposed converter, an extreme test has
been performed: a 100 resistor is used as the load. This load is manually switched
to have different voltage levels.
The connection of load to DC-link capacitors is shown in Fig 17a. Load voltage and
current are shown in Fig 17b. Output voltages and inductor current are shown in Fig
17c.










107

Figure 17: a) load connections b) load voltage and current c) inductor current and output voltages
(a)


(b)

(c)
108

Fig. 17a, b, and c are synchronous. The load connection is shown in Fig. 17c as well.
Applied load connections are chosen according to Fig. 6b to relate this experiment to
the application of the asymmetrical four-level diode-clamped inverter. As observed
in Fig. 17 the Boost-3OVS converter has achieved the regulation of output voltage
despite imbalanced output currents. However, the controller has adjusted the inductor
current for each load connection.
The laboratory prototype is designed to show the ability of the converter to regulate
all output voltage despite unbalance output current. Although the resistance of output
load is 100 and the output current is between 100mA to 400mA, the time interval
that the load is connected to the different terminals of the converter is 4 seconds,
which is more than enough to discharge output capacitors or unbalance them. For
example, when the load is connected across C
2
that maintains 10V we have;

V V .
mF .
mA sec
C
tI
V I
t
V
C
Load
Load
10 8 181
2 2
100 4
>> =

= = =

(23)

Because of laboratory restrictions, we cannot experiment high voltages and high
powers but applying such a long connection time to each possible terminal and
maintaining all output voltages proves the ability of the converter to balance DC-link
capacitor voltages.
Since this paper suggests the changing of DC-link voltages according to V
M
, the
capability of the Boost-3OVS to track varying reference is also tested (Fig. 18). The
voltage level changes between 15V and 22V as a triangular wave with two periods of
4.4s and 2.2 s.

Figure 18: Boost-3OVS following varying reference voltages.
109

A laboratory prototype of an asymmetrical four-level diode-clamped inverter is
designed to conduct experiments on the complete combination of the Boost-3OVS
converter and asymmetrical four-level diode-clamped inverter. Fig. 19 illustrates the
results of this experiment for two different loads. In Fig. 19a and 19b, the load
current has a magnitude of 0.8A and a power factor of 0.95. As can be observed in
Fig. 19a DC-link voltages has been maintained as V
1
=40V, V
2
=20V, and V
3
=20V.
The inductor current is also illustrated. Fig. 19c and 19d shows the result of the same
experiment for a load current with a magnitude of 4A and a power factor of 0.8
lagging. In both cases, the load voltage frequency is chosen to be 167Hz.

(a)

(c)

(b)

(d)
Fig. 19: Experimental results
Low inductive load (PF=0.95 , I
M
=0.8A): a) DC-link voltages and inductor current b) load voltage and
load current
High inductive load (PF=0.8 , I
M
=4A): c) DC-link voltages and inductor current d) load voltage and
load current



110

VII. Conclusion
The three-output voltage sharing converters presented in this paper have been
mathematically analysed and proven to be appropriate to improve the quality of the
application of PV by means of four-level asymmetrical diode-clamped inverter
supplying highly resistive loads.
Balanced and asymmetrical voltage at the input of the inverter and a high modulation
index for a wider range of reference voltage magnitude are the advantages of the
proposed combination of 3OVS converters and diode-clamped inverter.
The number of switches used in the proposed converter is compensated by the extra
voltage level produced through the controlled asymmetrical inputs of the inverter. In
addition, the size of DC-link capacitors would be smaller than their conventional
counterparts.
Simulation results have been presented to illustrate the performance of the proposed
converter. Some experiments have been performed to test the capabilities of Boost-
3OVS as an example.

Appendix

Dynamic equations of 3OVS converters are presented in this section. In addition, the
state space form of dynamic equations is formulated to present a functional view of
the DC-DC converter.
Considering Fig. 3 and writing KCL equations at midpoints of DC-link voltages,
currents conducted to DC-link capacitors and derivation of capacitor voltages as
functions of inductor current (i
L
(t)) and duty cycles (D
j
(t)) are calculated in (24).

( )
( ) ( ) ( ) ( ) ( ) ( ) ( )
( )
( ) ( ) ( ) ( ) ( ) ( ) ( )
( )
( ) ( ) ( ) ( ) ( ) ( ) ( ) ( )

= + + = =
+ + = =
+ = =
t i t i t D t i t i t i t D t i
dt
t dV
C
t i t i t i t D t D t i
dt
t dV
C
t i t i t D t D t D t i
dt
t dV
C
L C L C
C L C
L C
3 5 2 2 4 3
3
3
1 1 2 3 2
2
2
0 7 6 1 1
1
1
(24)

Eliminating i
Cj
(t) from right hand side of equations (24) results in (25) that is
derivation of DC-link voltages as functions of duty cycles, inductor current, and load
currents.
111

( )
( ) ( ) ( ) ( ) ( ) ( ) ( )
( )
( ) ( ) ( ) ( ) ( ) ( ) ( )
( )
( ) ( ) ( ) ( ) ( ) ( )

+ + = =
+ = =
+ = =
t i t i t i t i t D t i
dt
t dV
C
t i t i t i t D t D t i
dt
t dV
C
t i t i t D t D t D t i
dt
t dV
C
L C
L C
L C
0 1 2 5 3
3
3
0 1 7 3 2
2
2
0 7 6 1 1
1
1
1
(25)
Dynamic equation of the inductor current is given in (26) and is rewritten as a
function of input voltage, DC-link voltages and duty cycles in (27).
( )
( ) ( )( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( )( ) 0 0
7 3 2 1 5 2 1 4 1 3 1 2 6 1
t D t V t V t V t D t V t V t D t V t D t V t D t D V t D
dt
t di
L
in
L
+ + + + + + + + =
(26)
( )
( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) t V t D t V t D t D t V t D t D t D V t D
dt
t di
L
in
L
3 5 2 5 4 1 5 3 2 1
+ + =

(27)

The space state form of the dynamic equations of the 3OVS converters is presented
in (28).
( )
( )
( )
( )
( ) ( ) ( ) ( ) ( ) ( ) ( ) ( )
( )
( ) ( ) ( )
( ) ( ) ( ) ( )
( )
( )
( )
( )
( )
( )
( )
( )(
(
(
(
(
(

(
(
(
(
(
(

+
(
(
(
(
(
(

(
(
(
(
(
(

+ +

+
=
(
(
(
(
(
(

(
(
(
(
(
(

t i
t i
t i
V t D
t V
t V
t V
t i
.
t D t D t D
t D t D
t D
t D t D t D t D t D t D
t V
t V
t V
t i
C
C
C
L
in L L
0
1
2
1
1
2
3
7 6 1
7 3
5
5 3 2 5 4 5
1
2
3
1
2
3
1 0 0 0
1 1 0 0
1 1 1 0
0 0 0
0 0 0
0 0 0 1
0 0 0
0
0 0 0
0 0 0
0 0 0
0 0 0
(28)

The controlling quantities are duty cycles of available switches in each topology. The
controlled variables are DC-link voltage and inductor current. The output current
(i
0
(t), i
1
(t), and i
2
(t)) are determined by load. In this paper, a single-phase
asymmetrical four-level diode-clamped inverter is considered as the application and
the inverter supplies a linear load since it is the common case. These current and the
input voltage act as the inputs of the system.

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113


Fig. 20: simulation with the same parameters of experiment results presented in
Fig. 19(a,b)
a) DC-link voltages and inductor current
b) Output voltage and load current (scale: 1/30)

Fig. 21: simulation with the same parameters of experiment results presented in
Fig. 19(c,d)
a) DC-link voltages and inductor current
b) Output voltage and load current (scale: 1/5)
115

Chapter 3

This chapter presents the first paper published during my research. The essence
of the preliminary literature review about applications of power electronics in
train systems is presented in this chapter.
This paper has been published in Australian Universities Power Engineering
Conference (AUPEC) 2007.





































116
Application of Power Electronics in Railway System

Arash A. Boora*, Firuz Zare, Arindam Ghosh, Gerard Ledwich

School of Engineering Systems
Queensland University of Technology
Gardens Point Campus
2 George St, GPO Box 2434
Brisbane, QLD 4001, Australia

*email: arash.boora@student.qut.edu.au

Abstract
Power system interface with electrified railways (ER), auxiliary power, hybrid trains,
electromagnetic interface (EMI) and traction are reviewed in this paper for diesel
electric trains and ERs. Auxiliary power supply is a low voltage AC/DC power
supply for onboard devices with an important consideration for safety equipment. In
diesel electric railways because of variable train speed, a sort of compromise is taking
place between traction and auxiliary power which usually affects auxiliary equipment
performance. Hybrid trains energy storage unit can compensate this deficiency.
Other challenges in railways are their compatibility with power and communication
systems.

1. Introduction
Railways are basically categorized to Electrified and Diesel-electric systems. This
classification dictates a majority of their characteristics.
Auxiliary power is a low voltage AC and DC power supply for different onboard
devices. The other challenge in railways is desirable performance of auxiliary power
supply to keep lights, air condition etc. regardless of trains running mode and rail
conditions. Considering that safety equipment is powered by an auxiliary power
supply elucidates its importance. When it comes to auxiliary equipment reliability in
diesel electric because of varying running mode a sort of compromise is taking place
between traction and auxiliary power. This usually affects auxiliary equipment
performance. Hybrid trains energy storage unit can make up this inefficiency.
Different kinds of railways ex. high speed, trams, intercity, freight etc. has these
challenges in diverse extents. There are some general approaches that can be involved
in all or some of coming categories like [74] which briefly reports about a railway
117
system simulation considering all various aspects of control, traction, auxiliary
power, braking etc. Another general assertion is [14] which explain chinas railway
potential for new technologies.

2. Train systems
There is a general power based classification in [3]: Light rails with less than 1MW.
Medium loads are commuter (3-4 MW) and high speed intercity (4-6 MW) trains.
Very high speed commuters (TGV: 8-10MW) and freight trains (EU: 6-10MW, US:
18-24MW) are high demand railways. To establish a railway system its economical
and technical feasibility, compatibility with other power system customers and
adjacent communicational systems should be considered [3]. Light trains are designed
to stop every 2 or 3 km to cover a wide urban area and they require accelerating and
decelerating fast enough to be efficient. When the working field of railway is wider to
cover suburban areas, commuter trains come along. They travel in longer distances
and longer intervals (5 to 10 miles) between each stop and with higher speeds (125
mile/h). Their feeder voltage needs to be AC to reach high enough voltage levels of
15kV or 25kV. If frequency of stops is reduced to achieve higher speeds and more
carriage, high speed intercity trains will be defined. An identical ex. for high speed
train is TGV which has a single phase 25kV; 50Hz on its catenary TGV can travel up
to 330 miles/h. the power supply of TGV is handled by French national grid on
voltage levels of 275 kV or 400 kV to increase reliability and power quality. There
are other high speed railways (HSR) like ICE in Germany or HSR 350X and KTX in
Korea [5] Sinkansen and Maglev in Japan. For general information about worldwide
high speed trains are described in [17].
However very high power traction motors are applied in freight trains especially those
are running in US. They run in a low speed high power manner. Because of this high
power and lower priority of freight in comparison to passenger carrying railways,
freight electrification has more power quality problems and less economical
justification.

3. Power quality
One of main problems regarding to electrified rail ways is power quality shortage that
can reduce other customers usage efficiency below standards. Railway produced
power disturbances which can be classified as below:
118
a. Power unbalance: since electrified trains are single phase loads inherently,
connection of these time varying (as much as they are high speed) unbalance (as
much as they are high power) loads to three phase power system will lead to huge
power unbalance. This problem has been facing different solutions. Firstly some
countries devoted a specific power system to their ERs and made other customers
isolated from power quality disturbances produced by railway. The other solution is
to use DC transmission systems for trains. This strategy is working and different
standard and a few not standard DC voltage levels are used to supply railway system.
In this approach railway is connected to a main power system trough an AC\DC
rectifier and all of the power turbulences are cut off at a point of common coupling by
this high voltage rectifier. The other solution was to design railway train to work as
AC load but not necessarily with standard frequency of 50/60 Hz. There are different
voltage levels for this type of railway power feeding.
The solutions before power electronics viability for this level of voltage were limited
to a few balancing transformations in AC feeders namely: V transformer, Scott
transformer and Le Blanc transformer all of them well compatible with simple single
phase transformation in capability of unbalance reduction.

Fig 1: Common traction system to grid configurations

Also to keep unbalance system within standard levels a strong network (high short
circuit duty) should be used at the voltages of 220kV, 115kV or 69kV at least.
b. Harmonic distortion: There are speed drives, power conversion equipment or
frequency converters that inject harmonic in to railways suppling power system.
119
These harmonics can disturb other power systems or lead to high frequency
electromagnetic fields incompatible with close equipment as well as train signalling
system. There are some classic solutions for harmonic distortion reduction like third
sequence harmonic eliminator transformers. An active power filter is a modern
solution for these problems such as unbalance, harmonic distortion and low power
factor problems.
c. Flicker: As the train passes between two adjacent substations voltage sag may
happen and affect other customers electrical light performance so called flicker. There
are some structural solutions regarding to all of these challenges which are used in
different countries. In Germany and Sweden low frequency systems are used which
are low frequency power system in Germany and frequency conversion in Sweden.
However in England, France, USA and Africa higher voltages has reduced the
problem in different manners which are connecting railway supply system to main
network in a high voltage point of common coupling or designing railway system to
work under a higher catenary voltage. All of abovementioned methods are relying on
a strong power system at the PCC to keep unbalance under 2% and harmonic
distortion within standard limits as well.

3.1 Active power filters
Considering power electronics facilities new frontiers opened to power quality
compensation solutions. Load unbalance can be attenuated by making controlled
power transmission paths between two or three single phases owing to power
electronic switching circuits.
In [16] 25 kV feeder characteristics are presented and reasons for power quality
problems in railway systems are mentioned, followed by brief description of methods
for compensating these shortage. Namely:
1. Reducing the distance between 25kV supply substations.
2. A higher fault level at each 25 kV supply station.
3. Using static VAR compensator as voltage support at each supply point.
4. More switching stations between each two adjacent substations to limit faults.
5. Series capacitors either in substations or overhead wiring.
6. Shunt connected capacitors either as circuit-breaker capacitors or reactive power
compensator.
7. Transformer type series regulators in the overhead line.
120
8. On-load tap changing transformers installed for each substation.
9. Paralleling feeders to share load between them and alleviate unbalance.
10. Engineering the geometric configuration of feeders to reduce its series
impedances.
11. Single phase transition to distant stations at a higher voltage to decrease voltage
loss.
12. Paralleling of adjacent substations via the overhead line.
13. Installing switching capacitors on board.
14. Twining contact overhead lines to reduce inductance and resistance and increase
the lines current capacity.
15. Unbalanced autotransformer voltage.
16. Storage batteries connected by inverters to collect extra power and support
overhead line voltage.

3.2.1 Railway active filters structural characteristics
In [26], [27] and [65] power electronic compensators are designed, simulated and
experimented to control voltage form factor on 25 kV ERs. The presented active
power filter in [26] and the hybrid (passive and active filters) multi level ones
presented in [65] and [27] are shunt connected to solve both harmonic distortion of
3rd , 5th and 7th harmonics and low power factor. The shunt compensator is installed
at the end of overhead line and works regarding to the voltage which senses at its
connection point. In [67] an algorithm to achieve high performance selective
harmonic extraction is revised. In [68] same active filter as [65] is deal as impedance
connected to end of feeder line. The paper is optimizing this impedance to find the
most effective control strategy for proposed active filter to achieve acceptable voltage
pantograph along the whole line. In [64] another shunt connected active power
compensator is presented that suppose to compensate unbalance created by railway
application on power system in addition to reactive power required by traction motor.
The method is upgrading a traditional Scott transformer with a bidirectional inverter
that can balance two output phases of Scott transformer by transmitting a fraction of
overloaded phase to under loaded one. By side the inverter compensates harmonics.
[33] has realized same but more advanced strategy for Shinkansen high speed railway
(HSR). (Fig 2 from [33])
121

Fig 2: Scott transformer and DC/AC converter application for power balance in Railway system.

In [76] hybrid active power filter (passive filter + active filter) configurations are
classified and modelled and their characteristics are tabulated (Table. 1) and
explained. In addition the problem of unbalanced harmonic distortion is mentioned.
To solve this problem in an exact way, positive, negative, and zero sequence
harmonic compensation should de revised. A novel configuration and control strategy
is presented. In [56] a power electronic system stabilizer is utilised for HSR
distribution system. The proposed method assesses relationship between power loss
and stability in railway supply system. The case study in [56] is Korean HSR. It
claims that by reducing voltage drop through compensating reactive power system
stability will increase. The stabilizer produces required reactive power. In [34]
voltage switched capacitors are applied to regulate voltage on a 25 kV railway
system. [34] uses a cheaper device (thyristor) in comparison with mentioned
references. As a drawback, compensation in this method can be conducted in steps
and not continuously. In addition thyristor is a source of harmonics because of its low
switching frequency. In [66] a different compensating method is introduced which
adds a medium voltage level between main supply and railway lines. The
compensator which is a two phase inverter is connected to this medium voltage line
and senses and then regulates this voltage. (Fig 2 from [66])

3.2.2. Active filter equipped power systems analysis
In [51] a power system simulation has been directed to extract unbalance
vulnerability of a test network. According to [51] voltage and current unbalance are
related to train load and motion conditions and power supply configuration.
122

Fig 3: an intermediate voltage level between to regulate voltage

Classic methods of unbalance alleviation which generally are 3 phase to 2 phase
transformers are considered in this unbalance effect study (3 phase to 4 phase
transformation for rail way application is proposed in [75]). To compare different
railway load distribution effect four experiments with varying loads and different
arrangement has been prepared.
[48] specifically focuses on active filter for tram. Unlike above mentioned active
filters this one acts as an input or series filter. In [37] the mathematical technique of
Diakoptics is applied for railway system solutions. Diakoptics is to tear a given
system into a number of independent, then joining the solutions of separated parts
together for the solution for complete problem. It is a good idea for railway power
system with indispensable characteristic of changing loads and more identical:
changing structure of under study railway system by its trains movement. In [69]
harmonic analysis for Korean railway system has been implemented. To direct this
study an eight-port model for considered railway is defined and presented. In
addition, to certify proposed model simulations based on the model is compared with
measurement in. Further more amplification of harmonic by resonance in railway
electrification system is studied. In [31] a mathematical approach to extract general
control strategy for advanced 25kV-50Hz ERs has been performed. The objective of
nonlinear control is to attain current and voltage balance in power system regardless
of uncertainties and nonlinearities. In [79] a purely structural approach calculates the
optimal positioning of RC-banks to reduce harmonic distortion in a given railway
network. Then Optimization is focused on R and C amounts to alleviate harmonic
123
amplification. In [78] the case of Taipei MRT DC system is studied, focusing on
harmonic quantity and quality. In [78] practical measurement method which is used
in this study is explained and measurements results are presented and compared with
mathematical predictions. Then parameters that can not be easily considered in
mathematical harmonic analyse methods are named and the difference they make is
shown in measurement results. In [49] Olympic electric train is studied in the power
quality point of view. Chargeable batteries are used to improve power quality in case
study system. In [86] and [92] probabilistic methods for load flow in ER suppling
power systems is suggested. They purpose to layout Probability density functions of
voltage or power flow in certain point of the power system which indicates the ranges
of variations of these parameters. In [80] traction unbalance problem is discussed and
some methodologies to analyse are presented. Then a new method is offered which is
based on sensing and compensating the negative sequence of three phase power
supply. The point about this idea is that multiple sources of unbalance do not interact
because their effect on negative sequence is additive and can be deal separately.
In [70] three level PWM inverter which is used for the HSR traction drive is studied.
The purpose is to analyses its harmonic current characteristics in steady state mode. A
comparison between a three level converter harmonics with a pair of interlaced two
level converters is presented and resulted to their equality in this point of view.
In [71] a model of an auto transformer fed AC HSR is presented. Voltage pantograph
in HSR is more problematic because of fast change of load and structure by trains
movement. [71] has utilised its proposed model to introduce a generalized, multi rout,
and efficient method to solve complicated system of working HSR. In [72] a
mathematical work is done to estimate voltage unbalance due to HSR power
demands. Different main power supply and feeder connections are considered and
there potential to reduce unbalance is compared. [90] has suggested a rigorous way to
evaluate voltage unbalance produced by single phase HSR application on power
system. This new methods results are compared with traditionally formulas for
unbalance estimation. In [90] the case of Taiwan HSR is studied. Another study
concerning about unbalance estimation is presented in [91], which uses dynamic load
estimation (DLE) to predict railway produced unbalance. In this way an algorithm is
illustrated which is used to estimate dynamic load of Taiwan HSR and then foresee
unbalance affect of this changing load. In [93] the regarding power system
124
(Taipower) which -due to geographical situations- is a longitudinal power system is
studied to extract impact of HSR on such a power system.

4. Signalling, Earthing and EMI issues
The other challenge issue in electrical and diesel electric railways is EMI. In other
words railway engineers need to make sure that their system is compatible with
communication systems either railways signalling system or other in close proximity
RF communicational systems. In addition rails may be use as signalling conductors.
Nevertheless rails may act as a part of return path for power current. This multi
application makes a compatibility challenge which has a considerable number of
related papers. EMI is strongly related to earthing methods because currents passing
through earth connections can be directed by high frequency harmonics and produce
high frequency electromagnetic fields.
In [60] electromagnetic compatibility (EMC) of an auxiliary power electronic
converter for London under ground trains is studied and results are presented. It has
classified EMC to these subtitles:
1. Signalling interface
2. Magnetic fields
3. Telephone interface
4. Radiated RF (radio frequency) emissions
5. RFI(radio frequency interface) Immunity
The source of EMI is power converters on vehicle board. This research tries
quantizing EMI and EMC in proposed underground railway. In [36] earthing and
bounding of ERs are studied. Different structures of 25kV and 2x25kV AC railway
feeders are presented and concept of earthing is discussed regarding to them. Then
DC railway feeders are premeditated and their practical earthing and bonding
strategies are presented. At the end earthing in depots is addressed, which is most the
challenging problem in earthing engineering, because safety, corrosion, operational
and technical requirements have to be satisfied by earthing in this area.
[21] is about signalling and inter locking in railways which are concerned about two
traffic control issues. Firstly to keep safe distance between two trains running in same
rail, secondly traffic controlling in intersections and junctions. The safe distance
depends on trains dynamic state and rails situation, so it should be sensed correctly.
[22] is explains about train detection in details. Related communication and
125
supervision is discussed as well. [23] is focused on EMC in both approaches of
disturbance source and equipments vulnerability. Some potential problems caused by
EMC are mentioned in [23]:
1. Interference to safety signalling systems from power electronic traction
vehicles.
2. Interference between AC and DC traction electrification railway systems.
3. Safety hazard due to electrical voltage induction on metal fences near the
track.
[23] Has categorized EMI in railways to internal, outgoing and incoming. It is
followed by some general strategies to alleviate EMI produced in traction system
[24]:
1. Frequency departure of traction power and trains signalling system.
2. Appropriate cable screening, termination and positioning.
3. Suppression of arcs drawn by traction power current collection systems to
reduce RF interference.
[24] Continues accurate mathematical calculation to attain EMI vulnerabilities of
railway system related to traction system. There are more general and concentrated
papers in signalling ex. [100] is around British Railways history in signalling
technologies. [101] is an early survey on signalling systems, Which has theorized
signalling and listed common purposes of signalling ex. speed increasing, reduction
of distance between trains and so increasing rail capacity. [102] has suggested formal
mathematical methods to specify and design railway signalling schemes.
When the case is mass transit railway systems, signalling strategy can contribute in
concepts of power and energy management. For ex. starting time of multiple running
trains which are supplied by same power network has considerable effects on peak
power demand. Regarding to mass transit railway systems [103] has suggested
generic algorithm to optimize traffic.
[104] has explained a heavy traffic light train railway from the signalling point of
view. The main obligation is to arrange signalling in a way that trains can keep
moving and interrupts be eliminated. The innovation suggested in this paper is to use
separated communication system to locate moving trains by data transfer between
train and a parallel installed communication system. Traditionally partitioned rails
were used to detect moving trains positions, as accurate as shortness of each rail
partition. To compare abovementioned train detection systems with recently proposed
126
systems, [105] can be mentioned which considers application of GPS for signalling
and train position detection. At last [106] and [87] are explaining technical aspects
about application of satellite in railway signalling and navigation. To have a broader
approach to railway system compatibility concept [52] is worthy to be reviewed. It
covers all of probable compatibility problems including EMI.

5. Input voltage source
As mentioned in train systems classification there are some voltage sources which are
used based on trains exact application (Appendix I). Concentrating on input voltage,
source railways can be categorized as below:
5.1 DC
The main advantage of DC traction system is simplicity in control. DC voltage
supplied ERs can be split in two approaches. Firstly voltage level of the feeders and
secondly the measure which is used to feed the train. Standard DC voltage levels
under load over the world are 600 VDC, 750 VDC, 1500 VDC, 3000VDC. There are
some non-standard voltage levels as well. (Appendix)
In another approach DC ERs can be classified in which main DC power supply is
connected to trains. Overhead line system and Conductor rail system is main sub
categories which can be manufactured in different schemes. Although the feeder
structure for voltage level of 3000VDC and more is limited to overhead lines. DC
voltage supplied railway systems are recommendable for low power applications.
Higher DC voltages for higher power railway application are not practical because of
insulation and clearance restrictions. The power system interface of DC feeder
systems is limited to some harmonics injected to power system at substations that can
be attenuated by appropriate filters. The other problem with DC railway supply
system is ground return current that may be cause of corrosion.

5.2 AC
standard AC voltage supply for ERs are 25 kV, 50 Hz -which suppose to dominate
Europe railways as a regional standard to unify European railway system [8] [7] [28]
[6] [4]- or 25 kV, 60 Hz for countries with 60 Hz power system ex. Japan, US and
15kV, 16.7Hz in Germany, Austria and Scandinavia- and 50kV 50/60 Hz or 2x25kV
[94], 50/60 Hz using auto transformers for very high power applications- all
installed as overhead single phase lines. Due to less insulation restriction with higher
127
frequency, much higher voltage level is feasible in AC power transmission to trains,
leading to remarkable reduction in power lose.
The other subcategory of AC supplied railways is those which are working with a
lesser frequency than main networks. Low frequencies systems like 25kV/12.5kV
and 25Hz, 16.5kV and 16.7Hz, and 25kV/15kV and 15Hz have the advantage of
lower inductive lose in comparison with standard frequencies of 60/50Hz [29].
Distance between substations and power of each substation depending on trains load,
speed and catenary characteristics varies among 20 to 80 miles. Basically the higher
feeder voltage the longer distance between substations is allowed. multi voltage
traction systems are designed to remove the need of locomotive change when voltage
level changes [61].

5.3 Diesel
The much more different category of trains those are using electric motors for traction
is diesel electric trains that use diesel engine as primary power supply and then
rotating an electrical machine that produces electrical power for electrical traction
motor. This sort of train has no counterpart when it comes to long enough distances
application, when electrification is not economic due to its costly infrastructure
requirements. The main problem of diesel electric railways is primary source of
energy that is ,unlike ERs, limited to some fossil fuels usable on exhaustion engine on
board, so efficiency is an important aspect about diesel electric trains because
contrasting ERs there is not much opportunity for energy regeneration in cases of
braking or down hill running. A majority of studies in this way are trying to apply an
energy storage equipment to have some temporary places for regenerative braking
and more efficient and less polluting performance of diesel electric train.

6. Energy efficiency and pollution reduction
In electrified as well as diesel electric rail energy efficiency and pollution reduction
are strongly coupled and important issues. There are some methods to save energy in
railway systems which are addressed in [25] and [62]:
1. Reduction of braking losses by optimized driving.
2. Optimization of speed profile
3. Avoiding rout conflicts to keep optimal speed.
4. Tuning time tables in ER to fit nearby trains to exchange energy.
128
5. Optimization of power chain.
6. Devising smarter and more efficient auxiliary equipment.
7. Automatic railways, which allows optimization of transportation as a whole.
8. Vehicle structure optimization.
9. energy recovery and storage:
The last one is studied more. When it is about ERs, depending on other trains
dynamic situations a certain decelerating (down-hill running) trains kinetic energy
can be transferred to another accelerating (up-hill running) one. This approach is
deeply limited to railway supply power system structure and trains position, so can
not increase efficiency more than a few percents. However this method faces more
problems in DC supplied lines due to incapable rectifiers. The other general lack of
this approach is energy loss in feeder lines when it is transmitted between trains. This
deficiency increases by voltage level of feeders reduction. The other approach is
based on energy storage modules. Some papers are reviewed to assess this concept:

6.1 Hybrid trains
In [1] a diesel traction system has been upgraded with storage battery. Battery is
managed to store brake energy and reuse it for acceleration periods and to stabilize
the auxiliary power converter DC link (Fig 3 from [1]) . In other words energy
storage module decouples power produced by diesel engine and the power consumed
by traction motor and auxiliary power, by storing and reusing energy. In addition,
mentioned decoupling between diesel engine and electric motor allows the engine
speed to be controlled irrespective of the train speed; instead it can be set to increase
fuel consumption efficiency by working on an optimum point. [96] is focusing on
battery application on hybrid trains from various angles: tractive effort, power,
economics, and etc. In [45] Hitachi prototype of a hybrid train manufactured by
employing a 10 kWh battery as energy storage device is introduced. In conclusion
future adventures of purely battery powered trains or trains which their diesel engine
is replaced by fuel cell or other environmental friendly energies are named. To
mention realized examples, [97] can be named which explains about a photovoltaic
energy supported funicular installed in Leghorn, Italy. Or [95] which is referencing to
an experimentally realized rail vehicle that employs SuperCaps as lone power source.
129

Fig. 4 a typical configuration of hybrid vehicle system

In [2] another diesel electric locomotive efficiency has improved by means of a
SuperCap. Same structure and two approaches in [1] are considered in [2], except
battery is replaced by SuperCap. Ideally, if there be sufficient energy storage, the
suggested structure can remarkably reduce engine rating. SuperCaps have their
limitations and their situation along working should be monitored to keep them within
healthy condition [98]. [30] has mentioned some other advantage of energy storage
capability in railway systems. Such as:
1. Substations can be established farer
2. More trains can move on a given feeder system.
3. Running in limited areas of electrical railway without catenary. Running with
switched off diesel engine in highly polluted areas.
4. Reducing travelling time or CO2 emission.
A comparison between battery and supper capacitor usage is presented as well. In
addition [30] has considered SuperCaps potential as a booster of power in
acceleration or up hill running modes.
The main problem with braking recuperation is non-ideal energy storage units which
mean rather low energy capacity for Super Capacitor (SuperCap) or not enough
power rating for batteries. Here the idea of combining batteries and SuperCaps to
cover their shortages comes along. In [32] SuperCaps and batteries are applied to
achieve mentioned advantages with an enhanced performance in addition to smoother
and more efficient application of both battery and SuperCap. High power capacity of
SuperCap is used to release battery from peak power. This has economical promote of
increasing costly batterys life time. On the other hand high energy density batteries
are used and need for high energy storage in SuperCaps is removed, which means
another cost reduction in construction stage. In [54] a state of art hybrid train is
Grid
Overhead Line
SMES
130
presented in which battery or flywheel is implemented to cooperate with a fuel cell as
prime energy source. [54] concludes that the most suitable train for regenerative
braking are long distance intercity commuters. And the least likely to profit hybrid
traction are high speed and heavy cargo operations. In part one; it is focused on
middle distance transport with diesel base hybrid locomotives. In part two; fuel cell
instead of diesel- application in passenger transport is under study. [59] focuses on
dynamic brake energy recuperation on North American freight locomotives. It
suggests hybridisation for a rout that has two characteristics: it contains 25 miles long
down grade and it has a heavy traffic of about 80 traversing trains a day. [73] and [99]
has approached Superconducting Magnetic Energy Storage (SMES) and battery
energy storage combination as a load levelling device. Simultaneous application of
SMES and battery is optimized to increase life cycle of both. Another optimization in
[77] is undertaken to minimize volume of storage unit. In [99] SMES is connected to
feeders unlike [73] and [77]. (Fig. 4 from [77])

Grid
Overhead line
SMES

Fig 4: SMES application in electrified railway

7. Power system
7.1. Traction
A part of traction system related papers are about traction motors. Other important
part is power converter which is strongly related to power electronic availabilities
[38].
131
[18] and [19] are two first parts of R.J. Hills tutorial papers which are about DC and
AC machines as traction motors respectively. In [18] General mechanical equations
describing train masss behaviour is presented at first. Then the drive characteristics
are presented. Different modes of operation for DC traction motor motoring,
resistive braking and regenerative braking- are discussed. In [19] Practical advantages
of induction motor have made it attractive for harsh application of railways. Drives
applied for AC traction motors are presented. In [20] Different categories of DC and
AC motor motivated trains in British railways are compared in different views of
working environment, power/weight ratio, motor make up, mounting methods,
cooling problems, etc. In [42] a sensor less control system for an induction motor for
railway traction system is presented. Rotor speed in this system is estimated by
electrical measured quantities. Elimination of rheostatic steps for speeding and
braking has improved movement smoothness and thereby passenger comfort. In [39]
some power electronic circuits for traction application either in electrified or in diesel
electric systems are presented. Fundamental information of this paper can be useful.
Other reviewed papers which utilize early power electronic equipment are [40] and
[57]. [15] is explaining a diesel electric train serving in Indonesia.
[41] Has improved traction system to act as reactive power compensator. To achieve
optimal result a central control system dictates each trains reactive power to minimize
power loss along the line. [46] is a general paper which covers power electronics
enhancements which are interesting for traction application. It has focused on a
comparison between IGBT and IGCT at last. [43] introduces new generation of IGBT
switches tailored for traction. The presented IGBTs are employed in an experimental
trains traction system. [44] has concentrated on AC/DC and DC/AC converters in
HSR traction application. It has suggested a modular topology to supply multiple
induction motors with multi level modulation satisfactorily. For auxiliary power an
extra transformer winding is devoted. [47] introducing a tram traction system which
aims to reduce the energy consumptions in addition to increased safeness and
travellers comfort. The tram is running in Croatia and results are experimental. In
[50] a vector controlled tram traction system is presented and manipulated.
Regenerative braking is considered for [47] and [50]. [63] is a vector control
induction motor study realized for traction application. [75] presents a control system
for motor suppling power electronic circuit, which suppose to feed traction motor
132
without a regulated DC link. [84] analyses traction system as a whole including
inverter, rectifier, and contactor and DC traction motor.

7.2 Auxiliary systems
[9] is IEEE standard for passenger train auxiliary power systems interface, which
describes auxiliary power requirements as a standard. [11] and [53] are technical
papers which list considerations required in auxiliary power design to satisfy railway
operators requirements. In [10] auxiliary power configuration in whole train
combined of motor cars and passenger cars is explained. In [12] a novel power
control method suitable for auxiliary power supply system is presented, which targets
to achieve high reliability by redundancy. It keeps power factor of auxiliary
converters high. To avoid circulating currents between Auxiliary power converters,
one of them is controlling its power factor and others obey it. In [13] the new
topology of full-bridge three-phase isolated DC/DC converter is suggested. The input
DC voltage is inverted to three-phase AC and then is rectified by a full-bridge
rectifier. A new type of multi level DC/DC converter designed for auxiliary power
supply application is proposed in [82]. The proposed converter is based on half bridge
converter. [55] suggests some ideas to have more effective and efficient auxiliary
equipments. Like fibre optic application in rolling stock (realized in [35] as well),
smart battery and charger control methods, etc.
[58] Introduces a specific prototype of auxiliary power supply system, which has
applied IGBT as high power switches. In [81] an adaptive inverse model controller is
devised to compensate non-linearity and imperfections of components. Switching
strategy is a modified PWM to adapt duty cycle with nonlinear and non-ideal system.
In [83] a two-switch high frequency flyback converter is developed to achieve ZVS.
A few modules of proposed converter can be paralleled for higher power. The input
voltage of dc/dc converter in [83] is obtained from a fuel cell. The characteristic of
this circuit is the application of energy transfer from leakage inductance of
transformer. Due to the fact that auxiliary power despite of input voltage fluctuation
has to provide a regulated voltage at output, some papers around this purpose
reviewed:
In [85] a phase modulated full-bridge converter is improved to decrease output
voltage harmonics and enhance it to show more robustness against input voltage
fluctuation. In [86] a ZVS multi level resonant converter is proposed as well as [85]
133
phase shift modulation is utilized. For ZVS, leakage inductance of transformer is
brought into play. In [88] a novel AC three phase input DC output converter is
introduced. The previous circuit that the new one is based on is a three parallel full
bridge rectifiers followed by buck-boost converters, which proposed paper has
merged rectifiers together and uses a single buck boost converter. [89] has presented a
new scheme for switching which decouples gate switching voltages from input
voltage, and then it is a desirable configuration for situations with varying input
voltage.

8. Conclusion
There are different power systems for energy distribution in ERs and different
problems to be solved in railway systems. They are namely, power balance and
quality, EMC, and satisfactory auxiliary power. Active filters and more robust and
flexible power systems are general solutions to power system problems. More
accurately designed power electronics devices are the solution for EMI problem.
These solutions briefly but widely are explained here.

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137
Chapter 4

This chapter presents the second paper published during my research. In this
paper, the current storage capacity of Positive Buck-Boost (PBB) converter has
been investigated and advantages and disadvantages have been quantified.
This paper has been published in Power Electronics Specialists Conference
(PESC) 2008.































138
A General Approach to Control a Positive Buck-Boost Converter to
Achieve Robustness against Input Voltage Fluctuations and Load
Changes

Arash A Boora, Student member, IEEE, Firuz Zare, Senior member, IEEE, Gerard Ledwich, Senior
member, IEEE, Arindam Ghosh, Fellow, IEEE
School of Engineering Systems, Queensland University of Technology
arash.boora@student.qut.edu.au



Abstract - A Positive Buck-Boost converter is a known DC-DC converter which
may be controlled to act as Buck or Boost converter with same polarity of the
input voltage. This converter has four switching states which include all the
switching states of the above mentioned DC-DC converters. In addition there is
one switching state which provides a degree of freedom for the positive Buck-
Boost converter in comparison to the Buck, Boost, and inverting Buck-Boost
converters. In other words the Positive Buck-Boost Converter shows a higher
level of flexibility for its inductor current control compared to the other DC-DC
converters.
In this paper this extra degree of freedom is utilised to increase the robustness
against input voltage fluctuations and load changes. To address this capacity of
the positive Buck-Boost converter, two different control strategies are proposed
which control the inductor current and output voltage against any fluctuations
in input voltage and load changes.
Mathematical analysis for dynamic and steady state conditions are presented in
this paper and simulation results verify the proposed method.

I. INTRODUCTION
A Positive Buck-Boost converter (PBB) is constructed by cascading a buck and
boost converter and eliminating a capacitor in the buck converter (Fig.1a) [1, 2]. By
adding the restriction of simultaneous switching of the buck and boost switches, the
converter can be simplified to an inverting buck boost converter as shown in Fig 1b.
If we avoid this limitation, there will be four possible switching states in a positive
buck-boost converter as shown in Fig 3.



139















This topology has been used as Buck, Boost or Buck-Boost [1-4]. However if two
switches in Fig. 1 are turned on and off independently, there will be four possible
switching states as described in Table I and a circuit diagram for each switching state
is shown in Fig.2.
Vi
i
L
C
D1
S1
D2
S2
R
R C
L
Vi
(a)
(b)


Figure 1: a) Positive Buck-Boost Converter
b) Inverting Buck-Boost converter

By studying these four states we can recognize switching states of Buck (10-00),
Boost (11-10), and Buck-Boost (00-11) converters. There is an extra switching state
(01) which is not included in these basic DC-DC converters. By using these four
states we can have Buck, Boost, and Buck-Boost converters. In addition by applying
the switching state of (01) we can change dynamic and steady state modes which are
not possible in the abovementioned DC-DC converters (Fig. 3).
Switching state S
1 (Buck)
S
2 (Boost)

11 on on
10 on off
01 off on
00 off off
Table I: Switching states of PBB
140
C R
L
v
Vi
C
L
R
Vi
v
C
R
v
Vi
C
L
R
Vi
v
L

Fig 2: Four possible switching states of positive Buck-Boost converter

10 00
01
11
B
o
o
s
t
B
u
c
k
-
B
o
o
s
t
Buck

Figure 3: Pairs of different states for known and new converters

It will be shown that unlike the basic DC-DC converters there is not a defined level
of inductor current for each capacitor voltage and load current. Different dynamic
responses to the same disturbance in input or output can be attained by different
inductor currents for the same capacitor voltage and load current.

II. STEADY STATE EQUATIONS
To analyse the steady state performance of the PBB converter we consider time
intervals of each switching state which are T
11
, T
10
, T
01
, and T
00
.
T T T T + +
10 01 11
(1)
141
T
01
balances this equation in order to have a fix switching frequency.
Based on the averaging technique, the average inductor voltage over one cycle
should be zero in the steady state:
i
Boost
Buck
i o
o i o i
V
D
D
V
T T
T T
V
T V T V T V V T

=
+
+
=
= + + +
00 10
11 10
01 00 11 10
0 ) 0 ( ) ( ) (
(2)

And the average capacitor current over one cycle should be zero in the steady state,
o
Boost
o l o
o
o o
l
o o
l
I
D
I
T T
T
I I
R
V
R
V
T
R
V
I T
R
V
T
R
V
I T

=
+
= =
= |

\
|
+ |

\
|
+ |

\
|
+ |

\
|

1
&
0
00 10
01 00 11 10
(3)

Using the switching state of (01), it can be seen that the inductor current stays
unchanged or slightly decreases depending on the inductor resistance while the
capacitor is discharging. Combining this switching state with (11) state we can
control the inductor current like a current source in the buck converter and control
the output voltage through the boost converter by charging the capacitor. Comparing
this situation with the basic Boost and Buck-Boost converter which includes the (11)
state, the positive Buck-Boost converter can have different inductor current level for
a particular output voltage. Thus the buck, boost, and inverting buck-boost converter
are not flexible:
2
D R
V
D R
V
D
I
I
i o o
l

=
(4) Boost
2
D R
DV
D R
V
D
I
I
i o o
l

=
(5) Inverting Buck Boost
R
DV
R
V
I I
i o
o l
= = =
(6) Buck

But the inductor current in the PBB converter is:
( )
R
V
D
D
R
V
D
I
D
I
R
V
T T
T T
R
V
T T
T
I
T T
T
I
i
Boost
Buck o
Boost
o
Boost
l
i o
o l
2
2
00 10
11 10
00 10 00 10
1 1

=
+
+
=
+
=
+
=
(7)

142
According to this equation if we scale D
Buck
and D`
Boost
by the same factor of k, the
capacitor voltage stays unchanged but the inductor current will be multiplied by the
factor of 1/k. This will lead to an extra amount of current in the positive buck-boost
converter. Managing this extra current by an appropriate control strategy we can
attain remarkably reduced sensitivity to load change. In addition controlling the
inductor current acts as a buffer between the input and output sides which blocks any
input voltage fluctuation to the output voltage. To attain robustness against load or
input voltage disturbance, the inductor current level should be higher than the
demand level (I
L
>I
Lmin
).

III. DISTURBANCE REJECTION
The main advantage of the PBB converter which dose not exist in Buck, Boost and
inverting Buck-Boost converters is the load disturbance rejection, which means the
PBB can handle load changes within a defined margin, without dynamic changes in
the output voltage. The margin depends on the extra current stored in the inductor.
The same disturbance rejection exists in the case of disturbance in the input voltage.
The buck converter has infinite margin for over-voltage from input and a limited
margin for the case of under-voltage to reject these disturbances. However boost and
inverting buck-boost (IBB) do not have such a margin because of their instability.
Table II shows these margins for Buck, Boost, Inverting-Buck-Boost, and PBB
converters. Clearly what distinguishes the PBB compared to the other converters is
the margin for any event of disturbance. [5] and [6] are some achievements to reject
disturbance in two different topologies. The difference is that these topologies try to
reduce response time of controller and converter but PBB has a margin of
disturbance rejection for both input voltage and load.


Table II: Margins of input voltage and load disturbance in case of Buck, Boost, inverting Buck-Boost and PBB






in out min L L
V V : I / I : up step : SU down step : SD

Over
Voltage
Under
Voltage
Over
Load
Under
Load
Buck 1
0 0
Boost 0 0 0 0
IBB 0 0 0 0
PBB

1 1
1

: SU
: SD

1 1
1 1

: SU
: SD


143

IV. DYNAMIC MODEL
In this paper we apply the averaging method to develop a dynamic model for the
proposed circuit.

( ) ( ) ( ) ( ) [ ]
( )
( )
( )
i
i i
V
T T
T v
i
R T T T
T T
T v
i
C
L
s
R
v
i T
R
v
T
R
v
T
R
v
i T
T dt
dv
C
v T T V T v V T
T dt
di
L
(

+
+
|
|

\
|
(

+
+
=
|
|

\
|
|
|

\
|
(

\
|
+ |

\
|
+ |

\
|
+ |

\
|
=
+ + + =
0
1
0
1
0
0
1
0
1
10 11
00 10
00 10
01 00 10 11
01 00 10 11
(8)

Defining:

( ) ( )
i Buck Boost
Buck Boost
V D
v
i
R
D
v
i
C
L
s
T
T T
D
T
T T
D
(

+
(

+
(

=
(

+
=
+
=
0
1
1 0
0 0
0 1
1 0
0
0
11 10 00 10
(9)

And the transfer functions will be:

( )
i
Boost
Boost Buck
i
Boost
Buck
V
R D Ls RLCs
R D D
v
V
R D Ls RLCs
RCs D
i
2 2
2 2
1
+ +

=
+ +
+
=
(10)

According to equations (7) and (10) we can change D
Buck
and D`
Boost
with same ratio
and keep the output voltage constant while we are changing its dynamic response by
changing the inductor current value. Developing this concept will lead to a few
control strategies which use this advantage to achieve robustness.

V. EXTRA SWITCHING LOSS
The disadvantage of PBB which should be managed is the extra switching loss
arising because of extra current stored in the inductor. Here we calculate the level of
extra loss according to extra current which is formulated by .
144

{ }
in
out
Load
L
min L
L
V
V
, max I
I
I
I
=

= =

1
(11)

Firstly the switching frequency of Buck and Boost switches are functions of (Refer
to Appendix):

( )
{ }
|

\
|
=

, min
v RC
V
f
in
swBoost
1
(12)

( )
{ } { } ( )
|

\
|
=
2
1 1

, min , min
i L
V
f
in
swBuck
(13)

Because of this relationship the switching loss will be a function of . Here to
simplify the comparison we have normalized the switching loss according to
switching loss without extra current:

( )
( ) { } [ ]
( ) ( ) [ ] 1 1
1
swBuck swBoost
swBoost
swBoost
f f
, min f
NL
+

=


(14)

( )
( ) { } [ ]
( ) ( ) [ ] 1 1
1 1
swBuck swBoost
swBuck
swBuck
f f
, min f
NL
+

=


(15)

For example in case of step up, if the quantity of
( )
swBoost
NL
is 1.1 means that the
switching loss of Boost switch has increase 10% because of in comparison with its
level when there is no extra current stored in inductor. And if the quantity of
( )
swBuck
NL
is 0.1 means that because of extra current presented by the buck switch
has 10% of the switching loss of boost switch without extra current (Fig. 5).



145
VI. SWITCHING STRATEGIES
The main challenge in control strategy is to decide about percentage of extra current
stored in inductor and to control it near the decided level.
The level of inductor current depends on application. The maximum fluctuations in
output voltage, the level of allowed switching frequency and loss and load changes
and input voltage fluctuations are required to calculate the allowed and required extra
current.
To attain required robustness against input voltage fluctuation and load changes table
2 is used and to see how much extra switching loss and switching frequency will
arise some figures like Fig. 4 should be applied.
On the other hand, the controller is trying to keep a percentage of extra current in the
inductor, which is related to the duty cycle of Buck switch. The relation ship between
extra current stored in the inductor, input and out put voltages, and duty cycle of
Buck switch is:
{ }
Buck
D
, min 1
=
(16)
This equation is developed directly from (2) and (3).











146
Vi
L
C
Current
Hysteresis
Control
OR
Priority
Conditioning
Voltage
Hysteresis
Control
Reference
Voltage
Reference
Current
Duty Cycle
R
























Controller monitors input and out put voltage and changes inductor current reference
to adjust D
Buck
according to it is proposed in Fig. 5.






























Figure 5: Hysteresis control method
Figure 4: Up diagrams show the increase in switching frequency of Buck switch (green) and Boost switch (blue) by
increase in . Down diagrams show the normalized switching loss of Buck switch loss (green) Boost switch loss
(blue) and the sum of these (magenta) by increase in for step up and step down situations.

S
w
i
t
c
h
i
n
g



f
r
e
q
u
e
n
c
y

N
o
r
m
a
l
i
z
e
d

s
w
i
t
c
h
i
n
g

l
o
s
s

S
w
i
t
c
h
i
n
g



f
r
e
q
u
e
n
c
y

N
o
r
m
a
l
i
z
e
d

s
w
i
t
c
h
i
n
g

l
o
s
s

Step Down


Step Up
Buck switch

Buck switch

Buck switch

Buck switch

Boost switch

Boost switch

Boost switch

Boost switch

Total switching loss

Total switching loss

147
Two Control methods have been developed to utilize extra current capacity of PBB.
The first one is hysteresis control and enjoys simplicity and is suggested when there
is not major concern for transient. The other which is the general approach includes
transient control and is named vector control in this paper.

A. Hysteresis Control
In this control strategy we try to control the current of inductor on an appropriate
level and then using this current we control the output voltage by hysteresis method.
Since the inductor current can be increased to improve robustness margins against
fluctuations in input voltage and load changes, there is two reference quantities:

1. Output voltage
2. Ratio of inductor current to minimum inductor current ()

Current is controlled by hysteresis method. Current reference is chosen based on
output voltage error and D
Buck
which is related to according to (16). D
Buck
is
measured by the microprocessor that is producing switching signals. The
microprocessor has timers which are applied to calculate D
Buck
in real time. Knowing
D
Buck
and input and output voltage we calculate and reduce or increase current
reference to change .
In this control method, controller increase and decrease the inductor current
reference according to output voltage error.
Voltage control loop works independently to control output voltage. Voltage control
unit considers inductor as a current source, since it can use hysteresis control method
for voltage.
A simulation result has been presented to show robustness of this circuit against
input voltage fluctuation and load change (Fig 6) in this simulation inductor current
is kept around 25% more than minimum inductor current so =1.25.


148





As can be seen in Fig 6 the inductor current has been more than minimum required
current in any case of load change or input voltage fluctuation, so the out put voltage
has been robust against these disturbances.
As has been mentioned there is the disadvantage of extra switching loss. To reduce
this loss Smart Load Manager (SLM) has been suggested in this paper.
In Fig 6 input voltage has been dropped gradually in a ramp. The controller has been
fast enough to increase the inductor current reference to keep it above minimum
required inductor current all the time.
If the input voltage had change in a large step directly from 300 to 100 a drop in
output voltage would be visible (Fig 7) because at the moment of input voltage large
drop the inductor current was not enough to support output voltage at 200V.
When the output voltage has dropped the controller has increased the inductor
current reference to achieve the reference voltage again. Controller is monitoring the
input voltage as well so it increases the minimum required inductor current and
adjusts with this new minimum current.

B. Vector Control
In vector control method the four switching states of PBB shown in Fig. 3 are
modelled as vectors which change the working point of PBB [i
L
,v
C
] by [T*v
L
,T*i
C
]
Figure 6: Hysteresis control strategy performance
time (sec)

V
o
u
t
(
V
)


V
i
n

(
V
)


I
l
o
a
d
(
A
)


I
L
(
A
)

I
L
m
i
n
(
A
)

Figure 7: Hysteresis control strategy performance with step
change in input voltage
time (sec)
149
where T is switching time. i
L
, v
L
, i
C
, v
C
are currents and voltages of capacitor and
inductor.
Fig. 8 shows these four vectors in cases of step down and step up.
Because in this strategy Buck switch and Boost switch are controlled as a whole all
switching options will be considered in this control strategy. Thus we have called it a
general switching strategy.

























In Fig. 8 each switching states number is shown beside its vector. As can be seen in
Fig. 8 each the angle and magnitude of each vector depends on four quantities:
1. Input voltage
2. Load current
3. Output voltage
4. Inductor current
Four simplification here we consider that we are sensing all of these parameters. In
real case load current can be estimated according to other quantities.
These vectors change in phase and magnitude when the working point of PBB [i
L
,v
C
]
changes. Fig. 9 shows some of these vectors in an area of different working points.
And (18) is these vectors phase and magnitude.
Generally speaking the vector control strategy tries to average these four vectors to
direct the working point toward the reference point. These averaging can be done in a
single switching cycle or more. The equation which should be kept is (17).
T T T T T = + + +
00 10 01 11
(17)

Figure 8: Switching configurations as vectors.
150

Figure 9: vectors of switching configurations in and area of [i
L
,v
C
]


Fig. 10 shows two examples of directing [0,0] point toward [30,200] point


Figure 10: two paths which has used to direct [0,0] point to [30,200] point

The advantage of this control strategy is accountable when transient responses are
important for the application. As can be seen in Fig. 10 vector control strategy can
direct each working point toward reference point in different ways.
( )
( )
( )
( )
( )
( )
( )
( )
) 10 (
) (
) 11 (
) 00 (
) (
) 01 ( 0
10
11
00
01
C
R t v V
j
L
t v V
t V
RC
t v
j
L
V
t V
C
R t v V
j
L
t v
t V
RC
t v
j t V
C in C in
C in
C in C
C

=
=

+ =
=
r
r
r
r
(18)

In some applications the user may want to increase output voltage as fast as possible.
In this case control strategy can increase the inductor current and then increase the
Inductor Current (A)
O
u
t
p
u
t

V
o
l
t
a
g
e

(
V
)

Inductor Current (A)
O
u
t
p
u
t

V
o
l
t
a
g
e

(
V
)

151
capacitor voltage applying this high current. After achieving the reference voltage
the control strategy can increase the inductor current to required level.
In another application controller may need to increase the inductor current to
reference level and then increase the capacitor voltage or any other procedure other
than these which includes exact manner of inductor current and capacitor voltage
changes is good to be controlled by this strategy.


VII. SMART LOAD CONTROLLER
To minimize the switching loss a load controller can be applied. The task of load
controller is to send final signals for load change. Fig. 11: Any load change request
comes to load controller at first place (1). Load controller prepares the situation for
change in load by increasing the current stored in the inductor (2). Since the current
is sufficient controller sends the ready signal for load manager (3) load controller
send the signal to the load (4) and load will be changed. When load has successfully
changed, the current stored in the inductor will be decreased to reduce switching and
conduction losses to an acceptable level (5). Of course to apply this procedure load
sensitivity should be considered as well.














Figure 11: the configuration of PBB controller and SLC in the system



To show the effect of SLC three simulations for a dramatic load increase with
different levels and absence and presence of SLC are shown:







1
2
3
4
5
152








Figure 12: a) load change without enough extra current b)load change with enough extra current
without SLC c) load change with enough extra current with SLC


In these entire cases load current has changed from 20A to 40A in one step at 0.1s. In
Fig. 12a =1.25 and this is not enough to reject load disturbance so the drop in output
voltage happens. Here has not been applied sufficiently and SLC does not work.
In Fig. 12 b. =2 which means there is enough current stored in inductor to reject
load disturbance. But the extra current of inductor in first half of time period
increases the switching loss.
In Fig. 12 c. at t=0s =1.25 but SLC functions and increases it to 2 before load
change happen and reduces it back to 1.25 when load change finishes. This way by
means of SLC both switching loss reduction and load disturbance rejection have
been developed.



Fig. 12 (b)
Fig 12 (c)
Fig. 12 (a)
0 time (sec) 0.2


iL





vC


iL





vC


iL





vC
0 time (sec) 0.2
0 time (sec) 0.2
153
VIII. CONCLUSION
Positive Buck Boost converter also known as noninverting Buck Boost converter
may be controlled in a manner which decouples capacitor voltage from inductor
current. By applying this capability PBB can gain robustness against input voltage
fluctuation and load changes. The disadvantage arising is the increase in switching
loss because of extra current stored in the inductor.
In this paper two switching strategies for PBB with different characteristics are
presented to gain robustness against mentioned disturbances. Simulation results are
included.
At last, to reduce switching loss while keeping the advantage of robustness Smart
Load controller (SLC) is introduced. SLC controls the percentage of extra current to
keep the switching loss low when no load change is expected and increases the extra
current to achieve robustness when a load change is going to happen.

ACKNOWLEDGMENT
The authors thank the Australian Research Council (ARC) for the financial support
for this project through the ARC Linkage Grant LP0774899.

REFERENCES
[1] Chakraborty, Arindam; Khaligh, Alireza; Emadi, Ali; Combination of Buck and
Boost Modes to Minimize Transients in the Output of a Positive Buck-Boost
Converter IEEE Industrial Electronics, IECON 2006 - 32nd Annual Conference
on Nov. 2006 Page(s):2372-2377
[2] Digital Combination of Buck and Boost Converters to Control a Positive Buck-
Boost Converter
Chakraborty, A.; Khaligh, A.; Emadi, A.; Pfaelzer, A.; Power Electronics
Specialists Conference, 2006. PESC '06. 37
th
IEEE 18-22 June 2006 Page(s):16
[3] Sahu, B.; Rincon-Mora, G.A.; A low voltage, dynamic, noninverting,
synchronous buck-boost converter for portable applications Power Electronics,
IEEE Transactions on Volume 19, Issue 2, March 2004 Page(s):443 - 452
[4] Weissbach, R.S.; Torres, K.M.; A noninverting buck-boost converter with
reduced components using a microcontroller SoutheastCon 2001. Proceedings.
IEEE 30 March-1 April 2001 Page(s):79 - 84 Digital Object Identifier
0.1109/SECON.2001.923091
154
[5] Bosheng Sun; Zhiqiang Gao; A DSP-based active disturbance rejection control
design for a 1-kW H-bridge DC-DC power converter Industrial Electronics,
IEEE Transactions on Volume 52, Issue 5, Oct. 2005 Page(s):1271 1277
[6] Garcera, G.; Figueres, E.; Pascual, M.; Benavent, J.M.; Analysis and design of
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Proceedings- Volume 151, Issue 4, 7 July 2004 Page(s):414 424

APPENDIX
To calculate switching frequency and normalized switching loss of each switch in
PBB topology for given v and i we consider step up case. In step down situation
calculation is almost same.
For Boost switch we have:


( )
( )
( )
|

\
|
= |

\
|
=
|
|

\
|

=
|
|

\
|

+ = + =

= = = =
= =

1 1
1 1
1
1
1
1
v RC
V
v RC
V
f
V
v RC
V
v RC
T
V
v RC
V
v RC
T T T
V
v RC
T
R
V
R
V
R
V
R
V
I
T
v
C
V
v RC
T
R
V
T
v
C
in o
swBoost
in o
swBoost
o o
rBoost fBoost Boost sw
o
rBoost
o o o o
L
r
o
fBoost
o
f


For Buck switch we have:

155
( )
( )
|

\
|
=
|
|

\
|

= + =

= = =
= = = =

= =
|
|

\
|

=
2
2
1
1
1
1
1
1

i L
V
f
V
i L
T T T
V
i L
V V
i L
T
V
V V V
T
i
L
V
i L
V
i L
T
V
V
T
i
L
voltage averaged switch Boost
V
V
T
T
V
v RC
T
V
v RC
T
in
swBuck
in
rBuck fBuck swBuck
in o in
rBuck
o
in swBoost in
rBuck
in o
fBuck
o
swBoost
fBuck
o
swBoost
swBoost
rBoost
o
swBoost
o
rBoost


Where, T
f
and T
r
are fall and rise times respectively. T
sw
and f
sw
is switching time
and frequency respectively.
Having these switching frequencies we can calculate the normalized switching loss.
Normalization index is switching loss of PBB when =1 which is equal to switching
loss of a boost converter with same parameters as PBB:

( )
( )
( )
( )
|

\
|

=
1
1 f
f
NL
1 f
f
NL
swBoost
swBuck
swBuck
swBoost
swBoost
swBoost


Calculating for step down case and rewriting these equations in a single set of
equations leads to (12 15).
157
Chapter 5

This chapter presents the third paper published during my research. This paper
present the novel topology of Multi-Output Positive Buck-Boost (MOPBB)
converter.
This paper has been published in European Power Electronics (EPE)
conference 2008.




















158
A New DC-DC Converter with Multi Output:
Topology and Control Strategies

Arash A Boora, Student Member, IEEE, Firuz Zare, Senior member, IEEE, Gerard
Ledwich, Senior member, IEEE, Arindam Ghosh, Fellow, IEEE
School of Engineering Systems
Queensland University of Technology
arash.boora@student.qut.edu.au


Abstract -This paper presents a new topology based on a Positive Buck-Boost
converter with multi output (MOPBB). A single output positive Buck-Boost
converter consists of a Buck and Boost converters in cascade which can be
controlled against input voltage fluctuation and load changes. In this paper, the
steady state and dynamic analyses of the proposed topology are presented along
with simulation results. A control algorithm is presented to control output
voltages against input voltage fluctuation and step change in load with a purely
logic control system that is based on hysteresis current and voltage control. This
topology is suitable for a high power multilevel converter with diode-clamped
topology where a series of capacitors are required to generate different voltage
levels and capacitors voltage control is an important issue in this topology.

KeywordsMulti-output, DC-DC converter, Disturbance robustness,
I. INTRODUCTION
To clarify the advantages of proposed topology in comparison with other multi-
output topologies, single output Positive Buck Boost converter (PBB) circuit is
shown in (Fig. 1) [1, 2, 3].
PBB has the advantage of an extra freedom degree in comparison with basic DC-
DC converters of Buck Boost and Inverting Buck Boost (IBB) [1]. This extra
freedom degree can be applied to decouple the inductor current and capacitor
voltage.
159

Fig. 1: Positive Buck Boost converter

In other words, unlike basic DC-DC converters the inductor current such as PBB is
not restricted by voltage conversion ratio and load current.
The relationship between a load current (I
o
) and an inductor current (I
L
) in basic
DC-DC converters and PBB are given in flowing equations.

2
D R
V
D R
V
D
I
I
i o o
l

=


2
D R
DV
D R
V
D
I
I
i o o
l

=


R
DV
R
V
I I
i o
o l
= = =


R
V
D
D
R
V
D
I
D
I
i
Boost
Buck o
Boost
o
Boost
l 2
1 1

=


In this way the inductor in the PBB can be used as an energy storage device as well
as energy deliverer while the amount of stored energy is independent from the level
of delivered energy by D`
Boost
(4).
The stored energy is utilized to increase stability of the converter and achieve
robustness against input voltage fluctuation and load change.
But an extra current increase switching loss. Calculation to determine how much
extra switching loss arises for any situation has been done in [1].
In this paper the Multi-Output Positive Buck Boost (MOPBB) converter is
presented.
Here a multi output topology based on PBB is presented. The applications of DC-
DC multi output topologies are cited in [4-7].
(4) PBB
(1) Boost
(2) IBB
(3) Buck
160
The main application is in diode clamp multi level inverters. [8] Has developed a
multi output Boost converter for diode clamp application. The converter here can be
applied for same application of inverter with the advantage of more stability, step
down conversion and disturbance rejection of PBB.
The sections of this paper cover the new topology, the disturbance rejection
theorization, switching frequency increase, the control method of the new topology,
and simulation results
II. THE NEW MULTI-OUTPUT TOPOLOGY
A Multi Output Positive Buck Boost (MOPBB) converter is shown in Fig.2 where
several output voltages are provided by putting capacitors in series. Voltages of the
capacitors are controlled by the inductor current and correct switching states to share
the energy stored in the inductor with each capacitor. References [4-9] are about
some multi output topologies and their control strategies. The main purpose is to
supply a multi level inverter.
S
Boost
S1
S
2
S
n-1
D
n
V
n
V
n-1
V2
V1
S
Buck
V
in
Vk
S
k
L
C
2
C
1
C
k
C
n-1
Cn

In a two output PBB converter, there are eight switching states but only 6
switching states are possible as shown in Fig.3. In this topology, when S
0
is turned on
S
1
cannot be turned on as the configuration will be the same when S
1
is turned off.
Thus the switching states of (011) and (111) are not allowed in this topology and the
converter has six possible switching states as shown in Fig.3. The advantage of this
Figure 2 Multi-Output Positive Buck Boost Converter
161
converter, which is achieved by input voltage switching, is that it can handle a
percentage of step change in input voltage and in output current. This capability is
identical to Positive Buck-Boost based converters when it comes to decrease in input
voltage and increase in output load.













































The above mentioned percentage of disturbance which can be dealt by the MOPBB
converter without dynamics in output voltage is called disturbance margin in this
paper. Disturbance margin depends on the extra current stored in inductor. The
inductor current is solely dictated by load in Buck, Boost, and Inverting Buck Boost
and the inductor acts only as a deliverer of energy.
Table I shows all switching states and charging and discharging states of the
capacitors voltages and the inductor current. There is a switching state (010) which
S
Buck
S
0
S
1
V
c1
V
c2
I
L

0 0 0 Charge Charge Discharge
0 0 1 Charge Discharge Discharge
0 1 0 Discharge Discharge No
change
1 0 0 Charge Charge Discharge
1 0 1 Charge Discharge Discharge
1 1 0 Discharge Discharge Charge
1 0 1
1 0 0
C 1 R
1
L
i
V i n
R
2
C 2
1 1 0
v 2
v 1
C 1 R 1
L
i
V i n
R 2
C 2
v 2
v 1
C 1 R 1
L
i
V i n
R 2
C 2
v 2
v 1
0 0 1
0 0 0
0 1 0
C 1 R 1
L
i
V i n
R 2
C 2
v 2
v 1
C
1 R
1
L
i
V i n
R 2
C 2
v 2
v
1
C 1 R 1
L
i
V i n
R 2 C
2
v 2
v 1
Figure 3: Possible switching configurations for 2 output positive buck-Boost converter
Table I: All possible switching states with charging and discharging states
162
does not exist in the basic DC-DC converters Fig.4 and it has a significant effect on
the system performance and dynamic response. Using this switching state a
controller can keep the inductor current above the demand level and provide a
current source in the buck converter which can charge and discharge the capacitors
through the switches in the boost converter.
110
001
010
101
100
000
Buck
Boost
Buck-Boost
Figure 4: switching configurations and switching between them.

Because of 0XX switching states controller can avoid instability of inductor current
easily. And because of the switching state of 010 the controller can keep some extra
current in the inductor and utilize it to achieve robustness against input voltage
fluctuation and load changes.
The switching configurations and states for n output MOPBB can be developed same
as Fig. 3 and Fig. 4. The number of switching states for an n output MOPBB is
2(n+1). We calculate equations for an n output MOPBB.

III. STEADY STATE AND DYNAMIC EQUATIONS
To simplify equations we use duty cycle of each switch instead of time intervals of
each state. The reason is that low frequency response can be totally explained by
duty cycles. D
Bu
is the duty cycle of the Buck switch. D
0
and D
1
are the duty cycle of
the switches S
0
and S
1
. D
2
is the duty cycle of the output diode.
Duty cycles should satisfy:
1 0
1 0
0

=

=
Bu
n
j
j
D
Dj D

(5)
163
Using averaging technique, we can find state equations for dynamic analysis such as
the inductor current and capacitors voltages in terms of the system variables.
k
k
n
k j
j L R
n
k j
j L
k
k
n
K
n
k j
j k in Bu
L
R
v
D i i D i
dt
dv
C
D V v D
dt
di
L

|
|

\
|
=
|
|

\
|
=
|
|

\
|
=


= =
= =
2
1


Rewriting theses equations as state variable form:
i
Bu
n
k
L
n n
k
n
k j
j
n
j
j
n
n
k j
j
n
j
j
n
k
L
n
k
v
D
v
...
v
...
v
i
R D
... ...
R D
... ...
R D
D ... D ... D
v
...
v
...
v
i
C
...
C
...
C
L
|
|
|
|
|
|
|
|
|
|

\
|
+
|
|
|
|
|
|
|
|
|
|

\
|
|
|
|
|
|
|
|
|
|
|
|
|

\
|

=
|
|
|
|
|
|
|
|
|
|

\
|
|
|
|
|
|
|
|
|
|
|

\
|

=
=
= =

0
0
0
0
0
1 0 0 0 0
0 0 0 0
0 0 1 0 0
0 0 0 0
0 0 0 0 1
0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
1
1
1
1
1 1

Extracting transfer functions from these equations:
i
s C R
D R
) s ( v
k k
n
k j
j k
k
1 +
=

=

in
n
k k k
n
k j
j k
Bu
L
v
s C R
D R
Ls
D
) s ( i

=
=
|
|
|
|
|

\
|
+
|
|

\
|
+
=
1
2
1

Finally, steady state equations for two output converter will be:
in
n
k
n
k j
j k
n
k j
j k Bu
k
V
D R
D R D
V

= =
=
|
|

\
|
|
|

\
|
=
1
2

in
n
k
n
k j
j k
Bu
L
V
D R
D
I

= =
|
|

\
|
|
|

\
|
=
1
2


According to the equations (11) and (12) we can find the effect of the switching state
of (010) in dynamic response. We can chose different values for duty cycle in the
(9)
(11)
(12)
(6)
(7)
(8)
(10)
164
buck converter, D
Bu
to have different currents in inductor. Let us assume that we
have the series of D
j
and a D
Bu
for a particular series of output voltages. By
multiplying D
j
s and D
Bu
by a factor of k we can change the inductor current by a
factor of 1/k while the output voltages are unchanged. Thus, we have same output
voltages for different current in inductor (13).
in Bu
n
j
Rj j
L
V D
I R
I

=
=
1
2

IV. MINIMUM INDUCTOR CURRENT
There is a minimum inductor current for any case of input voltage, output voltages,
and load currents. It has been shown that the controller can store some extra current
in the inductor. To know how much current is stored in the inductor we need to know
the minimum inductor current for each case.
The limitation of this topology is on the load current:

Rn R R
I ... I I
2 1


In step down case:
1
1 1
R min
n
j R
Rj
j in
I I
I
I
V V =
|
|

\
|

=


In step up case:
1
1 1 1 1
R
n
j R
Rj
j min
n
j R
Rj
j in
I
I
I
I
I
I
V V

= =
|
|

\
|
=
|
|

\
|
<


The extra current stored in the inductor improves the robustness and stability of
MOPBB converter against fluctuations in input voltage and load change.
On the other hand MOPBB suffers more switching frequency and switching loss as
the current stored in the inductor increases.
In next section we develop the relationship between extra current stored in the
inductor and the advantage of robustness (Disturbance rejection) and the
disadvantage of extra switching loss. This calculation guides the user of this
(13)
(14)
(15)
(16)
165
converter to choose how much extra current is required to be stored in the inductor
according to required robustness and acceptable level of switching loss.

V. DISTURBANCE REJECTION
The extra current stored in the inductor lets MOPBB to have a margin of input
voltage fluctuation and load change without low frequency (lower than switching
frequency) effect on output voltage. In other words this extra current lets the
MOPBB to block these disturbances from output voltage as far as they are inside the
above mentioned margin.
The ratio of actual inductor current in any case to the minimum inductor current ()
is important because it shows the level of robustness of this converter against input
voltage fluctuations and load changes as well as level of extra switching loss arising
as a consequence of extra current storage. Here we define the disturbance rejection
margin as a function of .

min L
I I =

To calculate disturbance rejection margin regarding to input voltage disturbance we
need to look at the relationship between D
Bu
and looking at (13) and (15-16) we
have:
Bu
n
j R
Rj
j
D
I
I
, min
)
`

|
|

\
|
=

=1 1
1

The margin for input voltage rise is infinite because the controller can reduce D
Bu

immediately without showing any dynamic at output. This way there is no limit for
voltage rise disturbance rejection. When the case is input voltage drop the controller
increases the D
Bu
to let the converter has same average of voltage after Buck switch.
The margin in this case depends on (20).

{ } =
+
in
V M

)
`

|
|

\
|
= =

n
j R
Rj
j
Bu
I
I
, min
D M
1 1
1
1 1

(17)
(18)
(19)
(20)
166
The load disturbance rejection margin can be calculated according to equation (15,
16, and 18) we can rewrite equation (13) as:

)
`

|
|

\
|
|
|

\
|
=

=
=
n
j R
Rj
j
n
j
Rj j
L
I
I
, min
I
I
1 1
1
1

Load change means the change in I
Rj
if can change within one switching cycle
sufficient to keep I
L
,
1
, and
2
constant the output will not experience any dynamic
with frequencies lower than switching frequency. Because of stability of MOPBB the
case of load drop can be handled by reducing the current conducting to load by
increasing the duty cycle of boost switch. Therefore, the disturbance rejection margin
in case of load drop is infinite.
{ } =

Rj
I M


To calculate this margin for load rise we consider that load current increase by step
change to full the margin of load change. To compensate this disturbance drops to
1.

{ } ( )
{ } ( )
{ } ( )

)

|
|

\
|
+
+
|
|

\
|
+
=
)
`

|
|

\
|
|
|

\
|

=
+
+
=
+
=
=
n
j R R
Rj Rj
j
n
j
Rj Rj j
n
j R
Rj
j
n
j
Rj j
I I M
I I M
, min
I I M
I
I
, min
I
1 1 1
1
1 1
1
1
1
1
1
1

If we assume that same margin for all loads is required,

{ } 1 =
+

Rj
I M


Of course if the loads have different sensitivity the controller can devote the stored
current to the more sensitive loads or share it asymmetrically which means having
wider load change margin for more sensitive loads.
Fig. 5 shows the graph or the relation ship between extra current stored in the
inductor and robustness margins.
(21)
(22)
(23)
(24)
167

VI. SWITCHING FREQUENCY
The main disadvantage of extra current stored in the inductor is the increased
switching frequency and loss. To have an efficient design for any particular
application, the calculation of switching loss is important.
According to equations (11) and (12)
L Rk
n
k j
j
I I D =

=

Looking at the switching configuration at Fig. 3, V
2
and V
1
have their rise on the
times periods of D
2
T
sw
and (D
1
+D
2
).Tsw respectively
.
For n output MOPBB we have:
) I I ( D T V C
Rk L
n
k j
j swBoost k k
=

=

According to (26) the ripples of Vks are dependent. So switching cycle of the Boost
switch can be calculated as (27).
n ,..., k
) I I ( I
I V C
min T
Rk L Rk
L k k
swBoost
1 =
)
`

=


To have the switching cycle as a function of we apply equation (21):

|
|

\
|

|
|

\
|
|
|

\
|
=
)
`

=
=
Rk
n
j
Rj j Rk
n
j
Rj j k k
swBoost
Rk R Rk
R k k
swBoost
I I I
I V C
min T : stepUp
) I I ( I
I V C
min T : Down Step
1
1
1
1

(28)


{ }
in
V M

{ }
R
I M
+
(25)
(26)
(27)
Figure 5: disturbance rejection margins as a function
168
Inductor current (I
L
) is defined by (21). To calculate the Buck switching frequency,
the average of positive voltage exposed to the inductor end connecting to the Boost
switch is:


= =
|
|

\
|
=
n
k
n
k j
j k avgBoost
D V V
1


So the rise time and fall time of the inductor current will be:


= =
= =
|
|

\
|
=
|
|

\
|
=
n
k
n
k j
j k
L
n
k
fall
n
k j
j k
fall
L
D V
I L
T D V
T
I L
1
1




= =
= =
|
|

\
|

=
|
|

\
|
=
n
k
n
k j
j k in
L
n
k
rise
n
k j
j k in
rise
L
D V V
I L
T D V V
T
I L
1
1



The switching frequency of Buck switch will be:

( ) ( )


= =
= = = =
|

\
|

=
|
|

\
|
|
|

\
|

|
|

\
|
=
+ =
n
k
n
k
Rk k L Rk k
L L
n
k
n
k
n
k j
j k
n
k j
j k
L
rise fall swBuck
I I I
I I L
D D
I L
T T T
1 1
1 1
1

For step up and step down case the equation of Buck switch frequency will be:
( ) ( )
( ) ( )



= = =
=
= =
|
|

\
|

=
|

\
|

=
n
k
n
k
Rk k
n
j
Rj j Rk k
n
j
Rj j L
swBuck
n
k
n
k
Rk k R Rk k
R L
swBuck
I I I
I I L
T : stepUp
I I I
I I L
T : stepDown
1 1 1
1
1 1
1
1






Fig 6 shows the switching frequency of Buck and Boost switches as function of for
cases of step up and step down.
(29)

(30)

(31)

(32)

169

(a)

(b)


As is shown in Fig. 6a the frequency of buck switch is 0 when is 1. This means that
in step up case if the inductor current be equal to its minimum value the converter is
working as a multi output Boost converter (eliminating S
Bu
in Fig. 2). In Fig. 6b the
switching frequency of Boost switch is 0 when is 1. This means that in step down
case the converter is working as a multi output Buck (eliminating S
0
in Fig. 2)
converter when there is no extra current stored in the inductor.
Comparing the Fig. 6a and Fig. 6b, the main switching frequency increase is
happening for Boost switches. Particularly, for step up case the switching frequency
of the Buck switch is negligible in comparison to the switching frequency of Boost
switches.
VII. CONTROL STRATEGY AND SIMULATION RESULT
In this paper, the method of Hysteresis control for inductor current and output
capacitor voltage are explained.
Because PBB based topologies can decouple inductor current and capacitor voltage
by storing some extra current in the capacitor, the control system will have enough
freedom to use hysteresis control both for inductor current and capacitor at the same
time.
However to have desirable performance the capacitor voltage hysteresis controller
needs to consider the inductor as a current source with acceptable fluctuations, so the
current loop controller should be faster than the voltage control loop.
Figure 6 the relationship between switching frequency of Buck switch (purple) and Boost switches (blue) as a
function of : a) step up b) step down (I
R1
=I
R2
)

Boost switch fsw
Buck switch fsw
Buck switch fsw
Boost switch fsw
170
Vi
i
L
C
Current
Hysteresis
Control
OR
Priority
Conditioning
Voltage
Hysteresis
Control
Reference
Voltages
Reference
Current
Duty Cycle
The main challenge of this controller is to know the appropriate inductor current.
The controller needs to detect the minimum required current to be able to keep the
reference voltage at output. On the other hand controller should decide about the
level of extra current needed to be stored in the inductor to achieve robustness and
stability required by application. In this paper the ratio of actual inductor current to
minimum required current is called .
Equation 14 suggests to measure I
L
, V
in
, D
Bu
and estimate load current and extra
current storage in the inductor. The controller is responsible to keep enough current
stored in the inductor to achieve robustness against disturbances (Eq. 16 and 20) but
not too much current should be stored because the switching frequency and loss will
be increased (Eq 24 and 27).
Fig. 7 shows the control strategy for a two output MOPBB. The duty cycle of Buck
switch is used to control the level of extra current stored in the inductor.
The inductor current and both output voltages are controlled by hysteresis method.
Fig. 8 shows some simulation results of this control system. The aim of this
simulation is to show the robustness of this topology against disturbances in input
voltage and load. The level of extra current is between 25% and 40% (1.25<<1.4) to
keep output voltages constant in spite of dramatic changes in load and input voltage.

Figure 7: hysteresis control system of MOPBB
171





Fig. 9 shows the same parameters in Fig 8 when input voltage and R
2
change. In
both cases all the changes have been in side the disturbance rejection margins. So the
output voltages do not endure low frequency dynamics.
Inductor current
Minimum
Inductor current
Input voltage
Output voltage V1
Output Current of C1 (ioutC1)
Output voltage V2
R1= 10, 10||40, 10 ||20
R2=10
time
Figure 8 simulation results of the hysteresis control system for MOPBB
when input voltage and R1 change
ioutC2
ioutC1
Output Current of C2 (ioutC2)
Inductor current
Inductor current
Minimum
Inductor current
Input voltage
Output voltage V1
Output Current of C1 (ioutC1)
Output voltage V2
R2= 20, 20||40, 20 ||20
R2=10
time
Output Current of C2 (ioutC2)
Inductor current
Figure 9 simulation results of the hysteresis control system for MOPBB
when input voltage and R2 change
172
VIII. CONCLUSION
A multi output DC-DC converter based on positive Buck Boost converter is
introduce.
Positive Buck Boost converter also known as noninverting Buck Boost converter
has the advantage of an extra freedom degree. This paper has shown the possibility
of utilizing this freedom degree to store a level of extra current in the inductor to
achieve robustness against input and output disturbances. The calculation to show the
degree of robustness as the advantage of extra current stored in the inductor has been
developed. The increase in switching frequency as a disadvantage of storing extra
current in the inductor is theorized and formulated. A control strategy has been
developed and simulated at last.
The designer of the implementation of this topology and its control strategy should
consider the requirements of a particular application, level of input and Load
disturbances, and allowed switching frequency and switching loss in that application
to decide how much extra current should be stored in the inductor of MOPBB.

IX. ACKNOWLEDGMENT
The authors thank the Australian Research Council (ARC) for the financial support
for this project through the ARC Linkage Grant LP0774899.

References
[1] A General Approach to Control a Positive Buck-Boost Converter to Achieve
Robustness against Input Voltage Fluctuations and Load Changes Arash A
Boora, Student member, IEEE, Firuz Zare, Senior member, IEEE, Gerard
Ledwich, Senior member, IEEE, Arindam Ghosh, Fellow, IEEE , PESC 2008
(unpublished)
[2] Combination of Buck and Boost Modes to Minimize Transients in the Output of
a Positive Buck-Boost Converter Chakraborty, Arindam; Khaligh, Alireza;
Emadi, Ali; IEEE Industrial Electronics, IECON 2006 - 32nd Annual Conferene
on
Nov. 2006 Page(s):2372 2377
173
[3] Digital Combination of Buck and Boost Converters to Control a Positive Buck-
Boost Converter Chakraborty, A.; Khaligh, A.; Emadi, A.; Pfaelzer, A.; Power
Electronics Specialists Conference, 2006. PESC '06. 37th IEEE 18-22 June 2006
Page(s):1 6
[4] A simple structure of LLC resonant DC-DC converter for multi-output
applications Yilei Gu; Lijun Hang; Huiming Chen; Zhengyu Lu; Zhaoming
Qian; Jun Li; Applied Power Electronics Conference and Exposition, 2005.
APEC 2005. Twentieth Annual IEEE Volume 3, 6-10 March 2005 Page(s):1485
- 1490 Vol. 3
[5] Multi-output SC type DC-DC converter using a flexible capacitor ring
operation Harada, I.; Hara, N.; Ueno, F.; Oota, I.;Telecommunications Energy
Conference, 1999. INTELEC '99. The 21st International 6-9 June 1999 Page(s):4
pp.
[6] Programmable Digital Controller for Multi-Output DC-DC Converters with a
Time-Shared Inductor Parayandeh, A.; Stupar, A.; Prodic, A.; Power Electronics
Specialists Conference, 2006. PESC '06. 37th IEEE 18-22 June 2006 Page(s):1
6
[7] Behavioral Modeling of Multi-Output DC-DC Converters for Large-Signal
Simulation of Distributed Power Systems Oliver, J.A.; Prieto, R.; Romero, V.;
Cobos, J.A.; Power Electronics Specialists Conference, 2006. PESC '06. 37th
IEEE 18-22 June 2006 Page(s):1 6
[8] A New Configuration for Multi level converters with diode clamp topology A.
Nami, F. Zare, G. Ledwich, A. Ghosh, IPEC 2007, page. 661-665
[9] Single-inductor multiple-output switching converters with time-multiplexing
control in discontinues conduction mode Dongsheng Ma, Student Member,
IEEE, Wing-Hung Ki, Member, IEEE, Chi-Ying Tsui, Member, IEEE, and
Philip K. T. Mok, Senior Member, IEEE, IEEE journal of sold state circuits,
volume 38, Issue 1, Pages: 89-100, 2003

175
Chapter 6
This chapter presents the fourth paper published during this research. This
paper presents the novel topologies of Wideband Positive Buck-Boost (WPBB)
converter and Bidirectional Positive Buck-Boost (BiPBB) converter. These
topologies are introduced to suggest the capability of PBB-based converters for
contribution to the application of linear assisted RF amplifiers.
Simulations has been performed to validate presented topologies and control
strategies. This paper has been published in European Power Electronics (EPE)
2008 conference.































176
Bidirectional Positive Buck-Boost Converter

Arash A Boora, Student Member, IEEE, Firuz Zare, Senior member, IEEE, Gerard Ledwich, Senior
member, IEEE, Arindam Ghosh, Fellow, IEEE
School of Engineering Systems
Queensland University of Technology
arash.boora@student.qut.edu.au


Abstract - In a positive buck-boost converter, inductor current and capacitor
voltage can be decoupled which may improve system stability. In fact for a
specific level of capacitor voltage, the inductor current can be adjusted at
different levels and can be utilized to increase the robustness of the converter
against input voltage and load disturbances. But when demand is a fast
response with respect to step change in reference voltage, this topology needs to
be modified. In this paper, a family of topologies based on a positive buck boost
converter are presented which have a fast response and bidirectional power
flow capability. This feature leads to some applications in hybrid vehicle
systems and telecommunications.
Simulations have been carried out to validate the robustness and stability of the
proposed converters.

Keywords Bidirectional, DC-DC converters, Fast

I. Introduction
Non inverting Buck Boost converter is a known DC-DC power electronic converter
which has characteristics of both buck and boost converter and can be applied in both
step up and step down applications (Fig.1).

Fig 1: Positive Buck Boost Converter

177
In addition, it has advantage of a capacity for extra current storage in the inductor.
Comparing the inductor current in Buck, Boost, inverting Buck Boost and positive
Buck Boost, we have:
2
D R
V
D R
V
D
I
I
i o o
l

=

Boost (1)
2
D R
DV
D R
V
D
I
I
i o o
l

=

Inverting Buck Boost (2)
R
DV
R
V
I I
i o
o l
= = =

Buck (3)
Equation (4) is same relationship for PBB.
R
V
D
D
R
V
D
I
D
I
i
Boost
Buck o
Boost
o
Boost
l 2
1 1

=

(4)


The output voltage is:

i
Boost
Buck
o
V
D
D
V

=

(5)


So we have two controlling parameters (D
Buck
and D
Boost
) and two controlled
quantities (i
L
and v
C
) which can be decoupled according to (4) and (5).
In this way the inductor of PBB can be used as an energy storage as well as energy
deliverer while the amount of stored energy is independent from the level of
delivered energy by D
Boost
in (4).
This capacity is utilized for improving the dynamic response of PBB to disturbances
due to an increase in load or decrease in input voltage [8]. There are some DC-DC
applications like hybrid vehicles [1-3] and hybrid power sources [4] which require
bidirectional power flow. When there is a requirement for step up and step down
voltage conversions or a higher degree of dynamic response to either disturbance or
control reference signal a bidirectional converter topology (Fig. 1) may be promising.
This converter is based on positive buck-boost converter. The other application is
such as broader bandwidth where the switching frequency is restricted. For example
envelop tracking in RF power amplifiers [5-7]. In this application, signal which
should be amplified is divided into high and low frequency spectrums. The high
frequency spectrum is amplified by a linear amplifier and the low frequency
spectrum is converted by a switching circuit which reduces the size of the linear
amplifier. The optimization between switching converters band width and switching
178
loss should be conducted to have the appropriate switching frequency. In the case of
proposed converter owing to extra current capacity of positive buck-boost converter
it can increase the dynamic response band width without increasing the switching
frequency.

Figure 2: Bidirectional Positive Buck Boost (step up)

Using this degree of freedom of this converter another parameter is applied to
decrease response time, which may lead to a broader bandwidth with lower switching
frequency in communication systems [5-7]. In these low power applications there is
no need to transfer small quantity capacitor energy back to input source thus the
switch S
4
will be eliminated shown in Fig. 3.

Figure 3: Topology of unidirectional Positive Buck-Boost converter with increased bandwidth.

In this paper we consider that for Inductor current control we need to recuperate the
capacitors energy in case of falling step change in reference voltage or load.
In this paper a current hysteresis, voltage hysteresis control strategy has been
developed for proposed converters. The main focus is on the control strategy to
increase the bandwidth of the system without increasing the switching frequency on
one side and its ability to conduct bidirectional power flow on the other side.
179
If the bidirectional power flow be required in step down case D2 and S4 should be
substituted. (Fig 4)

Figure 4: Bidirectional positive buck boost (step down)

Both topologies shown in Fig. 4 and Fig. 2 can perform step up and step down
operations. The difference is that Fig. 2 topology can reverse the direction of energy
only in step up operation and Fig. 5 topology can reverse the direction of energy only
in step down operation.
The conventional way to develop a bidirectional converter is to anti parallel a diode
with each switch and a switch with each diode in the unidirectional topology.
Applying this method to positive buck boost converter is shown in Fig. 5.

Figure5: Positive Buck-Boost Converter

Comparing this topology and the new topologies presented in this paper we can see
that the number of switches and diodes are same or less.
The main difference between the new topology and the conventional bidirectional
topology is that the capacitor energy can be transferred to the inductor faster in the
new topology because it can direct the inductor current through the capacitor in
negative way.
So the change in output voltage of the topologies presented in this paper can be
performed faster.
180
This is more remarkable when we consider that PBB can store a level of extra
current in its inductor. In the other words adding S
3
can improve the dynamic
response of PBB and the dynamic response can be even more improved by storing
more current in the inductor. Details of controlling PBB with a level of extra current
are presented in [8] which include the effect of extra current storage on the switching
frequency and switching loss of this converter.
The advantage of conventional topology is that the bidirectional energy delivery in
this topology (Fig. 5) can be performed in both step down and step up cases.
In this paper we present the topologies based on PBB which are developed to be
wideband and unidirectional (Fig. 3) or wideband and bidirectional (Fig. 2 and 4).
All of these topologies are controlled to utilize the current storage advantage of PBB
[8].
The following sections of this paper cover switching states, steady state and dynamic
equations, control strategy and simulation results for proposed topologies.

I. SWITCHING STATES
To explain a general control strategy of the proposed DC-DC converter (Fig. 2) all
switching states are presented in Fig.6. There are 9 switching states, 3 of which
freewheels the inductor current and are called zero states. Looking at the voltage
imposed on the inductor in the other 6 states, the states can be divided into three
groups with two states in each. The groups are named A, B, and C. and their states
are shown in Fig.6. Because of this symmetrical availability of switching states there
are options to transfer the inductor energy to the load (A, C) or to the voltage source
(B`, C` ), as well as options to transfer capacitors energy to the inductor (A`, C` )
and voltage sources energy to the inductor (B, C). In zero states the inductor and
capacitor are disconnected and capacitor energy supplies the load while inductor
keeps its current constant.
To reduce the switching loss the controller tries to decrease the switching frequency
of each switch by switching from one state to the next one by changing the on or off
state of only one switch. The states which can be transferred to each other by only
one switching are called adjacent states. Fig. 7 shows the adjacent states.
To familiarize this converter we can see that switching between A and C states is a
Buck converter and switching between B and C is a Boost converter. To discharge
181
B B`
C C`
0(+) 0(-)
0
A A`
Figure 6: Switching states of Fig. 1 topology

capacitor quickly we can apply states which direct the inductor current to the
capacitor in the reverse way (A`, C`). In case of step up S
4
switch can be used to
direct the energy of capacitor and inductor to the voltage source in switching states
of (B` and C`).
There are three Zero states which are called so because inductor voltage is 0 when
the state is 0, 0(-), or 0(+). In addition, capacitor is discharging by load current.
Because of these states we can store some extra current in the inductor while we are
controlling output voltage independently.


















A
C
B` 0
0+
B
A`
0-
C`
Figure 7 adjacency of switching states in
bidirectional positive buck boost converter
The states in box are the states of Fig. 3
Figure 8: the effect of each switching state on Inductor and

Capacitor

-IL-IR
IL-
IR
0
-IR
Vi
Vo-
Vi
0
Vi-
Vo
-Vi
-Vo
I
n
d
u
c
t
o
r

V
o
l
t
a
g
e

C
a
p
a
c
i
t
o
r

C
u
r
r
e
n
t

Vo
182
Table I: Switching states and charging condition of Capacitor and Inductor in each switching state.





















Fig. 8 shows the capacitor voltage and inductor current on each switching state.
There are seven levels for inductor voltage and three levels for capacitor current. In
capacitor current the level of I
L
-I
R
is identical in this topology and allows reducing
the capacitor voltage faster than conventional bidirectional positive Buck Boost
converter.
In drawing Fig. 8 input voltage has been considered to be less than output voltage
and more than V
o
-V
i
.
Of course Fig 8 has been drawn simply. The detailed version should include
fluctuations of output voltage and inductor current.

III. STEADY STATE AND DYNAMIC EQUATIONS
Writing dynamic equations of the inductor current we have:
( )( ) ( ) ( )( ) i L v V T T V T T v T T
voltage capacitor v & current inductor i
in C C in B B A A
= + +
= =

(6)

Defining:

C C C
B B B
A A A
T T T
T T T
T T T
=
=
=
(7)

We have:

( ) ( )
( ) ( ) i L V T T v T T
i L v V T V T v T
in C B C A
in C in B A
= + + +
= + +
(8)

And writing dynamic equations for the capacitors voltage we have:
(S1S2S3S4) C L
A (0000) Charge Discharge
B (1100) Discharge Charge
C (1000) Charge Charge
Vo<Vi
Discharge
Vo>Vi
0 (0100) Discharge No Change
A (0110) Discharge Charge
B (1001) Discharge Discharge
C (0011) Discharge Charge
Vo<Vi
Discharge
Vo>Vi
0+ (0010) Discharge No Change
0- (1001) Discharge No Change
183
( ) ( ) ( ) v C
R
v
T i T T T T
C C A A
= |

\
|
+
(9)

With same definition:

( ) v C
R
v
T i T T
C A
= |

\
|
+
(10)


Writing these equations in a state space form with some simplifications leads to:
in
C B C A
V
T
T T
v
i
R
T
T T
v
i
C
L
(

+
+
(

|
|

\
|
(

+
(

+
=
(

0
1
1
0
0 0
0 1
1 0
0
0

(11)


Calculating transfer functions for inductor current and capacitor voltage results in:
( )
in
C A
C A C B
in
C A
C B
V
R
T
T T
Ls RLCs
T
T T
T
T T
R
v
V
R
T
T T
Ls RLCs
T
T T
RCs
i
2
2
2
2
1
|

\
|
+
+ +
|

\
|
+
|

\
|
+
=
|

\
|
+
+ +
|

\
|
+
+
=








Steady state equation can be driven by putting s = 0 in transfer functions:


( )
( ) ( )
( )
( )
in
C A
C B
Load
C A
in
C A
C B
V
T T
T T
v
I
T T
T
R
V
T T
T T T
i




+
+
=
+
=
+
+
=
2


It is interesting to mention that equations are similar to conventional positive buck
boost converter equations, which are [8]:

( )
( ) ( )
( )
( )
in
C A
C B
Load
C A
in
C A
C B
V
T T
T T
v
I
T T
T
R
V
T T
T T T
i
+
+
=
+
=
+
+
=
2

(14)
(15)
(16)
(17)
(12)
(13)
184
But in case of bidirectional positive buck boost converter
X
T
can have negative
values unlike
X
T
in case of unidirectional positive buck boost converter for states of
A, B, C, and 0.

IV. CONTROL STRATEGY AND SIMULATION RESULTS
Hysteresis control strategy has been developed for the family of topologies presented
in this paper
Hysteresis control strategy is applied to step down case for topologies shown in Fig.
1, 3, 4. This control strategy is simple but has not exact control on switching
frequency and dynamic transient of the system.
This control strategy applies two bands for capacitor voltage and two bands for
inductor current. Crossing these bands makes commands to change switching
configurations. Fig. 9 explains hysteresis control strategy for bidirectional positive
buck boost converter in step down case. The topology is shown in Fig. 4.























Figure 9: looking at Fig 4 the hysteresis control strategy for step down case is explained here.


Fig. 10 shows the simulation results for step conventional, wide band and
bidirectional positive buck boost converters which are controlled by hysteresis
strategy.
In all cases the input voltage is constantly 100V and output resistance is constantly
10 ohms.
Reference current
Reference voltage
Turn off S4 turn on S2
Turn on S3
Turn off S2 turn on S4
Turn on S1
Turn off S1
Turn off S4 and S2 (D2 will turn on automatically)
185
The controller keeps the inductor current twice as minimum required current in all
cases.
Comparing the plots shown in Fig. 10 can be seen that the reference voltage has been
changed to 80V from 20V and at 0.01sec and back to 20 from 80 at 0.03sec.
The voltage and current rise in all of the cases is same it could be quicken by
increasing stored current in the inductor.





Figure 10: a) Conventional PBB (topology: Fig. 1)
b) Wide band PBB (topology: Fig. 3)
c) Bidirectional PBB (topology: Fig. 4)

C
a
p
a
c
i
t
o
r

V
o
l
t
a
g
e

I
n
d
u
c
t
o
r

C
u
r
r
e
n
t

C
a
p
a
c
i
t
o
r

V
o
l
t
a
g
e

I
n
d
u
c
t
o
r

C
u
r
r
e
n
t

I
n
d
u
c
t
o
r

C
u
r
r
e
n
t

C
a
p
a
c
i
t
o
r

V
o
l
t
a
g
e

186
Voltage drop is almost same in (a) and (b) where switch S
3
has been used. But
current has risen in (b) because the topology is not bidirectional and the extra energy
of the capacitor is transferred to the inductor.
In (c) the extra energy of the capacitor has been directed to the source by Diode D
2

which is included in bidirectional topology shown in Fig. 4. Looking closer at (c) the
voltage drop is slightly slower than (b) the reason is transfer of energy to the source
and then lower inductor current during voltage drop.


V. CONCLUSION
A family of DC-DC converter topologies based on positive Buck Boost converter are
introduced. The main approach is to apply PBBs capacity for current storage to
increase band width of theses converters without increasing switching frequency.
Also a bidirectional fast response topology has been derived from PBB.
These topologies have been controlled by hysteresis control strategies. Simulation
results have been presented.

VI. ACKNOWLEDGMENT
The authors thank the Australian Research Council (ARC) for the financial support
for this project through the ARC Linkage Grant LP0774899.

References
[1] Superconducting Magnetic Energy Storage (SMES) for Energy Cache Control in Modular
Distributed Hydrogen-Electric Energy Systems Louie, H.; Strunz, K.;Applied
Superconductivity, IEEE Transactions on Volume 17, Issue 2, Part 2, June 2007 page(s):2361 -
2364
[2] System Integration and Power Flow Management for a Series Hybrid Electric Vehicle using
Super-capacitors and Batteries
Yoo, Hyunjae; Sul, Seung-Ki; Park, Yongho; Jeong, Jongchan;
Applied Power Electronics Conference, APEC 2007 - Twenty Second Annual IEEE , Feb. 25
2007-March 1 2007 Page(s):1032 1037
[3] Modelling and design of super capacitors as peak power unit for hybrid electric vehicles,
Timmermans, J.-M.; Zadora, P.; Cheng, Y.; Van Mierlo, J.; Lataire, Ph.; Vehicle Power and
Propulsion, 2005 IEEE Conference 7-9 Sept. 2005 Page(s):8 pp.
[4] Dynamic Performance of a Static Synchronous Compensator with Superconducting Magnetic
Energy Storage Molina, M.G.; Mercado, P.E.; Watanabe, E.H.; Power Electronics Specialists
Conference, 2005. PESC '05. IEEE 36th 2005 Page(s):224 230
[5] A high-efficiency linear RF power amplifier with a power-tracking dynamically adaptive buck-
boost supply Sahu, B.; Rincon-Mora, G.A.; Microwave Theory and Techniques, IEEE
Transactions on Volume 52, Issue 1, Part 1, Jan. 2004 page(s):112 120
[6] A DSP structure authorizing reduced-bandwidth DC/DC Converters for Dynamic Supply of RF
Power Amplifiers in Wideband Applications Cesari, Albert; Cid-Pastor, Angel; Alonso,
187
Corinne; Dilhac, Jean-Marie; IEEE Industrial Electronics, IECON 2006 - 32nd Annual
Conference on Nov. 2006 Page(s):3361 3366
[7] Efficiency optimization in linear-assisted switching power converters for envelope tracking in
RF power amplifiers Yousefzadeh, V.; Alarcon, E.; Maksimovic, D.; Circuits and Systems,
2005. ISCAS 2005. IEEE International Symposium on 23-26 May 2005 Page(s):1302 - 1305 Vol.
2
[8] A General Approach to Control a Positive Buck-Boost Converter to Achieve Robustness against
Input Voltage Fluctuations and Load Changes Arash A Boora, Student member, IEEE, Firuz
Zare, Senior member, IEEE, Gerard Ledwich, Senior member, IEEE, Arindam Ghosh, Fellow,
IEEE . PESC 2008 (unpublished)




Supplementary
However the disadvantages of the presented topologies compared to unidirectional
positive Buck-Boost converter is the extra number of switches which causes more
switching loss.
In addition, compared to conventional bi-directional positive buck boost converter,
by using MOSFETs as switches, the possibility of soft switching for conventional
topology allows better efficiency.




189
Chapter 7
This chapter presents the fifth paper published during this research. This paper
presents and compares multi-output modification of basic power electronics
topologies.
This paper has been published in International Conference on Renewable
Energies and Power Quality (ICREPQ'9).
























190
A Novel Configuration for Voltage Sharing in Diode-clamped
Topology

A. Nami, Student Member, IEEE, A. A. Boora, Student Member, IEEE, F. Zare, Senior Member,
IEEE, G. Ledwich, Senior Member IEEE, A. Ghosh, Fellow, IEEE
E-mail: namia@qut.edu.au
School of Engineering Systems, Queensland University of Technology, Brisbane, Australia

Abstract-This paper presents a new multi-output voltage sharing (MOVS)
converter. Different output voltage sharing can be achieved by a given duty
cycle for low and high power applications. A high voltage application has been
considered in this paper where the novel DC-DC converter is being used as
interference between high unregulated DC source of wind turbine(WT) and
photovoltaic (PV) and diode-clamped multilevel inverter in which high quality
regulated DC voltage is generated for DC link capacitors. Meanwhile, capacitor
unbalancing problem in such converters could be avoided as the voltage across
each capacitor is controlled to the desired voltage level which leads to decrease
the complexity of inverter control. In order to verify the proposed topology,
steady state and modelling analysis of three types of MOVS topology based on
different number of switching devices and performance with double-output
have been studied. The topologies could be easily extended to give multiple
outputs. Simulation results are presented to show the validity of the proposed
converters.
I. INTRODUCTION
Multi-output DC-DC converters are such efficient and economical devices which
are used instead of several separate single output power supply [1]. Conventional
multi-output DC-DC converters utilize a transformer with multiple secondary
winding to deliver energy into the different outputs [2]. Recently, multi-output
converters employ with multiple inductors in which for M output voltage M inductor
are required. As a number of output voltages increase, the number of required
inductor will be increased which leads to increase the cost and bulk of the system.
Using single inductor multi-output (SIMO) configuration can bring down the number
of component either switches or inductors. A part from those losses decrease
considerably and coupling losses between parallel inductors in some multi-output
191
configurations are also minimised [3]. Most of research works on single-inductor
configuration for different DC-DC converter are reported in [4-7]. However, these
configurations proposed independent power supply for low voltage applications such
as computers, LCD, mobile phone and digital cameras.
This paper presents new configurations of SIMO with minimum switches for
voltage sharing where the output voltages are series. These topologies are suitable for
high voltage applications such as WT or PV systems where there is a need for series
regulated DC voltage to supply diode-clamped inverter. Moreover, capacitor
unbalancing problem can be eliminated as the DC link voltages are constrained by
MOVS circuit. Two different configurations for double-output MOVS converter is
proposed based on number of switches. Steady state and modelling analysis of both
topologies will be discussed in section 2. Control strategy and simulation results will
confirm the operation of configurations in section 3.

II. MULTI-OUTPUT VOLTAGE SHARING (MOVS) DC-DC CONVERTER
MOVS Basically is a DC-DC converter with one inductor and series connected
capacitors in output side in order to generate different regulated DC voltage. Using
these series regulated voltage at the DC link voltage of diode-clamped inverter
(Fig.1) can solve the capacitor voltage unbalancing problem and help to simplify the
control of this type of multilevel inverters. Moreover, this configuration is suitable
for renewable energy applications such as WT systems where the proposed converter
can regulate the variable and low quality output of high voltage rectifier. Three
different configurations for MOVS with different ability based on different number
of switches are proposed which will be analysed in detail for double-output in
following sections.

192

Fig.1: Using MOVS in renewable energy systems for three-phase and single phase applications with
three-level diode-clamped inverter

A. DOUBLE-OUTPUT VOLTAGE SHARING CONVERTER
Fig.2 shows a basic configuration of novel double-output voltage sharing with one
switch. As it shown, the power circuit consists of one inductor (L); one switch (S
1
),
one diode (D
1
) and two series capacitor (C
1
and C
2
) in output. Based on the position
of S
1
this configuration basically operates in two different subintervals. Fig.3
illustrates the equivalent power circuit, in two subintervals. As it depicted during the
first subinterval when S
1
is turned on, the diode (D
1
) obstruct the charging current
through C
2
as the voltage across the diode will be negative. Thus, the switch S
1
conducts to direct the inductor current to C
1
. However during the second subinterval
S
1
is off and diode (D
2
)

can direct the inductor current to both C
1
and C
2
.
The average amount of inductor voltage and capacitor over one switching cycle are
computed as follow:
)
R
) t ( v
) t ( i ( ) t ( d )
R
) t ( v
) t ( i ( ) t ( d
dt
) t ( v d
C ) t ( i
c
c
1
1
1
1
1
1
1
1 1
+ = =
(1)
)
R
) t ( v
) t ( i ( ) t ( d )
R
) t ( v
( ) t ( d
dt
) t ( v d
C ) t ( i
c
c
2
2
1
2
2
1
2
2 2
+ = =
(2)
) ) t ( v ) t ( v ) t ( v ( ) t ( d ) ) t ( v ) t ( v ( ) t ( d
dt
) t ( i d
L ) t ( v
dc dc L 2 1 1 1 1
+ = =
(3)

Where each variable consists of two parameters, a DC value and a small
perturbation signal.
193
So input variable are ) ( ) ( , ) (

) ( ), (

) (
1 1 1 0 0 0
t v V t v and t d D t d t d D t d
dc dc dc
+ = + = + = and
the output variables are given by ) (

) ( ) ( ) ( , ) ( ) (
2 2 2 1 1 1
t i I t i and t v V t v t v V t v + = + = + = .


Fig.2: Basic configuration of novel double-output voltage sharing






S1=on

S1=off
Fig.3: Equivalent circuit of novel double-output voltage sharing with one switch

In order to study a steady state, capacitors voltage and inductor current are depicted
in Fig.4.
In the steady state operation, the average capacitor current and inductor voltage over
one switching cycle (T
s
) is equal to zero, thus;
0
0
0
2
2
1
1
1
2 1 1
=
=
=
R
V
I D I
R
V
I
V D V V
dc
(4)
Also,
1
1 1
= + D D (5)
By solving Eq.4 and Eq.5, output voltages in steady state can be derived as follow:
1
st
subinterval 2
nd
subinterval
194
) (
2
1
1
D n
nV
V
dc
+
= (6)
) (
2
1
2
D n
V D
V
dc
+

= (7)
Where
2
1
R
R
n =
. Inductor current equation is:
1
1
R
V
I = (8)


first capacitor current

second capacitor current

Inductor voltage
Fig.4: capacitors current and inductor voltage in two subintervals

By substitution of small signal part of the variables and linearization of Eq.1 to Eq.3,
averaging equations can be rewritten for small signal equations as below:
1
1 1
1
) (
) (

) (
R
t v
t i
dt
t v d
C =
(9)
) (

) (
) (

) (
1
2
2
1
2
2
t d I
R
t v
t i D
dt
t v d
C =
(10)
) (

) ( ) ( ) (
) (

1 2 2 1 1
t d V t v t v D t v
dt
t i d
L
dc
+ + = (11)
Rewriting the small signal modelling equations as a state space format we have:

) (

) (
1
0
0 0

0 1
1
0
1 0
1

0 0
0 0
0 0
1
2
2
1
1
1
2
1
2
1
2
1
t d
t v
V
I
i
v
v
D
D
R
R
i
v
v
L
C
C
dc
(12)
195
Based on steady state and small signal equations, this converter basically operates
as a voltage sharing converter and different output voltage can be regulated by
adjusting the duty cycle of S
1
in close loop control strategy. However as there is only
one control parameter (S
1
duty cycle), one of the output voltages can be controlled
for desired voltage level and the other output voltage is defined based on the
controlled and whole output voltages. This issue will be shown in simulation section.

B. DOUBLE-OUTPUT STEP-DOWN VOLTAGE SHARING CONVERTER
To be able to regulate all output capacitors voltage in voltage sharing converter a
basic configuration and circuit diagram of the novel voltage sharing converter with
two output-voltages is presented in Fig.5. This circuit includes buck converter series
with voltage sharing converter. S
B
is the buck converter switch and, S
1
is the double-
output voltage sharing converter switch. When S
B
is turned on the inductor can be
magnetized by the current flowing through it. Power circuit is like a voltage sharing
converter and it works in two different subintervals when S
1
is being on or off. In the
next two subintervals, S
B
remains off and S
1
works to direct the inductor current
either through the only C
1
or both C
1
and C
2
when it is getting on or off respectively.
In both fashion of S
B
, when S
1
is on, the inductor current can charge both C
1
and C
2

to produce v
1
and v
2
, respectively. On the other hand, when S
1
is off, C
2
is being
discharged through R
2
as reverse current flow is prohibited by the diode, while C
1
is
being charged by the inductor current. Consequently the output voltage level can be
controlled by adjusting the duty cycle of each switch. Therefore this configuration
normally works in four subintervals based on different position of S
B
and S
1
which
are emerged in Fig.6.
Fig.5: Basic configuration of novel double-output step-down voltage sharing









196











SB=on , S1=on

SB =on , S1=off
SB =off , S1=on

SB =off , S1=off
Fig.6: Equivalent circuit of novel double-output step down voltage sharing

The average amount of inductor voltage and capacitor over one switching cycle of
this converter can be considered likewise as Eq.1 to Eq.3. Therefore, capacitors
voltage and inductor current could be depicted in Fig.7.



first capacitor current

second capacitor current

Inductor voltage
Fig.7: capacitors current and inductor voltage in four subintervals

Regarding to the fact that in the steady state operation, the average capacitor current
and inductor voltage over one switching cycle is equal to zero, thus output voltage
can be calculated as below:
) 1 (
2
1
0
1
D n
V D
V
dc
+
= (13)
3
rd
subinterval 4
th
subinterval
1
st
subinterval
2
nd
subinterval
197
) 1 (
2
1
1 0
2
D n
V D nD
V
dc
+

= (14)
Where
2
1
R
R
n =
. Also, inductor current equation is:
1
1
R
V
I = (15)
By substitution of small signal part of the variables and linearization of averaging
equations similar to Eq.9 to Eq.11, small signal modelling equations for double-
output step-up voltage sharing converter is written as a state space format as below:

) (

) (

) (
0 0
0 0 0

0 ) 1 ( 1
) 1 (
1
0
1 0
1

0 0
0 0
0 0
1 2
2
1
1
1
2
1
2
1
2
1
t d
t d
t v
V V D
I
i
v
v
D
D
R
R
i
v
v
L
C
C
B
dc
dc B
(16)
By considering steady state equations and small signal modelling it is clear that this
converter can be controlled as a step-down converter by controlling the duty cycle of
S
0
, while controlling of S
1
gives a opportunity to adjust a voltage sharing between
two series output. By doing so, total output voltage is less than input voltage and
both output voltages are adjustable to a desired voltage level as two control
parameters (S
B
duty cycle (D
B
) and S
1
duty cycle (D
1
)) are available in this
configuration. This configuration could be suitable for high voltage application
renewable energy systems such as WT systems where the rectified output voltage
needs to be regulated for DC-link of diode clamped converter.

C. Double-output Step-up Voltage sharing Converter
Alternative multi-output voltage sharing converter to have a regulated voltage in all
output capacitors is presented by series connection of boost converter [8].
The configuration of this circuit with double-output is shown in Fig.8. This topology
can boost the input voltage as well as voltage sharing regulation in output capacitors
voltage. This ability would be suitable for low output renewable energy systems such
as PV with where the low DC voltage of each PV cell should be boosted and
regulated to the desired voltage levels.
198

Fig.8: Basic configuration of novel double-output step-up voltage sharing

S0=on , S1=off

S0=off , S1=on

S0=off , S1=off
Fig.9: Equivalent circuit of novel double-output voltage step-up sharing

Different operations of this configuration based on switching position are
demonstrated in Fig.9. In the first subinterval S
0
is on and inductor is charging by the
current flowing through it. During the second and third subinterval when S
0
is off,
again power circuit is working as a double-output voltage sharing converter. When S
1

is off, the diode can direct the inductor current to both the capacitors. However when
S
1
is on in the last subinterval, the diode obstruct the charging current through C
2

because the voltage across the diode will be negative. Thus the switch S
1
conducts to
direct the inductor current to C
1
.
Based on to averaging equation for inductor voltage and capacitors current, steady
state operation of double-output boost sharing voltage converter is represented in
Fig.10.As the average capacitor current and inductor voltage over one switching
cycle is equal to zero, regarding to Fig.10 the steady state equations can be obtained
as below:



1
st
subinterval
2
nd
subinterval 3
rd
subinterval
199

first capacitor current

Second capacitor current

Inductor voltage
Fig.10: capacitors current and inductor voltage in three subintervals

2
1 0
2
0
0
1
) 1 ( ) 1 (
) 1 (
D D D n
V D n
V
dc
+

= (17)
2
1 0
2
0
1 0
2
) 1 ( ) 1 (
) 1 (
D D D n
V D D n
V
dc
+

=
(18)
) 1 (
0 1
1
D R
V
I

= (19)
Small signal modelling equations can be written as a state space format:

) (

) (

) (
) (
0
0 0

0 ) 1 ( ) 1 (
) 1 (
1
0
) 1 ( 0
1

0 0
0 0
0 0
1
0
2 2 1 0
2
1
1 0 0
1 0
2
0
1
2
1
2
1
t d
t d
t v
V V V D
I I
I
i
v
v
D D D
D D
R
D
R
i
v
v
L
C
C
dc
(20)
Regarding to steady state equations and small signal modelling it is clear that this
converter is controllable to boost the total output voltage and simultaneously it can
regulate each capacitor voltage which makes it suitable for PV application with
diode-clamped topology where there is a need to boost the low output voltage.

D. Double-output Step-up/down Voltage sharing Converter
In order to have benefits of three pervious converters, the topology of double-
output buck boost voltage sharing converter is proposed. Fig. 11 shows the
configuration of this topology. This topology can perform in step up and step down
conversions. However it has more switching devices. Different operation of proposed
topology based on different switching states is shown in Fig. 12. As it shown it
200
performs in six subintervals which includes all equivalent circuits of three other
converters. Therefore it can control the voltage sharing as well as regulating the
output voltage either in step up or step down mode. The other advantage of this
topology is the switching state of Fig.12 (d) which allows the controller to store some
extra current in the inductor. This extra current can be applied to improve stability
and robustness of output voltages [9].

Fig.11: Basic configuration of novel double-output step-up/down voltage sharing converter

C1
C2
Vdc
+ VL(t) -
L
R2
R1
Ic2
Ic1
+
V1(t)
_
+
V2(t)
_

SB=on , S0=on,S1 =off
C1
C2
Vdc
+ VL(t) -
L
R2
R1
Ic2
Ic1
+
V1(t)
_
+
V2(t)
_
SB=off
, S0=on,S1 =off

SB=on , S0=off,S1 =on

SB=off , S0=off,S1 =on

SB=on , S0=off,S1 =off
C1
C2
+ VL(t) -
L
R2
R1
Ic2
Ic1
+
V1(t)
_
+
V2(t)
_

SB=off , S0=off,S1 =off
Fig.12: Equivalent circuit of novel double-output step up/down voltage sharing in


Based on the averaging equation for inductor voltage and capacitors current, steady
state operation of double-output buck boost sharing voltage converter is
demonstrated in Fig.13.





1
st
subinterval
2
nd
subinterval
3
rd
subinterval
4
th
subinterval
5
th
subinterval
6
th
subinterval
201

first capacitor current

Second capacitor current

Inductor voltage
Fig.13: capacitors current and inductor voltage in six subintervals

As the average capacitor current and inductor voltage over one switching cycle is equal to
zero, steady state equations can be extracted as below:
2
1 0
2
0
0
1
) 1 ( ) 1 (
) 1 (
D D D n
V D D n
V
dc B
+

= (21)
2
1 0
2
0
1 0
2
) 1 ( ) 1 (
) 1 (
D D D n
V D D D n
V
dc B
+

= (22)
) 1 (
0 1
1
D R
V
I

=
(23)
Small signal modelling in state space format is derived as bellow:

1
0
2 2 1
2
1
1 0 0
1 0
2
0
1
2
1
2
1

) (
0 0
0 0 0

0 ) 1 ( ) 1 (
) 1 (
1
0
) 1 ( 0
1

0 0
0 0
0 0
d
d
d
v
V V V V D
I I
I
i
v
v
D D D
D D
R
D
R
i
v
v
L
C
C
B
dc
dc B
(24)
Steady state and modelling equations (Eq.21 to Eq. 24) show the ability of proposed
configuration to control the output voltages to the desired value either more or less than input
voltage. Due to the fact that controlling of input voltage is possible in step up and down
mode with utilization of this configuration, it would be the suitable candidate for any
renewable high energy systems with diode-clamped topology. However the only
disadvantage of this circuit in compared with the other configurations is the number of
switches which is obvious due to the more ability of this configuration.

202
III. SIMULATION RESULTS
The objective of this section is to verify the proposed topologies by comparing the
theoretical results for the with the simulation results at different operation modes. As
presented in the final equations, the output voltages of proposed configurations can be
controlled by the duty cycles of the switches. Therefore, close loop control strategy is
applied for each converter to control the voltage sharing. Simulations are carried out for
double-output. However it can be easily implemented for multi-output converters. Power
circuit parameters for different configurations are presented in Table.1. Input voltage of each
converter is supposed to be an output voltage of diode rectifier with high variation. A case
study have been Performed when the desired output voltages are controlled to obtain a same
value.

Table1. Power circuit parameters of different MOVS

Voltage control block diagram of double-output voltage sharing converter is
demonstrated in Fig.14. In this control method V
1
is being simply controlled using S
1.
In this case, once the voltage error of V
1
and V
1ref
is above the dead bond S
1
is turned
off otherwise is turned on. Therefore, duty cycle of S
1
could be adjusted based on
reference voltage of V
1
in double-output voltage sharing. Although the voltage of
first output is controlled, there is no control on second output voltage due to
limitation of switching states. This limitation was addressed in steady state analysis
and Fig.15 shows the simulation results.

203

Fig.14: Block diagram of control strategy for double-output voltage sharing converter
Fig.15: Waveforms for double-output voltage sharing converter. From up to down: rectified input
voltage, inductor current (V
2
), second output, and first output (V
1
)
Block diagram of control strategy for double-output step down voltage sharing
converter is depicted in Fig.16. control voltage of V
1
is performed same as double-
output voltage sharing control strategy while there are switching states possibility in
double-output step down voltage sharing converter to control both output capacitors
voltage. Duty cycle of S
B
is controlled to regulate entire output voltage. By doing so,
both output voltage can be controlled. Simulation results for double-output step
down sharing converter are shown in Fig.17. As it depicted, input voltage is rectified
output voltage of rectifier with high variation about 100V. Output voltages are
properly controlled to the same value of 70V and with less than 10V variation which
I
n
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t

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o
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a
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e

I
n
d
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c
t
o
r

c
u
r
r
e
n
t

F
i
r
s
t

o
u
t
p
u
t

(
V
1
)

S
e
c
o
n
d

o
u
t
p
u
t

(
V
2
)

time
204
shows the performance of this proposed circuit to comprehensively share and control
the high variation of input voltage into different voltage levels.


Fig.16: Block diagram of control strategy for double-output step down voltage sharing converter



Fig.17: Waveforms for double-output step down voltage sharing converter. From up to down: rectified
input voltage, inductor current (V
2
), second output, and first output (V
1
)

I
n
p
u
t

V
o
l
t
a
g
e

I
n
d
u
c
t
o
r

c
u
r
r
e
n
t

F
i
r
s
t

o
u
t
p
u
t

(
V
1
)

S
e
c
o
n
d

o
u
t
p
u
t

(
V
2
)

time
205

Fig.18: Block diagram of control strategy for double-output step up voltage sharing converter

Fig.19: Waveforms for double-output step up voltage sharing converter. From up to down: rectified
input voltage, inductor current (V
2
), second output, and first output (V
1
)


Fig.20: Block diagram of control strategy for double-output step up voltage sharing converter
I
n
p
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t

V
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a
g
e

I
n
d
u
c
t
o
r

c
u
r
r
e
n
t

F
i
r
s
t

o
u
t
p
u
t

(
V
1
)

S
e
c
o
n
d

o
u
t
p
u
t

(
V
2
)

time
206


Fig.21: Waveforms for double-output step up/down voltage sharing converter. From up to down:
rectified input voltage, inductor current (V
2
), second output, and first output (V
1
)

As the boost converter is basically unstable converter because of right hand side zero
in its transfer function. To control the boost and buck boost converter in close loop,
hysteresis current control based on output voltage error has been performed. Fig.18
illustrates the block diagram of the control method for double-output step up voltage
sharing converter. In this control method as it shown, total output voltage is
controlled by S
0.
Based on the voltage error of (V
1
+V
2
) and (V
1ref
+V
2ref
) proper
reference current is defined so that hysteresis current control applies to switch the S
0
.
Controlling the S
1
is same as above converters where it switches to control the V
1
. By
doing so, both output voltage capacitors can be boosted and regulated to the desired
voltage levels. Fig.19 shows the simulated output waveforms in terms of high
variates input voltage.
Fig. 20 shows the control block diagram of positive Buck Boost converter which is
more complicated than others because the inductor current have to be controlled
independently. The advantage of this converter has been shown in Fig. 21 compared
with Fig.19. The second output voltage fluctuates when periodic voltage drops
happen. But the controller increases the inductor current reference and the fluctuation
of second voltage alleviates gradually. There is no equivalent for this advantage in
other topologies discussed in this paper because they do not have a switching state
I
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e

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r

c
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r
e
n
t

F
i
r
s
t

o
u
t
p
u
t

(
V
1
)

S
e
c
o
n
d

o
u
t
p
u
t

(
V
2
)

time
207
equivalent to the fourth switching state of positive Buck-Boost converter (Fig.12)
which decouples inductor current and capacitor voltage.
The limitation of presented topologies is that the load of first second load connected
to C
2
is limited to the load of the first load connected to C
1
. Therefore;
1 2
R R
I I
(25)
IV. CONCLUSION
In this paper new configuration for control voltage sharing (MOVS converter) to
supply diode-clamped multilevel inverter is proposed. Based on proposed method
three different power circuit for voltage sharing with different ability to buck, boost
and buck-boost the input voltage are presented. Regarding to steady state analysis
and modelling equations, double-output voltage sharing converter is the simplest
configuration with one switch to share the voltage. However it has a limitation to
regulate both output voltages. In double-output configuration with two switches, step
down voltage sharing converter is a suitable choice for high power application when
the high unregulated rectified voltage should be connected to diode-clamped
converter. Voltage sharing converter in step up mode has an ability to boost the low
input voltage as well as voltage sharing regulation which has made it appropriate
candidate for renewable energy systems. Although double-output step up/down
sharing voltage converter has more switches in compared with other topologies, it
benefits from all other configurations advantages in which it can boost or buck the
input voltage as well as the voltage sharing with proper stability. All above double-
output configurations can be easily extended for multi-output converters. Therefore,
based on different application proper MOVS can be chosen.
ACKNOLEDGEMENT
The authors thank the Australian Research Council (ARC) for the financial support
for this project through the ARC Discovery Grant DP0774497.
V. REFERENCES
[1] Y. Xie and J. Gan, "Study on the voltage stability of multi-output converters," in Power
Electronics and Motion Control Conference, 2004. IPEMC 2004. The 4th International,
2004, pp. 482-486 Vol.2.
[2] R.WErickson, Fundamentals of Power Electronics. Boston,MA: Kluwer, 1999.
[3] M. Dongsheng, K. Wing-Hung, T. Chi-Ying, and P. K. T. A. M. P. K. T. Mok, "Single-
inductor multiple-output switching converters with time-multiplexing control in
discontinuous conduction mode," Solid-State Circuits, IEEE Journal of, vol. 38, pp. 89-100,
2003.
208
[4] M. Dongsheng, K. Wing-Hung, T. Chi-Ying, and P. K. T. A. M. P. K. T. Mok, "A 1.8 V
single-inductor dual-output switching converter for power reduction techniques," in VLSI
Circuits, 2001. Digest of Technical Papers. 2001 Symposium on, 2001, pp. 137-140.
[5] P. Patra, S. Samanta, A. Patra, and S. A. C. S. Chattopadhyay, "A Novel Control Technique
for Single-Inductor Multiple-Output DC-DC Buck Converters," in Industrial Technology,
2006. ICIT 2006. IEEE International Conference on, 2006, pp. 807-811.
[6] A. Pizzutelli and M. Ghioni, "Novel control technique for single inductor multiple output
converters operating in CCM with reduced cross-regulation," in Applied Power Electronics
Conference and Exposition, 2008. APEC 2008. Twenty-Third Annual IEEE, 2008, pp. 1502-
1507.
[7] K. Wing-Hung and M. Dongsheng, "Single-inductor multiple-output switching converters,"
in Power Electronics Specialists Conference, 2001. PESC. 2001 IEEE 32nd Annual, 2001,
pp. 226-231 vol. 1.
[8] A. Nami, F. Zare, G. Ledwich, A. Ghosh, and F. Blaabjerg, "A new configuration for
multilevel converters with diode clamped topology," in Power Engineering Conference,
2007. IPEC 2007. International, 2007, pp. 661-665.
[9] A. A. Boora, F. Zare, G. Ledwich, and A. Ghosh, "A New DC-DC converter with multi
output: topology and control strategies," Accepted for presentation at EPE-PEMC 2008.

209
Chapter 8
This chapter presents the seventh paper published during my research. This
paper presents the Dynamic Hysteresis Band (DHB) control strategy as a
complementary strategy to Smart Load controller.
This paper has been published in European Power Electronics (EPE)
Conference 2009.













210
Application of Dynamic Hysteresis Band Height Control to Improve
Output Voltage Transient in Boost and Positive Buck-Boost
Converters
Arash A. Boora*, Firuz Zare, Senior Member IEEE, Arindam Ghosh, Fellow IEEE
Queensland University of Technology
Gardens Point, 2 George St, 4001, QLD Australia
arash.boora@student.qut.edu.au
Acknowledgement
The authors thank the Australian Research Council (ARC) for the financial support
for this project through the ARC Linkage Grant LP0774899.
Keywords
Power Electronics, DC Power supply, Control methods for electrical systems.

Abstract
This paper presents dynamic hysteresis band height control to reduce the overshoot
and undershoot issue on output voltage caused by load change. The converters in this
study are Boost and Positive Buck-Boost (PBB) converters. PBB has been controlled
to work in a step up conversion and avoid overshoot when load is changed.
Simulation and experimental results have been presented to verify the proposed
method.

Introduction
One of main approaches to control a Boost converter is to have a fast current control
loop and a slower voltage reference loop [9, 10]. The output voltage loop changes the
current reference according to output voltage error. The function, which transfers the
voltage error to current reference, determines the control method. Hybrid control
strategy based on state trajectory approximation and input to output transfer
functions of a boost converter controlled by peak current mode control are addressed
in [9] and [10].

211

(a) (b)
Fig. 1: a) Boost converter b) Positive Buck-Boost converter
This approach has been utilised for both Boost (Fig. 1a) and PBB converters [1] (Fig.
1b). The hysteresis method is applied for the current control section and the
hysteresis band height block is manipulated to improve the dynamic response of the
Boost and PBB converters with respect to load disturbances. While the PBB
converter can perform in step down and step up conversions, in this paper step up
conversion is considered for making a comparison between the Boost and PBB
converters.
A difference between the Boost converter and the PBB converter is the Buck
Switch S
Buck
and Buck Diode D
Buck
as shown in Fig.1b. There is an extra freedom
degree for the PBB converter because of this extra switch. The utilization of this
freedom degree has been investigated in [1] by the storage of extra current in the
inductor to disturbance rejection [5] for the PBB converter. Simulation results are
presented in Fig.2, to show the advantages of the inductor over-charging. In Fig.2a
the inductor is 20% overcharged and as a result, the output voltage is undisturbed
when the load is changed.

(a) time

(b) time
Fig 2: Performance of PBB converter with inductor over-charging (a) without SLC (b) with SLC
Load has changed from 100 to 60 (0.2sec) and reverse (0.6sec)
O
u
t
p
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V
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a
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(
V
)

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C
u
r
r
e
n
t

(
A
)

B
u
c
k

S
w
i
t
c
h

Load rise Load fall Load rise Load fall
212
The main disadvantage of that approach is the extra losses due to overcharging the
inductor. In [1], a Smart Load Controller (SLC) is suggested to solve the low
efficiency problem for some applications when a load is pre-known or may be
predicted. In this case, the inductor current is increased before turning on a new
device (increasing load). Fig.2b shows a simulation result regarding the performance
of the PBB converter with an SLC. However, there are limited applications in which
load can be predicted or controlled.
This paper presents a new method to increase the inductor current during transient
which means there is no extra current stored in the inductor in a steady state. The
freedom degree of the PBB converter is utilized to decrease output transient and
improve quality of output voltage, after disturbances occur. Therefore, unlike the
case in [1] there is no extra loss in steady state operation of the PBB converter in
comparison with the Boost converter, and the load change is not assumed to be
predicted.
Transient reduction has been investigated in [2] when a disturbance is on the input
voltage. In the absence of disturbance, the PBB converter works almost the same as a
Boost converter. S
Buck
is turned on when the output voltage fluctuates. The topology
of PBB converter has been usually used as a Buck or a Boost converter [3, 4, and 6],
therefore, one of the switches does not operate.
In this paper, a controller is designed to control the PBB converter to work as a Boost
converter in steady state operation, but when a disturbance occurs, both switches in
the PBB converter operate to attenuate output voltage fluctuations. Boost converter
dynamic has been investigated and compared with PBB converter for the same
disturbances and conditions.

Load Disturbances
Sudden drop of output load causes overshoot and the sudden rise of output load leads
to undershoot. The overshoot and undershoot problems in the output voltage of a
Boost or a PBB converter depends on a few parameters such as:
the level of load change
circuit elements (L,C)
The higher value of the inductor the more energy is stored in the
inductor for a given load. When the load suddenly reduces, the energy
stored in the inductor should be consumed by the load because the
213
Boost converter cannot decrease the inductor energy by any other
element. Therefore, the S
Boost
will be open and the inductor current is
directed to the capacitor and load.
( )
( ) t v V
dt
t di
L
C in
L
=


The load current is determined by capacitor voltage.
( ) ( ) R / t v t i
C R
=


The capacitor voltage is determined by the difference between
inductor current and load current.

( )
( ) ( ) t i t i
dt
t dv
C
R L
C
=


The smaller value of the capacitor means the higher voltage change.
Control loop
When load is changed, the inductor current reference is modified by
the control loop. Having a faster control loop, overshoot/undershoot,
and especially the recovery time after a load disturbance are reduced.
Immediate response of the control system
In addition to gradually modifying the current reference, the control
system may have an immediate response to load disturbances.

In this paper, a dynamic hysteresis band height control for a Boost and a PBB
converter is presented. In addition, the PBB converter has an extra freedom degree,
which is utilised to remove overshoots caused by load changes.

Control System
The fast current control loop is developed by a hysteresis control scheme. In
addition, the current reference loop is developed in a V850E/IG3 microcontroller by
an algorithm to change the reference current according to output voltage error on a
regular basis. The block diagrams of the circuit and control system of the converters
are illustrated in Fig.3.
(2)
(3)
(1)
214
Since the control strategy has a logical approach, the control system is illustrated as a
flowchart in Fig.4a and switching states are shown in Fig.4b. The control strategy is
the same for the Boost and PBB converters when there is no disturbance, but it
differs when the disturbance affects the output voltage.




Fig 3: Block Diagram of the control system of Boost converter (a) and PBB converter (b) with
dynamic hysteresis band control

The flowchart in the red dashed box shown in Fig.4a controls the Boost converter
while the green solid-line box is bypassed and is not considered. The green solid-line
box is used to control the PBB converter while the red dashed box is bypassed and is
not considered for the PBB converter control. The other flowchart blocks in the
Fig.4a are used to control both converters. In addition, the switching states of each
converter are illustrated in Fig.4b which are related to decisions made in the
flowchart.

(b)
(a)
215

Fig. 4: a) the flowchart of control system. b) Switching states linked to control flowchart decisions

As described in Fig.4 and the above section, the difference between the Boost and
PBB converter control methods is over-voltage handling strategies in these
converters. The boost converter controller tries to reduce overvoltage by increasing
the lower band height of the hysteresis current control (Fig.5). However, in the PBB
converter, the Buck switch operates to avoid the overvoltage (Fig. 7, 11 & 12). In
the case of an overshoot in the Boost converter, the lower band of hysteresis will be
decreased to I
ref
/2 so the average inductor current would be decreased to 75%. Eq.4
and Eq.5 show the changes of average inductor current for overshoot and undershoot,
respectively.
In both the Boost and PBB converters, the strategy to reduce transient of the output
voltage when an undershoot occurs is to increase the upper band height of the
hysteresis current control. In the control flowchart and experimental results presented
in this paper, the upper band height has been increased to 2 times of I
ref
, thus, the
(a) (b)
PBB Converter
Boost Converter
PBB
Converter
Boost Converter
vB: Voltage band
Bu: upper current band
Bd: lower current band
Vref: reference voltage
Iref: reference current
216
average inductor current will be increased quickly by 150% and does not wait for a
slow current reference loop to handle the undershoot.
{ }
{ }
ref
USh
L ref d
ref
OSh
L ref u
I
n
n
I avg n / I B
I
n
I avg I . n B
2
1
2
1
+
= =
+
= =

Where n is 2 in the control system presented in this paper.
The timer shown in Fig. 4 is developed in the microcontroller to modify the inductor
current reference value according to the voltage error.

Simulation results
Several simulations have been carried out to validate the proposed control method.
The control strategy and electrical parameters of the circuits are chosen to be close to
the values applied in the experimental results.
Fig. 6a illustrates the dynamic of a Boost converter after a step change in load. The
load current is changed from 0.2A to 0.33A at 0.2s and turned back to 0.2A at 0.6s.
The input voltage is 10V and the output voltage is controlled to be 20V, and the
steady state value of the inductor current is twice as the load current. Voltage drop
and voltage rise are dynamic consequences of this load disturbance. Fig.5b shows the
enhancement achieved by the dynamic hysteresis band height control scheme on the
Boost converter. The output voltage drop is reduced to half of the voltage drop
shown in Fig.6a. Overshoot is reduced to one third of the overshoot shown in Fig.6a.
Fig.6a shows the results of load disturbance on a PBB converter without a dynamic
hysteresis band height control system, which has been compared with a dynamic
hysteresis band height control system. In both graphs shown in Fig.6, the overshoot
has been completely removed by the switching of the Buck Switch. The voltage
drop has reduced to half of the voltage drop shown in Fig.6a.






(4) The average current
when the upper band has increased
(5) The average current
when the lower band has decreased
217

(a)
time(sec)

(b)
time(sec)
Fig 5: a) The dynamic of the Boost converter b) the dynamic of the Boost converter with a dynamic hysteresis
band height. from 100 to 60 (0.2sec) and reverse (0.6sec)

(a)
time(sec)

(b)
time(sec)
Fig 6: a) The dynamic of the case study PBB converter b) the dynamic of the case study PBB converter with a
dynamic hysteresis band height. In addition, the performance of input switch is shown. from 100 to 60
(0.2sec) and reverse (0.6sec)

It is clear that a good controller may improve dynamic of the Boost converter, but the
focus of this paper is to introduce the utilization of the dynamic hysteresis band
height to improve the transient and dynamic of Boost and PBB converters for a given
controller. For the same control system, different hysteresis band heights have been
simulated to illustrate the relationship between the level of the dynamic hysteresis
band height and overshoot and undershoot. It is important to address that the level of
overshoots and undershoots depend on the load change. Thus, the simulations have
been performed for two load changes: 100 to 60 and 100 to 30 and vice
versa. The level of overshoots and undershoots and recovery time for each case are
described and presented in Fig.7.
O
u
t
p
u
t

V
o
l
t
a
g
e

(
V
)

I
n
d
u
c
t
o
r

C
u
r
r
e
n
t

(
A
)

O
u
t
p
u
t

V
o
l
t
a
g
e

(
V
)

I
n
d
u
c
t
o
r

C
u
r
r
e
n
t

(
A
)

B
u
c
k

S
w
i
t
c
h

Load rise Load fall Load rise Load fall
Load rise Load fall Load rise Load fall
218

(a)

(b)

(c)

(d)
Fig 7: the over-voltage and under-voltage and recovery time in each case as a function of upper band
and lower band of the hysteresis method for two load drops a) over-voltage b) over-voltage recovery
time c) under-voltage d) under-voltage recovery

The general trend in Fig. 7 is to decrease overshoot/undershoot and the recovery time
when the dynamic hysteresis strategy is applied with higher band changes. The origin
of horizontal axis is the Upper (I
ref
+0.2A) or Lower (0.2A) hysteresis band in steady
state operation.
In practice, the results for high hysteresis bands may differ from the simulation
because of the nonlinearity and saturation of the inductor. However, from these
results, the limit of upper band increase is the maximum current of the inductor. The
temporary increase of inductor current when there is an under-voltage does not
increase the switching loss of the Boost switch, because by increasing the upper band
the switching frequency decreases. When an over-voltage occurs, the lower band can
decrease to zero and significantly reduce the over-voltage.
60 100
30 100
60 100
30 100
100 30
100 60
100 30
100 60
219
A laboratory prototype of Boost and PBB converters has been developed to validate
the proposed control system and its performance in the presence of load change. The
control system has been developed using NEC V850E/IG3 microcontroller. The
experimental result of the proposed control strategy has been presented.

Experimental results
All of the disturbances are output load change from 100 to 60 and reverse. The
output voltage is controlled to be 20V and the input voltage is 10V. The output
capacitor is 470F and the inductor is 1mH. In Figures 9-13, output voltage is
marked with V
out
and inductor current is marked with i
L
. In Figures 11, 12, and 13,
the Buck switch and its performance are highlighted.
Fig 9 shows the dynamic of a Boost converter when the hysteresis band height is
constant. Fig.10 shows the performance of a Boost converter with the proposed
control strategy. The upper band has been increased to (2.I
ref
) in case of undershoot
and decreased to (I
ref
/2) in case of overshoot. In Fig.9, the load has risen from 0.2A
to 0.33A at 0.35s after the time origin. Load has dropped back to 0.2A at the time
1.4s. The voltage drop after load change is 5V and overshoot when the load is
decreased again is 3V. Fig. 10 illustrates the performance of the presented scheme to
quicken the recovery after load disturbance. The load change is the same as in Fig. 9.
The voltage drop is 3V and overshoot is reduced to 1.5V. In addition, the recovery
time has reduced by application of dynamic hysteresis band (200ms to 100ms). Fig.
11 illustrates the performance of PBB converter in the presence of output voltage
fluctuation caused by load change. Hysteresis bands are constant in Fig. 11. The PBB
converter has avoided overshoot by the switching of S
Buck
connected to input voltage.
The same operating condition (load drop and rise) has been considered for test and
measurement, and the experimental result shows that the voltage drop in the Boost
converter is 5V, as shown in Fig. 11.







220


Fig. 12 is illustrates the performance of a PBB converter with dynamic hysteresis
band height. The voltage drop has reduced to 3V while the load rise is same as Fig.
11. Fig. 13 shows the switching of S
Buck
to avoid overvoltage when the output load
has been decreased.

Fig 8: The overshoot and undershoot of a boost
converter after load change
Fig 9: Reduction of output voltage transient by
changing the hysteresis bands After occurrence of
disturbance in Boost converter load


Fig 10: The overshoot and undershoot of a PBB
converter after load change.
Fig 11: Reduction of output voltage transient by
changing the hysteresis bands After occurrence of
disturbance in PBB converter load

Fig 12: Reduction of overshoot by utilization of Buck
Switch in PBB converter
iL
Vout
Vout
iL
Buck Switch
221

Conclusion
A control strategy with dynamic hysteresis band height has been presented in this
paper for a Boost and PBB converter to reduce transient time and improve the
dynamic of output voltage. An extra switch in a PBB converter has been utilised to
avoid overshoot. Simulations have been carried out for different cases and the results
have been compared with experimental results to validate the proposed method.

Reference
[1] Boora, A.A.; Zare, F.; Ledwich, G.; Ghosh, A.; A general approach to control a Positive
Buck-Boost converter to achieve robustness against input voltage fluctuations and load
changes Power Electronics Specialists Conference, 2008. PESC 2008. IEEE 15-19 June
2008 Page(s):2011 - 2017
[2] Chakraborty, Arindam; Khaligh, Alireza; Emadi, Ali Combination of Buck and Boost
Modes to Minimize Transients in the Output of a Positive Buck-Boost Converter; IEEE
Industrial Electronics, IECON 2006 - 32nd Annual Conferene on Nov. 2006 Page(s):2372
2377
[3] Sahu, B.; Rincon-Mora, G.A.; A low voltage, dynamic, noninverting, synchronous buck-
boost converter for portable applications Power Electronics, IEEE Transactions on Volume
19, Issue 2, March 2004 Page(s):443 - 452
[4] Weissbach, R.S.; Torres, K.M.; A noninverting buck-boost converter with reduced
components using a microcontroller SoutheastCon 2001. Proceedings IEEE 30 March-1
April 2001 Page(s):79 - 84 Digital Object Identifier 0.1109/SECON.2001.923091
[5] Bosheng Sun; Zhiqiang Gao; A DSP-based active disturbance rejection control design for a
1-kW H-bridge DC-DC power converter Industrial Electronics, IEEE Transactions on
Volume 52, Issue 5, Oct. 2005 Page(s):1271 1277
[6] Lee, Y.-J.; Khaligh, A.; Emadi, A. A Compensation Technique for Smooth Transitions in a
Noninverting BuckBoost Converter IEEE Transactions on Power Electronics, Volume
24, Issue 4, April 2009 Page(s):1002 - 1015 Digital Object Identifier
10.1109/TPEL.2008.2010044
[7] Qiang Zhou; Yong Huang; Fan Zeng; Quan-Shi Chen; Dynamic Analysis of DC-DC Boost
Converter Based on Its Nonlinear Characteristics, IECON 2006 - 32nd Annual Conference
on IEEE Industrial Electronics 6-10 Nov. 2006 Page(s):1769 - 1774 Digital Object Identifier
10.1109/IECON.2006.347823
[8] Reatti, A.; Pellegrini, L.; Kazimierczuk, M.K. Impact of boost converter parameters on
open-loop dynamic performance for DCM; IEEE International symposium on Circuits and
Systems, 2002. ISCAS 2002. Volume 5, 26-29 May 2002 Page(s):V-513 - V-516 vol.5
Digital Object Identifier0.1109/ISCAS.2002.1010753
[9] Sreekumar, C.; Agarwal, V. A Hybrid Control Algorithm for Voltage Regulation in DC
DC Boost Converter; IEEE Transactions on Industrial Electronics, Volume 55, Issue 6,
June 2008 Page(s):2530 - 2538 Digital Object Identifier 10.1109/TIE.2008.918640
[10] Bryant, B.; Kazimierczuk, M.K. Voltage loop of boost PWM DC-DC converters with peak
current-mode control : Regular Papers, IEEE Transactions on Circuits and Systems I
Volume 53, Issue 1, Jan. 2006 Page(s):99 - 105 Digital Object Identifier
10.1109/TCSI.2005.854611
223
Chapter 9

This chapter presents the last paper published during my research. This paper
presents a contribution to switching of isolated gate switches in the form of
Active Gate Signaling.
This paper has been published in EMC symposium of Australia Adelaide 2009.































224
Efficient Voltage/Current Spike Reduction by Active Gate
Signaling
Arash A. Boora, Firuz Zare, IEEE Senior Member, Arindam Ghosh, IEEE Fellow
School of Engineering Systems
Queensland University of Technology
Brisbane, Australia


Abstract- This paper presents an Active Gate Signaling scheme to reduce
voltage/current spikes across insulated gate power switches in hard switching
power electronic circuits. Voltage and/or current spikes may cause EMI noise.
In addition, they increase voltage/current stress on the switch. Traditionally, a
higher gate resistance is chosen to reduce voltage/current spikes. Since the
switching loss will increase remarkably, an active gate voltage control scheme is
developed to improve efficiency of hard switching circuits while the undesirable
voltage and/or current spikes are minimized.

I. INTRODUCTION
The insulated gate transistors (MOSFET, IGBT) are switching devices commonly
utilized in power electronics circuits. The EMI noises caused by hard switching are
produced by parasitic elements like stray inductances, which naturally exist in series
with main elements of the circuit and/or parasitic capacitances existing in parallel
with magnetic elements and inherent capacitances of insulated gate switches. These
parasitic elements produce voltage and current spikes when di/dt or dv/dt expose to
them. In this paper, a boost converter is chosen as a case study with the above-
mentioned parasitic elements (Fig.1).
Although this paper is focused on operation of a Boost converter, the switching
behavior explained here and mentioned in references may be extended to all
inductive switching circuits [19](Fig. 2).




225
L
V
G
R C
V
out
V
in
L
w
R
G
IRF50
(a) Stray inductance
(b) Stray capacitance
Figure 1: stray elements in a Boost converter

Figure 2: Simplified clamp inductive switching model


Increasing the gate resistance, (R
G
in Fig. 1) is the conventional approach to reduce
voltage/current spikes by changing charging and discharging time of the capacitors
C
GS
and C
GD
shown in Fig.3.
Figure 3: high frequency model of an insulated gate transistor
226
It is a trade off between efficiency and EMI noise in a power electronic system. To
reduce EMI noise, dv/dt and di/dt should be reduced. Reducing these parameters
means longer switching transient and higher switching loss. The conflicting problems
of switching loss and switching noise may be addressed in switch design [1] or
power converter layout design [14, 15, and 16]. Another approach is to realize active
EMI filters [17, 18].
On the other hand, Active Gate Signaling (AGS) method has been introduced as a
remedy to reduce the conflicting problems of switching noise and switching loss. The
AGS idea is based on natural switching behavior of insulated gate transistors. Since,
this paper presents an AGS application, the switching behavior is explained here.
Figure 4: switching pattern of insulated gate transistors


Switching behavior of insulated gate transistor is determined by charging and
discharging of internal capacitors. These capacitors are shown in a high frequency
model of an insulated gate transistor (Fig.3) [2, 3]. A simplified switching behavior
of the switch is given in Fig.4.
In a turn-off process, the drain-source voltage increases to V
out,
the drain current
reduces to zero, and then the turn-off process is completed. In a turn-on process, the
drain current increases to inductor current (I
L
) and then the drain-source voltage
drops to V
on
. The switching behavior of power MOSFETs are quite similar to the
waveforms shown in Fig.4. IGBT has same switching stages but its turn-on process
finishes with a voltage tail and its turn-off process finishes with a current tail. Fig. 5
illustrates the switching of an IGBT with current and voltage waveforms [3]. In [4, 5]
switching behavior of IGBTs for EMI studies with hard switching power electronics
have been modeled.
227
The sequential process of increasing (decreasing) current through the switch and
decreasing (increasing) voltage across the switch has inspired the idea of active di/dt
and dv/dt control.
Figure 5: Voltage/Current tails in IGBTs


AGS methods are based on the fact that dv/dt and di/dt transients happen
sequentially. The idea is to apply a controlled voltage or current source to slow down
dv/dt or di/dt selectively as shown in Fig.6. The result is reduction of either dv/dt or
di/dt, which improves the efficiency of a system compared with traditional solution
of increased gate resistance.

(a) Controlled current source

(b) Controlled voltage source
Figure 6: structures of active gate signaling

Fig. 6 illustrates two main topologies of Active Gate Signaling and the equivalent
Thevenin circuit of the gate circuit. A controlled current source to actively control
charging and discharging of C
GS
and C
DS
have been utilized in [6, 7]. On the other
hand, a controlled voltage source to perform AGS has proposed in [8, 12, and 13].
To find correct adjustments for AGS parameters, a partially linear model of the
switch is required to calculate time intervals (t
di
off
, t
di
on
, t
dv
on
, t
dv
off
in Fig. 3, 4) [4,
19]. Since, the main difference between switching behavior of IGBT and MOSFET
228
is voltage/current tail at the end of turn-on/turn-off switching; the IGBT model
presented in [4] may be modified to be used for MOSFETs as well.
Although AGS may be defined as selective reduction of dv/dt or di/dt, the aim of
AGS is different in literature.
In paper [8] AGS has been used to reduce dv/dt in turn-on and di/dt in turn-off time
which can minimize EMI noise more efficiently than the traditional method
(increasing gate resistance). In [9] AGS has been utilized to eliminate dead time in
complement switches used in inverters. In [10] AGS has been used to monitor
switching of insulated gate transistors for protection purposes. The innovative
approach in [11] is to change dv/dt according to load current. Therefore, EMI may be
reduced by slow switching transient when load current is low and switching loss is
negligible. On the other hand, a switching transient is getting faster when the load
current is increased which reduces the switching loss.
To develop controlled voltage sources as is illustrated in Fig. 5b, [8, 9] suggest
adjustable logic circuits. A derivation circuit is applied to sense switching transients
and change the level of gate drive voltage appropriately. On the other hand, the gate
drive is based on a digital unit which can assign different voltage levels to gate signal
and control the switching transient [12, 13].
In this paper, a new AGS based on gate voltage control has been proposed to control
turn-off di/dt and turn-on dv/dt to reduce voltage spikes in turn-off and current spikes
in turn-on, respectively.
II. AGS TO REDUCE VOLTAGE/CURRENT SPIKES
To explain the nature of voltage/current spikes, current and voltage waveforms are
shown in Fig.7. According to the circuit diagram shown in Fig.1, there is a stray
capacitor in parallel with the inductor and a stray inductor in series with some
components. Assuming a long interconnection between the diode and load, a stray
inductor is considered to model this interconnection as illustrated in Fig.1a.
When the boost switch turns off, the drain voltage (v
DS
) rises to V
out
. Then the drain
current (i
D
) starts to reduce. Therefore, the diode current, which is the current
through the stray inductor, starts to increase. v
Lw
(Eq. 1) is added to the switch
voltage as illustrated in Fig.7a.
dt
di
L v
w
w
L
w L
=
(1)
229
On the other hand, when the switch turns on, the switch current increases firstly.
Then the switch voltage starts to decrease and dv/dt is exposed to C
L
shown in Fig.1.
i
CL
(Eq.2) is added to switch current as illustrated in Fig. 7b.
dt
dv
C i
L
L
C
L C
=
(2)
As is highlighted in Fig.6, the peak of the switching loss is increased as a
consequence of current/voltage spikes.
In this paper, gate voltage has been actively controlled to reduce di/dt and voltage
spikes during turn-off time and dv/dt and current spikes during turn-on time,
respectively.
Conventionally, the gate driver generates the gate signal. The output voltage of the
gate driver for IGBTs, is usually 15V to turn the switch on and -15V to turn the
switch off.
To reduce di/dt at turn-off time and dv/dt at turn-on time with gate voltage control,
the gate signal has been considered and changed as illustrated in Fig. 8a and Fig. 8b.
There are three parameters (T
0
on
, T
1
on
, V
G
on
) which change the turn-on transient and
three parameters (T
0
off
, T
1
off
, V
G
off
) which change turn-off transient. These
parameters should be adjusted or controlled to improve the performance of switching
with AGS. All of these parameters are considered and adjusted to control turn-off
di/dt and turn-on dv/dt.
As is illustrated in Fig. 8 the gate voltage level has been changed after a deliberately
chosen time interval (T
0
on
in turn-on transition, and T
0
off
in turn-off transition) to
decrease the switching speed just when the current or voltage spike happens.
In Fig. 8a the jump of driver voltage (V
G
off
) at time interval T
1
off
has reduced di/dt
and voltage spike. In Fig. 8b the drop of driver voltage (V
G
on
) at time interval T
1
on

has reduced dv/dt and current spike.
T
0
off
is equal to the time interval, which takes v
DS
to reach from V
on
to V
out
(T
0
off
is
equal to t
dv
off
in Fig. 7a and 8a). T
1
off
is equal to the time interval i
D
takes to reach
from the inductor current to zero when AGS is applied (T
1
off
is equal to t
di
off
in Fig.
8a and more than t
di
off
in Fig. 7a).
T
0
on
is equal to the time interval, which takes v
DS
to reach from V
out
to V
on
(T
0
on
is
equal to t
di
on
in Fig. 7b and 8b). T
1
on
is equal to the time interval i
D
takes to reach
from zero to the Inductor current when AGS is applied (T
1
on
is equal to t
dv
on
in Fig.
8b and more than t
dv
on
in Fig. 7b).
230
These parameters depend on V
out
, negative gate voltage (V
G
) and gate resistance.
However, the C
GS
and C
DG
capacitances are inherent characteristics of insulated gate
transistors, which determine the switching behavior. AGS utilizes the voltage level of
the gate driver to change switching time. When AGS is applied, the V
G
on
and V
G
off
are parameters that determine the turn-on dv/dt and turn-off di/dt, respectively.
Increasing V
G
off
decreases turn-off di/dt and increasing V
G
on
decreases turn-on
dv/dt.
Simulation results are more realistic since they are based on more accurate and
detailed dynamic models of switches. In this work, a PSpice switch model has been
used to simulate switching transients.




(a) Voltage spike
Figure 7: spikes caused by switching

(b) current spike
Figure 7: spikes caused by switching



(a) Voltage spike reduction
Figure 8: spike reduction by AGS

(b) Current spike reduction
Figure 8: spike reduction by AGS
231
(a) Drain Voltage
(b) Drain current
(c) Gate voltage
(d) Driver voltage
(e) Switching loss
Figure 9: comparative simulation results for current spike reduction
232
III. SIMULATION RESULTS
A. Current spike reduction
Fig. 9 illustrates the performance of the proposed AGS method to reduce current
spikes in turn-on interval. To have a clear comparison, two other cases are included
in all slides shown in Fig. 9: the Original case is the case with high speed
switching which has caused current spikes. Increased resistance is referring to the
traditional method of increasing gate resistance to slow down the whole switching
process and to reduce switching noise for the cost of higher switching loss. Active
Gate is referring to the presented AGS method. The current spike reduction AGS is
applied to a Boost converter with a 50nF parasitic capacitor in parallel with the main
inductor in the Boost converter (Fig. 1b). The input voltage is 10V and the output
voltage is 20V. The inductor current is 50A and the gate resistance is 20. These
parameters are important from the spike reduction point of view. C
L
is the coefficient
in Eq. 2 which determines the level of current spike. Output voltage is equal to V
(Fig. 3) and gate resistance determines t
dv
on
=T
1
on
and the delay time before voltage
drop starts. This delay time equals to T
0
on
in Fig. 7b.
Examining the Original case, dv/dt of turn-on interval (Fig.9a) causes parasitic
current through the parasitic capacitor this current cause a spike when it is added to
switch current Fig 9b. The actual gate voltage is presented in Fig. 9c and the gate
voltage from the driver terminal is shown in Fig. 8d.
The Fig. 9e shows the switching losses of three cases. The switching loss of the
Original case has the highest peak (as is expected in Fig. 6b) but its average is less
than other cases. The performance of the conventional solution is titled Increased
resistance. As is expected, the higher gate resistance (90) has caused more delay.
The reason can be examined in Fig. 9c as the reduced charging rate of C
DG
.
Therefore, v
DG
needs more time to reach threshold voltage and start increasing i
D
.
In Active Gate, the gate signal (Fig. 9d) has been shaped to have same current
spike with minimum reduction of switching speed. By reduction of driver voltage at
the time interval of current spike the dv/dt has reduced. Examining Fig. 9a the slope
of v
DS
is same as the Original case at the start of v
DS
drop but it decreases when the
current spike starts. The slope of drain voltage is same as increased resistance case
when the current spike exists.
233
(a) Drain Voltage
(b) Drain current
(c) Gate voltage
(d) Driver voltage
(e) Switching loss
Figure 10: comparative simulation results for voltage spike reduction
234
Finally, Fig. 9e compares the switching loss (P
sw
) of three cases. The switching loss
of Increased resistance is much more than the switching loss of the Original
case. However, the switching loss of Active Gate case is comparable with the
switching loss of the Original case.
The efficiency of this method depends on the ratio of time intervals of V and I


shown in Fig.3 as t
dv
on
and t
di
on

respectively. Since the AGS increases t
dv
on
, this
method is more effective if t
di
on
is more than t
dv
on
. In this case, the switching speed
will not be changed significantly while the switching loss will be close to the one
associated with the Original case (Fig. 9e).

B. Voltage spike reduction
Fig. 10 illustrates the performance of the AGS technique in voltage spike reduction
in turn-off intervals.
Similar to the current spike reduction case, three cases are compared. The case study
is a Boost converter with input voltage of 100V, output voltage of 200V, and
inductor current of 50A. The parasitic element is L
w
=100nH

as illustrated in Fig. 1a.
The gate resistance for the Original case and the Active Gate is 20. These
parameters are important from the spike reduction point of view. L
w
is the coefficient
in Eq. 1 which determines the level of voltage spike. Inductor current is equal to I
(Fig. 3) and the gate resistance determines t
di
off
=T
1
off
and the delay time starts before
current drop start. This delay time equals to T
0
off
in Fig. 7a.
Examining the Original case, di/dt of turn-off interval (Fig. 10b) causes parasitic
voltage across the parasitic inductor this voltage causes a spike when it is added to
switch voltage Fig 10a. As is observed in Fig. 10a, the voltage spike has a oscillating
nature the reason is resonance between parasitic inductance L
w
and inherent
capacitors of the switch C
GS
and C
DG
.
The actual gate voltage is presented in Fig. 10c and the gate voltage from the driver
terminal is shown in Fig. 10d. The Fig. 10e shows the switching losses of three cases.
The switching loss of the Original case has the highest peak (as is expected in Fig.
6a) but its average is less than other cases.
The performance of conventional solution is titled Increased resistance. As is
expected, the higher gate resistance (300) has caused more delay before reduction
of i
D
starts. The reason can be examined in Fig. 10c as the reduced discharging rate
of C
DG
. Therefore, the switch needs more time to start decreasing i
D
.
235
In Active Gate, the gate signal (Fig. 10d) has been shaped to have same voltage
spike with minimum reduction of switching speed. Increasing the gate drive voltage
at the instant the drain current (i
D
) drops, reduces di/dt. Examining Fig. 10b, the
slope of i
D
is same as the one associated with the Increased resistance. Finally,
Fig. 10e compares the switching loss (P
sw
) of three cases. The switching loss of
Increased resistance is much more than the switching loss of the Original case.
However, the switching loss of Active Gate case is comparable with the switching
loss of the Original case.
The efficiency of this method depends on the ratio of time intervals of V and I

shown in Fig.3 as t
dv
off
and t
di
off

respectively. Since the AGS increases t
di
off
, this
method is more effective if t
dv
off
is more than t
di
off
. Thus, the switching speed is not
changed significantly and the switching loss will be close to the one associated the
Original case (Fig. 10e).

IV. CONCLUSION
An Active Gate Signaling (AGS) method is introduced to reduce current/voltage
spikes efficiently. The nature of insulated gate transistors, which is the base of the
AGS idea, is explained. In addition parameters and elements which affect and
generate current and voltage spikes are presented. The AGS method proposed in this
work is explained for a Boost converter. Simulations have been carried out to
compare switching losses associated traditional method (with fast and slow switching
transient) and the proposed AGS.

ACKNOWLEDGEMENT
The authors thank the Australian Research Council (ARC) for the financial support
for this project through the ARC Linkage Grant LP0774899.


REFERENCES
[1] Tsukuda, M.; Omura, I.; Sakiyama, Y.; Yamaguchi, M.; Matsushita, K.; Ogura, T.; Critical
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188
[2] Vrej Barkhordarian, International rectifier, El Segundo, Ca. Power MOSFET Basics;
[3] IGBT Basics II; K. J. UM, FAIRCHILD Application note.
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[14] Gonzalez, D.; Gago,J.;Balcells,J. New simplified method for the simulation of conducted
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237
Chapter 10
This chapter presents a journal paper provisionally accepted by IET power
Electronics Journal. This paper, present application of SLC and DHB fast
response control strategies to Multi-Output Positive Buck-Boost (MOPBB)
converter.































238
Multi-Output Buck-Boost Converter with Enhanced Dynamic
Response to Load and Input Voltage Changes

Arash A. Boora, Firuz Zare, Senior member IEEE, Arindam Ghosh, Fellow IEEE
Queensland University of Technology
2 George St. GPO. Box 2434, Brisbane, QLD 4001, Australia

Abstract
This paper presents a new multi-output DC/DC converter topology that has
step-up and step-down conversion capabilities. In this topology, several output
voltages can be generated which can be used in different applications such as
multilevel converters with diode-clamped topology or power supplies with
several voltage levels. Steady state and dynamic equations of the proposed
multi-output converter have been developed, that can be used for steady state
and transient analysis. Two control techniques have been proposed for this
topology based on constant and dynamic hysteresis band height control to
address different applications. Simulations have been performed for different
operating modes and load conditions to verify the proposed topology and its
control technique. Additionally, a laboratory prototype is designed and
implemented to verify the simulation results.

1. Introduction
Multi-output DC/DC converters have a range of applications [1-4]. Some of these
converters employ transformers to supply separate loads, which increases the size,
weight and cost of the total system. The other category of multi-output DC/DC
converters is single-inductor multi-output DC-DC converters. Outputs may be
connected in parallel or series.
Multi-output converters with outputs connected in series, are promising as the
supplier of multi-level inverters to reduce the dependency of DC-link voltage
balancing and power factor of the load. Voltage balancing of diode-clamped multi-
level inverter DC-links is limited by the power factor of their load [5]. Diode-
clamped inverters supplying loads with high power factors cannot balance their
upper DC-link capacitors. Therefore, they fail to apply all possible voltage levels and
their modulation index falls to around 0.5 for nearly resistive loads. Reference [6]
has suggested a voltage balancing circuit for symmetrical DC-links. However, it
239
cannot step-up or step-down input voltage and cannot regulate DC-link voltages
asymmetrically.
Besides, there is a possibility to improve the quality of a multi-level inverter by
charging the DC-link capacitors asymmetrically [7,8]. Multi-output DC/DC
converters can facilitate the utilization of quality advantage of asymmetrically
supplied DC-links.
As another application, Multi-voltage DC-networks [9] have challenges, which can
be resolved by MOBB converters. For instance, instability in the auxiliary power of
E-cars [10] or electric trains [11], when there is a widely variable primal voltage
source (the main battery of the electric vehicle or catenary voltage in presence of
several travelling trains) cause interruptions to the operation of auxiliary loads.
Alternatively, when there are sensitive loads sharing the voltage terminal with step-
changing heavy loads, the sensitive load may malfunction due to terminal voltage
fluctuation. A multi-output converter with outputs connected in series, may generate
different voltage levels, and prioritize them to secure the voltage across the sensitive
load when there is a disturbance.
Additionally, DC-networks may supply disturbing loads such as uncertain loads [12],
constant-power loads [13], nonlinear loads [14] step loads [15], or switching loads
[16]. In this paper, a step-changing load is considered as the load disturbance [17,18].
This paper presents a novel single-inductor multi-output DC/DC converter topology
named Multi-Output Buck-Boost (MOBB) converter, which is capable of step-up
and step-down conversions Fig. 1. In this topology, several series-connected output
voltages can be generated, which may be useful in a variety of applications such as
diode-clamped multi-level inverters and multi-voltage DC-networks supplying loads
with different requirements.
Fig. 1(a) shows the proposed new multi-output topology, which can perform both
step-up and step-down conversions. MOBB is versatile due to its capabilities to
improve dynamic response when there are input voltage and load disturbances.
Furthermore, for applications, where there is a pre-knowledge or predictability of
load or input voltage disturbance, it has the capacity to remove the effect of these
disturbances from the output voltages. Additionally, the proposed topology may
prioritize the output voltages to achieve better dynamic performance where sensitive
loads are supplied along with frequently and highly varying loads. These capabilities
are explained and mathematically proven in this paper. The proposed converter is
240
simulated and experimented for two outputs (across the capacitors C
1
and C
2
of Fig.
1(b)) in this paper. The suggested control strategy is developed to realize above
mentioned advantages.


(a) (b)

Z
V
3
V
2
V
1
Vin

(c)

(d)
Fig. 1: a) MOBB converter b) double-output-Buck-Boost converter
c) supplying a multi-level single-phase diode-clamped inverter with a three-output-Buck-Boost
d) Supplying a multi-voltage DC-network with a three-output-Buck-Boost

Fig. 1(c) shows a three-output Buck-Boost converter supplying a four-level single-
phase inverter. The DC-link voltages are named differently (V
1
,V
2
, and V
3
) to
highlight the possibility of asymmetrical DC-link voltages. The main input voltage is
variable (example: PV units for domestic application in different shading condition)
and therefore, both step-up and step-down conversions are essential.
241
Fig. 1(d) illustrates a multi-voltage DC-network supplied by a three-output Buck-
Boost converter. The sensitive load has a devoted terminal to avoid the
disturbances caused by the step changing load. Additionally, another voltage level
is generated to supply the load with different voltage. The main input voltage is
variable (for example, main battery of electric car, catenary voltage), and hence, both
step-up and step-down conversions are required.
The MOBB converter has the capacity of inductor pre-charging. Non-inverting
Buck-Boost converter [19-21] and Tri-state Boost converter introduced in [22,23]
have the same capacity. Therefore, when a load rise or input voltage drop is known a
priori (for example, new load demand through the main controller of the E-
car/Hybrid car, or when the main supply of a hybrid car changes from PV/fuel-cell to
battery), or anticipated, [24,25] (for example, when two electric trains are
approaching a particular power station, catenary voltage drops), inductor pre-
charging may be utilized to remove disturbance from all output voltages.
The rest of the paper is organized as follows. Section 2 describes the topology of
proposed converter with two outputs. The dynamic and steady state equations of the
proposed converter are derived in Section 3. The equations are presented to
mathematically explain the capabilities of the presented topology. Section 4 presents
the applied control strategy of a double-output Buck-Boost converter and includes
the simulation results. Section 5 presents the experimental results obtained on a
laboratory prototype. The paper concludes in Section 6.

2. Topology
The topology of double-output Buck-Boost converter is presented in Fig. 2(a), where
the function of each switch in steady state mode is identified. According to the steady
state behaviour of switches of Fig. 2(a), the equivalent circuits of the proposed
topology for steady state step-down (double-output-Buck) and steady state step-up
(double-output-Boost) conversions are presented in Fig. 2(b) and 2(c) respectively.
Possible switching states of a double-output-Buck and double-output-Boost
equivalent circuits are illustrated in Fig. 2(d) and 2(e).
242
S
Boost
S
1
D
2
V
2
V
1
S
Buck
V
in
R
2
R
1
C
1
C
2
L
Continusly turned on in step up
(Idling switch)
Switching in step down
Switching in step up
Continusly turned off in step down
(Idling switch)
Operating to perform voltage sharing

(a)

(b)

(c)

(d)

(e)
Fig. 2: a) double-output Buck-Boost converter
b) double-output-Buck equivalent circuit in step-down c) double-output-Boost equivalent circuit in step-up
d) switching configurations of double-output-Buck e) switching configurations of double-output-Boost

243
To explain the operation of MOBB converters, the switches are classified as Buck
Switch (S
Buck
), Boost Switch (S
Boost
), and Current Sharing Switches (S
j
;
j=1,2,,n). To minimize switching loss in steady state step-up conversion, S
Buck
is
always on and in steady state step-down conversion, S
Boost
is always off.

A. Steady state step-down conversion mode
When V
in
is more than V
1ref
(the reference of V
1
),

the MOBB converter operates in
step-down mode. During this mode, S
Boost
is turned off, S
Buck
is switched to chop
input voltage and S
1
operates to share inductor current between output capacitors and
to regulate the output voltages. The switching configurations applied in steady state
step-down mode are 000,001,100,101, as indicated in Fig. 2(d) in the enclosed box.

B. Steady state step-up conversion mode
When Vin is less than V1ref, the MOBB converter operates in step-up mode. During
this mode, SBuck is continuously turned on, SBoost operates to step-up input voltage
and S1 operates to share inductor current between output capacitors and regulates
output voltages. The switching configurations applied in steady state step-up mode
are 100,101,110 as shown in Fig. 2(e) in the enclosed box.
In Fig 2(d) and 2(e), states 001 and 101 are conducting current to C1 to increase V1.
States 000 and 100, conduct the inductor current to both C1 and C2 and increase both
V1 and V2. Additionally, state 110 connects the inductor to input voltage and lets the
inductor current increase linearly. These states and their effect on output voltages and
the inductor current are summarized in Table 1.

Table 1: charging state of C
1
, C
2
, L for each switching configuration of double-output Buck-
Boost
S
Buck
S
Boost
S
1
C
1
C
2
L
0 0 0 Charging Charging Discharging
0 0 1 Charging Discharging Discharging
0 1 0 Discharging Discharging No Change
1 0 1 Charging Charging Discharging
1 0 0 Charging Discharging Discharging
1 1 0 Discharging Discharging Charging

As can be observed in Fig. 2(d), 2(e) the state (010) is not included in any of step-up
and step-down steady state equivalent circuits (in boxes). However, this switching
state is utilised to enhance the dynamic response to load or input voltage
244
disturbances. Moreover when input voltage changes suddenly, the (010) state can be
utilized to smooth the transient from step-down to step-up conversion and vice versa.
Furthermore, for applications with pre-known or predictable load rise or input
voltage drop, the switching state (010) is used to pre-charge the inductor and remove
the disturbance from DC-link voltages. This concept has been introduced in [26,27]
and is explained in the control strategy section.

3. Steady state and dynamic equations
In this section, the steady state and dynamic equations are developed for double-
output Buck-Boost converter. The equations for an n-output MOBB converter are
presented in Appendix.
Let us assume that for any variable of x(t), x is a small perturbation around a DC
value of X. We denote the following duty cycles: the duty cycle of S
Buck
as d
Buck
(t),
the duty cycle of S
Boost
as d
Boost
(t), the duty cycles of current sharing switch S
1
as
d
S1
(t), and the duty cycle

of diode D
2
as d
D2
(t) (the switches are shown in Fig. 1(b)).
v
in
(t)

is the input voltage, and C
1
,C
2
, and L are shown in Fig. 1(b).
Constrains on duty cycles are:.
( )
( )
( )
( )
( ) ( ) ( ) 1
1 0
1 0
1 0
1 0
2 1
1
2
= + +




t d t d t d
t d
t d
t d
t d
D S Boost
Buck
Boost
S
D

(1)
Dynamic equations of a double-output Buck-Boost converter are:
( )
( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) t v t v t d t v t d t v t d
dt
t di
L
D S in Buck
L
2 1 2 1 1
+ + =

(2)

( )
( ) ( ) ( ) ( ) ( )
1 1 2 1
1
1
R t v t d t d t i
dt
t dv
C
D S L
+ =

(3)

( )
( ) ( ) ( )
2 2 2
2
2
R t v t d t i
dt
t dv
C
D L
=

(4)

The State space form for double-output Buck-Boost converter in (5) is extracted after
linearization of dynamic equations (2-4).
245
(
(
(
(

(
(
(

+
+
(
(
(

(
(
(

+

=
(
(
(

(
(
(

2
1
2 1 1
2
1
2 2
1 2 1
2 2 1
2
1
2
1
0 0 0
0 0
1 0
0 1
0
0 0
0 0
0 0
D
S
Buck
in
L
L L
in Buck L
D
D S
D D S L
d

v
I
I I
V V V V D
v
v
i

R D
R D D
D D D
v
v
i

C
C
L


(5)

Transfer functions of a double-output Buck-Boost converter are:
( )
( )
( )
1 1
2 2
2
2
1 1
2
2 1 1 2
+
+
+
+
+
=
s C R
D R
s C R
D D R
Ls
D
s v
s i
D D S
Buck
in
L

(6)
( )
( )
( )
1
1 1
2 1 1 1
+
+
=
s C R
D D R
s i
s v
D S
L


(7)

( )
( ) 1
2 2
2 2 2
+
=
s C R
D R
s i
s v
D
L


(8)
The steady state equations are derived by substituting s = 0 in the transfer functions
of equations (6-8);
( )
in
D
D S
Buck
L
V
D R D D R
D
I
2
2
2
2
2 1 1
+ +
=

(9)

( )
( )
in
D
D S
D S Buck
V
D R D D R
D D R D
V
2
2
2
2
2 1 1
2 1 1
1
+ +
+
=

(10)

( )
( )
in
D
D S
D Buck
V
D R D D R
D R D
V
2
2
2
2
2 1 1
2 2
2
+ +
=

(11)

As has been mentioned in circuit analysis and is depicted in Fig. 3, S
Buck
and S
Boost
do
not switch simultaneously when the MOBB converter is operating in the steady state.
The graphical view of Equations (9-11) for variation in the values of R
1
, R
2
, D
S1
, D
D2
,
D
Buck
is presented in Fig. 3. The input voltage V
in
is assumed to be constantly equal to
200V. However, form Equations (9-11) V
in
has a linear relationship with I
L
, V
1
, and
V
2
.



246
Inductor current I
L
output voltage V
1
output voltage V
2

Changing

R
1
(10,20,30)
D
S1
(0.2-0.7)
D
Buck
(1-0.2)


Changing

R
2
(10,20,30)
D
S1
(0.2-0.7)
D
Buck
(1-0.2)



Changing

R
1
(10,20,30)
D
D2
(0.2-0.7)
D
Buck
(1-0.2)



Changing

R
2
(10,20,30)
D
D2
(0.2-0.7)
D
Buck
(1-0.2)


Fig. 3: variation of I
L
, V
1
, and V
2
as functions of parameters D
Buck
, D
S1
, D
D2
, R
1
, R
2


Examining equations (9-11), the capacities of MOBB converter, which may be
utilized to improve its dynamic response, can be observed. When the input voltage
rises, D
Buck
may be reduced immediately to compensate for this rise. Additionally,
when R
1
and/or R
2
are increased and the load is reduced, D
S1
and/or D
D2
may be
247
reduced immediately to compensate for the reduction of the load and avoid over-
voltage effectively.
Furthermore, the inductor pre-charging capacity of MOBB converters may be
utilized to avoid output voltage drops caused by input voltage drop or load rise. In
(9-11), decreasing duty cycles D
Buck
, D
S1
, and D
D2
by multiplying them in the factor
of k (k<1), the inductor is over-charged by the factor of 1/k while V
1
and V
2
are kept
unchanged, as given in (12-14).

( ) ( )
( ) ( )
L L in
D
D S
Buck
in
D
D S
Buck
k _ L
I I
k
V
D R D D R k
kD
V
kD R kD kD R
kD
I > =
+ +
=
+ +
=
1
2
2
2
2
2 1 1
2 2
2
2
2
2 1 1

(12)

( )
( ) ( )
( )
( ) ( )
1
2
2
2
2
2 1 1
2
2 1 1
2
2
2
2
2
2 1 1
2 1 1
1
V V
D R D D R k
D D R D k
V
kD R kD kD R
kD kD R kD
V
in
D
D S
D S Buck
in
D
D S
D S Buck
k _
=
+ +
+
=
+ +
+
=

(13)

( )
( ) ( )
( )
( ) ( )
2
2
2
2
2
2 1 1
2
2 2
2
2
2
2
2
2 1 1
2 2
2
V V
D R D D R k
D R D k
V
kD R kD kD R
kD R kD
V
in
D
D S
D Buck
in
D
D S
D Buck
k _
=
+ +
=
+ +
=

(14)


Therefore, the MOBB converters may store some extra current in the inductor while
their output voltages are constant.
If there is a rise in load current or a drop in input voltage, the extra current stored in
the inductor may be supplied to the load to remove or attenuate output voltage
fluctuations. Therefore, this extra current improves the dynamic response of MOBB
converters to disturbances caused by load or input voltage sudden changes. However,
the extra current causes extra switching loss [19]. Therefore, the time of operating
with over-charged inductor and the level of extra current must be minimized to
reduce overall switching and conduction loss. The strategy applied in this paper for
pre-known disturbances, is to pre-charge the inductor a few ten microseconds before
the disturbance happens. Therefore, extra loss is limited to occasions of load rises or
input voltage drops. For sudden unexpected disturbances, a Dynamic Hysteresis
Band (DHB) strategy is adopted to improve the dynamic response.



248
4. Control strategy and simulation results
The control strategy is developed to utilize the 010 switching state and current
storage capability of the topology to enhance the dynamic response of the converter
when load or input voltage disturbances are applied. For the cases of input voltage
rise or load current drop, which may cause output over-voltage, there is an over-
voltage reduction unit which senses over-voltages and activates idling switch (S
Buck

in step-up conversion and S
Boost
in step-down conversion) to divert the inductor
current from the load and to remove over-voltage. For the cases of input voltage drop
or load current rise, two immediate response control techniques for different
applications are suggested. They utilize extra current storage capacity to remove or
attenuate output voltage drops.
The control strategy is based on hysteresis method. The block diagram of the control
system is presented in Fig. 4(a), where the function of each block is explained along
with the description of each signal conducted to or generated by that block. The
flowchart of the program applied in experiments is illustrated in Fig. 4(b). The
flowchart is divided into partitions, which perform functions mentioned in Block
diagram in Fig. 4(a). Switching of all switches, output voltages, and inductor current
are shown in Fig. 4(c) and Fig. 4(d) for step-down and step-up conversions
respectively. The switching states resulted by switching are also mentioned.

4.1. Current reference unit:
The Current reference unit determines the level of inductor current. This block
examines output voltages (lines 1a,2a in Fig. 4(a)), compares them with reference
voltages (line 3a) and decides to increase or decrease the level of inductor reference
current (line 4) according to output voltage errors. The function of this unit is
detailed in the control flowchart. To limit the speed of current reference change, the
parameter N is used. Each time the flowchart runs the parameter N increments.
Before modifying the current reference, the parameter N is checked. If it is over 100,
the current reference will be changed; otherwise the current reference change block
in the flowchart will be skipped. This way, the rate of current reference change is
limited to avoid unstable reference change. The maximum value of N depends on the
speed of the controller. To have constant rate of current reference change, the
maximum value of N should be increased for faster controllers.
249
Fig. 4: a) Block diagram of control system b) Control flowchart
Inductor current and output voltages c) step-down d) step-up

4.2. Current hysteresis unit:
This block senses the inductor current (line 5 in Fig. 4(a)) and generates a logical
signal (line 6). The signal is 1 if the inductor current is less than the lower
hysteresis band and it is 0 if the inductor current is more than the hysteresis upper
band. Signal rotating unit directs these signals to operating switches to perform
hysteresis current control.

4.3. Signal rotating unit:
The first partition of the flowchart shows that Signal rotating unit compares V
in
(line 8 in Fig. 4(a)) with V
1ref
(line 3b) and selects the operation mode as step-down

(a)

(b)

(c)

(d)

250
(SD) if V
in
>V
1ref
. Otherwise, the operation mode is step-up (SU). In some condition
and decision blocks of the flowchart, the examined condition or executed assignment
varies according to the operation mode. Additionally, this block senses V
in
(line 8)
and decides to send the signal of Current hysteresis unit (line 6) to either S
Buck
(by
line 9) (step-down) or S
Boost
(by line 10a) (step-up). Furthermore, this block decides
to send the signal of Over-voltage reduction unit (line 11) to the idling switch
(S
Buck
in step-up and S
Boost
in step-down).

4.4. Current Sharing unit:
The inductor current is shared between outputs by Current sharing unit. This block
prioritizes output voltages. V
2
is prioritized; the Current sharing unit examines V
2

at first (line 2b), if V
2
is less than V
2ref,
Current sharing unit turns off S
1
(line 12)

and charges V
1
and V
2
. When V
2
has reached V
2ref
, Current sharing unit turns S
1
on
and only V
1
continues to charge. Therefore, (I
1
=V
1
/R
1
) can be more than (I
2
=V
2
/R
2
).
In Fig. 4(a), the Current sharing unit monitors the condition of S
Boost
(line 10b),
because it cannot turn on S
1
when S
Boost
is turned on.

4.5. Over-voltage and under-voltage reduction
The Over-voltage reduction unit utilizes the idling switch (S
Boost
in step-down and
S
Buck
in step-up) to handle disturbances including load drop and input voltage rise
(sensed from line 1c), which cause over-voltage. In such disturbances, there is too
much current flowing in the inductor. Therefore, if over-voltage happens, the
reference current would be decreased gradually by the signal sent to current
reference block (line 13). In Fig. 4(b) this reduction of I
ref
has happened by constant
of e.
In step-up operation, Over-voltage Reduction block turns off the S
Buck
to let the
S
Boost
turn on without increasing the inductor current. In step-down S
Boost
turns on to
avoid over-voltage and S
Buck
operates to control inductor current. Fig. 4(c), 4(d)
shows the operation of the idling switch to control over-voltage for step-down and
step-up conversions.
Two under-voltage reduction strategies are developed for loads with different
natures. For load or input voltage changes that happen suddenly without any warning
or predictability, DHB is developed. However, there is a possibility to enhance
251
dynamic response to load or input voltage changes, which are pre-known or
predictable. For these cases, a Smart Load Controller (SLC) is suggested (line 12).

4.5.1. Dynamic Hysteresis Band (DHB)
To reduce under-voltages when the load or input voltage change is not pre-known or
predictable, the controller senses voltage drop and increases the upper hysteresis
band (by line 7) to maximum current that the inductor can conduct. Therefore, the
average level of inductor current will be increased immediately and under-voltage
will be limited. Since the Over-voltage reduction unit is operating, the temporary
extra current of the inductor does not lead to over-voltage or instability of the
converter. Besides, this extra current does not cause extra switching loss even
temporarily because the switching frequency is reduced because of higher upper
hysteresis band. The logical presentation of this unit is shown in Fig. 4(b).
Simulation results illustrating the functionality of Over-voltage reduction unit and
DHB strategy for step-down and step-up conversions are presented in Fig. 5. Fig.
5(a) and 5(b) illustrate the performance of Over-voltage reduction unit and DHB
strategy in step-down and step-up conversions respectively. The input voltage is
400V and 100V in step-down and step-up respectively. Output voltages are V
1
=200V
and V
2
=150V. The output capacitors are 1mF and the inductor is 2mH.
In both cases of step-down and step-up, the load currents (I
1
,I
2
) have increased at
0.05sec and 0.25sec. At 0.05sec, R
2
=20 is changed to R
2
=10 and at 0.25sec,
R
1
=10

is changed to R
1
=6.7. The load currents decrease at 0.15sec and 0.35sec
when R
2
and R
1
are changed to their initial values. The last traces of Fig 5(a) and 5(b)
show the switching of all switches. S
Buck
in step-up and S
Boost
in step-down have been
switched in transients caused by load current drop to handle the extra current of the
inductor and avoid over-voltages. Alternatively, when there has been an under-
voltage, upper hysteresis band has increased to reduce voltage drop.
Fig. 5(c) illustrates the performance of the system when input voltage changes
suddenly. The input voltage has changed enough to force the transition from step-up
conversion to step-down conversion (at 0.05sec) and reverse (at 0.15sec). Over-
voltage reduction unit has performed to control over-voltage when input voltage
raises form 100V to 400V and DHB strategy has been applied to reduce under-
voltage when input voltage has dropped to 100V from 400V.
252

(a)

(b)

(c)
Fig. 5: Response of double-output-Buck-Boost converter with DHB to a) load change in step-
down b) load change in step-up c) input voltage change and transition from step-up to step-
down conversion and reverse.

4.5.2. Smart Load Controller (SLC)
Under-voltages caused by load rises or input voltage drops, which are pre-known or
predictable may be avoided. To perform under-voltage removal, the inductor should
be pre-charged sufficiently and prior to occurrence of the disturbance.
To utilize this capacity, a SLC has been presented in Fig. 6(a). The SLC receives the
request for load change (example: in an E-car, when any new equipment is ordered to
turn on.) or the warning of input voltage sudden drop (example: in electric railway)
(Signal 1 in Fig. 6(a), 6(b)). The SLC orders the controller to increase inductor
253
current (Signal 2). The controller increases the inductor current (by constant of c in
Fig. 4(b)) and acknowledges the SLC (Signal 3). The SLC adds the new load (Signal
4). The controller reduces the reference of the inductor current to decrease the time-
share of 010 state to zero. At this point, the MOBB converter is working as multi-
output-Buck or multi-output-Boost and the loss is minimized.

Fig. 6(c) and Fig. 6(d) illustrate under-voltage reduction by the SLC block in cases
of load current sudden rise at 0.05sec (R
2
: 2010) and 0.25sec (R
1
: 106.7)
for step-down and step-up respectively. The SLC has been informed of upcoming
load current rise and has signalled (included in the first part of Fig. 6(c), 6(d)) the
controller to pre-charge the inductor. The inductor current has reached the sufficient
level to avoid undershoots caused by sudden load rises.
Current changes in Fig. 6(c), 6(d), marked by dashed circles, are handled by Over-
voltage reduction unit and current rises marked by solid circles are handled by the
SLC unit.

Fig. 6(e) illustrates the performance of the system when input voltage changes
suddenly. The input voltage has changed enough to force the transition from step-up
conversion to step-down conversion (at 0.05sec) and reverse (at 0.15sec). Over-
voltage reduction unit has performed to control over-voltage when input voltage
raises form 100V to 400V and SLC unit has been informed of upcoming input
voltage drop to pre-charge inductor and avoid under-voltage.





254

(a)

(b)

(c)

(d)

(e)
Fig. 6: a) Block diagram of SLC b) signalling of SLC, Response of double-output-BB converter
with SLC c) to load change in step-down d) to load change in step-up e) To input voltage change
and transition from step-up to step-down conversion and reverse.
255
5. Experimental results
A laboratory prototype is designed to implement the proposed double-output
topology and validate presented control strategies. The controller has been developed
utilising the 32-bit 64MHz microcontroller NEC-V850/IG3. The inductor is 7mH
and the capacitors C
1
=C
2
=3.2mF.
Fig. 7 illustrates the steady state switching of the double-output Buck-Boost
converter in the step-down (Fig. 7(a)) and step-up (Fig. 7(b)) conversions. In the
step-down conversion, S
Boost
is turned off and S
Buck
operates to control the inductor
current. In the step-up conversion, S
Buck
continuously conducts and S
Boost
switches to
control inductor current. S
Share
operates to regulate V
2
in step-up and step-down
conversions. Fig 7(a) shows the switching of S
Buck
and S
Share
and their functioning to
control their related variables. Fig. 7(b) shows the switching of S
Boost
and S
Share
.


Fig.7: experimental results: a) switching of S
Buck
to control inductor current and the switching of
S
Share
in step-down conversion. Ripple of V
2
is shown as well b) switching of S
Boost
to control
inductor current and the switching of S
Share
. Ripple of V
1
is also shown.

Both of two suggested strategies (DHB and SLC) are applied to step-up and step-
down operations. The loads in the cases of step-down and step-up conversions are
different.
Load change experiments results are shown in Fig 8(a-f). Fig. 8(a) and 8(c) illustrate
the step-down conversion and Fig. 8(b), and 8(d) show the step-up conversion. In
Fig. 8(a) and 8(b), the DHB has been applied and there has been no prior knowledge
of load rise. In Fig. 8(c) and 8(d), the SLC has been utilized with the prior knowledge
of load rise.


(a)

(b)
256
Fig.8: experimental results
Response of double-output-Buck-Boost converter with DHB and over-voltage reduction a) step-down b) step-up
Response of double-output-Buck-Boost converter with SLC and over-voltage reduction c) step-down d) step-up
Response of e) double-output-Buck f) double-output-Boost to same load disturbances
Transition between step-up and step-down conversions with over-voltage reduction and g) DHB h) SLC

(a)

(b)

(c)

(d)

(e)

(f)

(g)

(h)
257
Fig 8(e) and 8(f) show the performances of the double-output Buck-Boost converter
when the idling switch is not utilized and DHB or SLC strategies can not apply. In
other words, these figures show the performance of double-output-Buck (Fig. 2 (b))
for step-down conversion and double-output-Boost (Fig. 2(c)) for step-up
conversion. These load change experiments have been directed so the results may be
compared with the performance of double-output Buck-Boost topology and its
control strategies illustrated in Fig. 8(a-d). Additionally, to highlight the
improvement achieved by the DHB applied in Fig. 8(a), 8(b), this strategy has not
been applied in Fig. 8(e) and 8(f). The change of load current I
2
has been shown in
these figures to illustrate the stability of V
2
guaranteed by Current sharing unit.
In applications, which there are no prior knowledge of load change, the under-
voltage may not be removed by SLC unit. Therefore, DHB strategy has been
realized. However, over-voltage reduction is always functional. Input voltages, load
changes, output voltages, and their fluctuations in Fig. 8(a-f) are summarized in
Table 2.
Table 2: overshoots and undershoots caused by load changes in Fig. 8
Step-down
V
in
=30V
Output
voltages
R
1
(105)
R
1
(510)
R
2
(105)
R
2
(510)
Fig. 8a V
1
=13.5V
V
2
=7V
-3V
0V
+1V
0V
0V
0V
0V
0V
Fig. 8c V
1
=13.5V
V
2
=7V
0V
0V
+1V
0V
0V
0V
0V
0V
Fig. 8e

V
1
=13.5V
V
2
=7V
-5V
0V
+8V
0V
0V
0V
0V
0V
Step-up
V
in
=15V
Output
voltages
R
1
(5025)
R
1
(2550)
R
2
(5025)
R
2
(2550)
Fig. 8b V
1
=20V
V
2
=10V
-2V
0V
+ 1V
0V
0V
0V
0V
0V
Fig. 8d

V
1
=20V
V
2
=10V
0V
0V
+1V
0V
0V
0V
0V
0V
Fig. 8f V
1
=20V
V
2
=10V
-4V
0V
+6V
0V
-1V
0V
+1V
0V

To compare the transient of the double-output Buck-Boost converter from step-up to
step-down conversion and reverse, two experiment results are presented in Fig 8(g,h)
for R
1
=25 and R
2
=50. The output voltages are controlled to be V
1
=17V and
V
2
=8.5V. Input voltage is 30V at the start and the converter performs step-down
conversion. Input voltage drops to 15V to necessitate step-up conversion (at about
1.5sec). Input voltage rises to 30V to switch back to step-down conversion (at about
4.5sec). Fig. 8(g) shows the dynamics of mentioned transition when there is no prior
knowledge of input voltage drop, which necessitates the application of DHB. The
258
voltage V
1
drops to about 3V, while V
2
has not been disturbed. Fig. 8(h) shows the
transition when there is prior knowledge of the input voltage drop. The inductor
current has been increased before input voltage drop happens and the under-voltage
of V
1
has limited to 1V while V
2
has not been disturbed because the controller
prioritizes it. In both cases of Fig. 8(g) and 8(h), the over-voltage reduction has
performed satisfactorily to keep over-voltage caused by input voltage rises within
1V.

6. Conclusion
A new single-inductor multi-output DC/DC converter with capability of step-up and
step-down conversions is presented. The circuit has been analysed and multi-level
inverters and multi-voltage DC-networks are suggested as suitable applications.
Comparing with the strategy of using separate DC/DC converters to produce required
voltages, the number of needed inductors increases to the number of outputs with
several DC/DC converters. However, the presented topology requires only one
inductor.
The steady state and dynamic equations are developed and the functionality of the
purposed topology is explained based on these equations. Since the elements are
considered ideal, there is no limit for step-up and step-down conversion ratios.
However, in practice, the nonlinearities like inductor resistance limit step-up
conversion ratios. The control strategy of double-output Buck-Boost converter is
presented. Some simulation results are included to show properties of introduced
topology with presented control strategy. To validate the new topology and related
control strategy a laboratory prototype is developed and experiments are carried out.
Some experimental results are presented to illustrate the performance of presented
topology for different applications. Experiments confirm the advantage of load
prioritization. Furthermore, experiments show that the utilization of idling switch and
inductor pre-charging capacities of MOBB converters may improve the dynamic
response remarkably.
The proposed converter is suggested to supply a symmetrical/asymmetrical multi-
level diode-clamped inverter to perform DC-link voltage balancing in presence of
resistive loads. Furthermore, for the applications of electric/hybrid cars where there
is pre-knowledge or predictability of load change or input voltage disturbance, there
is even more capacity to avoid output voltage drop/rise by inductor pre-charging and
259
utilization of the idling switch. For the application of electric train, in addition to pre-
known load changes, there is a predictable tendency of catenary voltage rise/drop
caused by travelling trains and the operation (accelerating, decelerating, or running
steadily). Therefore, the suggested topology and its control strategy can enhance the
performance of the electric system of the train. Additionally, for both applications of
electric/hybrid cars and electric trains, there is a variety of loads with different
ratings and sensitivities. The MOBB converter with its multiple prioritized outputs
may preserve the quality of power provided to sensitive loads while other loads apply
disturbances to the system.
When no priori information is available about load or input voltage disturbance, this
paper has suggested the fast response control strategy of DHB to enhance dynamic
response of the converter to disturbances in input voltage and load.
Nevertheless, both control strategies (DHB and SLC) are developed with
consideration of switching and conduction loss. They limit the utilization of idling
switch and extra inductor current to transient of load or input voltage disturbance to
minimize loss and preserve the efficiency of the circuit along with its dynamic
quality.

Appendix

Dynamic and steady state equations of an n-output MOBB (Fig. 1(a)):
Constrain of the duty cycles for MOBB:
1 0 1 0
1
= +

=
Bu
n
j
Boost j
d & dj d d

(15)


The dynamic equations:

( )
( ) ( )
|
|

\
|
=

= =
n
k
n
k j
j k in Bu
L
d t v t v d
dt
t di
L
1

(16)


( )
( ) ( )
( )
k
k
n
k j
j L Rk
n
k j
j L
k
k
R
t v
d t i i d t i
dt
t dv
C
|
|

\
|
=
|
|

\
|
=

= =

(17)


The state space equation:
260
|
|
|
|
|
|
|
|
|

\
|
|
|
|
|
|
|
|
|
|

\
|

+
|
|
|
|
|
|
|
|

\
|
|
|
|
|
|
|
|
|
|
|
|

\
|

=
|
|
|
|
|
|
|
|

\
|
|
|
|
|
|
|
|
|

\
|

= = =
=
=
= =

n
j
in
Bu
L
L
L L
L L
L L L
n
j
j
k
j
j
j
j Bu in
n
k
L
n n
k
n
k j
j
n
j
j
n
n
k j
j
n
j
j
n
k
L
n
k
d

...
d

...
d

v
d

I
I ... ... ...
I ... I
I ... I ... ... ...
I ... I ... I
V ... V ... V D V
v
...
v
...
v
i

R D
... ...
R D
... ...
R D
D ... D ... D
v
...
v
...
v
i

C
... ...
C
... ...
C
... ... L
1
1 1
1
1
1
1
1
1
1 1
0 0 0 0 0 0
0 0 0
0 0 0 0
0
0 0
1 0 0 0 0
0 0 0 0
0 0 1 0 0
0 0 0 0
0 0 0 0 1
0
0 0 0 0 0
0 0 0 0
0 0 0 0 0
0 0 0 0
0 0 0 0 0
0 0 0

(18)

The transfer functions:
1 +
=

=
s C R
d R
) s ( i
) s ( v
k k
n
k j
j k
L
k

(19)

=
=
|
|
|
|
|

\
|
+
|
|

\
|
+
=
n
k k k
n
k j
j k
Bu
in
L
s C R
d R
Ls
d
) s ( v
) s ( i
1
2
1

(20)

Steady state equations:



in
n
k
n
k j
j k
n
k j
j k Bu
k
V
D R
D R D
V

= =
=
|
|

\
|
|
|

\
|
=
1
2

(21)

in
n
k
n
k j
j k
Bu
L
V
D R
D
I

= =
|
|

\
|
|
|

\
|
=
1
2


(22)

ACKNOLAGEMENT
The authors thank the Australian Research Council (ARC) for the financial support
for this project through the ARC Linkage Grant LP0774899.



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[13] A. Khaligh, A.M. Rahimi, A. Emadi, Modified Pulse-Adjustment Technique to Control
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[15] S. Samanta, P. Patra, S. Mukhopadhyay, A. Patra, Optimal slope compensation for step load
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Control a Positive Buck-Boost Converter to Achieve Robustness against Input Voltage
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263
Chapter 11
This chapter presents the manuscript of a journal paper submitted to IEEE
transactions on power electronics. This paper investigates the application of
Three-Output Voltage Sharing Boost converter for utilization of residential PV
pannels.
























264

Voltage Sharing Converter to Supply Single-Phase Asymmetrical
Four-Level Diode-Clamped Inverter with High Power Factor Loads
Arash A. Boora, Alireza Nami, Firuz Zare, Arindam Ghosh, Frede Blaabjerg
Abstract The output voltage quality of some of the single-phase multi-level
inverters can be improved when their DC-link voltages are regulated
asymmetrically. Symmetrical and asymmetrical multi-level diode-clamped
inverters have the problem of DC-link capacitor voltage balancing, especially
when power factor of the load is close to unity. In this paper, a new single-
inductor multi-output DC/DC converter is proposed that can control the DC-
link voltages of a single-phase diode-clamped inverter asymmetrically to achieve
voltage quality enhancement. The circuit of the presented converter is explained
and the main equations are developed. A control strategy is proposed and
explained in details. To validate the versatility of the proposed combination of
the suggested DC-DC converter and the asymmetrical four-level diode-clamp
inverter, simulations and experiments have been directed. It is concluded that
the proposed combination of introduced multi-output DC-DC converter and
single-phase asymmetrical four-level diode-clamped inverter is a good candidate
for power conversion in residential PV utilization.

I. Introduction
Multilevel power conversion has found wide acceptance in various applications for
its capability of high voltage and high efficiency operation. The advantages of the
multilevel inverter compared with the traditional two-level voltage source inverter
are; high power quality waveforms with lower distortion and low blocking voltage
by switching devices. Three well-known multilevel topologies are shown in Fig.1.
An extensive comparison between multilevel topologies have been performed in [1]
in terms of their applications, circuit modelling, modulation techniques and other
technical issues. Typically, different types of multilevel converters are utilised by the
same rating for the capacitors and power devices due to the modularity and
simplicity of control strategy.
However, an increase in the number of levels results in an increase in circuit
complexity, which reduces the reliability and efficiency of such a converter.

265
Recently, asymmetrical multilevel inverters, which use unequal capacitor voltage
levels, are addressed to solve this problem [2-6, 8-11].

(a)
(b)


(c)
Fig. 1: a) diode-clamped multi-level inverter b) flying capacitor multi-level inverter c) Hybrid multi
level inverter

Based on different switching states, it is possible to achieve more voltage levels at
the output voltage by adding and subtracting DC-link voltages compared with
conventional multilevel inverters. This will also reduce the Total Harmonic
Distortion (THD), and consequently, the filter size. Hybrid converters have been
considered advantageous for the asymmetrical configuration of multilevel inverters,
as they have shown to be more effective. A diode-clamped converter is the common
converter type widely used in renewable energy and power systems due to its DC-
link structure [7]. An n-level diode-clamped multi-level inverter with n-leg voltage
levels and (2n-1) output voltage levels consists of (n-1) capacitors on the DC link,
2(n-1) switching devices and 2(n-2) clamping diodes per phase. Therefore, an
increase in the number of levels in this type of converter will result in substantial
increase in the number of switching components, as well as the complexity of its
structure. In order to address this issue, the general idea of asymmetrical multilevel
inverters in the diode-clamped topology to increase the number of output voltage
levels with a minimum number of power components has been proposed in [8,11].
Increasing the number of levels while adjacent switching vectors are available for
modulation between levels with only one switch change is an important issue to
minimize switching losses.
For the different switching states of the diode-clamped inverters, different
controlled/non-controlled current loops may be provided through DC-link capacitors,
switching components and load. Due to the existence of DC currents in the midpoints
of the DC-links, capacitors are either charged during some intervals or discharged
266
during some other intervals. These charging and discharging operations put a limit on
the practical implementation of high-level diode-clamped converters, especially
when the power factor of the load is close to unity. The current loops may charge or
discharge the DC-link capacitor voltages depending on the direction of the load
current. According to [12-14], large input capacitors are necessary to keep the ripple
of the DC-link voltages at tolerable levels. In addition, there is a substantial
dependency between modulation index, power factor, and possibility of DC-link
capacitor voltage balancing [15, 16]. The modulation index is restricted by the load
current angle. The modulation index should be below explicit limits to let DC-link
voltage balancing strategy be performed properly. Fig. 2 shows how the maximum
modulation index varies with the power factor. It can be seen that this index reduces
as the power factor of the load increases.

Fig. 2: Modulation index of single-phase diode-clamped inverter versus R-L load power factor

In this paper, a single inductor multi-output DC/DC converter is suggested explicitly
to regulate DC-links of an asymmetrical four-level diode-clamped inverter to
improve its output voltage quality. The proposed application is residential PV
utilization, which needs to supply high power factor loads and it does not need to
reverse the power flow.
The next section of this paper explains an asymmetrical DC-link configuration and
compares it with a symmetrical DC-link configuration. In section III, the new multi-
output DC-DC converter introduced in this paper is presented and its circuit topology
is analysed. In the section IV, the combination of proposed converter and single-
phase four-level diode-clamped inverter is mathematically modelled and main
equations are presented. Section V explains the control system applied to realize the
capabilities of the proposed converter supplying an asymmetrical four-level diode-
267
clamped inverter. Simulation and experimental results are presented in sections VI
and VII respectively.

II. Asymmetrical DC-Link Configuration Analysis
A proper arrangement of the unequal DC-link voltages in order to increase voltage
quality as well as maintain the switching vectors adjacency is addressed in [8] for a
four-level diode-clamped inverter. Fig.3. shows the schematic diagram of a 4-level
diode-clamped multi-level inverter which contains two legs, each with six switches.
Both symmetrical and asymmetrical DC-link voltage configurations are shown in
Fig. 3. In the asymmetrical configuration, the bottom capacitor voltage is maintained
twice of the other capacitor voltages in the DC-link as shown in Fig. 3(b).
According to the structure of the diode-clamped multi-level inverter shown in Fig. 3,
there are four possible switching states in each leg that can be derived from four
switch combinations to obtain different DC link voltage levels. The "on" and "off"
switching states of each switch are defined as 1 and 0, respectively. Sixteen
switching states in two legs of the single-phase diode-clamped multi-level inverter
H-bridge configuration are listed in Table I. In addition, output voltage levels
associated with different switching states of a Symmetrical four-level Diode-
Clamped Inverter (SDCI) and an Asymmetrical four-level Diode-Clamped Inverter
(ADCI) are given in Table I.

Table I: Switching states and voltage levels of
Symmetrical Diode Clamped Inverter (SDCI) and Asymmetrical Diode Clamped Inverter
(ADCI)
Switching
states
S
1
S
2
S
3
S
4
S
5
S
6

SDCI
(v
out
)
ADCI
(v
out
)
00 0 0 0 0 0 0 0 0
01 0 0 0 0 0 1 -V
sym
-2V
02 0 0 0 0 1 1 -2V
sym
-3V
03 0 0 0 1 1 1 -3V
sym
-4V
10 0 0 1 0 0 0 V
sym
2V
11 0 0 1 0 0 1 0 0
12 0 0 1 0 1 1 -V
sym
-V
13 0 0 1 1 1 1 -2V
sym
-2V
20 0 1 1 0 0 0 2V
sym
3V
21 0 1 1 0 0 1 V
sym
V
22 0 1 1 0 1 1 0 0
23 0 1 1 1 1 1 -V
sym
-V
30 1 1 1 0 0 0 3V
sym
4V
31 1 1 1 0 0 1 2V
sym
2V
32 1 1 1 0 1 1 V
sym
V
33 1 1 1 1 1 1 0 0
268
V V
sym
3
4
=

(a) (b)
Fig. 3: Single-phase four-level diode clamped inverter configuration and adjacent vectors
a) Symmetrical b) Asymmetrical DC-link voltages


As shown in Fig. 3, only two non-adjacent switching vectors exist in the graph of the
asymmetrical configuration. However, they occur only four times in one cycle [8],
and hence the energy loss is negligible. Even though there is no non-adjacency
condition in the symmetrical configuration, the number of levels remains at 4, while
it increases to 5 for the asymmetrical configuration.
The hardware results when a constant DC source supplies each capacitor is shown in
Fig. 4. The proposed asymmetrical DC-link configuration may generate up to 9
levels in the load voltage (v
Load
(t)) without any extra components. Moreover, the
voltage THD is lower with the asymmetrical configuration. Hence, a five-level
diode-clamped inverter can be synthesised with the same number of component as
269
the four-level inverter, which leads to a reduction of the circuits as well as control
complexity and size of the output filter.

(a) (b)
Fig. 4: Load voltage (v
Load
(t)) and load current (i
Load
(t)) wave forms of a) symmetrical and b)
asymmetrical four-level diode-clamped inverters and their voltage THD

Asymmetrical diode-clamped configuration has the intrinsic capacitor voltage-
balancing problem, just like any high-level diode-clamped converter. To deal with
this problem, separate DC sources or DC-DC converters may produce the
asymmetrical DC-link voltages. However, there are applications with low or variable
input voltage for example residential application of PV in which the level of main
input voltage depends on the level of sunlight intensity. In such applications, usually
a DC-DC converter is used to step-up the PV output voltage. Auxiliary hardware for
DC-link voltage balancing are proposed in [17, 18].
In topologies suggested [17, 18] there is no step-up conversion and the total DC-link
voltages is equal to input voltage. For that reason, they are not ideal designs for the
situation with highly variable input voltage (PV source multi-level inverters). In
addition the number of inductors used in those topologies increase by the number of
DC-links.
Investigating other multi-output DC-DC converter topologies in literature, usually
have considered separate loads to be supplied by multi-output converters [19-22].
Therefore, their outputs are not connected in series as in [8, 23] and they are not
designed to supply multi-level inverters. Topologies introduced in [8,23] supply
series-connected capacitors but they supply more power to lower capacitors (C
1

should supply more power than C
2
and C
2
should supply more power than C
3
does).
However, single-phase asymmetrical four-level diode-clamped inverter utilizes the
voltage across C
2
for all of its voltage levels. Therefore, the current driven from C
2
is
270
more than the currents driven from C
1
and C
3
. The Boost-3OVS converter presented
in this paper is designed to supply C
2
more than C
1
and C
3
.

III. The new topology and its circuit analysis
A. Boost 3-Output Voltage Sharing (Boost-3OVS) converter
The proposed topology, shown in Fig. 5, can perform step-up conversion and
regulate DC-link voltages asymmetrically and independent of the input voltage
variation. This can boost the input voltage to achieve DC-link voltages higher than
that can be obtained by the topologies of [17, 18] for same level of input voltage.
Additionally, it has been designed to supply more current to C
2
than C
1
,

which makes
it a good candidate

to share DC-link voltages for an asymmetrical diode-clamped
four-level inverter as it will be clarified in the circuit analysis and modelling.
Moreover, the proposed converter may utilize higher modulation index since the
level of DC-link voltages may be adjusted according to the magnitude of the voltage
reference of the inverter (V
M
).

Fig. 5: Boost Three-Output Voltage Sharing (Boost-3OVS) topologie connected to four-level inverters

Since the Boost-3OVS converter can control the level of its output voltages, there is
the possibility of working with a high modulation index despite varying input voltage
and high power factor of the load. High modulation index has the advantage of a
lower THD. Varying the input voltage (for example PV applications in different
shading conditions) may force conventional multi-level inverters to widely change
their modulation index and affect output quality and THD [24].

B. Switching states
271
Switching states of the converter are illustrated in Fig. 6. Examining the eight
switching states for the Boost-3OVS converter, it may be observed that the
capacitors C
1
and C
2
may be charged individually in the switching states 4 and 1
respectively. In addition, switching state 2 allows the controller to exclude C
1
from
charging when C
2
and C
3
are charging. Moreover, in the switching state 5, C
3
is
excluded from charging when C
1
and C
2
are charging. Switching state 7 lets the
converter charge the inductor and step up the input voltage as in a conventional boost
converter. State 0 may be used to handle over-charged inductor [25, 26] to improve
robustness and stability of the converter while the load current of the inverter is
varying as a sine wave. In state 6, all of output capacitors charge simultaneously.
This flexibility of DC-link charging, lets the Boost-3OVS converter supply an
asymmetrical four-level diode clamped inverter, thereby it solve the problem of DC-
link capacitor voltage balancing even when the inverter load is highly resistive.
[2] [6]
[0] [4]
[1] [5]
[3]
[7]
I
N
V
E
R
T
E
R
I
N
V
E
R
T
E
R
I
N
V
E
R
T
E
R
I
N
V
E
R
T
E
R
I
N
V
E
R
T
E
R
I
N
V
E
R
T
E
R
I
N
V
E
R
T
E
R
I
N
V
E
R
T
E
R
+
_
+
_
+
_
+
_
+
_
+
_
+
_
iL iL
iL iL
iL iL
iL iL
+
_
VL(t)
VL(t)
VL(t)
VL(t) VL(t)
VL(t)
VL(t)
VL(t)
C3
C2
C1
C3
C2
C1
C3
C2
C1
C3
C2
C1
C3
C2
C1
C3
C2
C1
C3
C2
C1
C3
C2
C1
Vin
Vin
Vin
Vin

Fig. 6: Switching states of Boost Three-output Voltage Sharing (Boost-3OVS) converter
272
Table II shows the switching states in relation to the condition of each switch.
Additionally, charging or discharging of capacitors and the inductor in each state are
shown. The name of each switching state is noted in Table II which corresponds with
Fig. 6 and Fig. 7.
Table II: Switching state of each switch at each switching configuration
and charging condition of capacitors an inductor.







Fig. 7 illustrates the switching states in relation to the output currents and the input
current in steady state. The narrow-dashed line is the inductor current when the
ripple is neglected. The output currents and the input current are illustrated in bold
line.
Comparing output currents and input current with switching of the input and output
switches, it may be observed that, the input switches (S
1
, D
2
) and output switches (S
3
,
S
4
, D
5
, S
6
) are complementary. In other words, only one of input switches and one
output switch may turn on at any given instant. The currents i
2
(t) and i
3
(t) are totally
controlled by output switch S
4
and diode D
5
. the current i
in
(t) is solely controlled by
input switch S
1
. the currents i
0
(t) and i
1
(t) are controlled by both input and output
switches. To realize the proposed converter, the required forward blocking voltage is
listed in Table III.
S
1
D
2
S
3
S
4
D
5
S
6
Switching
states
C
1
C
2
C
3
L
0 1 1 0 0 0 0
0 1 0 1 0 0 1
0 1 0 0 1 0 2
0 1 0 0 0 1 3
1 0 1 0 0 0 4
1 0 0 1 0 0 5 /
1 0 0 0 1 0 6
1 0 0 0 0 1 7
1 conducting Discharge
0 blocking Charge
Steady
273

Fig. 7: Switching of Boost Three-Output Voltage Sharing (Boost-3OVS) converter and the resulting
output currents and input current

Table III: Blocking voltages across diodes and switches of the converter
S
1
D
2
S
3
S
4
D
4
D
5
S
6

V
in
-V
1
V
in
-V
1
V
2
+V
3
V
3
V
1
+V
2
V
1
+V
2
+V
3
V
1
+V
2
+V
3

V
in
-2V V
in
-2V 2V V 3V 4V 4V

IV. Modelling the steady state operation
As it has been explained before, the DC-link voltages of the asymmetrical inverter
considered in this paper are V
1
=2V, V
2
=V, and V
3
=V where V is the voltage level.
This pattern of voltages is not definite and may be altered to achieve higher quality
or lower reverse voltage blockage on switches. For the proposed DC-link voltages of
V
1
=2V, V
2
=V, V
3
=V, the output voltage levels of the inverter would be 0, V, 2V,
3V, and 4V. In addition, with the mentioned DC-link voltages, the inverter may
switch between the adjacent voltage vectors. When the voltage level changes, only
one switch of the inverter turns on/off, thereby minimizing the switching losses.
Double-sided arrows in Fig. 8 show the adjacent output voltage vectors.

A. Inverter model
274
Before formulating the equations, it is required to model asymmetrical four-level
diode-clamped inverter as a load for the proposed Boost-3OVS converters. Fig. 8
shows the instantaneous load of the converter when the inverter operates between
adjacent output voltage levels. Let us assume that the fundamental component of the
load voltage (v
load
(t)) of the inverter is
( ) t sin V ) t ( v
M
=

(1)


where, V
M
and are the magnitude and frequency of the fundamental component of
the load voltage of the inverter. The fundamental component of the inverter load
current (i
Load
(t)) is given by

( ) = t sin I ) t ( i
M

(2)


where, I
M
and are its magnitude and the phase angle. With respect to the operation
of the asymmetrical four-level diode-clamped inverter shown in Fig. 8b, the double-
sided arrows denote the switching between DC-link voltage levels (4V, 3V, 2V, V, 0).
When the voltage v(t) is between two adjacent levels (e.g. 2V and 3V), the inverter
switches between two adjacent configurations as indicated by double-sided arrow in
Fig. 8b. In this way, the minimum switching loss will be guaranteed.
As may be observed from Fig. 8b, when the inverter switches between its voltage
levels, the output currents (i
3
(t), i
2
(t), i
1
(t), and i
0
(t)) of the Boost-3OVS converters
switch between i(t), 0, and i(t). Negative voltage levels will be achieved with same
connections as positive levels. The only difference is that the inverter flips the load
polarity for negative voltage levels.

275

(b)
Figure 8: a) output voltage levels compared to v(t) b) connection of the inverter load to the Boost-
3OVS converter for each voltage level.



From Fig. 8a, when the voltage is 3V<V
M
<4V; we will get the following relations

(a)


276
( )
( )
( )
( )
( )
( )
( )
( )

< < < <

< < < <
< < < <
< < < <
< < < <
< < < <
< < < <
< < < <
V t v t
V t v V t
V t v V t
V t v V t
V t v V t
V t v V t
V t v V t
V t v t
0
2
3 2
4 3
4 3
3 2
2
0 0
1
1 2
2 3
3 2
2 3
3 2
2 1
1

(3)
where,
1
,
2
, and
3
illustrate the exact phases on which v(t) crosses the output
voltage levels (V, 2V, and 3V), i.e.,
( )
( )
( )

=
=
=
M
M
M
V V sin Arc
V V sin Arc
V V sin Arc
3
2
3
2
1

(4)
These equations are directly extracted from Fig. 8a. The average of each output
current over one switching cycle ( ( ) t i
k
) is given in Table IV and is calculated from (5)
where T
sw
is the switching period of the inverter.
( ) ( ) 3 2 1 0
1
, , , k i
T
t i
sw
T t
t
k
sw
k
= =

+


(5)

Table IV: The average of each output current over one switching cycle
( ) t i
0

( ) t i
1

( ) t i
2

( ) t i
3

v(t)
|i(t)| 0 (4V-v(t)).|i(t)|/V (v(t)-3V).|i(t)|/V 3V<v(t)<4V
|i(t)| (3V-v(t)).|i(t)|/V (v(t)-2V).|i(t)|/V 0 2V<v(t)<3V
0
-i(t)
(2V-v(t)).|i(t)|/V (v(t)-V).|i(t)|/V V<v(t)<2V
0 -|v(t)|.i(t)/V |v(t|).|i(t)|/V 0 -V<v(t)<V
0
-i(t)
(2V+v(t)).|i(t)|/V -(v(t)+V).|i(t)|/V -2V<v(t)<-V
|i(t)| (3V+v(t)).| i(t)|/V -(v(t)+2V).|i(t)|/V 0 -3V<v(t)<-2V
|i(t)| 0 (4V+v(t)). |i(t)|/V -(v(t)+3V).|i(t)|/V -4V<v(t)<-3V

B. Supplying the single-phase four-level diode clamped inverter with Boost-
3OVS converter
Examining Fig. 6 and Fig. 7, the average of input current and output currents over
one switching cycle ( ) t ( i
0
,
) t ( i
1
,
) t ( i
2
,
) t ( i
3
) as functions of inductor current and duty
cycles of switches S
1
, D
2
, and S
3
to S
6
are given by

277
( ) ( ) ( )
( ) ( ) ( ) ( ) ( )
( ) ( ) ( ) ( ) ( )
( ) ( ) ( )
( ) ( ) ( )

=
=
=
=
=
t i t D t i
t i t D t i
t i t D t D t i
t i t D t D t i
t i t D t i
L
L
L
L
L in
5 3
4 2
2 3 1
6 1 0
1
(6)

where, D
j
(t) is the duty cycle of switch S
j
or diode D
j
. The duty cycle of each
switch/diode is defined as the ratio of on-time of that switch/diode to the switching
cycle (sum of on-time and following off-time) of that switch/diode.
Assuming an inverter as a load for the Boost-3OVS converter and neglecting the
power transfer loss, the input/output power equality is valid in a half period of the
inverter voltage reference. Thus;
( ) ( ) t t P
T
t t P
T
T T
out in


=
2 2
0 0
2 2

(7)
( ) cos I V t t i V
T
M M in in
T
2
1 2
2
0
=

(8)


To complete power equality equations, average of input current over one switching
cycle ( ) t ( i
in
) must be calculated as a function of the inverter load current and the duty
cycles. As included in (6), the averaged input current as a function of inductor
current is;
( ) ( ) ( ) t i t D t i
L in 1
=

(9)

According to (6), ) t ( i
in
is given as follows.
( )
( ) ( )
( ) ( )
( )
( ) ( )
( ) t i
t D t D
t D
t i t i
t D t D
t i
in L 0
6 1
1
0
6 1
1

=

(10)


Thus;
( )
( ) ( )
( ) cos I V t t i
t D t D
t D
T
V
M M in
T
2
1 2
2
0
0
6 1
1
=

(11)


i
0
(t) is calculated in (5). Examining Fig. 8a in relation to Fig. 8b, i
0
(t) is determined
as (12) because the load current is conducted to i
0
(t) when v(t) is above 2V.and i
0
(t)
is 0 for v(t) below 2V. Therefore;
278
( ) ( ) ( )

< <
< <
< <
= =



t
t t sin I
t
t i t i
M
2
2 2
2
0 0
0
0 0
(12)


In (12), i
0
(t)=

) t ( i
0

because unlike i
1
(t) to i
3
(t), i
0
(t) are not switched by the inverter.
An example of i
0
(t) is illustrated in Fig. 8a. Therefore, the power equality equation is:
( )
( ) ( )
( )

cos I V t t sin
t D t D
t D
T
I V
M M M in
2
1 2 2
2
6 1
1
=

(13)

In (13), between
2
and -
2
;
( )
( ) ( ) t D t D
t D
6 1
1

=

(14)

where, in steady state condition is constant. Therefore;
( )

cos I V t t sin
T
I V
M M M in
2
1 2 2
2
=

(15)
Solving this equation results in;
in
M
in
M
V
) t ( D ) t ( D
) t ( D
V
V
V
cos
6 1
1
2
4
4

= =

(16)

Applying (4) for
2
;
2
6 1
1
2
4
1
2 4
1
2
|
|
|
|
|

\
|

=
|
|

\
|
=
|

\
|
|

\
|
|

\
|
in
M M
in
M M
V
t D t D
t D
V V
V
V V
V

(17)

where, the fraction of D
1
(t)/(D
1
(t) -D
6
(t)) is considered constant. Examining the
topology of Boost-3OVS in Fig. 5, when S
1
is turned on D
2
should not be
conducting. Therefore;
2
2
in
in
V
V V V < <

(18)


Interestingly, V is not constrained by so the performance of the Boost-3OVS
converters is not affected by the power factor of the load in half a cycle of the
inverter voltage reference. This characteristic of Boost-3OVS can solve the problem
of the DC-link capacitor voltage balancing for resistive loads.
279
Considering an application with constant V
M
and variable V
in
, the voltage level (V)
may be set to V
M
/4 so the inverter may operate with the modulation index of 1.
Therefore;

2
3
4
1
1 1 2
4
4
1
2
4
4
4
1
2
2 2 2
2
in
in in in
M
in
M M
V
V
V
V
V
V
V
V
V V
V V
V
V V
V
= =
|
|

\
|

|
|

\
|
=
|
|

\
|

=
|
|

\
|
=


(19)
Since must be higher than 1, there is an upper limit for input voltage to let the
condition V=V
M
/4 be followed and the modulation index be increased to 1.
Considering =1 in (19), the upper limit of V
in
is calculated as:
M M
M
max in
V . V
V V
V 907 0
3 2 4 3
2
3
2
= = = =

(20)
For higher V
in
, =1 and the voltage level V starts to increase when V
in
rises according
to (21).
2
4
1
2
|
|

\
|
=
in
M M
V
V V
V

(21)
Since reference V
M
has not increased, the modulation index (m
A
= V
M
/4V) drops as it
is illustrated in Fig. 9. When m
A
drops below 0.75, the converter performs with four
voltage levels instead of five voltage levels in normal operation. Fig. 9 illustrates the
relationship between V
in
, m
A
, and for constant V
M
as is formulated in (19) and (21).

Fig. 9: The relationship between , V
in
/V
M
, m
A
of the converter
280
Fig. 9 shows the modulation index (m
A
=V
M
/4V) with the bold black line for different
conversion ratios (= D
1
(t)/(D
1
(t)-D
6
(t))) as far as 2>>1. When the input voltage
rises over ( ) 3 2 / V
M
, =1 and voltage level is calculated by (21). The relation
between V
in
, , V
M
, and m
A
is summarized in (22). In addition, the boundary of
V
in
=2V is shown to include the limitation of (18).

> =
|
|

\
|

=
< > =
3 2
1
4
1 2
1
3 2
1 1
2
M
in
in
M
A
M
in A
V
V
V
V
m
V
V m

(22)
From a cost-issue point of view, the combination of Boost-3OVS and four-level
diode-clamped inverter has 4 extra switches and an inductor in comparison with
conventional four-level structure. However, by controlling the asymmetrical DC-link
voltages of the inverter, an extra level will be achieved which improves the quality of
the combination compared with symmetrical five-level diode-clamped inverters and
economically justifies the proposal of this combination. Besides, because of
availability of step-up conversion, advantages of balanced inverter DC-link voltages,
with small capacitors and high modulation index for wide range of V
M
and V
in
are
also achievable.
The suggested control strategy to utilize the mentioned capacities of Boost-3OVS
converter is presented in the next section.

V. Control strategy
The control strategy of a Boost-3OVS converter supplying a single-phase
asymmetrical four-level diode-clamped inverter is explained in this section. The
general scheme of the control strategy is presented as a block diagram. In addition,
the control system has been detailed as a flowchart. The control flowchart presented
in this section has been applied in simulations and experiments.
Fig. 10 illustrates the block diagram of the control system of Boost-3OVS converter.
It is divided in two parts: voltage control and current control. The voltage control
blocks are shown in gray and current control blocks are shown in black. However,
these two partitions of the block diagram are communicating by lines 1 and 2 (Fig.
10). The current is controlled by hysteresis method where the hysteresis band is
adjusted to have an acceptable switching frequency. The Current Reference block
281
determines the level of inductor current reference (I
ref
) according to level of output
voltage errors received from line 2.
Four
Level
Diode
Clamped
inverter
&
Control
System
v(t)
Voltage
Control
V
3
=V
V
2
=V
V
1
=2V
i
L
V
in
i(t)
Vref
Current
Control
Current
Reference
Iref
OR
V
M
S
1
S
3
D
2
S
6
S
4
D
5
1
2
3
4
5
6
7
8
9
10
11
12
13

Fig. 10: Block diagram of the control system for the power converter

The current control is prioritized over voltage control. Therefore, the current control
block signals S
6
and S
1
by lines 3 and 4 to turn on if the inductor current (sensed
from line 5) is less than the lower current hysteresis band. In the time interval that S
6

and S
1
are turned on, the voltage control block is informed from line 1 and keeps all
output switches turned off and waits until the current control block turn S
6
and S
1
off.
When the inductor current crosses the upper hysteresis band, the current control
block turns S
6
and S
1
off and allows the Voltage Control block to operate.
The Voltage Control block senses output voltages from lines 6 to 8. The reference
voltage level (V
ref
) is determined according to the inverter reference voltage
magnitude (V
M
) received from line 9 and input voltage (V
in
) received from line 10. In
case the input voltage is more than V
in-max
calculated in (20), the level of V
ref
will be
adjusted according to (21). The Voltage Control block monitors output voltages
and signals switches S
1
, S
3
, and S
4
through lines 11-13 to control output voltages V
1
,
V
2
, and V
3
. The state of each switch for each condition of V
1
, V
2
, V
3
, and i
L
is given in
Table V. In addition, the priorities of switching states, mentioned in Table V, will be
applied if two of the cases occur simultaneously. As it can be seen from Table V, the
inductor current control has higher priority than the voltage control.

282
Table V: Switching states instructed by the controller according to
the situation of output voltages and inductor current.
Priority V1 V2 V3 iL S1 D2 S3 S4 D5 S6 Switching
state
Current
Control
1
x x x
1 0 0 0 0 1 7
1
x x x
1 0 0 0 1 0 6


Voltage
Control
2 1 0 0 0 1 0 6
2 1 0 0 1 0 0 5
2 1 0 1 0 0 0 4
2 0 1 0 1 0 0 1
2 0 1 0 0 1 0 2
2 0 1 1 0 0 0 0
less than lower band more than upper band x not important
Inside band 1 conducting 0 blocking

When state 0 happens the controller realizes that the inductor is over-charged.
Therefore, the reference current will be reduced to some extent ensuring that the
current does not get below the minimum specified value.
The control flowchart applied in simulations and experiments is presented in Fig. 11.
It is developed from the block diagram as explained above, and is implemented in a
microcontroller to conduct experiments.
The Current Control and Voltage Control blocks are programmed as is
distinguished in Fig. 11. The priority of current loop is depicted by applying the
Current Control block after the data acquisition and conditioning the operation of
Voltage Control block to achieve the reference current. I
ref
is the constant value
that decrements the inductor reference current when the state 0 happens. The
parameter n, shown in the flowchart, limits the rate of current reference change. At
each sampling instant, the index n is incremented and the modification of reference
current is conditioned by its value. When n is more than 1000, the current reference
modifies and n is reset to zero.
Values v
B
and i
B
included in the flowchart are hysteresis bands applied to DC-link
voltages and inductor current respectively. Parameter k is the gain used to modify the
inductor current reference according to DC-link voltages error.
283
V
1
,V
2
,V
3
iL
I
ref
=I
ref
+k*(4V-V
1
-V
2
-V
3
)
n=0
i
L
<I
ref
-i
B
Turn S
1
on
Turn S
3
off
Turn S
4
off
Turn S
6
on
i
L
>I
ref
+i
B Turn S
6
off
i
ref
=i
ref
-A
0
A
0
=0
V
1
<2V
ref
-v
B
Turn S
2
off
Turn S
1
on
V
1
>2V
ref
+v
B
Turn S
2
on
Turn S
1
off
V
2
<V
ref
-v
B
Turn S
3
off
Turn S
4
on
V
2
>V
ref
+v
B
Turn S
4
off
V
3
<V
ref
-v
B
Turn S
3
off
V
3
>V
ref
+v
B
Turn S
3
on
A
0
=I
ref
;
n>1000
n=n+1
y
n
y
n
y
n
n
n
n
n
n
n
y
y
y
y
y
y

Fig. 11: Flowchart of the control strategy
VI. Simulation results
The proposed control strategy has been simulated for a Boost-3OVS converter
supplying a single-phase asymmetrical four-level diode-clamped inverter. To
emphasise on DC-link capacitor balancing, a highly resistive load has been
connected to the inverter output.
The results, including inverter load voltage, input voltage, inverter load current, and
DC-link voltages, are shown in Fig. 12a. The magnitude of the reference load voltage
is 100V and the load is a 10 resistance with a 1mH inductance. The frequency of
the load voltage is 50Hz and the power factor of the load is 0.99.
284

(a)

(b)
Fig. 12: The simulation results: a) the performance of the combination of Boost-3OVS converter and
the single-phase asymmetrical four-level diode-clamped inverter when input voltage changes. b)
Output currents

The input voltage has dropped from 80 V to 50 V at 0.46sec and is restored to 80 V
at 0.52sec. Since the inductor current has been high enough compared to the i(t) at
the moment of drop, the input voltage change has not affected the DC-link voltages
and inverter performance. Likewise, the rise from 50 V to 80 V has not affected DC-
285
link voltages since the state 0 has been applied and extra inductor current is not
conducted to the DC-links.
Fig. 12b shows the average of output currents in comparison with the sinusoidal load
current i
Load
(t) i(t) as it has been calculated in (5). The output currents are not equal
and they vary significantly along a cycle of the inverter current. Therefore, it is
evident that the application of a DC-DC converter (like Boost-3OVS) to balance DC-
link voltages by supplying them with required current is necessary. In addition, the
last trace shows that i
0
(t) is equal to |i(t)| from
2
to -
2
as it has been mentioned in
(12). Furthermore, the output current ) t ( i
1

changes its polarity during half a cycle of
the inverter reference. This fact, that i
1
(t) may be negative, justifies the requirement
of switching states 1 and 2 in Fig. 6, which let the ) t ( i
1

be equal to i
L
(t). Since these
power paths do not exist in alternative topologies [8,23] they cannot perform as well
as the Boost-3OVS proposed in this paper.

Fig. 13: The performance of Boost-3OVS converter and asymmetrical four-level inverter when the
power factor of the load changes: 0.7 lag 1 0.7 lag

Fig. 13 illustrates the response of Boost-3OVS converter to a sudden change in the
load power factor. The fundamental of the load voltage and the absolute impedance
of the load are the same as Fig. 12. In the beginning, the power factor is 0.7 lagging
and at 0.5sec, it becomes almost unity power factor and subsequently changes back
286
to 0.7 lagging at 0.56 sec. The DC-link voltages have been regulated with small
errors and the inverter has performed with five levels.

VII. Experimental results
A laboratory prototype of the Boost-3OVS converter and a single-phase
asymmetrical four-level diode clamped inverter has been developed to test the circuit
and control strategy. The controllers for Boost-3OVs converter and the inverter has
been developed utilizing an NEC 32-bit 64MHz V850/IG3 micro-controller. Since
the main claim of this paper is enhanced performance with high modulation index
regardless of the input voltage and load power factor, experiments with sudden
change of input voltage while the inverter is supplying a highly resistive load has
been conducted. Fig. 14 shows the results of the experiment with a sudden change of
input voltage.
The DC-link capacitors are 2.2mF each and the inductor is 7mH. The frequency of
the inverter reference is 20Hz and the load of the inverter is almost resistive (50
resistor and 7.5mH inductor) and the power factor of the load is 0.999 for a 20 Hz
reference. The switching frequency of the inverter is 4 kHz and its DC-links are
regulated at V
1
=40V, V
2
=20V, and V
3
=20V.
Fig. 14a illustrates the DC-link voltages and the inductor current. The load voltage
(v
Load
(t)) and load current (i
Load
(t)) of the inverter are illustrated in Fig. 14b. In
addition, the input voltage is included in 14b. As it can be observed, the input voltage
has dropped form 55V to 38V and has risen back to 53V. However, the DC-link
voltage is not disturbed much and the inverter has operated satisfactorily. To
examine the response of the inverter to input voltage disturbance, the zoomed details
of the waveforms of Fig. 14b are shown in Fig. 14c and Fig. 14d. It can be seen that
the inverter performance has not been affected by the voltage change. Furthermore,
as it can be observed from Fig. 14a, the inductor current has been modified when the
input voltage has dropped and increased.

287

(a)

(b)

(c)

(d)
Fig. 14: Experimental results a) DC-link voltages and inductor current. b) Input voltage, the load
voltage, and the load current c) zooming of input voltage drop d) zooming of input voltage rise.


To examine the performance of the system for a higher frequency and a lower power
factor, the inverter reference frequency is increased to 167 Hz. Therefore, the power
factor is decreased to 0.95. DC-link voltages and the inductor current are shown in
Fig. 15a. Load voltage and load current of the inductor are illustrated in Fig 16b.
288
To examine a more inductive load the load resistance has decreased to 10.
Therefore, the power factor has decreased to 0.8 and the I
M
has increased to 4A from
0.8A. The DC-link voltages and the inductor current are presented in Fig. 15c and
load voltage and the load current of the inverter are illustrated in Fig. 15d.

Fig. 15: Experimental results
Low inductive load (PF=0.95 , I
M
=0.8A): a) DC-link voltages and inductor current b) load voltage and
load current
High inductive load (PF=0.8 , I
M
=4A): c) DC-link voltages and inductor current d) load voltage and
load current

VIII. Discussion
The limitation explained by (18) may be removed by adding another switch S
2
as
shown in Fig. 16. This switch operates complementary to S
1
. Therefore, it turns off
when S
1
is turned on and blocks the voltage (2V-V
in
) so 2V may be more than V
in
and
may be increased to over 2.


(a)

(c)

(b)

(d)
289
i
3
(t)
i
2
(t)
i
1
(t)
i
0
(t)
i
L
(t)
S
1
D
2
S
3
D
5
V
in
(t)
V
3
(t)
V
2
(t)
C
3
C
1
S
6
S
4
D
4
V
1
(t)
C
2
L
o
a
d
INVERTER
S
2

Fig. 16: the topology of Boost-3OVS converter with switch S
2
to increase maximum conversion ratio

Examining Fig. 9, the topology shown in Fig. 16 can cover the area of V
in
<2V as
well. The control strategy of the topology shown in Fig. 16 does not differ from the
control strategy of Boost-3OVS converter. The switching signal of S
2
is the
complement of the switching signal of S
1
. Therefore, only one NOT gate needs to be
added to the control system.

IX. Conclusion
To resolve the problem of DC-link capacitor voltage balancing and improving the
quality of an asymmetrical single-phase four-level diode-clamped inverter, a new
multi-output DC-DC converter, named Boost-3OVS converter, is introduced. The
Boost-3OVS converter regulates asymmetrical DC-link voltages to let the four-level
diode-clamped inverter operate with five voltage levels, thereby improving the load
voltage quality.
The switching states and the equations describing the operation of the proposed
converter are developed and discussed. Applied control strategy is presented and
explained in details. The flowchart of the control program is presented as well. To
validate the control strategy, some simulations have been directed for different load
power factor and input voltage conditions and disturbances.
Finally, laboratory prototypes of the Boost-3OVS converter and four-level diode-
clamped inverter are designed and some experiments have been directed to examine
the performance of the system and operation of proposed control flowchart and
system. Experimental results are presented.
290
Overall, the investigations show that the preposed converter may operate well when
there are different categories of high power factor loads and there is a variable input
voltage. Moreover, the converter may operate satisfactorily even when the power
factor of the load decreases to 0.8 as has been shown. Therefore, the utilization of the
Boost-3OVS converter may lead to some improvements in the application of single-
phase multi-level asymmetrical four-level inverter for residential PV applications,
which require step-up conversion and may be needed to supply high power factor
loads with high quality.

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Conclusion and future research
This project was funded by an Australian Research Council (ARC) Linkage grant.
The industrial scope of this project was to investigate the requirements of the
auxiliary equipment of an electric train and to design and test an appropriate auxiliary
power supply at 7.5 kW. To carry out this task, a general literature review was
undertaken to gather available knowledge about the demands of electric railways in
general and the auxiliary equipment of electric trains in particular. The solutions
suggested and implemented to address these demands have been included in that
review. The review was submitted as a conference paper titled Applications of
Power Electronics in Railway System to the Australasian Universities Power
Engineering Conference (AUPEC) 2007. This paper is presented in Chapter (3).

From the literature review, it was determined that the main problem affecting the
performance of the auxiliary power supply of electric trains is the frequent fluctuation
of the overhead voltage. Because of the distances between power stations and the
varying operating condition of travelling trains, the level of overhead voltage changes
dramatically. For instance, when a particular train travels up-hill, it drives current
from the power network and causes the overhead voltage drop. When the same train
travels downhill, it supplies the network since its traction motors work in electrical
brake mode. As a result, the level of the overhead voltage rises. In the particular
industrial case associated with this project (for Schaffler and Associates Ltd), the
overhead voltage varies between 1000VDC and 500VDC, while the voltage level
required by the auxiliary equipment is 600VDC. Since loads can be directly
controlled by passengers (as in the case of lighting and air conditioning systems), the
load current driven from the auxiliary power supply continually varies.

Aiming to suggest a power electronic topology and a suitable control strategy to
provide robustness against input voltage and load current disturbances, the topology
of the Positive Buck-Boost (PBB) converter, which has the capability of storing extra
inductor current, seems promising. The stored extra current can be used to provide
some margin of robustness against disturbances from input voltage and load current.
However, the extra inductor current causes extra conduction and switching loss. The
advantages and disadvantages of extra current storage have been quantified and two
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control strategies have been subsequently developed to perform extra current storage
for a PBB converter. The results of this part of the research have been documented in
a conference paper titled A General Approach to Control a Positive Buck-Boost
Converter to Achieve Robustness against Input Voltage Fluctuations and Load
Changes which was published at the Power Electronics Specialists Conference
(PESC) 2008. This paper is presented in Chapter (4).

To reduce conduction and switching loss of the PBB converter due to extra current
storage in the inductor of the PBB converter, two fast response control strategies have
been developed to address applications with and without pre-knowledge of
disturbance. Firstly, for applications where the input voltage and load current
disturbances are pre-known, the Smart Load Controller (SLC) strategy has been
suggested. Specifically, SLC has been suggested for electric/hybrid vehicle
applications. The suggestion of (SLC) is based on the existence of a master
controller in electric/hybrid vehicles. The master controller receives all requests for
load change from any device mounted on the vehicle and sends the actual signal of
load change. Therefore, there is the possibility of applying extra current storage only
when there is an up-coming load change pre-known by the master controller. In this
way, the extra switching and conduction loss will be removed because, when there is
no load change expected, the level of inductor current is minimized. Similarly, when
the voltage of the main power source is expected to change (because of power source
change in hybrid vehicles), the extra current may be stored to prevent disturbances
affect load voltages.

The proposed control strategy for the PBB converter and the SLC have been
designed and tested to validate the capability of the topology and the control system
to enhance the dynamics of the power supply in the presence of input voltage and
load current disturbances. The results of this part of the research have been published
as a journal paper titled Utilizing Robustness of Positive Buck-Boost Converter
against Input Voltage and Load Current Disturbances in the Australian Journal of
Electronics and Electrical Engineering (AJEEE) Vol. 6 No. 2). This paper is
presented in Chapter (1).

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The Smart Load Controller is suitable for applications where there is a pre-
knowledge of the input voltage or load current change. However, in the majority of
applications, such information is not available. To address these applications, the fast
response strategy of Dynamic Hysteresis Band (DHB) has been proposed. Since the
disturbance arrives unexpectedly, the DHB strategy operates with minimum required
current and maximum efficiency when there is no disturbance. When the disturbance
occurs and affects the output voltages, the DHB alternates the hysteresis bands of the
inductor current to immediately change the average level of inductor current. When
the output voltage drops, DHB increases the upper hysteresis band to increase the
average inductor current and reduce the voltage drop. When an over voltage occurs,
the controller utilizes the Buck switch to circulate the inductor current to limit the
output voltage. The DHB control strategy has been examined on Boost and PBB
converters. The analysis and experimental results are published in a conference paper
titled Application of Dynamic Hysteresis Band Height Control to Improve Output
Voltage Transient in Boost and Positive Buck-Boost Converters (European Power
Electronics [EPE] Conference, 2009). This paper is presented in Chapter (8).

While the PBB converter has been utilized to address the requirements of the
application of the industrial partner of this project, its capacity After suggestion and
analysis of PBB converter, other applications, which were included in auxiliary
equipment of an electric vehicle and could suffer input voltage and load current
heavy variations, were reviewed.
The capability of the PBB converter for robustness in the face of input voltage and
load current disturbances is also useful in other applications where there is a
frequently variable load current and/or a fluctuating input voltage. For instance,
electric cars supplied by a battery or hybrid cars supplied by a battery and a fuel cell
or a PV cell array, are handling a variety of loads with different power demands and
sensitivities. When some load rises, there is a demand for extra current, which may
cause a voltage drop across all other loads. Since some loads are sensitive to voltage
drop, a DC-DC converter capable of securing the voltage of some of the loads
despite disturbances may enhance the performance of the whole system. Thus, a
multi-output Buck Boost converter has been proposed to supply the multi-voltage
DC-network of an electric/hybrid car. The suggested topology and analysis are
presented in a conference paper titled A New DC-DC Converter with Multi Output:
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Topology and Control Strategies. This was published at the European Power
Electronics-Power Electronics and Motion Control EPE-PEMC Conference, 2008
and constitutes Chapter (5) of this thesis.

Another paper comparing multi-output variations of basic DC-DC converters titled
A Novel Configuration for Voltage Sharing in Diode-clamped Topology has been
published in the ICREPQ Conference, 2009 and is presented in Chapter (7). It has
been selected for journal publication.

To cover a wider area of application, two fast response control strategies suitable for
two categories of application have been proposed for the MOPBB converter. They
are:
a. application with pre-knowledge of disturbances
b. application with unexpected disturbances

The Smart Load Controller (SLC) has been suggested for applications including a
master controller, which can control the changes in loads and input voltage. For
another category of applications where there is no pre-knowledge or predictability of
load change, the DHB fast response strategy has been suggested.

Multi-output PBB topology may be applied as the supplier of the single-phase multi-
level diode-clamped inverter or the supplier of a multi-voltage DC-network. These
applications are widely applied in electric vehicles and trains. Analyses, simulations
and experiments have been directed at validating the introduced topology and the
developed control strategies. These analysis, simulations, and experiments have been
submitted as a journal paper titled Multi-Output Buck-Boost Converter with
Enhanced Dynamic Response to Load and Input Voltage Changes to the IET
Journal of Power Electronics. This paper is currently under review and is presented
in Chapter (10).

The other application, which could benefit from the utilization of PBB-based DC-DC
converters, is symmetrical/asymmetrical multi-level diode-clamped inverters. The
intrinsic problem of capacitor voltage balancing is associated with the topology of
multi-level diode-clamped inverters. The problem appears when the power factor of
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the load closes to unity. In this research, the single-phase utilization of PV cells has
been considered as the application where loads are highly resistive and the power
flow is unidirectional. A multi-output DC-DC converter can supply DC-link
capacitors and balance their voltage, despite unbalance load currents, and a MOPBB
converter can perform well for symmetrical multi-level diode-clamped inverters.

As has been explained, through having asymmetrical DC-link voltages, the quality of
the load voltage of the inverter may improve without addition of any other switch or
diode. However, the problem of DC-link capacitor voltage balancing deteriorates
with asymmetrical DC-link voltages. To regulate DC-link voltages asymmetrically, a
novel family of multi-output DC-DC converters was developed. These converters are
designed to be able to supply DC-link capacitors even in the worst case of almost
resistive loads (PF=0.999). The combination of these converters and an asymmetrical
four-level diode-clamped inverter has been mathematically modeled and their range
of satisfactory operation has been determined. Simulations and experiments have
been performed to validate the proposed topologies and related control strategies.
The analysis, simulations and experimental results have been presented in a journal
paper titled A New Family of Multi-Output DC-DC Converter Topologies to Supply
an Asymmetrical Four-Level Diode-Clamped Inverter which has been submitted to
the International journal for computation and mathematics in electrical and
electronic engineering (COMPEL). This paper is presented in Chapter (2).

The specific application of single-phase utilization of PV panels by means of a
single-phase asymmetrical four-level diode clamped inverter has been addressed in
another journal paper titled Voltage Sharing Converter to Supply Single-Phase
Asymmetrical Four-Level Diode-Clamped Inverter with High Power Factor Loads
which has been provisionally accepted to be published in IEEE transaction on power
electronics. In this paper, which is presented in Chapter (11), the disturbance caused
by the alternating sunlight intensity has been investigated and relevant simulations
and experiments have been conducted to validate the proposed topology and related
control strategy for that situation. The results illustrate that, despite variable input
voltage caused by alternating sunlight, the combination of multi-output DC-DC
converter and the asymmetrical four-level diode clamped inverter performs
satisfactorily.
298

The capability of the PBB converter to store extra inductor current may contribute to
applications requiring wideband DC-DC converters. The current stored in the
inductor determines the rate of changes in the load voltage. The application of linear-
assisted RF amplifiers could utilize a PBB based DC-DC converter. The suggested
topologies and the specific control strategy for a wideband PBB converter and a
Bidirectional PBB converter are presented in a conference paper titled Bidirectional
Positive Buck-Boost Converter and published in the European Power Electronics-
Power Electronics and Motion Control EPE-PEMC Conference, 2008. This paper is
presented in Chapter (6).

A study on the switching of insulated gate switches has been made in the last stage of
this research. Intending to efficiently attenuate voltage/current spikes observed in
experimental results of the industrial prototype of the PBB converter, a contribution
to the field of Active Gate Signaling (AGS) has resulted from this research.
Conventionally, the voltage and/or current spikes generated in the switching process
are reduced by limiting the switching speed. The drawback is that the reduction in
the switching speed increases the switching loss and severely decreases the
efficiency of the converter. By applying the AGS technique, the switching speed is
selectively controlled to attenuate current or voltage spikes without dramatically
increasing the switching loss. Analyses and simulations have been undertaken and
the results are presented in a conference paper titled Efficient Voltage/Current Spike
Reduction by Active Gate Signaling and submitted to the EMC Symposium,
Adelaide, Australia, 2009. This paper is presented in (9).

Generally, there are a wide range of applications which may benefit from the
utilization of PBB-based converters. The capability of PBB-based converters to store
extra current in their inductor allows them to perform well when the application is
subjected to frequent disturbances from input voltage and load current. There is an
opportunity for greater enhancement when there is pre-knowledge or prediction of
disturbances. However, even in the absence of this information, the advantages of
PBB-based converters can be partially utilized by applying the DHB fast response
strategy. Analysis, simulation and experimental results illustrate the capabilities of
the novel topologies and control strategies presented in the course of this research. To
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utilize the current storage advantage of PBB converters for different applications
such as multi-level diode-clamped inverters or multi-voltage DC-networks, novel
multi-output topologies have been devised and tested.

Future work
PBB-based DC-DC converters
The PBB-based topologies can improve the dynamic performance of their output
voltage by utilizing their capacity for current storage. This capacity has been used for
developing robustness in the face of disturbances or for increasing the bandwidth of
the converter. However, the question of how much extra current should be stored to
achieve an optimized performance may be answered differently for each application.
Developing an optimization algorithm to improve the efficiency and performance of
the converter is an opportunity for future work.

Controlling PBB-based converters
Various control strategies perform differently for different application and different
power requirements. In this research, hysteresis current control and a version of
sliding mode control have been used for the PBB converter. Investigating other
control techniques for PBB-based converters for specific applications can be a field
of further research.

Transformer-based topologies
To address applications which require galvanic isolation, the DC-DC converter
topologies must include an insulated transformer. To investigate transformer-based
topologies which have a current circulating switching state, and developing suitable
control strategies may be a field for future work.

Multi-output DC-DC converters for high voltage applications
In high voltage applications, the importance of the speed of switching and the
blocking voltage of switches increases and different analyses of these factors are
required. In addition, the capacity of current storage may provide flexibilities for non-
linear high voltage applications such as pulsed power.