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Operation Theory Continuously Variable Slop Delta(CVSD) Encode :CVSD

encoder is a kind of source coding. Source coding is defined as the conversion of

analog signal to digital signal, then the digital signal can be easily to process. For
example encode, remove the unwanted signal and so on. Furthermore the quality of
transmission of digital signal is better than the quality of transmission of analog
signal, one of reason is that the digital signal can be regenerated by using
computer. Nowadays , CVSD encoder is generally applied at voice, this is because
the sampling frequency of voice is only 16KHz.One of the popular system that
used CSVD encoder as the voice modulation is Bluetooth system.

Audio I/P CVSD

Fig: The block diagram of CVSD encoder
The comparator, sampler and integrator comprise the delta modulation. The slop
magnitude controller and level detect algorithm comprise the quantization step size
adjuster to control the gain of the integrator of delta modulation.
The comparator compares the band-limited analog input signal from the filter
with the output signal of the reconstruction integrator.
The reconstruction integrator operates on the output signal of the sampling to
produce an analog feedback signal to the comparator.
The Implementation of CVSD Modulator: Figure OFC6-1:CVSD encoding circuit
is the basic circuit diagram of CVSD modulator. The voice signal will pass through
a low pass filter, which is to remove all the signals besides the voice signal. The
output signal of the comparator is square wave signal. The D type flip-flop is used
for sampling then the signal will feedback to variable gain amplifier and step size
adjuster. The objective is to differ the input signal and the reference signal, which
Comparator Sampling
Slope Magnitude and Gain
can vary the gain of the variable gain amplifier. If the difference between the input signal and
reference signal is large then the step size adjuster will change the gain of the gain amplifier.
From the above mentioned discussion we utilize MC34115 from MOTOROLA company to
design and implement the CSVD modulator. The pin connection diagram and the description of
each pin are given below:

Pin 1 Analog Input: This is the analog comparator inverting input where the voice signal is applied.
Pin 2 Analog Feedback This is the noninverting input to the analog signal comparator.
Pin 3 Syllabic Filter This is the point at which the syllabic filter voltage is returned to the IC in order to
control the integrator step size.
Pin 4 Gain Control Input The syllabic filter voltage appears across CS of the syllabic filter and is the
voltage between VCC and Pin 3.
Pin 5 Reference Input This pin is the noninverting input of the integrator amplifier. It is used to
reference the dc level of the output signal.
Pin 6 Filter Input This inverting op amp input is used to connect the integrator external components.
Pin 7 Analog Output This is the integrator op amp output.
Pin 9 Digital Output The digital output provides the results of the delta modulators conversion.
Pin 10 VCC/2 Output An internal low impedance midsupply reference is provided for use in single
supply applications.
Pin 11 Coincidence Output The coincidence output will be low whenever the content of the internal 3
bit shift register is all 1s or all 0s.
Pin 12 Digital Threshold This input sets the switching threshold for Pins 13, 14 and 15.
Pin 13 Digital Data Input In a decode application, the digital data stream is applied to Pin 13.
Pin 14 Clock Input The clock input determines the data rate of the codec circuit.
Pin 15 Encode/Decode This pin controls the connection of the analog input comparator and the digital
input comparator to the internal shift register.
Pin 16 VCC The power supply range is from 4.75 to 16.5 V between Pin VCC and VEE.