Expedition PCB Guide

Xpediton xPCB Layout
Evaluaton Guide
This document is for information and instruction purposes. Mentor Graphics reserves the right to make changes in specifcations and other in-
formation contained in this publication without prior notice, and the reader should, in all cases, consult Mentor Graphics to determine whether
any changes have been made.
The terms and conditions governing the sale and licensing of Mentor Graphics products are set forth in written agreements between Mentor
Graphics and its customers. No representation or other affrmation of fact contained in this publication shall be deemed to be a warranty or
give rise to any liability of Mentor Graphics whatsoever.
MENTOR GRAPHICS MAKES NO WARRANTY OF ANY KIND WITH REGARD TO THIS MATERIAL INCLUDING, BUT NOT LIMITED TO,
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
MENTOR GRAPHICS SHALL NOT BE LIABLE FOR ANY INCIDENTAL, INDIRECT, SPECIAL, OR CONSEQUENTIAL DAMAGES WHATSO-
EVER (INCLUDING BUT NOT LIMITED TO LOST PROFITS) ARISING OUT OF OR RELATED TO THIS PUBLICATION OR THE INFORMA-
TION CONTAINED IN IT, EVEN IF MENTOR GRAPHICS CORPORATION HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAM-
AGES.
U.S. GOVERNMENT LICENSE RIGHTS: The software and documentation were developed entirely at private expense and are commercial
computer software and commercial computer software documentation within the meaning of the applicable acquisition regulations. Accord-
ingly, pursuant to FAR 48 CFR 12.212 and DFARS 48 CFR 227.7202, use, duplication and disclosure by or for the U.S. Government or a U.S.
Government subcontractor is subject solely to the terms and conditions set forth in the license agreement provided with the software, except
for provisions which are contrary to applicable mandatory federal laws.
2013 Mentor Graphics Corporation
All Rights Reserved
Contractor/manufacturer is:
Mentor Graphics Corporation
8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777.
Telephone: 503.685.7000 Toll-Free Telephone: 800.592.2210
Website: www.mentor.com SupportNet: supportnet.mentor.com/
Send Feedback on Documentation: supportnet.mentor.com/doc_feedback_form
TRADEMARKS: The trademarks, logos and service marks (Marks) used herein are the property of Mentor Graphics Corporation or other
third parties. No one is permitted to use these Marks without the prior written consent of Mentor Graphics or the owner of the Mark, as appli-
cable. The use herein of a thirdparty Mark is not an attempt to indicate Mentor Graphics as a source of a product, but is intended to indicate a
product from, or associated with, a particular third party. A current list of Mentor Graphics trademarks may be viewed at:
www.mentor.com/trademarks.
End-User License Agreement: You can print a copy of the End-User License Agreement from: www.mentor.com/eula
Contents
Contents
Introducton to Xpediton 7
Introducton ........................................................................................................................ 8
Design Process Overview .................................................................................................. 10
The Xpediton Design Flow ............................................................................................... 11
Xpediton Highlights ......................................................................................................... 12
Lesson 1: The Xpediton Start Pages ................................................................................. 13
Design Capture with Xpediton xDX Designer 15
About This Evaluaton ....................................................................................................... 16
Lesson 2: Xpediton xDX Designer Workspace .................................................................. 16
Lesson 3: Setng Up a New Project .................................................................................. 31
Lesson 4: Selectng and Verifying Parts with Xpediton xDX Databook ............................ 39
Lesson 5: Placing Symbols in the Schematc ..................................................................... 52
Lesson 6: Wiring the Schematc........................................................................................ 63
Lesson 7: Creatng Rules and Constraints with Constraint Manager ................................ 78
Lesson 8: Variant Manager ............................................................................................... 98
Lesson 9: Generatng the BOM (Bill of Materials) using Part Lister ................................ 109
Lesson 10: Xpediton xDX Designer Integraton with HyperLynx LineSim....................... 114
Lesson 11: Xpediton xDX Designer Integraton with HyperLynx Analog ........................ 120
Lesson 12: Xpediton xDX Designer and Xpediton xPCB Layout Integraton .................. 128
Contents
PCB Design with Xpediton xPCB Layout 137
Lesson 13: The Xpediton xPCB Layout Environment ..................................................... 138
Lesson 14: Setng Up a New Board Design .................................................................... 154
Lesson 15: Placement ..................................................................................................... 168
Lesson 16: Creatng Rules and Constraints with Constraint Manager in xPCB Layout.... 185
Lesson 17: Variant Management .................................................................................... 202
Lesson 18: AutoActve Interactve Routng ..................................................................... 215
Lesson 19: Final Layout Consideratons .......................................................................... 243
Lesson 20: Design Verifcaton ........................................................................................ 249
Simulaton with
HyperLynx BoardSim & HyperLynx Thermal 256
Lesson 21: HyperLynx BoardSim Simulaton ................................................................... 257
Lesson 22: HyperLynx Thermal Analysis ......................................................................... 263
Completng the Design 269
Lesson 23: Adding Drawing Documentaton .................................................................. 270
Lesson 24: Generatng Manufacturing Outputs ............................................................ 278
Lesson 25: Data Archiving and Transfer .......................................................................... 291
Lesson 26: Creatng Components in Your Personal Library ............................................ 285
Conclusion ...................................................................................................................... 313
Contents
Appendix
Appendix 1: ODBC Setup ...........................................................................................A-2
Appendix 2: Confgure Xpediton xDX Databook .......................................................A-3
Appendix 3: Confguring Variant Manager ................................................................A-4
List of Figures
Figure 1: Design Process Steps ................................................................................... 11
Figure 2: Xpediton Flow Diagram .............................................................................. 12
Figure 3: Xpediton xDX Designer Main Window ........................................................ 18
Figure 4: Xpediton xDX Designer Toolbars ............................................................ 19-20
Figure 5: Constraint Manager Main Window ............................................................. 80
Figure 6: Constraint Manager Toolbars ................................................................. 81-82
Figure 7: Xpediton xPCB Layout Main Window ....................................................... 140
Figure 8: Xpediton xPCB Layout Toolbars ......................................................... 141-144

Contents
7
In this secton:
Introducton to
Xpediton
Introducton
Design Process Overview
The Xpediton Design Flow
Xpediton Feature Highlights
The Xpediton Start Pages
8 Introducton
Introducton
Xpediton is by far the most productve and complete PCB design suite that
allows individual engineers and small workgroups to design highly complex PCBs
while at the same tme ofering an afordable cost of ownership. Skeptcal? We
invite you to take a closer look using this evaluaton guide and see for yourself.
Xpediton is for the individual PCB engineer who does it all, operatng
independently or in small teams. Untl now, your choice of design tool has been
a frustratng compromise. High-end enterprise solutons that handle design
complexity come with too much unnecessary overhead and the associated
challenges of ease of use and cost of ownership. While desktop solutons are
easier to use and have lower cost, they sacrifce productvity as design complexity
increases. Xpediton delivers the best of both worlds - powerful technology from
Mentor Graphics Xpediton combined with a focus on ease of adopton, ease of
learning, ease of use, and afordability. Xpediton provides a tghtly integrated
design fow with everything you need to get the job done.
Hierarchical schematc and table based design creaton with intelligent
parts selecton
Unifed constraints defniton and management across the fow
Component informaton and library management
Easy design reuse
Analog/mixed signal SPICE simulaton Performing Design Analysis
(pre-layout)
Pre- and post-layout signal integrity analysis based on our leading-edge
HyperLynx technology
Board level thermal analysis
Best-in-class, PCB layout featuring:
A single layout environment
Correct-by-constructon approach to plane design, placement, and
routng
Hierarchical component planning and placement
The industrys most powerful auto-interactve routng environment for
large busses, single ended, and diferental pair nets
Groundbreaking Sketch routng
Advanced fabricaton design including HDI and Flex
PCB documentaton and manufacturing outputs
While Xpediton is a complete suite for complex PCB design, you stll
have the fexibility of adding specialized advanced capabilites from the
HyperLynx family of products, advanced packaging, FPGA co-design, and 3D
design and modeling.
Xpediton is a key part of Mentor Graphics scalable PCB design
solutons. If you are a PADS user in need of higher performance design,
Xpediton ofers a simple upgrade path that allows you to leverage your
prior experience of the PADS fow and tools. When your design needs
evolve towards enterprise capabilites such as distributed libraries, design
management, and concurrent engineering, you can seamlessly
transiton to Xpediton .
We hope youll agree with Xpediton, the days of compromise are
over. Welcome to a new breed of PCB design soluton for the next
generaton of PCB Engineers.
9
Purpose of This Guide
This Evaluaton Guide will introduce you to the major features and
capabilites of the applicatons and help you to understand how they work
together to unify and simplify your design process. We will walk through
the entre workfow from symbol creaton to design capture, rules and
constraints entry, to layout, placement of components, interactve
routng, and design verifcaton to fnal output. The focus throughout is on
using the entre Xpediton fow, with special atenton paid not only to those
areas where the applicatons functon similarly, but also to the integraton and
transiton locatons, providing tps on how to get the job done more efciently.
Working Together
This atenton to workfow means that we will also show you how to use
the applicatons together with real-world design examples. Along the
way, we also introduce you to many of the great new features in each
applicaton, highlightng some of the more interestng techniques with
steps and lots of illustratons. To see which applicatons and features a
secton covers, scan the In this secton list at the beginning of each secton.
Further Exploraton
Finally, remember that this document is an evaluaton guide, not a
comprehensive user guide. Your most complete source of detailed
feature informaton is the Help Menu in each applicaton. In
additon, take tme to examine the resource informaton accessible through
the Getng Started, Help, and News links within each applicatons Start
Page. There you will fnd even more informaton on a variety of Mentor
Graphics resources that will help you get started, get informed, and get
inspired while using Xpediton. We hope this evaluaton guide helps you
see some of the excitng design possibilites available to you with Xpediton
Enjoy!
Introducton
Introducton to Xpediton
10
Design Process Overview
Creatng a new design project requires an engineer to pay atenton to many
details. Designing a PCB is a process of making design decisions and tradeofs,
based on engineering changes throughout the design. In order to obtain the best
possible design, the engineer must weigh a number of confictng factors and
make calculated design choices to obtain the best possible design outputs.
Knowing that your design tools have the ability to provide and
manage the required content gives you a strong foundaton on which
to build your design. Xpediton ofers a fully featured front-to-back
design fow that allows the engineer to balance rules and constraints in an
intelligent and predictable manner to produce quality designs that can be easily
manufactured.
There are many operatons that a designer must perform to complete a design,
but the process fow can be simplifed to a few basic steps shown below:
1. Creatng a Design Project
2. Performing Design Capture
Creatng the top level schematc
Adding components to the schematc
Connectng the components
Verifying the design
Performing design simulaton (pre-layout)
Defning constraints
Packaging and Forward Annotatng the logical design for physical design
3. PCB Layout Design
Importng schematc design data to layout
Confguring for physical design
Generatng plane structures
Adding physical constraints
Placing parts
Routng critcal nets
Complete nets routng
Checking design rules (DRC)
Post layout analysis
4. Creatng Documentaton and Manufacturing Outputs
Creatng schematc release documentaton
Creatng manufacturing outputs
Performing engineering change orders (ECO)
Parttoning your workfow to align with these steps will help you establish a
structured approach to organizing your design tasks. It will also provide you with
a number of checkpoints for reviewing your design data.
Introducton

Documentaton and
Manufacturing Outputs
Personal Library
Part Creaton

Create a
Design Project

Schematc Capture
with Simulaton

PCB Design Layout with
SI/Thermal Simulaton
11 Introducton
The Xpediton Design Flow
12
Xpediton Highlights
Design Capture
The Xpediton fow delivers productve PCB design capture and defniton
functonality using Xpediton xDX Designer. You will have features like: intuitve
project and design navigaton, unlimited hierarchical support, informal design
reuse, advanced design propertes and rules management, full forward/back
annotaton including design constraints, cross probing between the schematc,
layout, routng, and constraints. You will also have access to schematc-to-signal-
integrity features. Component management is also included using library
management tools.
Signal Integrity Simulaton and Analysis
Signal integrity (SI) analysis is an essental part of modern electronic design.
Increasingly fast edge rates in todays ICs cause detrimental high-speed efects,
even in PCB designs running at low operatng frequencies. As driver ICs switch
faster, a growing number of boards sufer from issues such as crosstalk,
over/undershoot, ringing, glitching, and tming problems.
Xpediton uses HyperLynx SI to ofer powerful and easy-to-use signal
integrity capabilites on the engineers desktop. With pre-layout analysis
capabilites for defning routng constraints, to verifcaton of the routed
board to ensure your design goals are met, HyperLynx SI ofers a complete
environment for all your signal integrity analysis needs.
HyperLynx Analog with EZwave is a board-level simulaton and verifcaton
environment that is integrated into the Mentor Graphics Xpediton xDX
Designer environment. Using a single schematc to drive both the simulaton
and PCB applicatons, it efectvely eliminates costly and error-prone schematc
re-entry, therefore signifcantly shortening the overall development cycle.
HyperLynx SI also allows engineers to analyze board-level thermal problems
on placed, partally routed, or fully routed PCB designs from Xpediton.
Temperature profles, gradients, and excess temperature maps enable
engineers to resolve board and component overheatng early in the design
process.
PCB Layout and AutoActve Routng Technology
Xpediton ofers unparalleled price-performance for the layout and
design of complex circuit boards, including high-speed applicatons.
Xpediton ofers advanced design rules with real-tme design rule check-
ing, bi-directonal cross probing, dynamic split-plane generaton, as-
sociatve-dimensioning, direct DXF import into both the board and
part library editors, physical design reuse, and advanced fabricaton
verifcaton tools. Also included are assembly variant functons, test point
generaton, and an IDF import/export capability from/to third party
CAD/CAM tools. Manufacturing outputs for a wide variety of industry
standard formats are included like ODB++, recognized as the industry
leading intelligent format used by PCB fabricaton, assembly, and test vendors.
Many designers of high-speed and/or dense designs require exactng
manual control of routed signal traces. Xpediton includes
interactve and customizable routng controls for design challenges such as
diferental pair routng, net tuning, manufacturing optmizaton and
microvia and build-up technology. AutoActve technology provides
shape-based true 45 degree routng and is a single, integrated, place
and route editng environment that reduces design tme and increases
productvity. These commands allow you to automatcally manipulate
individual traces, or groups of traces using Sketch Router, while
intuitve constraint monitoring provides real-tme feedback for correct-by-
constructon methodology. Advanced routng algorithms
enable design rules and advanced design constraints
using Constraint Manager to be applied between
objects or groups of objects such as components, layers, nets, and vias.
AutoActve technology simplifes routng operatons to allow you to
complete your layout quickly for those aggressive tme-to-market
schedules.
Introducton
13
Lesson 1: The Xpediton Start Pages
The Start Page contains links to tutorial informaton, videos,
online help features, and this Evaluaton Guide. These items can help you
become productve quickly. It is available in both Xpediton xDX Designer and
Xpediton xPCB Layout.
Introducton
The Start Page appears when you open Xpediton by either clicking
on the Xpediton xDX Designer or Xpediton xPCB Layout icon located
on the desktop, or by selectng them from the Start > All Programs >
Mentor Graphics SDD EEVX.1 (32 or 64-bit) > Design Entry or Layout
menus.
NOTE: Review the content for New Project or PCB or Open item at
this tme. If you select either of these items you can click Cancel to
return to the Start Page.
Explore the resources available to you on the Start Page:
Take tme to become familiar with the Getng Started, Help, and News
sectons. These contain links to additonal product documentaton
on SupportNet and InfoHub, including this Evaluaton Guide and the
Xpediton user manuals.
Click New Project > Xpediton or New PCB to start a new design.
Go to the Recent secton to quickly access designs you have worked on
previously.
If you do not wish to see the Start Page, you can toggle it of in
Xpediton xDX Designer by selectng View > Start Page.
In Xpediton xPCB Layout to keep the Start Page from appearing when
the program opens, disable View > Show Start Page at Startup.
Close Xpediton xDX Designer and/or Xpediton xPCB Layout if stll
open.
14
End of secton. This page intentonally lef blank.
Introducton
15
In this secton:
Design Capture with
Xpediton xDX Designer
Installaton and Setup
Xpediton xDX Designer Environment and Workspace
Setng up a New Project
Creatng a New Schematc
Placing Parts
Wiring the Schematc
Creatng Rules and Constraints with Constraint Manager
Variant Manager
Xpediton xDX Designer Integraton with HyperLynx LineSim
Generatng the BOM (Bill of Materials)
Xpediton xDX Designer Packager and Xpediton xPCB Layout Project
Integraton
16
About This Evaluaton
This Evaluaton Guide is intended to be used with Xpediton sofware which
is installed separately.
This Evaluaton Guide and the accompanying lesson fles allow a user who
has limited experience with the Xpediton workfows to review new features
and capabilites. Keep in mind this presentaton is a snapshot of the full
range of features that Xpediton provides.
Note: The Xpediton Evaluaton install has placed all of the lesson fles used
in this guide into the C:\Xpediton_Evaluaton directory.
The content of the evaluaton material includes:
Evaluaton Guide PDF fle
(located in the C:\Xpediton_Evaluaton directory)
Schematc, Simulaton and PCB Lesson fles
(located in the C:\Xpediton_Evaluaton directory)
Personal Library
(located in the C:\Xpediton_Evaluaton\Library directory)
Datasheets
(located in the C:\Xpediton_Evaluaton\Library\Datasheets
directory)
Xpediton xDX Databook Database
(located in the
C:\Xpediton_Evaluaton\Library\DatabookData directory)

Lesson 2: Xpediton xDX Designer Workspace
In Xpediton, Xpediton xDX Designer is used for schematc design capture.
Xpediton xDX Designer follows Windows navigaton standards. It supports
pulldown menus, hot keys, toolbars, toolboxes and Tooltps. The menus are
context sensitve: when you right-click, the popup menu optons vary depending
on the object you select.
The interface is also fully customizable. Advanced Windows navigaton features
including Tear Of Menus, Dockable Windows, and Auto Hide Docking are also
available.
These standard windows features make Xpediton xDX Designer an easy and
productve environment for schematc generaton.
Start Xpediton xDX Designer
Double-click the Xpediton xDX Designer icon on your desktop to open
Xpediton xDX Designer to the Start Page.
Xpediton xDX Designer Workspace

17
Introducton to the User Interface (Main Editor Window)
Menus
Toolbars
Propertes
Footprint
Preview
Symbol
Viewer
Navigator
Pane
Status Bar
xDX Databook
Search Window
Workspace
Design Capture with Xpediton xDX Designer
18
Toolbars
The Main Toolbar
The View Toolbar
New Cut
Print Copy File
Viewer
Undo
Paste
Verify
Find Redo
Package Xpediton
xPCB
Layout
xDM Librarian
(Library Manager)
Route
Mode
xDX
Databook
Propertes
Selecton
Filter
Zoom
Out
Restore
Zoom
Zoom
In
Zoom
Area
Fit
Selected
Navigator
Output Fit All Push
eExp
View
My
Parts
Save
Zoom
Add
Propertes
Mode
ICT
Viewer
GRC
Push
ICT
Pop
Constraint
Manager
19
Toolbars (Contnued)
The Add Toolbar
The Transform Toolbar
Net Special
Components Select Circle Text
Arc
Bus Array Block Line Cut
Nets
Box
Mirror Stretch
Rotate
90
Align
Botom
Backup
Sheet
Align
Center
Align
Right
Grid
On/Of
Align
Lef
Flip Scale Disconnect
Add
Missing
Ports
Delete
Grid
Spacing
The Grid Toolbar
Align
Top
Align
Middle
Distribute
Horizontally
Dist.
Vertcally
Snap to
Grid
Manage
Sheet
Backups
Bring
Forward
Send
Backward
Bring to
Front
Send to
Back
Auto Alignments
On/Of
20
Extended Tooltps
All of the toolbar icons contain tooltps to help you understand the commands
you select. Xpediton xDX Designer also contains extended tooltp animaton
for most of the commands on the toolbars. These animatons provide you
with a brief video to minimize the learning curve and place immediate help
at your fngertps. Quick-key commands are also provided within the tooltps.
Displaying Extended Tooltps
Click Open on the Start Page and browse to and select
C:\Xpediton_Evaluaton\Lesson1\Lesson1.prj.
If a previous lesson was open, click Yes to close the previous
documents.
Hover over the Select icon. The normal tooltp is shown along with
the Quick-key command.
Hover over the Select icon again, but leave your cursor over
the icon for brief tme (about 3 seconds). The animaton for the
command begins playing and shows additonal informaton and
usage for the command.

21
Navigator Tree Pane
The Navigator Tree pane, like all Xpediton xDX Designer panes, is dockable
and can be moved anywhere you wish on the screen. Xpediton xDX Designer
remembers the height and width of any pane you modify during a working
session. This is partcularly benefcial in a dual monitor confguraton. This
pane shows a hierarchy of the schematc content and allows you to easily
jump between pages, symbols, and nets.
The Navigator Tree Pane
Open the Navigator Tree by selectng the toolbar icon if it is not
already open.
Double-click on CORPORATE schematc and notce the main
window displays the sheet CORPORATE.Cover (The sheet name is
shown on the tab at the top of the design window.).

Next, click the [+] icon located to the lef of the CORPORATE
schematc name to expand the schematc sheets.
Note: The tree should expand to look like this example.

22
The Navigator Tree Pane (contnued)
Double-click control_bufers to open the schematc sheet in the
editor workspace.
Note: Notce the schematc sheet tabs located at the top of the workspace
area display both Corporate.Cover and Corporate.control_bufers when you
hover over them.
Note: You can also click the [+] to expand any of the sheets in the Navigator
tree.
Two categories (Symbols and Nets) appear in the dialog box for each
schematc sheet.
Click the [+] again to expand the Symbols and Nets secton of the
Navigator tree.
Select any symbol in the list. Xpediton xDX Designer automatcally
Cross Probes to that item.
Note: Double-click on any symbol in the Navigator tree and it will zoom to
that symbol in the schematc.

23
Object Tooltps
Xpediton xDX Designer supports tooltps for Components and Nets. The
visible atributes are confgurable. Lets take a closer look.
Open Project Setngs by selectng Setup > Setngs or press the
CTRL+ALT+G hotkey.
Click Display and notce the optons for controlling various display
setngs including Show Tooltps. Enable Components and Nets.
Click OK.
Double-click the schematc sheet name PCI_Connecton to open
this sheet of the schematc.
Click Selecton Filter and enable All.
Click in the schematc workspace and place your cursor over any
component to see the ToolTip.
Place your cursor over any net to view the netname tooltp.
Note: This is a very convenient way to get informaton without having to
zoom in or invoke the Propertes dialog to view and identfy an object on
the schematc.

24
Navigaton (Pan and Zoom)
Zooming
Click on any open area in the workspace.
Press the F7 (Zoom In) and F8 (Zoom Out) functon keys to zoom.
Zoom in and out for practce. You can also use the diferent Zoom
icons on the View Toolbar.
Another method for Zooming In and Out is to use the Middle Mouse
Scroll Wheel if you have one.
To Pan within the workspace, click and drag the Middle Mouse Scroll
Wheel.
Press the Home key (Zoom to Full) to restore the view to the entre
actve schematc sheet, or use the Fit All icon.
Press F9 , then drag a box around the area you wish to zoom to.
You can also Zoom To an area by pressing the Z key and dragging a
box around the area.
Use the Save Zoom and Restore Zoom icons when you want to be
able to go back to a previous locaton on the schematc.

25
Additonal Navigaton Tools
Sheet Thumbnails
Navigaton through a large schematc database is made easier with Sheet
Thumbnails. The small views of your schematc can help you easily fnd
the sheet you want to work on.
Select View > Thumbnails to open the thumbnails panel showing
the sheet you are current working in.
Double-click the CORPORATE.microprocessor sheet thumbnail
and the sheet opens in a new tab.
To make the workspace area larger, you can Auto-hide the
Thumbnails panel by clicking the thumb tack icon.
Note: You can use Auto-hide on any of the panels within Xpediton xDX
Designer.

26
Navigaton View
This world view of your currently actve schematc sheet allows you to
easily zoom into areas for quick navigaton.
Select View > Other Windows > Navigaton View and the global
view window opens for you currently actve sheet.
The Navigaton View window can be easily re-sized by dragging the
window edges.
Drag the slider up on the right side of the window to make the
actve zoom area smaller. Notce your main window zooms into the
area shown by the zoom window.
To change your zoom locaton, drag the zoom window within the
Navigaton View to a new area of the schematc sheet.
Links
Links are Annotate symbols that allow you to quickly traverse to a
corresponding link symbol on another sheet of the schematc. Connectvity
can also be linked through To/From Of-sheet link symbols.
Close or Auto-hide the Navigaton view.
Hover your cursor over the blue arrow labeled micro.
While pressing the Alt key, select the link and you immediately jump
to the matching link symbol on the Cover sheet of the schematc.

27
Help System
Click Help to access documentaton, support, SupportNet and tps. Take
a moment to view the resources available from this menu.
View all available shortcuts and system strokes by selectng Help >
Show Strokes.
Additonal informaton is available on using Strokes can be found in
Help > Documentaton in InfoHub.
Note: You can also confgure Navigatonal controls in
Setup > Setngs > Schematc Editor > Strokes, Pan and Zoom.

28
The Find Functon
You can move through a design by cross-probing the design hierarchy in the
Navigator. You can also use the Find functon.
Using the Find Functon
Select Edit > Find/Replace or click the Find/Replace icon.
Click the More buton to open all optons.
Take tme to read through the available optons.
Choose an opton from the Within: drop-down list to defne which
part of the design you would like to search. In this case select
Board: CORPORATE (CORPORATE).
Type C2 in the Find what: text box and click Find All.
Note: The results of the search appear in the Find dialog.
Note: When you search, the results will also show in the Output window.
See item # 7 below.
Notce that several sheets are now open. Each page containing a
reference to C2 has been opened.
In the Output window, select the (component) hyperlink to quickly
jump to the capacitor with reference designator instance value of C2.

29
Using the Find Functon (contnued)
Notce the secton of the schematc where C2 resides.
In the Find and Replace dialog search for 698k within the Corporate
Schematc.
All parts meetng this criterion are listed in the output window. You can
also use this method to fnd nets.
Close all of the schematc pages using the X on the Tab to close each
sheet.
Note: You can use Window > Close All to close all of the sheets currently open
in your schematc.
Enter the net name BSYNC* (make sure to include the * wildcard
character) in the Find and Replace dialog box to search within the
Corporate schematc for all instances where BSYNC is defned.
Click Find All to search the entre schematc.
There are four instances of BSYNC- and four instances of BSYNC+ nets
across three schematc sheets.
Note: When you select a net, the appropriate schematc sheet is opened
and that porton of the net is selected. This functonality allows you to check
connectvity throughout your design very efciently.
Select File> Close Project when you are fnished to close the current
project.

30
Review Questons
1 What is the purpose of the Navigator?
2 What informaton can I get from the tooltps?
3 How many diferent ways are there to zoom in and out?
4 When would I use the Find functon instead of the Navigator?
Review Answers
1 The Navigator presents you with a central viewport into your design. All components,
nets, classes, pin pairs and other design elements are available for browsing and
querying from this common window.
2 Tooltps provide a quick and easy way to examine the propertes of design objects
(components and nets). Depending on how you have set up the visibility of propertes,
you can view informaton about these objects by simply holding the cursor over the
item for a few seconds.
3 The Xpediton xDX Designer user interface provides multple ways to perform most
common design tasks. You can zoom in and out using the keyboard keys (F7 and F8),
press F9 and drag a zoom window, press the z key and drag a zoom window, use the
mouse scroll wheel forward and backward to zoom in and out, or use strokes.
4 Though the Navigator gives you the opportunity to browse the major elements of
your design, use the Find command to build complex searches and quickly fnd very
specifc details such as all instances of a specifc component value.
31
Lesson 3: Setng Up a New Project
Project Overview
A project fle (.prj) contains pointers to all of the fles associated with
Xpediton projects. Some of these fles include the Schematc database,
PCB layout database, confguraton fles, and log fles.
The project database is stored in binary format in the /database directory.
This Integrated Common Database (iCDB) structure provides a single data
repository for a project and a framework for dynamic updates. The iCDB,
contnuously maintains connectvity, schematc and graphics objects, and
constraint data throughout the fow. This reduces both design tme and the
risk of error inherent in creatng and passing netlists between tools. When
using Xpediton xDX Designer, you never have to stop and remember to save
your work. Everything you do is always being stored. If you want to return to
a previous state, you can use Undo to remove your edits. Everything you do
between backups will be stored in the Undo queue.
In additon, you can create Backup points to rollback your design. You may
choose File > Backup Sheet at anytme to create a backup of the actve sheet.
The Rollback Sheet functon in Xpediton xDX Designer allows you to bring the
schematc sheet back to the last Backup version. Upon invoking Xpediton xDX
Designer, the Backup Sheet functon is grayed out and the Rollback Sheet list
is empty. When you open a schematc, the Backup Sheet functon is enabled.
The Rollback Sheet list is stll grayed out untl additonal changes are performed
on the schematc. When you make changes following a backup then the File >
Rollback Sheet menu becomes actve and lists the sheet backup tmestamps. You
can use this menu to return the actve sheet to the backup state. You can also
use File > Clear Backups to clear out all backups in the database. This is helpful
to compact your project fle size. The tool also creates incremental automatc
backups for you using Setup > Setngs > Project Backup.
Project Directory Structure
Integrated Common Database (iCDB)

iCDB
Setng Up a New Project
32
Xpediton xDX Designer Project Templates
In this lesson you will create a new Xpediton xDX Designer project by selectng a
template from the Start Page. Project Templates are a good method to keep your
company's designs consistent from engineer to engineer. You can create multple
templates as needed for your design requirements.
In this secton, you will modify the standard project template for the Central
Library and Component Propertes Database. Any new project started with this
template will use this informaton.
Important - These steps must be performed to complete the entre lesson.
Using Windows Explorer, browse to:
C:\MentorGraphics\12.0.0SDD\SDD_HOME\standard\templates
\dxdesigner\expediton.
Open the fle default.prj in a text editor of your choice like Notepad.
Edit the KEY CentralLibrary line to the new Central Library path as
shown:
KEY CentralLibrary "C:\Xpediton_Evaluaton\Library\
Library.lmc"
Add the KEY DBCFile line to the new Propertes File path as shown:
KEY DBCFile "C:\Xpediton_Evaluaton\Library\DatabookData\
Sample.dbc"
Review the project template fle for other items you may want to
setup for future designs. Do not make any further changes at this tme.
Save the fle edits and close your text editor.
33

Creatng a Project
If it is not already running, start Xpediton xDX Designer.
Select File > Close Project to close any open project.
On the Start Page click New Project > Xpediton.
Select the default template from available templates.
Enter the name of your project in the Name box of Details.
Note: For this exercise enter your (frst name) and (last name) for your
project name (for example, JohnSmith).
Enter the project Locaton as C:\Xpediton_Evaluaton.
Notce the Central Library Path is set through the default template (or
you can browse to the path to link it to this template).
Click Create to create the project.
Your newly created project now appears in the Project Navigator Tree.
34
Opening a Project
There are many ways to open a project. We will learn two ways here:
Note: When you open the project for the frst tme you may see this message "This
project was created on an earlier version of DxDesigner (see sample message to the
right). If this message appears, simply select the Yes buton to update and contnue.
Using the .prj File Method
Close Xpediton xDX Designer by selectng File > Exit.
Open Microsof Windows Explorer.
Browse to C:\Xpediton_Evaluaton\FirstLast directory.
Double-click on the FirstLast.prj.
Note: This launches Xpediton xDX Designer and opens the FirstLast project. If
you get an error, double-click the icon rather than the fle name. If you stll get
an error open Xpediton xDX Designer and move to the next step.
Using the File Menu
From Xpediton xDX Designer, open a project using the menu File >
Open > Project.
Browse to the C:\Xpediton_Evaluaton\FirstLast\ locaton.
Select FirstLast.prj fle and click Open.
Using the Start Page

If your project is listed in the Recent projects, then click your project
name to open.
If not listed, click Open, then browse to
C:\Xpediton_Evaluaton\FirstLast\ and double-click FirstLast.prj.

35
Project Setngs
Afer you create a project, you may need to change the project setngs.
Throughout this evaluaton, we will ask you to adjust setngs using the
Setup > Setngs dialog box. You can use this dialog box at any tme to
customize your environment to your preferences.
You may need to change the library path for a new design. If you have other
libraries (perhaps used for previous designs) you can easily change the library
path to use them in a new design. You can also point to a path containing a
central library used by multple users from a single library locaton.
Changing Libraries with Setup > Setngs
To open the Setngs dialog box, select Setup > Setngs.
Select the Project secton of the hierarchy.
To change the Central Library Path, click on the Browse buton and
select a new .lmc fle from the locaton you choose. At this tme, we
will contnue to use the path listed.
Note: Only one Central Library Path and Library.lmc fle can be referenced by
a design project at any given tme.
Take a moment to browse the other sectons of the Setngs dialog
box to see the other setngs you can change in your design projects.
Click Cancel to exit the dialog and leave the setngs unchanged.

36
Creatng a New Schematc
Xpediton xDX Designer is a comprehensive schematc entry tool which combines
a feature-rich environment with an easy-to-use GUI. Xpediton xDX Designer is
simple to navigate whether you are adding parts, nets, buses, graphics or text.
An Xpediton xDX Designer project can contain multple schematcs within a
single project.
Creatng a New Design
Your Project fle FirstLast.prj should stll be open and you have a blank
sheet in Schematc1.
A border has been added automatcally based on setngs in
Setup >Setngs > Project > Borders and Zones and Setup > Setngs >
Schematc Editor > New Sheets. These border mappings should be
saved in the borders.ini fle within your template project directory so
that you dont have to change this when startng a new schematc.

37
Adding and Placing a Border
Adding borders to a schematc can be done several ways. The process can be
automatc or manual. You can change borders at any tme to refect a sheet size
modifcaton. We will cover a few ways to add borders in some of the exercises
that follow.
Adding or Changing a Border
Right-click and select Delete Border to delete the currently placed
border.
Change the sheet size to a B size sheet, and double-click inside the
schematc sheet area. Select B from the Drawing Size drop-down list in
the Propertes window.
Add a border manually by placing the cursor in the working area,
right-click and select Insert Border.
Note: When you add a border in this way, you use a border symbol defned in
Setup > Setngs > Project > Borders and Zones.
Right-click and select Change Border. Select csheet.1 from the Borders
partton.
Change the sheet size to a C size using the Drawing Size dropdown list in
the Propertes window. Click OK to change border sheet setngs.
Click the Fit All icon to Zoom Out and change the view so it centers on
the format.

38
Review Questons
1 Where are my design fles stored?
2 Where are Project Templates stored?
3 What is the quickest way to open a project?
4 Where are the setngs changes in Setup > Setngs dialog box stored?
5 Can I change the size of a border afer I have started creatng my schematc?
Review Answers
1 Xpediton xDX Designer stores your design fles in the project directory tree under
the name of your project. Project specifc setngs are saved in the project (.prj) fle in
your project directory.
2 There are project templates included with Xpediton. They are located at
[Drive]:\MentorGraphics\12.0.0SDD\SDD_HOME\standard\templates\dxdesigner.
You can also create your own templates and save them in your writable or corporate
WDIR directory.
3 To quickly open a design, browse to the .prj fle and double click it. This will launch
Xpediton xDX Designer and open the design fle.
4 The changes made in Setup > Setngs are stored in multple system fles, some
within the project directory, and some within the writable WDIR directory path. Most
of the changes are saved in the Project (.prj) fle or the Xpediton xDX Designer.xml
fle.
5 Sometmes it is difcult to predict in advance just how much room your design might
consume on a sheet (or sheets). You can start a design with a specifc border size. Any
tme during the design process you can change the border to a size that more closely
fts the design requirement.
39
Xpediton xDX Databook is a component informaton system that ofers the
advantage of a centralized component database system. The Xpediton xDX
Databook utlity allows you to manage library data more efciently than ever
before. It increases efciency by decreasing the number of symbols required to
support the parts in your design environment. Xpediton xDX Databook connects
to any ODBC compliant database and makes the necessary content available to
aid in the part selecton process.
Lesson 4: Selectng and Verifying Parts with Xpediton xDX Databook
Search Window and CL View
There are two ways of looking at library data using Xpediton xDX Databook
searching and browsing. The Search tab provides access to all of the part database
propertes through Parametric queries. This is the window you typically use to
place most of the parts on the schematc. The CL View tab is used for browsing
the library database by part number or symbol. This view is typically used for
placement of Local symbols and Hierarchal symbols. Parts placed from CL View
must be verifed in Xpediton xDX Databook to update additonal propertes from
the parametric database prior to schematc release.
When a part is added to the schematc, the Xpediton xDX Databook property
data is also added so the part is complete when it is released onto the schematc.
Xpediton xDX Databook also provides component verifcaton checks to ensure
the property data contained on the symbol in the schematc matches the content
contained within the data source. This prevents incomplete or inaccurate data
from being passed into the PCB design phase.
Confguring Xpediton xDX Databook
The Evaluaton Guide and databases include a pre-confgured version of
Xpediton xDX Databook. If you wish to learn more about confguring Xpediton
xDX Databook and the ODBC Data source, please see the lessons in the Appendix
for Confguring Xpediton xDX Databook and ODBC Setup.
Selectng and Verifying Parts with Xpediton xDX Databook
40
Opening Xpediton xDX Databook
If your project is not currently open, select File > Open > Project and
select C:\Xpediton_Evaluaton\FirstLast\FirstLast.prj.
In the Navigator Pane, double-click on Board1 to the frst sheet of the
schematc.
Note: As you create additonal schematc sheets, they will appear in the
Navigator hierarchy.
Click the Xpediton xDX Databook icon to open the Xpediton xDX
Databook window. The window opens with the default Search window.
Note: Xpediton xDX Databook is linked to the Evaluaton Sample.dbc database
as shown in the Confguraton informaton line.
To allow for more screen area, close or Auto Hide the Output message
window, if it is open.

41
Libraries with Xpediton xDX Databook
The Library dropdown list contains all available
libraries as described in the database source. The available
libraries are defned as Tables directly in a Microsof Access
database.
Choose IC from the Library pulldown.
The system now searches the Access database and lists all the
components in the IC library.
Drag the scroll bar located at the botom of the
Xpediton xDX Databook window to the lef.
You should see a column labeled Datasheet. These are links to
Datasheets that describe more about the parts listed in Xpediton xDX
Databook. You can also resize the column as needed.
Click one of the datasheet links.
The Datasheet opens and displays the PDF content.
Note: If you did not install the pediton PE Evaluaton in the default locaton
under C:\Xpediton_Evaluaton, then these links will not work.
This Step is not required and is provided for your review.
Note: You can confgure any feld as an actve link. For example, you can
open a simulaton model from the schematc. To modify the confguraton,
right-click in Xpediton xDX Databook > Confgure> Edit Confguraton. Then
select the desired library and fnd the Property Name you want to turn into an
actve link. Double-click the icon cell untl the icon is the same as shown for the
Datasheet feld.
If you opened the confguraton (see note at right) click Cancel.

42
Building a Component Query
From the Library dropdown list, select the Resistor library.
Click Query Builder to start setng the query criteria.
Click Conditon in the Query Builder dialog box.
Choose the optons from the dropdown lists in each setng to match
the example shown. (VALUE, =, 10K). Click Add to set the criteria.
This applies the search criteria.
Click OK to actvate the search based on the criteria.
The resultng data found 19 matches based on the value equaling 10K.
Component Selecton with Xpediton xDX Databook
Many schematc capture programs require a unique symbol for every part
number. This can be very tme consuming and error prone, and may also
require creaton of hundreds of extra schematc symbols. With Xpediton xDX
Databook, the same symbol can be used for thousands of parts, and those parts
can be easily located using queries.

43
Narrowing the Search
Although this is a simple example of how the Query Builder can be used, it
shows you how very advanced queries can be built and added to in order to
narrow your search through possibly thousands of components within your
library.
Now narrow the search further to Resistors with 10K Values and
CC1206 Cell Name. Select the Query Builder again, select the AND
buton, select the Conditon buton, set the 1st feld to Cell Name, set
the 2nd to =, set the 3rd to CC1206 then click Add.
Click OK to apply the additonal search based on the new criteria.
Notce the quantty of available parts is signifcantly reduced according
to the search criteria. There are now 6 Matches.

44
Narrowing the Search, an Alternate Method
Select the Query Builder again and click Back twice to remove the
additonal query for the Cell Name, then click OK to reset the search to
the previous query.
In the Top Line of the Xpediton xDX Databook search window, in the
Cell Name column, select the = box, and note the functons available.
Choose = from the dropdown list.
Click the box to the right of the = Box in the Cell Name column and
select the CC1206 Cell Name from the dropdown list and press Enter.
Notce the quantty of available parts has been reduced as with the
previous query.

45
Search and Place
Now lets search for a part with a value of 10K, Cell Name of CC1206
and a Cost of less than 0.04 (cents).
Click Query Builder once more, click AND, then click Conditon, set the
1st feld to Cost, set the 2nd feld to <, set the 3rd feld to 0.04.
Note: You can use the Alternate Query method if you choose.
Click Add to include the additonal search criteria.
Click OK to apply the new search requirements.
You can also click the column headers to sort the results in ascending
or descending order. In this case, we have already fltered to only four
results but we could have used fewer flters and then sorted the value
column to fnd the desired part.
Select the Part 103-RES. Notce the entre line is highlighted and both
the symbol and cell can be viewed for the part by selectng the
dropdown list in the Preview window.
Click and drag that symbol onto the schematc and release your mouse
buton where you want to place the resistor. You can also drag the
symbol directly from the Symbol Preview window into the schematc
or click Add New Component with All Propertes.

46
Enabling the pediton Cell Preview Pane
Click pediton Cell Preview or select View > Other Windows >
Expediton Cell Preview.
Note: If you dont see this buton then you may need to enable the
toolbar in View > Toolbars > Addins.
Select the symbol you placed in the schematc or any part in the
Xpediton xDX Databook search window.
The PCB cell appears in the Expediton Cell Preview Window.
Close the Expediton Cell Preview window by clicking the X.
Xpediton Cell Preview
The Xpediton Layout Cell Preview pane allows you to graphically verify
that the correct Cell (Land Patern) will be used in Layout. The preview
window updates when a symbol is selected on a schematc or within the
Xpediton xDX Databook search window.

47
View and Edit Propertes
Click the Propertes icon to open the Propertes window if it is not
already open. All the propertes are on the symbol. These propertes
were added to the generic symbol by Xpediton xDX Databook, using data
from the Access database when the part was added to the schematc. By
using this method, you do not have to worry about making manual errors
when adding the propertes.
While in the Propertes window, change the Value property feld from
10K to 100K by entering the new value in the Value column.
Note: We made a unique change to a part so the part number no longer matches
the defned power ratng. This conditon could lead to a very expensive problem
due to the way parts are ordered through a companys purchasing department. Part
numbers that do not match corresponding propertes generally lead to overstocks
and delays in schedule. Both are costly to correct and can be avoided if a Xpediton
xDX Databook confguraton is in place. Lets look at how Xpediton xDX Databook
can fnd these inconsistencies and resolve them quickly.
With Xpediton xDX Databook stll actve and listng available resistors, select
and drag another schematc symbol onto the schematc sheet. There should
now be two new displayed symbols. (Follow the instructons in Step 7 in the
previous topic: Search and Place).
Change the Library: setng from Resistor to Capacitor.
Now assume you need a decoupling capacitor but have not decided on
the decoupling capacitor value to use. Select any available capacitor
listed in the Xpediton xDX Databook pane, then click Add New Component
with only Common Propertes to add a generic component to the schematc.
Note: You will receive a Warning that the Component does not have a Part Number.
You will fx this later.
With the new part actve on your cursor, move both the cursor and the
symbol over the working area and click to complete the part placement.
Note: If you look at the Propertes Editor, you will notce the capacitor has no Value
property, not to menton many other missing propertes. pre_rebrand_VLA can run
a complete verifcaton to ensure all parts are compliant with the database.

48
Verifcaton in Xpediton xDX Databook
Xpediton xDX Databook can run verifcaton on a group of selected items, a
single page, or an entre design. The functonality is similar but for this exercise
you will verify the parts we just placed.
Verifcaton
Click the Selecton Filter icon located on the toolbar. Enable only the
Symbol check box.
Click and drag a selecton box or CTRL + Lef-click to select the three
symbols we just added via Xpediton xDX Databook.
Click New Live Verifcaton Window in the Xpediton xDX Databook
dialog box.
Note: You can also use this buton for verifying an entre page if no items are
selected when it is actvated.
If you needed to run Verifcaton on an entre design schematc, you
would click New Hierarchical Verifcaton Window, located directly
below the New Live Verifcaton Window buton.
A new Verify window opens showing the three parts color-coded. If we
click on any of the parts, that part is highlighted in the schematc.
(Yellow) Indicates a component has multple matches. This is the
generic part we added with Common Propertes.
(Green) Indicates the propertes on the schematc match the database.
(Red) Indicates that there is a confict between the database and the
schematc and no parts match. This is the part where we changed the
Value so it no longer matches the Part Number.

49
Verifcaton (Contnued)
Fix the problem with the capacitor which is not correctly specifed.
Double-click on the Yellow Circle.
A search window opens with the common propertes automatcally
applied as flters.
Select any part listed in the Xpediton xDX Databook dialog.
Click Annotate Component with All Propertes to add the correct part
informaton.
Notce the circle changes from yellow to green and the Propertes
Editor now shows the capacitor as a completely defned symbol/part.

50
Verifcaton (contnued)
Now we will correct the part with the problem we created when we changed
the Value to 100K.
Correctng a Database Confict
Double-click on the part that contains the last remaining red circle.
Scroll through the window that appears and notce the propertes in
red. Notce the Value is in red because it does not match the database.
Scroll over the Value property name, right-click and choose Remove
Conditon.
The system searches the database and fnds the part that matches the
previously defned conditons. Notce that the verify routne has locked
onto a single part.
Click on the new part number.
Click the Annotate Component with All Propertes icon to change to
the new part.
We have now corrected the problem of the propertes and the part
number not being equal.
The Propertes window now shows that the resistor has all the
propertes of the part you selected.
Select File > Close Project.

51
Review Questons
1 What is the advantage of using Xpediton xDX Databook?
2 Will Xpediton xDX Databook work with my existng component database?
3 How complex can I make my search parameters?
4 Why use Verifcaton in Xpediton xDX Databook?
Review Answers
1 Sortng through a library of a couple of hundred parts might be tedious, but not impossible. Doing
the same for a library (or libraries) of thousands of parts would be extremely tme-consuming
and difcult to manage. Fortunately, Xpediton xDX Databook provides the ability to perform very
complex fltering and searches on large databases of components and presents you with a selecton
of candidate parts.
2 Xpediton xDX Databook will work with most ODBC-compliant databases allowing you to access
the wealth of purchasing and engineering data that may already exist within your company. This
connectvity also extends the capability to populate the propertes of components in your design
directly from the informaton in your company database(s).
3 Xpediton xDX Databook allows you to build very complex searches so that you can quickly narrow
a search of thousands of components down to a select few for consideraton in your design. These
searches are cumulatve, so you can start out with a broad range of parameters and then add
additonal qualifers untl you have found the desired part.
4 When creatng a schematc with a large number of symbols, you may need to edit values and
propertes as the design evolves. These changes can sometmes elude updatng untl later
in the design process. Verifcaton allows you to periodically compare your design database
against your component database to resolve any changes or conficts.
52
Lesson 5: Placing Symbols in the Schematc
You have learned that Xpediton xDX Designer, through the use of Xpediton xDX
Databook, can make schematc component placement very easy. Xpediton xDX
Designer also has several useful tools to help speed up your placement of the entre
schematc.
Note: In the following exercises, you will construct the schematc shown below.
Placing Symbols for a New Circuit
Open C:\Xpediton_Evaluaton\Lesson1\Lesson1.prj and then select
File > New > Schematc, or click New and choose Schematc.
Note: The new schematc sheet you created is located in the Blocks secton of
the design. This is because the Project already has a base schematc within it.
Right-click the Schematc sheet name (Schematc1) in the Navigator and
rename it to Logic_FirstLast (for example, Logic_JohnSmith).
Placing Symbols in the Schematc

53
Placing Parts Into the Schematc (Manually)
In the Xpediton xDX Databook window, click the CL View tab, then click
the Symbol View tab, and enter the symbol flter RES. Only symbols
startng with RES are shown.
Select resistor from the library Sample.
In the Symbol Viewer, place the cursor over the resistor. 1 shape, then
click and drag the symbol into the schematc working area.
Add a second symbol by selectng Clear Filters and then enter capn in the
Symbol Filter text box.
Xpediton xDX Databook lists CAPNONPOL.
Select CAPNONPOL from the library Sample.
Place the cursor over the symbol, then click and drag the shape into the
working area.
Take note that when you place symbols from the CL or Search windows of
Xpediton xDX Databook, the preview of the symbol is available.
Placing Parts
Previously we placed parts in a schematc using the Xpediton xDX Databook
search window. For these next few lessons we will use the CL Symbol view to
place parts. CL View allows you to place generic parts quickly, but you will need
to update the Propertes within them using Xpediton xDX Databook Verifcaton
prior to integratng your schematc with PCB layout.

54
Placing Parts into the Schematc (contnued)
Click Clear Filters and then expand the library Sample by selectng the
[+] item.
Find and place 145421 using the same method described in step 4.
Placing Parts from Xpediton xDX Databook with Alternate
Cell Selecton
Open the Search window in Xpediton xDX Databook by clicking New
Search Window.
Select the Library IC, and fnd the symbol 74192 using the top line
query method in the Symbol column. Select the Part 511-5V_IC.
Note: There are two cells listed in the Symbol Preview dropdown list: the
Default SO16, and the Alternate DIP16. Clicking each of them shows a
preview of the Cell.
From the dropdown list, select DIP16 and check the Fixed box.
Place the component on the schematc by clicking Add New
Component with All Propertes.
Note: The component has been placed to use the Alternate Cell during
PCB layout. Checking the Fixed box tells the designer that the Cell Name
property is fxed for primary placement.
Right-click to stop placement of further symbols. You should now
have 4 symbols on your schematc.

55
Adding Power and Ground Connectons
Open the Setngs dialog selectng Setup > Setngs.
Navigate to Project > Special Components. Then, select Power from
the dropdown list and verify that the pwr.1 symbol is available from the
Globals library. (If available, go to Step 4.)
If not, click New. A new dialog box opens which allows you to browse
the libraries for a power symbol. Select the pwr.1 symbol from the
Globals library. Click OK.
Follow the same process as described in step 2, but this tme select
Ground in the Special Components dialog box. If the symbol gnd.1 is
available from the Globals library, go to Step 5. If not, click New and
select gnd.1 from the Globals library, then select OK.
Note: Project > Boards > Special Components can contain as many Global Power and
Ground symbols as you need in your designs. It also contains Ports for hierarchical
designs and Of Page Links for cross referencing.
Select OK to exit the Setngs dialog.
The Power and Ground symbols are now available for placement using the
Special Components or My Parts command icons on the Xpediton xDX
Designer toolbars. When you place these symbols, they default based on
your setngs from steps 3 and 4.

56

Placing Symbols using the My Parts toolbox
Placing symbols using the My Parts dialog can enhance your productvity by
allowing placement of commonly used symbols, along with Favorites and
Recently Used symbols without having to re-defne searches using Xpediton
xDX Databook.
Select View > My Parts to open the toolbox.
Click the Special Components secton of My Parts, then select and drag
the gnd.1 symbol onto the schematc as shown.
Repeat step 2 and place the pwr.1 on the schematc.
Click the Recently Used secton of My Parts, then place one more of
each gnd.1 and pwr.1 symbols on the schematc. This is an easy method
to utlize symbols already placed within your schematc.
Click on the Favorites secton of My Parts, then from the Symbol
Preview window of Xpediton xDX Databook drag the 74192 symbol to
the secton. Any parts that you will use ofen in the schematc can be
placed here so that you do not to search for them again.
Right-click the 74192 symbol in the Favorites secton and click Delete
item to remove it from the secton.
Close the My Parts toolbox.
57
Copying Symbols
You are going to need two resistors in this schematc example. Press and
hold the CTRL key, then click to select and drag away from the frst resistor.
As you drag your mouse, a copy of the resistor ataches to your cursor and
is ready for placement.
Make sure there is plenty of room next to the capacitor for 2 copies. If not,
move it by selectng the part and dragging to a new locaton.
Using the previous method (CTRL + Lef-click and drag) add two more
capacitors.
Click and draw a selecton box around the second GND symbol.
Note: Hold the ALT key while drawing your selecton box and only objects
completely within the box will be selected.
Press the CTRL + C keys to create a new copy and place it into the clipboard.
Press the CTRL + V keys and a ghost image of the copied symbol is atached
to your cursor.
Click to place the new GND symbol to the right of the other two.
Note: Right-click to remove the part from your cursor once the new
part is placed.

58
Arrays
You can use the Array feature to add components and to add net labels.
You can also use it to add multple objects.
Using Arrays
Click on the capacitor to select it.
Click Array to begin the arraying process.
Fill in the dialog box as shown in the fgure: Rows = 3,
Columns = 1.
Click OK. The parts are automatcally added and as
you drag the cursor, you can expand the array untl the
parts are spaced as shown (3 rows and 1 column).

59
Rotatng Symbols
There are three ways to rotate objects within Xpediton xDX Designer. The
frst is to use the Rotate buton. The second way uses the F3 buton during
placement or move. The third way uses the optons from the popup menu.
Lets review a few examples.
Rotate a Symbol
Click one of the resistors to select it. Click Rotate 90 Degrees.
Note: The Rotate 90 Degrees buton is located on the Transform toolbar. If the
toolbar is not actve, go to View > Toolbars and select Transform.
Click and hold on one of the resistors, then drag the cursor.
Note: The symbol moves with the cursor.
While you move the part, press the F3 key and notce the part rotates.
Release the mouse to place the rotated resistor.
Right-click on one of the capacitors, then select Transform > Rotate
from the popup menu.
Note: The part rotates at the cursor.
Use the u hotkey combinaton to undo this rotaton.
Flip and Mirror a Symbol
Select the IC symbol on the right.
Click the Flip icon on the Transform toolbar. This fips the entre symbol
along the X-axis. Click Flip again to return the symbol to normal.
Select the same IC again, this tme click the Mirror icon. Notce the
Symbol now mirrors along the Y-axis. Click Mirror again to reset the
symbol to normal.

60
Moving Components using Dynamic Grid Alignment Markers
You will arrange the components similar to the picture shown. Xpediton
xDX Designer has Dynamic Alignment tools to make the task of arranging
components easier.
On the Grid toolbar enable Show Alignment Markers.
Select the frst capacitor symbol and drag it to the desired locaton.
Release the mouse to drop the symbol.
Select the second capacitor symbol and place as shown..
Select each of the remaining capacitor symbols and note the Dynamic
Alignment Markers showing that the symbols are aligned and at the
same spacing as the two symbols placed in steps 2 through 4.
Place the PWR symbols as shown and note the grid alignment markers
show when the symbols are aligned in both the X and Y axis.
Place the remaining symbols as shown using the grid alignment
markers.
Grid Alignment Markers can also be used to align text or other objects
Delete the two capacitors on the lower right by selectng them and
pressing the Delete key.
Note: Another way to do this is to right-click and select Delete from the menu
that appears.

61
Aligning Components using Align Commands
Using the CTRL + Lef-click, select the 2 resistors and ground symbol as
shown.
Click the Align Center icon on the Transform toolbar to line up these
symbols on their centers.
Note: You can Align components by; Lef, Center, Right, Top, Middle,
and Botom
Close the project.

62
Review Questons
1 Can I mirror a symbol such as a transistor or logic gate?
2 Am I limited to the PWR and GND symbols that are supplied in the libraries
with Xpediton xDX Designer?
3 When would I want to create an array of components?
4 Do Propertes rotate with a symbol?
Review Answers
1 You can easily mirror a symbol during placement by using the Mirror
icon on the Transform Toolbar, or right-click and select the Mirror
command from the popup menu.
2 Though the Xpediton xDX Designer libraries contain a selecton of PWR
and GND symbols, you are free to add any custom symbols to the library
that you require in your design.
3 Many designs contain groups of identcal components such as switches,
LEDs or decoupling capacitors. For example, some designers put all of
the decoupling capacitors for a design in a group arrangement on the
last page of the schematc. Using the Array command, you can place
large groupings of these components with a few mouse clicks.
4 Propertes do rotate with a symbol. However, you must be careful when
doing this if you want the visible propertes to maintain a specifc visual
relatonship to the component. In some cases, such as discrete
components (capacitors, resistors, diodes), it is preferable to create a
separate symbol for a horizontal orientaton and another for the
vertcal orientaton. This eliminates the need to make any fne tuning
adjustments to the visible propertes afer you place the symbols.
63
Lesson 6: Wiring the Schematc
Connectng the Components with Nets
There are several ways to add nets to components. This secton demonstrates
several.
Connectng by Abutment
Open C:\Xpediton_Evaluaton\Lesson1\Lesson1.prj, then in the Blocks
secton, double-click the schematc Logic_FirstLast. The sheet opens.
Zoom in on the ICs. To do this click Zoom Area and create a frame around
the two IC symbols, or zoom in using the Mouse Scroll Wheel.
Select one of the ICs and drag it such that the pins of the selected IC
touch those of the unselected IC and notce the Connectvity Advisor
which appears as a small asterisk (*) on each of the pins.
Release the part by releasing the lef mouse buton.
Select the part again and drag it away from the frst IC. The pins are
automatcally connected.
Creatng Nets Using Net Mode
Click Net (or enter n using the keyboard) to enter Add Net mode.
Add a connecton to Pin 4 of the IC. Select the pin and drag the
connecton to the lef. When the net is long enough release the lef
mouse buton to drop the connecton.
Repeat step 7 for pins 5, 9, and 6 on the IC located on the lef hand side.
Press ESC or click Select to exit net mode.
Wiring the Schematc

64 Wiring the Schematc

Creatng Nets using Mult-Net Connecton
You can automatcally connect multple pins based on your selecton order to
speed up connectng your schematc.
Select Add > Mult-net connecton.
On the lef IC, use frame select to select pins 14 and 19 in the order
shown. Start your frame selecton from the Top and to the Right of the
pins.
NOTE: The selecton order of the nets is numbered.
To add the connectons, frame select the upper pins on the two
capacitors in the order you want them to be connected. Note the
connecton ordering numbers.
Lef-click to complete the connectons.
Manually selectng Multple Pins
While stll in the Mult-net connecton command, select pin 7 on the
lef IC.
While pressing the CTRL key, also select pins 12 and 11. Note the
ordering.
Now select the connecton pins in the proper order as shown.
Lef-click to complete the connectons, and right-click to exit the
command.
65
Creatng Nets Outside of Net Mode
Right-click on pin 1 of the IC on the lef.
Move the cursor to the resistor located nearby.
Note: As you move the cursor, a net is added and follows the cursor locaton.
Right-click to add vertces to the connecton.
Lef-click to select the resistors upper pin to connect the net to it.
Mult-pin Component Inserton

You can also create connectons in your schematc by placing components on
pre-existng connecton lines. The connectons will automatcally split to make the
component connectons.
Select the capacitor as shown and move it over the connecton you added
in steps 1 through 3.
Wiring the Schematc

66
Wiring the Schematc

Mult-pin Component Inserton (contnued)
Release the lef mouse buton when the Connectvity Advisor shows
the connectons, and the capacitor splits the connecton and connects.
Create the connectons as shown on the schematc using any of the
methods you have learned. Move the components if needed, as you
have been shown in previous lessons. Do not worry about assigning
signal names at this point. You will do that next.
67 Wiring the Schematc

Cutng Net Connectons
You can easily cut net connectons in your schematc. If the connectons are already
named, one of the new connectons created will keep the net name and a new net
name will be assigned to the additonal net connecton.
Select Edit > Cut Nets.
Draw the secton to cut the nets between the two ICs.
Release the mouse buton to complete the net cutng.
Right-click to release the Cut Nets mode.
Click Undo to re-connect the nets.

68
Naming Nets and Placing Labels
Naming Nets
Double-click on the Net from pin 13 of the IC symbol on the lef side
(botom of device).
Note: If you have difculty selectng a net, set the Selecton Filter to
enable Net and Bus.
The Propertes window opens. Enter the name C/BE3.
Select the net name and drag it to the lef of the net.
NOTE: Be sure to only select the net name, not the net itself. You may need to
zoom in or adjust the Selecton Filter to enable Name.
Double-click on the net connecton from pin 21, then name this signal
C/BE2.
Click in an open area to release the signal name and the selected
connecton.
Now select the signal name again, and drag the signal name to its
desired locaton.
Wiring the Schematc

69
Adding Names Using the Navigator
In the schematc, select the net connected to pin 4 of the IC on the lef.
The corresponding net in the Navigator is highlighted.
In the Navigator, right-click Rename, then enter the desired name and
click Enter. Rename the net connected to pin 4 to ~CE. Using a ~ will
create an inverted pin name.
Another way to set pin inversion is to use True/False in the Propertes
window.
Adding Symbols with Named Net Stubs
You can also add nets when you place symbols in the schematc.
From the Xpediton xDX Databook Search window, open the Sample
library, IC Partton and fnd the 74192 symbol.
Before placing the symbol on the schematc, check Add Component
with Net Stubs and Add Pin Labels to Nets on the right side of the
Search window.
Click Add New Component with All Propertes icon and place the
component on the schematc.
Notce that all pins have net stubs and their names correspond to the
associated pins.
Delete this symbol and its connected net stubs from the schematc.
Wiring the Schematc

70
Setng Propertes for Parts
Property Visibility
Open the Property window by selectng the Propertes icon or by
double-clicking the desired object.
Select the IC on the right.
Note: The propertes for this component are displayed in the Property window.
To make a property type visible you can check the box next to the property.
Check the box next to Cell Name. Notce Cell Name is now shown below
the symbol.
To make only the value visible check the box next to DIP16 (fxed) and
uncheck the box next to Cell Name. Now only the value DIP16 (fxed) is
visible.
Wiring the Schematc

71
Adding New Propertes
To add a new property on the schematc, the property must be defned
in the Property Defniton Editor within Library Manager (Tools > Library
Manager, then Tools > Property Defniton Editor). This helps users
standardize on required propertes within the company and also prevents
typing mistakes.
Note: If any new Propertes are required in your designs, you must add them in
Library Manager frst. Afer making a change, you will have to run Tools > Update
Libraries or exit and re-invoke Xpediton xDX Designer before the propertes are
available for assignment.
Select the IC on the lef then and you will add some propertes.
In the Property window click in the blank cell at the botom of the list
and select Part Number from the list.
Enter 510_5V_IC for Value and turn of the visibility check boxes
for the Property and Value.
Contnue to enter the following property informaton:
Cell Name = SO24L
Datasheet = C:\Xpediton_Evaluaton\Library\Datasheets\
MC145421.PDF
Note: This last step links the part to a datasheet. A link can be made to
any type of document or website. The document can be launched
directly from the schematc.
Select the symbol and then right-click and choose
Open Hyperlink > Datasheet.
Note: This opens the appropriate datasheet in Adobe Acrobat.
In Adobe Acrobat, close the datasheet.

Wiring the Schematc

72
Change/Edit Propertes
Manually
Select the resistor on the botom lef.
Add or change the following propertes:
Part Number 107-RES
Cell Name CC1206
Value 5.1K
Tolerance 1%
Power 250mW
Using DxDataBook
Select the resistor on the top lef.
Right-click and select Load into DxDataBook.
In DxDatabook, select Part Number 101-RES.
Click Annotate Component with All Propertes and the propertes are
added to the resistor component.
Wiring the Schematc

73
Adding Propertes to Parts Simultaneously
Select one of the capacitors.
CTRL + click on each of the other two capacitors.
Note: All three of the capacitors are selected and their
propertes are listed in the Property Editor.
In the Propertes window click in the blank cell at the
botom of the list to add a new property.
In the Property feld select Part Number.
In the Value feld enter 12301-CAP.
Select Enter to complete the property assignment. Now
if you select each capacitor individually you will notce
they all have the same Part Number property.
Add the following propertes to all three capacitors
using the Manual or Xpediton xDX Databook method
you have already learned.
Cell Name CC1206
Value 10uF
Tolerance 5%
Voltage 16V
When you have fnished adding the propertes, review
the assignment on each individual part, then close the
schematc sheet.
TIP: In the last sectons you have learned how to
manually add and change Propertes on components,
but remember the IC you placed on the right? Notce
that we did not have to add or change any Propertes in
it because we used the Xpediton xDX Databook Search
window to place it. You can save tme in your designs by
placing all your components this way!
Wiring the Schematc

74
Working with the Bus Model
Creatng a Bus
Click New > Schematc to begin a new schematc.
The new schematc is now found in the Blocks secton on the Project
Navigator and it is called Schematc1.
In Xpediton xDX Databook, click Show CL View or the CL View tab.
Select the Symbol View tab.
Expand the Sample library using the [+]buton and highlight the
SymbolTest symbol .
Click Place Symbol to place the symbols on the schematc as shown.
Right-click to release the cursor from Placement mode.
Note: You could also enter SymbolTest into the search feld above the
results display area and let DxDatabook fnd any matches in the list of
libraries.
Zoom in to the lef side of the symbols.
Using the Bus buton, place a vertcal bus labeled A[15:0] to the lef
of the symbols.
Label the bus by assigning the A[15:0] value to the Name property for
the bus.
Wiring the Schematc

75
Connectng a Bus to Component Nets
There are two ways to connect these symbols to this bus. The frst method
connects the nets from the bus to the component.
Right-click (directly across from the pin 2 on the lef, below CLK) where
you want the frst net to connect and click Rip Nets.
Select the nets you want to use. In this example, we are going to use
A[15:8] from the Rip Nets dialog to connect to the top symbol.
Click OK to place the nets on the bus startng where you last clicked.
Use the CTRL+SHIFT+Mouse Scroll Wheel to spread the Bus Bits as
needed. When the net lines are in-line and touching the symbol pins, click
to connect them.
NOTE: Verify that the Grid is enabled (Grid On) .
When you release your mouse, the nets will be connected.
NOTE: The propertes are the ripped bit indicator. These indicate
which bit of the bus is atached to a partcular net.
Wiring the Schematc

76
Connectng Component Nets to a Bus
This is the second way to connect these symbols to this bus. This method
connects the nets from the component to the bus.
Select the bus nets you added in the previous steps.
Click Copy to place the nets in the clipboard.
Click Paste, then click near the lower IC and move the pasted nets to
the locaton as shown.
Note: The Connecton symbols (*) help to adjust the nets into place.
Use the Add Propertes Mode buton to invoke the Add Propertes
dialog box, and set the following.
Type = Net
Property = Name
Range = Enabled
Prefx = A
Value Dec= 7 and Delta = -1
This names all of the nets and allows you to use the cursor to drag
them to connect up to the bus.
Click Apply to place the Bus Bits.
Click on one of the nets to drag them towards the Bus. When the nets
are over the bus, release the lef mouse buton to connect them.
Close Add Propertes.
Wiring the Schematc

77
Review Questons
1 Do I need to connect every net at all points?
2 Why add names to nets?
3 Which propertes should I make visible in my designs?
4 When would I add propertes to parts simultaneously?
5 Why would I use a bus to represent connectvity of multple connectons?
Review Answers
1 As long as the schematc accurately represents the desired connectvity, it is not necessary to connect
every net to all points. Connectvity can be established by naming the nets, and as long as all net stubs are
identcally named, connectvity will exist.
2 In additon to establishing connectvity, net names also help identfy signals in very complex designs. Some
designers will name their nets with a conventon that represents the source and destnaton of the net (such
as FPGA_A\S3_A_MEM_A_ADDR0). This makes it easy to identfy the purpose and connectvity of a net just
by examining the name.
3 Which propertes you choose to make visible is primarily a decision based upon the intent of the
document. Most designers choose to have reference designators (Ref Designator) visible along with
component values, tolerances, watages and component names. This is a very individual decision and each
company may fnd it necessary to set their own standard. Xpediton xDX Designer allows you to set visibility
of propertes down to the individual component level.
4 If your design contains a quantty of identcal components, it may save a lot of tme if you select the
group of components (either in the workspace or through the Navigator) and then assign/change the
propertes for all of the components simultaneously. This helps to promote uniformity and contnuity across
the design. Remember to verify the components with Xpediton xDX Databook when you have fnished the
design.
5 You can accomplish connectvity by using individual nets to connect each point, or by naming each of
the nets. Showing all of the connectons on a schematc can make the schematc difcult to read and add
unnecessary visual cluter. An alternatve is to use a bus to represent a group of nets (such as an address or
data bus) that connect to a number of points (or sheets). This allows you to show the connectons at the
components but represent the group across the design with a single (wide) net line. The bus is identfed
with a label that shows all of the signals represented by the bus (such as ADDR_BUS_0:15).
Wiring the Schematc
78
Xpediton has a built-in constraint management system. The Constraint Manager
gives you the capabilites to create and manage constraint-based designs in a
synchronized front-end and back-end environment. Constraint Manager is a
spreadsheet interface common to both Xpediton xDX Designer and Xpediton
xPCB Layout linked through the iCDB database. This system allows you to
develop and maintain all of your design constraints between the schematc and
PCB layout. The constraint informaton can consist of clearance constraints,
placement and routng constraints, and high speed constraints.
You can also defne and manage advanced rules for diferental pairs, components
and net classes directly from Constraint Manager. When you select an object in
the schematc, you can cross probe directly with Constraint Manager to view
the constraints that are assigned. Constraints are synchronized between the
schematc and PCB layout during the Forward and Backward Annotaton process.
Lesson 7: Creatng Rules and Constraints with Constraint Manager
Entering Constraints
From the Start Page in Xpediton xDX Designer, click Recent, and select
Lesson1,
Double-click on Corporate to open the frst sheet of the schematc.
Select the [+] next to Corporate to see all the schematc sheets.
Double-click on the PCI_Connecton sheet to open the schematc
sheet.
To open the Constraint Manager Spreadsheet Editor, select the
Constraint Manager icon from the Main toolbar, then select Constraint
Manager.
Note: All Constraints within the spreadsheet editor are maintained within the
iCDB for both the Xpediton xDX Designer and Xpediton layout tools.

79
Introducton to the Constraint Manager Spreadsheet Interface
Menus
Toolbars
Navigator
Pane
Spreadsheet Workspace
Status Bar
Constraint
Tabs
Output
Window
80
Toolbars
The General Toolbar
The Filters Toolbar
Enable/Disable
Filters
Filter
Levels
Constraint Group
Filters List
Undo
Paste
Copy
Cut
Exit
Stackup
Editor
Cross
Probing
Redo
Setngs
81
The Views Toolbar The Topology Toolbar
Show/Hide
Navigator
Show/Hide
Output
Minimum Spanning
Tree Topology
Netline
Order
Custom
Topology
Chained
Topology
The Export Toolbar The Sort Toolbar
Export
Encrypted CSV
Sort
Descending
Sort
Ascending
The Tools Toolbar The Comment Toolbar
Delete
Comment
Insert
Comment
Next
Comment
Constraint
Template Editor
CES
Diagnostcs
Execute iCDB
Project Backup
Execute iCDB
Server Manager
The Clearances Toolbar The Pairs Toolbar
General
Clearances
Class-to-Class
Clearance Rules
Auto
Pin Pair
Remove
Dif Pair
Auto Assign
Dif Pair
Selected Nets
Dif Pair
The Find Toolbar
Find
Find Text Box
Find
Phrase
The Help Toolbar
Help Text Box
Find in
Manual
Online
Table of Contents
Edit
Comment
Previous
Comment
82
Opening Constraint Manager and Cross Probing
In Xpediton xDX Designer, select Setup > Setngs > Cross Probing and
set the optons as shown. Click OK to save changes.
Select the Zoom Area buton and generate a zoom box around the
upper lef hand corner of the screen.
In the Constraint Manager window, on the Main toolbar, select the
Cross Probe icon. You can also turn on Cross Probing using Setup > Cross
Probing. This allows you to dynamically highlight nets and pins within
the spreadsheet editor, or on the schematc, depending on where you
select the items.
Click the CLK_IN net from within the working area of the schematc.
Note: If you are not able to select the net, you may need to modify your
Selecton Filter setngs. Click the Selecton Filter buton.

83
Opening Constraint Manager and Cross Probing (contnued)
With the net selected, the spreadsheet window shows the constraints
associated with this net.
In Constraint Manager, fnd the net BSYNC+ and click on the Box to the
lef of the net. Notce that the net is selected and viewed in the schemat-
ic working area. In Constraint Manager, cross probing is bi-directonal
between the spreadsheet and the schematc and/or the PCB Layout.

84
Filtering FromTo, Pin Pair, and Pin in Constraint Manager
You can cross probe to nets in your design, but ofen you may need to cross
probe deeper within the net hierarchy down to the pins.
From the Constraint Manager menu, select Filters > Levels > All. The full
hierarchy of the nets becomes available within your design, including:
from-tos, pin pairs, and pins.
Notce that the nets now have a + next to each of them. Click the +
to expand the net BSYNC+ and see all of the pins within the net.
Click the box to the lef of the pin P1-1 below the BSYNC+ net and note
in the schematc window that you have cross probed to the pin level
within the net.

85
Constraint Manager General Clearances
In Constraint Manager, General Clearances allow you to defne clearance
values between design objects that you do not specify in the Constraint
Manager Spreadsheet Clearances page. These are global clearance rules that
are specifed when no Net Class relatonship is required.
In Constraint Manager, select the Clearances spreadsheet tab.
Click the General Clearances toolbar buton to open the General
Clearance Rules dialog box.
Look over the diferent General Clearances that can be adjusted in your
design. Since all of these current clearances are used within the PCB
Layout phase, we will leave them as is for now.
Click Cancel.

86
Constraint Manager Schemes
Schemes in Constraint Manager defne categories of physical
design rules that will be used during PCB Layout. When you open
Constraint Manager, there are two Default schemes.
The Master Scheme represents the Default constraints for
Clearances and Trace and Via Propertes for the entre design.
These values will be used if no unique constraints or rule areas are
applied.
The Minimum Scheme is read-only. It represents an overview
of the minimum values entered for Clearances and Trace and Via
Propertes across all of the schemes within the design. It provides
the user with an easy method to review any entered constraints
that may be unacceptable.
In the Navigator window within Constraint Manager, click
the + next to Schemes to expand and view the Master
scheme.
Expand Trace &Via Propertes, click on Default clearances
to see the Master Trace & Via propertes that will be used in
the design.
Expand Trace & Via Propertes and review the diferent
setngs that will be used for specifc Net Classes within your
design. You can create as many Schemes, or Groups of
clearances within schemes, as you need for your design.
Click Default Rule under the Clearances within the
Master scheme. These are the default clearances that will
be used in the design. You may need to scroll to the right in
the spreadsheet to see all of the clearance rules that you
can set within a design.
Now, lets create and assign a new Clearance rule that we
will use later in the design.

87
Creatng Clearances
In this exercise, we will create a High Speed clearance used for Clock
signals. In PCB layout, this rule is ofen referred to as a 3W rule.
It is used on signals to reduce crosstalk between other signals in a
design. The 3W means 3 tmes the width of the signal trace, spacing
from center to center. Ofen, a PCB designer may enter these rules
in the board, but with Constraint Manager we can create them in the
schematc and pass them to the PCB designer.
First, lets look at the Trace & Via Propertes for the CLOCKS
In the Navigator, expand Trace & Via propertes and click CLOCKS.
Note that the Typical Trace Width is set to 6 for all Clock signals.
Now that we know the trace width, we can build a 3W rule for the
clock signals with a Trace to Trace Spacing of 12.
Right-click on Clearances in the Navigator and select
New Clearance Rule .
Name the rule HS_3W, then click on the HS_3W rule.
In the spreadsheet, fnd the Trace To Trace column, then in the
Top box set the default to 12 and press Enter.
Click OK in the dialog box that appears. Note that all layers of the
design now have a Trace to Trace spacing set to 12.

88
Assigning Clearances
Now that we have created the rule for the Clock signals,
we need to assign it so that it will maintain the specifc
clearances to other Net Class clearances within the design.
Click the Class to Class Clearance Rule icon in the
Clearances toolbar.
The Class to Class Clearances dialog box opens and is set
to the Master Scheme.
Under the (ALL) column, choose HS_3W from the
CLOCKS Net Class dropdown list. This assigns the HS_3W
rule to all nets within the Net Class CLOCKS, and applies
it against ALL other nets within the design.
Click OK. Your Clock signal spacing rule has been
completed and saved to the database.
Note: If you do not assign a Class to Class Clearance rule to a
Net Class, then the Default rules will be used.

89
Creatng Net Classes
Net Classes are used to create Physical Constraints for nets or
groups of nets within your design.
In the Navigator, click the + next to Net Classes, then
right-click on Net Classes and select New Net Class.
Name the New Net Class CLOCK2 and click the CLOCK2
Net Class.
Right-click on CLOCK2, and select Assign Nets
In the Assign Physical Nets to Net Class dialog box, make
sure the Source Net Class is Default and the Target Net
Class is CLOCK2.
In the Search Bar, enter CLK_IN, then click on the Search
icon.
Click > to move the net CLK_IN to the CLOCK2 Net
Class, then click OK.
Repeat steps 3 through 6 to add CLK_3584MEG to the
CLOCK2 Net Class you created.
Create a New Net Class called PWR_020_MIL using
the previous methods. This prepares you for the next
lesson where you will learn a diferent method for
adding nets to a Net Class.

90
Assigning Nets Using Constraint Editor
Constraint Editor is an embedded constraint editor that you can use directly
within Xpediton xDX Designer or Xpediton xPCB Layout. Constraint Editor
improves your design productvity through context-driven operatons that
allow you to view and edit constraint data while editng your design.
In the PCI_Connecton schematc sheet, Zoom into the area shown.
Select the nets GND and VDD.
While hovering over one of the selected nets, right-click and select Edit
Constraints. Constraint Editor opens both of the nets shown.
Note: Since these are Power Nets, you may need to show the Power
Nets Bar. Select Bars > Confgure and make sure Power Nets is selected.
In Constraint Editor, change the Net Class for all of the selected nets to
PWR_020_MIL by right-clicking on the Netclass row in the frst column
and clicking Apply Value to All Columns.
Using Constraint Editor, fnd the nets VDDQ3.3V and V2.7 and assign
them to Net Class PWR_020_MIL using Constraint Editor.
Close Constraint Editor.

91
Creatng a Diferental Pair
On the PCI_Connecton sheet, use the Home key or the Fit
All icon to zoom full.
Click Zoom Area and window the area in the upper lef hand
corner of the page near the USER I/F CONNECTOR.
Select the signal BSYNC-, then while pressing the CTRL key
select the signal BSYNC+ .
In the Constraint Manager Spreadsheet (which should stll be
open), the nets BSYNC- and BSYNC+ are selected.
Create a New Net Class called BSYNC.
While hovering over the BSYNC+ net in Constraint Manager,
right-click and choose Assign Net(s) to Net Class from the
popup menu.
In the Select Net Class dialog box, select BSYNC and then
click OK.
In Constraint Manager, select BSYNC+ and BSYNC-, then
right-click and choose Create Diferental Pair from the
popup menu. Notce that the nets are now linked as a Dif
Pair and their Net Class is set to BSYNC.

92
Ordering Nets and Dif Pairs for Routng
You may be required to route nets or dif pairs in a specifc ordering topology.
Constraint Manager allows you to create Custom Routng Topologies that can
be passed to layout in Xpediton. When ordering dif pair signals, Constraint
Manager handles both nets at the same tme.
Right-click in the toolbar area and select the Topology toolbar, if not
already visible.
Select the BSYNC+, BSYNC- dif pair if it is not stll selected, then click
the Netline Order buton on the Topology toolbar.
Note: Currently, the Dif Pair is shown as a Custom Topology with No Ordering in
Constraint Manager.
Creatng a Constraint Class
Constraint Classes are used to create Electrical Constraints for nets or groups
of nets.
In the Navigator, select the + next to Constraint Classes to expand the
list, then right-click on Constraint Classes and select New Constraint Class.
Name the New Constraint Class BSYNC.
Select the Dif Pair Row in Constraint Manager for BSYNC+, BSYNC-, then
right-click and choose Assign Diferental Pair(s) to Constraint Class from
the popup menu.
In the Select Constraint Class dialog box, select the BSYNC constraint class,
then click OK. The Dif Pair is added to the Constraint Class.
Note: You may need to sort Constraint Class/Net column to see the Constraint
Class. You can also select the BSYNC constraint class in the Navigator to flter out
everything except the assigned nets.

93
Ordering Nets and Dif Pairs for Routng (contnued)
The Netline Order dialog box appears.
Select the connecton on the net P2-B2 and note that the frst
From pin is populated.
Select the connecton on the net U8-26 and the frst To pin is
populated.
Click the Add from-to arrow to set the frst from-to order in the
topology.
Using the method in steps 2 through 4, complete the Ordering
Topology as shown, then click OK to update Constraint Manager with
the ordering.
A message appears warning that the second net of the dif
pair was reordered also. You can view the report if needed.
Click No to close the message.
The Constraint Template Matching dialog box opens when dif pairs
are reordered. You can make changes here, but since we want the
ordering on the dif pairs to be the same, click Cancel to close the
dialog box.
The BSYNC+, BSYNC- dif pair is now an Ordered Topology in
Constraint Manager.
Close the Constraint Manager applicaton.

94
Adding Placement Constraints in Xpediton xDX Designer
In Xpediton xDX Designer, you can add propertes to your schematc
symbols that will be used as constraints during component placement in
the Xpediton xPCB layout database. These constraints can be for grouping
of special circuitry or used to confne the placement locaton of specifc
components.
Grouping Components for Placement
Navigate to the PCI_Connecton schematc page and select the
P1 connector, the P2 Connector and the resistors and capacitor
associated with it, as shown.
Note: You may wish to set your selecton flter to only select symbols
during this exercise.
At the botom of the Propertes window, add the
Property Cluster, and enter the Value as CONNECTORS.
Navigate to the control_bufers schematc sheet and select the
LEDs and associated Resistors, as shown. Add these parts to the
CONNECTORS component group using the Cluster property as in
Step 2.
Note: The component group called CONNECTORS is available for placement
as a group of components in Xpediton xPCB layout.

95
Constraining Components to an Area in PCB Layout
Navigate to the Analog schematc sheet, then to the
Analog_Switch, Inst_Amp block.
Select all of the Symbols on the sheet, except the power and
ground symbols as shown.
Add the Cluster property to these symbols with a Value of
ANALOG_SW.
Add a second property, Room and set the Value to ANALOG.
Note: These components are now available for placement as a
group in Xpediton xPCB layout, and they will be constrained to
a Room called ANALOG which we will need to create within the
PCB database.

96
Adding and Editng Graphical Text
When creatng your schematc, you may need to add engineering or instructonal
notes as additonal informaton. You will add some text to the Analog schematc
sheet to describe the room you just created.
The schematc sheet Analog > Analog_Switch > Inst_amp should be open.
Select Add > Text, and click a locaton for the text above the ttle block.
Enter some text, for example: Place components in the room Analog
Right-click the entered text and change the size to .250 in.
To easily edit the text, double-click it and highlight text to be edited as
needed.

97
Review Questons
1 Why would I want to use rules and constraints?
2 If constraints are added in the schematc, can they be edited during the layout process?
3 When would I want to use a Constraint Class?
4 Can I assign diferent constraints to individual diferental pairs in my design?
Review Answers
1 Rules and constraints help establish structure in the design. Not all signals in a design can be routed together without
introducing interference and/or crosstalk. Rules and constraints allow you to create specifc routng conditons for each
signal (or signal type) in the design, each with its own set of spacing and layer assignment rules. The more complex the
design, the more helpful these rules and constraints will be.
2 Constraints created in the schematc within Constraint Manager are passed to the Layout environment. Once the design is in
Layout, changes can be made within Constraint Manager and can be back annotated to the schematc. Constraint Manager
and the iCDB keep the design constraint data synchronized.
3 Sometmes you will want to assign the same constraint (spacing, net length, etc.) to a group of similar nets. Rather than do
this individually, you can group these nets into a Constraint Class. Any constraints assigned to the Constraint Class will be
automatcally assigned to all of the nets in that class. This also simplifes the process of making edits or changes.
4 The Constraint Manager Spreadsheet is extremely fexible and allows you to assign rules and constraints to a large variety
of design elements. This includes: groups of nets, individual nets, diferental pairs (including at the individual pair level)
and individual pin pairs. The ability to exercise this level of control over the design helps you meet the most demanding
requirements.
98
Variant Manager is a utlity that manages PCB subassemblies at the schematc level.
The bill of materials is typically generated here and can represent the entre schematc
or any variant defned by Variant Manager. Variant modifcatons can include Placed
(Populated) Components, Replaced (Substtuted) Components and Unplaced
(Depopulated) Components. Multple variants can exist in a single design with the
ability to automatcally generate schematcs and BOMs for each.
Variants defned in Xpediton xDX Designer can be integrated with Xpediton xPCB
Layout. The Variant Manager utlity inside Xpediton xPCB Layout can generate the
necessary assembly drawings based on each variant passed from Xpediton xDX
Designer. This capability accommodates the passing of variants from the front end
tool all the way through to the backend tools.
Lesson 8: Variant Manager
Creatng New Variants
Variant Manager is used to create a unique BOM for schematc variants. For
example, you may need to produce designs which are basically the same, except for
an extra memory bank. Variant Manager allows you to create a unique schematc,
BOM, and set of reports for the design variant.
Launching Variant Manager
Start Xpediton xDX Designer, and in the Recent secton of the Start Page
select Lesson1 C:\Xpediton_Evaluaton\Lesson1\Lesson1.prj.
Launch Variant Manager using View > Other Windows > Variants.
A new window opens for Variant Manager. If it shows No Project Loaded
simply Click on Corporate in the Navigator to open a schematc sheet.
Variant Manager
99
The CAE Interacton Tab
The CAE Interacton tab provides display optons for variant schematcs.
You can Delete, Markup or assign a Color to the unplaced symbols in each
variant.
When a variant view is generated, these setngs will be applied to the
symbols within the schematc according to the symbols variant status.
Reviewing the Variant Manager Setngs

Before creatng new variants, review the current setngs and familiarize
yourself with the available optons.
The General Tab
Review the Setngs for the Variant Manager by clicking the Setngs icon.
There are three tabs in the Setngs dialog box. The General Tab
includes setngs for naming unplaced parts as well as report optons.
The Unplaced keyword appears in the appropriate cell for parts that you
choose to not be installed during the PCB Assembly process. You can
specify any string as the keyword.
Variant Manager
100
The Library Query Setup Tab
The Library Query Setup tab allows you to defne and edit how
the project interacts with the Library database. The Data source
confguraton fle specifed in the frst feld of the dialog box
indicates the Xpediton xDX Databook database that you use when
creatng your design variant.
The Defne Libraries buton allows you to edit your Xpediton xDX
Databook confguraton. For this lesson the setup is done for you
but you can refer to the Appendix: Confguring Variant Manager
at the end of this guide if you are using your own database.
The Query setngs secton controls the database search when
using the Replace functon. Allow sufcient results to be
returned from each library by setng the Results/library value
appropriately. If you want to use replacement parts from more
than one library, you must set the Results total number to be
larger than the number of results returned from each individual
library. Verify the Part number atribute is set to Part Number.
The Output format controls your database query results. The Part
number feedback line allows you to display more informaton
about a partcular part. This will be shown later.
The Query results format controls the results shown for the
Replace functon. This determines the columns displayed and the
flter optons to help you choose a replacement part.
Note: Because you have associated the Part number atribute to Part
Number, we also want to be sure that it is included in the Query results
format.
Click Cancel to close the Setngs dialog box.
Variant Manager
101
Creatng Variants
Select the Variant Defniton Icon.
From the Variant Defniton dialog box, create two variants by clicking
on the Create New Variant buton twice.
Name the two variants Variant1 and Variant2 respectvely.
Note: Click the cell to edit the values.
Enter the Number and Descriptons as shown.
For Variant 1: Number = VAR1, Descripton = New Var1
For Variant2: Number = VAR2, Descripton = New Var2
The Variant Groups tab is helpful for sortng or fltering for specifc
variants when there are many in a single project. Any groups setup on
the Variant Groups tab will be available from the drop-down list shown
below in the main window.
Click OK to save and exit.

Variant Manager
102
Defning Variants
Now that you have confgured Variant Manager and created two variants, you
will defne the specifc variant parameters.
Unplacing Parts
Be sure the Transmit and Receive mode butons are both depressed to
enable cross-probing.
Click in the cell under the Variant1 column, next to C9. Variant Manager
allows cross probing from the schematc into a variant and vise-versa.
Click [-] next to the schematc sheet Analog_Switch to compress the view.
Note: If you don't see the Analog_Switch [+] icon, make sure that Flat Design
View is unchecked.
Find IO_Port1 and Unplace all of the components in that block by
selectng the cell next to the IO_Port1 defniton in Variant1.
Right-click and choose Unplaced to unplace all parts on this hierarchical
block.
Variant Manager
103
Change Multple Parts Simultaneously
To change a few select parts simultaneously, click C3 in the Variant1
column.
Ctrl + Click to select C4 and C35.
Right-click over one of the reference designators and choose Reset.
Only the 3 selected parts are reset and their cells in the Variant1
column are cleared.
Replacing (Substtutng) Parts
In Variant2 you will replace (substtute) parts. Select the cell for C5 in
IO_Port2, then right-click and choose Replace.
A new window appears that lists the possible replacement parts.
Note: The columns come from the setngs in a previous lesson. All of
the replacement parts have the same PKG_TYPE as the original part
because we set the VM Match to PKG_TYPE = in our .dbc confguraton
as shown in the Appendix at the end of this Evaluaton Guide.

Variant Manager
104
Sortng Parts
The columns in this window not only provide additonal informaton but
they also act as flters. Select one of the column headers and notce you
can either sort (ascending or descending) or flter (on available values)
based upon the part you are looking for.
Replace C5 with the smallest value available for a capacitor, by selectng
the Value column and then sort Ascending, then double-click the frst part
available, 12308-CAP.
Flaten the Design View
Check Flat Design View check box to faten the schematc Ref Des list.
In the design view, fnd and select R29 on the PCI_Connecton sheet in the
upper right corner of the sheet. When you select the part in the design
view, it will also select in Variant Manager.
Variant Manager
105
Replacing Parts Across Library Parttons
We are going to replace the R29 resistor with a
capacitor in Variant2. With R29 highlighted, right-click
over the cell in the Variant2 column and then click
Replace.
Notce that you also have the opton to replace parts
across library parttons.
Double-click the frst capacitor in the list to apply it.
Note: Dont forget that you can also flter on Library if you
know what Library your replacement part is in.
Click Save on the Variant Manager toolbar.

Variant Manager
106
Generatng Variant Outputs
Now that you have created two variants we will need to generate
schematcs, pass the informaton to Xpediton for layout, and create BOMs.
Create Variant/Functon Schematcs
Select File > Close to close all schematc sheets except one so the
Variant Manager remains actve.
Note: You can also use the [X] on the schematc sheet tab to close any sheet.
To create the variant schematcs, select the ttle header for the
Variant1 column and then click Create Variant/ Functon Schematcs.
A message appears in the design view informing you that Xpediton xDX
Designer is in Variant Manager Mode (All schematcs are read only).
Variant name: Variant1 .
Using the navigator, select the BlockReUse sheet and select IO_Port1.
Click Push .
The parts represented in blue are the ones we unplaced in Variant1. In
a previous lesson, we set a partcular color (teal) for all unplaced variant
parts.
We also had the opton to Markup rather than color unplaced parts which
would have resulted as shown.
Or, we could have confgured the Variant Manager to delete unplaced
parts as shown.
Click Reset Schematcs to Master.
Variant Manager
107
Generatng the Variant BOM Reports
To generate the BOMs, right-click in the Variant window
and choose Report > BOM Reports.
Choose the desired output fle type: Microsof Excel.
Select Variant1 and 2 and defne an output locaton. In
this case we will output to
C:\Xpediton_Evaluaton\Lesson1 and name it
Variant_BOM.xls.
Generate a BOM report for the Master and both
Variants using the setngs shown.
Afer clicking OK, all three reports are generated
in the C:\Xpediton_Evaluaton\Lesson1 directory
as shown.
Open each report in Excel and observe the diferences.
In this graphic notce the fle names at the top show
master on the lef, then Variant1 middle, and Variant2
on the right. A few diferences have been highlighted
so you can see that Variant Manager has generated the
BOMs correctly.
From the Report menu you can also generate
spreadsheet views of your variants for documentaton.
Experiment by creatng a report for your variant and
then view the output fle. For example, select HTML
Document.

Variant Manager
108
Review Questons
1 When would I want to use variants?
2 Is Xpediton xPCB Layout aware of variants to the BOM that are created in Xpediton xDX Designer?
3 Can I have more than two variants in a design?
4 How do I get the variant data to Manufacturing and Purchasing?
Review Answers
1 Many products are built around the concept of a core product design and a number of optonal features. Xpediton xDX Designer
supports this type of design through the use of variants. Each variant design can have specifc components placed, unplaced
or replaced. Use Variant Manager to specify and track separate BOMs.
2 The variant data is also forwarded to Xpediton xPCB Layout so you can create individualized Assembly Drawings for each
design variant.
3 Variant Manager allows you to create as many variants of the design as you need.
4 Variant Manager supports a wide variety of output formats so that you can deliver the informaton to downstream users
in a suitable confguraton. You can generate output in HTML, text, Excel spreadsheet, CSV fles, and BOM formats so that
Engineering, Manufacturing, Purchasing and others can all share the same design data.
Variant Manager
109
This exercise shows how to export BOMs from Xpediton xDX Designer. There are
several optonal output formats. For this exercise, we will focus on creatng a text fle
format.
During this lesson, all of the setngs you create are saved within a Part Lister
confguraton fle or .IPL fle. You can create and save as many IPL fles as you need for
separate versions or output types. You can recall them later for use in future design
projects.
Lesson 9: Generatng the BOM (Bill of Materials) using Part Lister
Opening the Part Lister
If not already open, select File > Open > Project to Open
C:\Xpediton_Evaluaton\ Lesson1\Lesson1.prj.
Select Tools > Part Lister... .
A new PartsLister dialog box appears. These optons afect the part list
content.
For the Confg Name, browse and select CORPORATE from the dropdown
list.
Note: This is a customizable Part Lister confguraton. Any changes you make are
saved in this fle for future use.

Generatng the BOM (Bill of Materials) Using Part Lister
110
Part Lister Property Selecton
Select Columns.
The list on the lef side of the dialog box contains some of the propertes
currently in the design. Using the four butons above the list, you can
add, remove and modify the order of the property columns included
in the output. Each of the propertes in the Columns list will become a
separate column in the output fle.
Adding A Property
Click New to add a new property at the end of the list.
Note: To add a property in the middle of the list, click on the list item directly
above the locaton where you wish to add the new property. You can also use the
Up and Down Arrow butons to repositon the order of the propertes in the list.
Enter the Column Label Name DESCRIPTION.
Verify that Property is selected for the Type, and for the Property, select
Descripton from the dropdown list to specify the content of the column.
Enter a Column Width of 50.
Enter 0 for the decimal places.
The new property is now complete.
111
Editng A Property
Double-click the cursor over the Column Label Name C0ST. This allows
you to edit the name.
Change the Column Label Name from C0ST to COST.
Note: COST is spelled with a Zero (0) and it should be an O.
You can rename any of the Column Label Names as your reportng
needs change.
Increasing the Page Size
If you add additonal propertes, you may have to increase the page size.
Select Advanced.
Verify that Split into pages is enabled.
Enter the appropriate values for the number of lines each.
(For this lesson set it to 150.)
Specifying the Output Type
Defne the desired output type (Text File, HTML or EXCEL) by choosing
Text File from the Output Format dropdown list.
Click Run to generate the report.

112
Viewing the Part Lister Output
In Windows Explorer, browse to and open
C:\Xpediton_Evaluaton\Lesson1\CORPORATE.txt in any text
editor.
Expand the view of the BOM to ft the full screen.
Note: This is just one example of a BOM. You can create diferent formats
including an HTML version that can be opened inside a web browser or an
Excel version that can be viewed and edited within Microsof Excel.
Select File > Exit to close the Notepad fle.
Select File > Exit to exit Xpediton xDX Designer.
113
Review Questons
1 Is a BOM a printed report or a data fle?
2 How much detail can be contained in a BOM?
3 Will a BOM show detail for each part or condense the list of identcal
parts?
4 Can I save a BOM setup for use in a future design?
Review Answers
1 You can generate a BOM in diferent formats to suit the needs of the
target audience, including Excel spreadsheets, PDFs, text fles, CSV fles
and others.
2 A BOM can contain as much or as litle detail as you require. During
the setup of the BOM, you are ofered a number of optons to fully
customize the report.
3 You can confgure the BOM to show both. Typically, you show a
condensed listng that has one entry for each diferent component and
a feld that indicates all of the Reference Designators that use that
partcular component. Alternately, you can also include a listng that
includes one entry for each component in the design.
4 You can save specifc BOM confguratons in the Reports dialog box. These
are stored with the Xpediton xDX Designer applicaton confguraton and
are available in future design project sessions.
114
Using LineSim Link and Simulaton
This exercise will instruct you how to select a net for simulaton and easily
create a virtual prototype for signal integrity(SI) analysis. Run an interactve
SI simulaton. Determine the optmal terminaton value, apply that
terminaton then rerun the simulaton to validate the soluton and save the
results for future use.
Lesson 10: Xpediton xDX Designer Integraton with HyperLynx LineSim
Xpediton xDX Designer LineSim Link
Xpediton xDX Designer LineSim Link enables you to export a net to HyperLynx
LineSim for pre-layout simulaton.
From the Xpediton xDX Designer start page, select Open, then browse
and select
C:\Xpediton_Evaluaton\LessonFinal\LessonFinal.prj.
Double-click the CORPORATE schematc in the Project Navigator.
Double-click on the memory schematc sheet in the Project Navigator.
Zoom to the upper lef IC shown on the memory sheet. Select the IC
U15.
Note: Set the Selecton Filter to Symbol if necessary.
In the Propertes window, review the assigned Simulaton IBIS models:
SIM_MODEL and SIM_MODEL_FILE. (You may need to scroll down to
see them).
Note: If the Propertes Window is not visible, click the Propertes buton on the
View toolbar.
HyperLynx LineSim is a pre-layout PCB design simulaton and analysis tool
that enables you to evaluate the signal-integrity performance of signal nets.

115
Xpediton xDX Designer LineSim Link
(contnued)
Select the net DATA_BUS0 startng from U15.13.
Right-click and choose LineSim Link.
Enable Complete schematc (export including
interconnectons) in the Schematc Contents
secton, then click Load Data from xDX Designer.
Note: You can change parameters to the Transmission
Line Propertes. We will not make any changes and use
the default setngs.
In the Schematc Topology tab, review the drivers
and receivers for this net. Expand both Electrical
Net 1 and DATABUS0.
Note: U13 is set as a driver, and U15 and U26 are
receivers.
On the Optons tab, select Export to HyperLynx.
Click Yes to overwrite existng fles, if needed.
HyperLynx LineSim
HyperLynx LineSim will open with the Free-Form
schematc. The DATABUS0 net
is loaded for simulaton using
the models assigned in
Xpediton xDX Designer.
In HyperLynx, select
the Edit Stackup icon.
Review the cross
secton of the 6
layer board, then
close the Stackup
Editor.

116
HyperLynx LineSim (contnued)
You need to assign a missing model to U13. Select
U13, right-click, and select Assign Models.
In Assign Models, click Select.
In Select IC Model, choose xc9500.ibs from
the Libraries list, and then choose XC95216_
BGA352[SLW=0;VIO=0] from the Devices list, then
click OK.
In Assign Models, select U13.io pins and change the
Bufer setngs to Output.
Click OK. All of the models are assigned and are
ready for simulaton.
13
14
15
16
117
Click Run Interactve Simulaton,
the Digital Oscilloscope window opens.
Select Rising Edge. Make sure diferent colors are
assigned to the probes, and select Start Simulaton.
In the Digital Oscilloscope window, on the waveform, select the
top and botom of the overshoot of the waveform to review the
span of the voltage overshoot. (For Example, Receivers have over-
shoot of about 2.1V.).
Save the results of the simulaton for future use with the routed
board. Click Save/Load, select HyperLynx .LIS and then click Save
As. Save the fle to the locaton C:\Xpediton_Evaluaton\
LessonFinal with name DATA_BUS0_no_terminaton.lis. Click Yes
to replace the existng fle.
Close the Load/Save Waveforms dialog box.
18
19
17
118
21
To fx the Signal Integrity problems, add RC Terminaton to the U15.13
receiver. Click Add RC Terminator to the schematc and positon the top of
the resistor so that it touches the lef blue dot at the output of TL2 .
22
To assign values to the terminators, click the Run Terminator Wizard icon.
Choose 5% from the Apply Tolerance dropdown list.
23
Click Apply Values, then click OK. The value is assigned to the terminators.
24
In the Digital Oscilloscope window, click Erase and rerun the simulaton with
RC Terminaton and the values assigned. You will notce that we cut down
the overshoot by more than double (about 1.25V). We can contnue to refne
if necessary.
25
Save the results as we did in Step 19 with fle name:
DATA_BUS0_terminated.lis. Click Yes to replace the existng fle.
26
Close Digital Oscilloscope and exit HyperLynx LineSim. Click Yes to save
changes, then select File > Close Project.
21
22
23
24
22
119
Review Questons
1 When would I want to use HyperLynx LineSim?
2 How does HyperLynx LineSim know how the signal will perform on the
printed circuit board?
3 How does HyperLynx LineSim fx signals that dont perform as expected?
4 Does HyperLynx LineSim select the actual components for terminators?
Review Answers
1 HyperLynx LineSim lets you model critcal signals in your design and
atempts to predict their expected behavior in the fnal board design.
You can model a signal, use the tool to experiment with correctve
measures, and save the simulatons for future results comparisons.
2 HyperLynx LineSim uses industry standard component models to
predict signal behaviors along with sophistcated internal algorithms
and proprietary technologies.
3 HyperLynx LineSim features Wizards that can suggest possible
modifcatons to your signal chain to correct aberratons and
performance issues. Simply run the Wizard and the system presents you
with suggestons to correct signal integrity issues.
4 HyperLynx LineSim ofers suggested values for terminators, not specifc
part numbers. You must determine which manufacturers part number
will meet the required specifcatons for the design.
120
HyperLynx Analog is a board-level simulaton analysis and verifcaton tool that
is integrated into Xpediton xDX Designer. HyperLynx Analog extends Xpediton
xDX Designer to add analog and mixed-signal simulaton to the Xpediton fow.
This provides a complete design process from schematc capture to simulaton
to layout and back-annotaton.
This exercise will instruct you how to run circuit simulatons with HyperLynx
Analog, which includes: assigning simulaton models to components, running
DC, conductng transient, and AC simulatons. Running simulaton tests on
circuits prior to, or concurrently with the PCB design helps eliminate wiring
and polarity errors to ensure that the circuit works right the frst tme.
HyperLynx Analog is easy to use, fast to setup and no longer requires library
preparaton. For a video demo, using a similar circuit for the features in this
lesson and more, see: htp://www.mentor.com/products/pcb-system-design
/multmedia/beter-pcb-analog-design-webinar.
Lesson 11: Xpediton xDX Designer Integraton with HyperLynx Analog
HyperLynx Analog Setup
This secton will demonstrate how to use the simulaton capabilites of
HyperLynx Analog.
In Xpediton xDX Designer, select Recent and select
Enable licensing for HyperLynx Analog:
a. Setup > Setngs > Licensing, check HyperLynx Analog
and Press OK.
b. If the HyperLynx Analog toolbar does not appear, select
View > Toolbars > HLA Simulaton to make it visible.
Double-click the Inst_Amp block in the Project Navigator
Blocks secton.
Xpediton xDX Designer Integraton with HyperLynx Analog

121
HyperLynx Analog Setup (contnued)
Click the Testbench Optons buton on
the HyperLynx Analog toolbar to open the
Testbench Optons: Inst_Amp dialog box.
Verify that HyperLynx Analog is enabled
and click OK.
Note: Steps 5 and 6 are optonal for a
demo, if you have tme constraints, it has
been completed.
The passive components have had SPICE
propertes added, but if the propertes
are not in a library, it is easy to add the
SPICE propertes to the capacitors C1 and
C2.
Select C1, right-click on the symbol and
select Simulaton Model Propertes to
view that a model is assigned as
Built In (Spice).
While C1 is stll selected, verify in the
Propertes Window that
Order=VALUE$ ELDO_PARAMS$ and
VALUE=.22uF.
Close Simulaton Model Propertes.

122
Adding SPICE Propertes
Note: Steps 1 through 8 are optonal for the evaluaton and have
been completed for you, if you have tme constraints.
Add the SPICE propertes to the Op Amp. Go to
www.analog.com, search for ad8638 spice and download the
SPICE model (a copy AD8638.cir is in the project directory).
In Xpediton xDX Designer, select Tools > Convert PSPICE
libraries, and select the downloaded fle. The fle AD8638.cir
has been saved in the project directory.
This converts the fle to one with an HLA prefx, and .lib sufx.
Select the 4 OPAMPs (U1 and U2), then select
Simulaton Model Propertes from the popup menu.
Add the SPICE propertes to the op amp...
Select SPICE from the dropdown. This opens the
Model Propertes dialog box
Select Model File
Browse to the converted model fle, HLA_AD8638.lib
Select AD8638
Press OK to close Model Propertes, but stay in the
Simulaton Model Propertes dialog box.
Contnue adding SPICE propertes to the op amp
On the Pin Mapping tab, click View Model, and update the
Model Ports pin informaton per the Model View informaton
as shown.
Hint: Select Reset All and in the Symbol Pins column use the
dropdown list to assign the correct names for each Model Port.
Click OK when fnished.
Verify in the Propertes window that the Order property is
Order=Model$ ELDO_PARAMS$

123
Setng Up the Signal Sources
Note: Steps 1 through 7 are optonal for the evaluaton and have been
completed for you, if you have tme constraints.
Set up the signal sources by actvatng the Sources buton.
Add 2 DC sources. Click New in the Sources window.
Add VDD as a DC source at 10V with input nodes of PWR and 0,
0 is the GND node.
Add Ofset as a DC source at 5V with input nodes of
NEG_INPUT and 0.
The results appear as shown in the Sources dialog.
Add a third source, this will be a combinaton source with DC, AC
and Transient propertes, Time Type: Pulse. Click Defne
The completed New Source and Pulse dialogs appear. Click OK
to save the Sources.

124
Editng the Simulaton Dialog
Click Simulate Design to open the Simulaton Control
dialog box.
Review the Simulatons informaton.
Review the DC Analysis informaton.
Review the Time Domain Analysis informaton.
Review the Frequency Analysis informaton.
Review the Operatng Point Values informaton.
Click Simulate.
Review the results in the output window.

125
Back Annotaton to the Schematc
Show the Back Annotaton on the schematc by:
Click the schematc window to make it actve.
Click the Show Back Annotaton buton to see the
values on the schematc.
Click the schematc again.
Viewing the Results in EZwave
When simulaton completes, EZWave opens automat-
cally. You can also open EZwave from the toolbar.
Expand Inst_Amp and select AC to show the wave-
form names in the lower lef window pane, then drag
V(amp_out) onto the workspace to view the AC results.
Select TRAN to show the transient waveform results
and drag V(amp_out) next to Workspace1 to create a
new Transient waveform window.

126
Using the Measurement Tool
Use the measurement tool to fnd peak-to-peak voltage and the frequency.
In EZwave, select Tools > Measurement Tool.
Select the Measurement type and click Apply.
Hints:
For peak-to-peak measurement select General > Peak to Peak
For frequency measurement select Time Domain > Frequency
The measurement annotaton can be selected and moved within the view.
For more informaton, see Help >Tutorial!.
Close the Measurement Tool and EZwave, then select File > Close Project.

127
Review Questons
1 What models can be used for HyperLynx Analog simulaton?
2 Can HyperLynx Analog simulaton results be back annotated to the
schematc?
3 Can measurements be performed in EZwave window?
Review Answers
1 Spice models can be used for HyperLynx Analog simulaton.
2 Yes, by selectng the Show Back Annotaton buton, the schematc will
be updated.
3 Yes, in the EZwave window you can measure diferent parameters of
the wave form. For example, Peak-to-Peak voltage or Frequency.
128
This exercise walks you through the process of Packaging and integratng your
Xpediton xDX Designer schematc to Xpediton xPCB Layout. Once completed, you
will have a single integrated database that can exchange informaton easily through
Forward and Backward Annotaton.
Database Integraton
This lesson will highlight the basic tasks utlized in Packaging, Integraton through a
Layout Template, Forward Annotaton, and setng up embedded and cross probable
views of the schematc and PCB databases for use in completng the design.
Lesson 12: Xpediton xDX Designer and Xpediton xPCB Layout Integraton
Xpediton xDX Designer and Xpediton xPCB Layout Integraton
129
Packaging the Schematc
The Packager in Xpediton xDX Designer prepares the schematc database for
integraton with the PCB layout by mapping each logical component to a physical
component in your Library. It also automatcally assigns reference
designators to components, if you have not already manually assigned them.
The Packager fatens hierarchical designs and checks the design for pin and
property mismatches with components in the library. For each error found
during packaging, a hyperlink appears in the Output Window that helps you fnd
and resolve these errors easily.
Running the Packager
If not already open, open the
C:\Xpediton_Evaluaton\Lesson1\Lesson1.prj, and open the
CORPORATE schematc.
Note: If you have not done so, frst run an Xpediton xDX Databook Verifcaton
on your design and make sure you have ALL Green Lights.
Review the Xpediton xDX Databook lesson if you need to.
Click Tools > Package to open the Packager setup dialog box. Take a
moment to look over the available setngs. We will leave the setngs as
shown for this exercise.
Click OK to run the Packager.
Success! Your schematc has been Packaged for integraton without
errors. Review the output in the Packager tab in the Output Window, if
you did have errors, you would need to correct them and would then
re-run the Packager.
Note: Successful Packaging is very important to you as a designer. It
means that all of the parts on your schematc match pin for pin and
property for property with the Library. This is a key element
that saves you tme with the Correct by Constructon methodology in
Xpediton.

130
Layout Template Editor
In Xpediton xDX Designer, select Tools > Library Manager to open
your Library. The Library Manager opens.
In Library Manager, select Tools > Layout Template Editor.
Select the Template_6Layer_Formated template and open it in the
Xpediton xPCB layout editor by selectng the Edit Template icon.
In the Xpediton xPCB Editor window, choose the
Loc: Min Contents display scheme from the dropdown list, then
select View > Fit All.
Library - PCB Layout Templates
PCB Layout Templates are used to construct a new PCB design. They can
be completely blank PCB databases, or they can have pre-confgured
informaton like: fabricaton and assembly drawing informaton, pre-defned
layer stackup informaton, notes, library components, and even Constraint
Manager baseline constraints. Xpediton provides you with a few examples in
the Sample Library provided with the installaton.
You can make a new PCB Layout Template from any pre-existng PCB Layout.
You can have as many templates as you need in your own Library.
Notce the Template has Formats, Fabricaton Notes,

and a Layer Stackup Drawing already placed. These
items could be adjusted as needed within the template
for future re-use. We will use this one as is, so once you
have fnished reviewing the template, click File > Exit.
Close the Templates selecton dialog box, then click
File > Exit to close the Xpediton xDM Library Manager
and return to your design.
131
Connectng the Schematc and Layout
Now you have an error free and packaged schematc database. You also have
a set of Layout Templates in your Library you can use to create new PCB layout
databases.
All we need to do now is integrate them
Create the PCB Database
Click Tools > Xpediton xPCB.
Note: This command opens the Xpediton xDX Designer to Xpediton
xPCB, Create New PCB Design dialog box. When a PCB database is
currently linked to a schematc, Xpediton xPCB will open the layout.
In the Xpediton xDX Designer to Xpediton xPCB dialog box, under
Create New PCB design, choose Template_6Layer_Formated
from the "Select template" dropdown list.
The PCB design database is created in the directory:
C:\Xpediton_Evaluaton\Lesson1\PCB, as shown.
Note: The Central Library path is already set because it is in the Project
File.
Click OK, then click Yes to answer the PCB Directory message.
Click OK to close the Import Layout Template warning.
Note: When Importng a PCB Template into your design project, any
previous layer stackup setngs will be overwriten by the imported
template.
Click OK to close the back annotaton message received the frst
tme you integrate your design to a PCB template.
Xpediton xPCB Layout loads, click No and do not start the Forward
Annotaton. The PCB database will load.
Note: Typically you will answer Yes and Project Integraton will load
automatcally to start Forward Annotaton. In this lesson, we will walk you
through the individual steps.

132
PCB Integraton
Now that the schematc database is integrated with the PCB database, we have
to Forward Annotate to load the netlist and constraint informaton into the PCB.
You can run Forward Annotaton in several ways within Xpediton xPCB Layout,
but since this is a brand new design, we will use the Project Integraton method.
Project Integraton
Xpediton has opened the CORPORATE PCB design, and you
will see the template we chose from the Library.
Notce the Trafc Signal lights in the lower right corner of
the Status Bar. The First Amber Light signifes that there are
schematc changes ready to be Forward Annotated to the PCB.
Click Setup > Project Integraton...
The Project Integraton dialog box opens, showing the same
Trafc Signal lights.
Click the Additonal Optons buton and make sure all three
check boxes are checked. These create some fles that we will
use later.
Click Close.
Review the setngs in the Project Integraton dialog box so
they are set as shown.
Click on the TOP Amber Light to start Forward Annotaton. You
will see several message windows as the process completes.
Click OK to close the Forward Annotaton Warning.
Note: Follow good design practce and always view any Log fles for
errors that may need to be corrected. Click the File Viewer icon to
open a list of fles to view.

133
Project Integraton (contnued)

The schematc netlist and constraint informaton are loaded
into the PCB database. Notce the Trafc Lights have updated
to Green.
If a Back Annotaton is required, there will be an
Amber Trafc Light for Back Annotaton Required.
Click Back Annotaton Required to run a Back Annotaton and
complete the schematc to PCB integraton process.
Note: Whenever you introduce new design changes, you should
always perform a complete Round Trip of the Forward and Backward
Annotaton process. This will guarantee that your schematc and PCB
databases remain in sync.
If needed, click OK to close the Back Annotaton message
window. All of the Trafc Lights will now be Green.
Click Close to exit the Project Integraton dialog box.
Now is a good tme to save your new PCB database by clicking
File > Save.
Your PCB database is ready to start the layout process!

134
Embedded Xpediton xDX Designer or eDxD
This embedded view is a snapshot of the Xpediton xDX Designer schematc
at the moment of Forward Annotaton. Use this view for viewing and cross
probing within Xpediton xPCB Layout without the need to open Xpediton
xDX Designer.
In pediton xPCB Layout, click Window > Add eDxD View.
Click on the 2:CORPORATE tab to view the schematc.
To view additonal sheets of the schematc, right-click Sheet and choose
the sheet you want to view.
Embedded Schematc and PCB Views
Prior to running Forward Annotaton, you used the Additonal Optons buton
in the Project Integraton dialog box to create fles for later use. These fles
are the Embedded Xpediton xDX Designer and Xpediton xPCB Layout views.
Embedded Xpediton or eExp
Like the eDxD view, the eExp view is a snapshot of the Xpediton xPCB Layout
PCB database at the moment of Backward Annotaton. Use this view within
Xpediton xDX Designer to view and cross probe to the PCB without having to
open Xpediton.
In Xpediton xDX Designer, click the eExp View icon or select View >
eExp View. The new eExp window opens.
Right-click inside the eExp window and select Show/Hide Toolbar to
open the eExp window display controls.
We will learn more about these views and how to use them efectvely in your
design process in upcoming lessons.

135
Review Questons
1 Why do I need to package the design?
2 Why use Xpediton xDX Designer to Xpediton and Project Integraton?
3 Do I need to create a PCB Layout Template?
Review Answers
1 Packaging your design is an essental step in making sure that all of the
symbols placed in your schematc match the physical component land
paterns within the library. It also checks the logical pin informaton
between the symbols and the components. It is a key element in
making your design Correct by Constructon.
2 When you have fnished your schematc, you need to forward annotate
the design to Xpediton xPCB Layout for physical design. Instead of manually
sending fles back and forth, Project Integraton lets you establish a seamless
bidirectonal link between the applicatons and automatcally pass design
data from one applicaton to the other. This simplifes the process and
eliminates any possible problems that might be encountered in a manual
data exchange.
3 Several PCB Layout Templates are included with the installaton of
Xpediton xPCB. You can use these for your designs, edit them for your
requirements, or create new ones that are specifc to your companys
requirements. In order to integrate your schematcs with a PCB layout
database, you must have at least one PCB Layout Template in your
Library.
136
137
In this secton:
PCB Design with
Xpediton xPCB Layout
Xpediton xPCB Layout Environment
Setng Up a New Board Design
Placement
Variant Management
AutoActve Interactve Routng
Final Layout Consideratons
Design Verifcaton
138
Lesson 13: Xpediton xPCB Layout Environment

Opening Xpediton xPCB Layout
From your Desktop, click pediton xPCB Layout or select
Start > Mentor Graphics SDD EEVX.1 (32 or 64-bit) > Layout >
pediton xPCB Layout.
From the pediton xPCB Layout Start Page click Open, then browse and
choose:
C:\pediton_Evaluaton\LessonFinal\PCB\CORPORATE.pcb.
Xpediton xPCB Layout is fully integrated with Xpediton xDX Designer and follows
the same Windows navigaton standards. It supports pulldown menus, hot keys,
customizable toolbars, toolboxes, and enhanced tooltps. Context sensitve
menus are supported; when you right-click, the popup menus optons vary
depending on the object you select or the operaton you are entering.
As with Xpediton xDX Designer, the interface is fully customizable. Xpediton
xPCB Layout also includes the Advanced Windows navigaton features of Tear-
of Menus, Dockable and Auto-hideable Windows.
Maintaining the interface features across all of the pediton tools
minimizes the transiton between them.
139
Introducton to the User Interface (Main Window)
Menus Toolbars
Workspace
Status Bar Acton Keys Toolbar
PCB Design with Xpediton xPCB Layout
140
Toolbars
All of the Toolbars in Xpediton xPCB Layout are Dockable/Undockable in
diferent locatons within the Editor Window. They are fully customizable,
so you can add or remove butons that you commonly use in your designs.
Add Toolbars by selectng View > Toolbars, and choose the toolbar
you want to add. The example shows the Route toolbar.
You can Order and Dock Toolbars along any edge of the Editor
Window simply by dragging them to a new locaton.
You can Undock Toolbars by dragging them away from the edge.
Re-Dock them by dragging them back to the edge.
To customize toolbars, select View > Toolbars > Customize.
To add or remove butons from any toolbar, click Toolbar Optons,
then click Add or Remove Butons, and choose the butons you want
to add or remove.
To reset a toolbar, click Toolbar Optons and click Reset Toolbar.
141
Toolbars
The Standard Toolbar
The Place Toolbar The Snap Toolbar
Previous
View
Fit
Board
Unhighlight
All
Highlight
Selected
Redo
Undo
Find
Save
iCES
Constraints
Editor
Control
Review
Hazards
DRC
Visualizaton
Batch
DRC
File
Viewer
Design
Status
Selection
List
Propertes
Next
View
Display
Control
Constraints
Display Scheme
Dropdown List
Component
Explorer
Align
Lef
Dissolve
Group
Add to
Group
Push
Rotate
180
Rotate
90
Align
Top
Align
Right
Align
Botom
Place Tentatve
Snap
Remove
Snap Pt
Use Snap
Point
Place Statc
Snap
Previous
Snap Keypoint
Next Snap
Keypoint
Toggle
Hover
Snap
The X-Y Readout Toolbar
The Route Toolbar
Network
Explorer
Fanout Manual
Saw Tune
Plow/
Multplow
Sketch
Router
Manual
Tune
Remove
Hangars
Gloss
Sketch Route
Style
Copy
Trace
Netline
Manipulaton
Modify
Corner
Change
Width
Add
Trace
Drops
Add
Teardrops
Plane
Classes
Parameters
Plane
Assignment
142
The Draw Edit Toolbar
The Draw Create Toolbar
Toolbars (contnued)
The Utlites Toolbar
Add
PCB
View
Add
eDxD
View
Print
Preview
Tile
Window
Vertcally
Cascade
Window
Print
Project
Integraton
Tile
Window
Horizontally
Gerber
Plot Setup
Propertes
Circle
Rectangle
Polygon
Polyline
Arc by
Radius\3 Pt
Line
Text
Snap To
Grid
Actve
Arc
Drawing
Angle Lock
Draw Object
Snap Grid
Place
Tangent
Arc
Trim
Delete
Endpoint
Handle
Create
Polygon or
Polyline
Join
Copy
Send
Back
Bring
Forward
Select Object
Handles
Rotate Flip
Horizontal
Flip
Vertcally
Copy
Parallel
Copy
Perpendicular
Dissolve
Polygon or
Polyline
Extend Subtract
Merge
Scale
Segment
Line
3D
View
Extended
Print
143
Toolbars (contnued)
The Edit Toolbar
Delete
Unlock
Lock
Unfx
Semi Fix
Fix
Change
Layer
Cut
Copy
to
Clipboard
Move
Paste
Rotate 90
Rotate 180
The Dimension Toolbar
Place
Stacked
Dimension
Dimension
Params
Radius or Diameter
Dimension
Ordinate
Dimension
Angle Dim
Between 2 Linear
Elements
Ang From
X Axis of
Linear Element
Place Dim
Between
2 Elements
Place Dimension
Along a
Linear Element
Set Selecton
Area Shape
to Rectangle
Set Selecton
Area Shape
to Line
Reset
Selecton
Split Traces
at Area
Extents
Inside
Area
Selecton
Segment
Based
Selecton
Shape
Propertes
Set Selecton
Area Shape
to Circle
Set Selecton
Area Shape
to Polygon
The Select By Area Toolbar
Measure
Minimum
Distance
Cumulatve
Mode
Measure
Readout
Segment
Mode
Centerline
Mode
Edge
Mode
Measure
Distance
Center
Mode
The Measure Toolbar
The Actve Group Toolbar
144
Acton Keys Toolbar
In Xpediton xPCB Layout there are many ways to use the same commands.
The Acton Keys are a context and command sensitve toolbar that changes
dynamically depending on the command you are using.
To use an Acton Key, either click with your mouse or press the
corresponding Functon key on your keyboard.

Extended Tooltps
All of the toolbar icons contain tooltps to help you understand the
commands you select. Xpediton xPCB Layout also contains extended tooltp
animaton for most of the commands on the toolbars. These animatons
provide you with a brief video of how to use the command. Quick-key
commands are also provided within the tooltps.
Select View > Toolbars > Route. This adds the Route toolbar to the
toolbars secton of the interface.
Hover over the Plow or Mult-Plow selected nets icon. The normal
tooltp is shown along with the Quick-key command.
Hover over the Plow icon again, but leave your cursor over the icon for
brief tme (about 3 seconds). The animaton for the command begins
playing and shows additonal informaton about the command usage.
145
Modeless Commands and Mouse Usage
Just like Xpediton xDX Designer, Xpediton xPCB Layout has command line
shortcuts and Mouse Strokes.
Keyin Commands
Keyins are two-character modeless acton-object commands.
In the Editor Window, type the characters pr. The Keyin Command
dialog box opens showing the command syntax for Place Ref-des.
Note: The keyin command example shown (pr -dist r*) will Place all of the R*
reference designator components in a Distributed patern.
Entering ? in the Keyin Command dialog box will open Help for Keyin
commands.
Mouse Usage and Strokes
Use the lef mouse buton for selecton and deselecton of
objects under the cursor.
Use the middle mouse buton or scroll wheel for Zoom In and
Out. Pan by holding down the middle mouse buton and
moving the cursor in the directon of pan.
Use the Shif + middle mouse buton to create a zoom window
in and out of an area and use the CTRL + middle mouse buton
to ft the board to the screen.
Use the right mouse buton for context sensitve popup menus.
Drag the right mouse buton for Strokes.
Dragging a ? in the Editor Window will view Help for Strokes.
Note: View Help for more informaton about Keyins, Mouse Mappings and
Strokes.

146
Net Explorer
This spreadsheet interface provides methods to organize and view nets. You can
create netline Planning Groups to display only the netlines you want to view.
You can also apply Filtering and Marking to netlines, and can use the same
Display Control Marking capabilites used in Component Explorer. Common
features between these two navigaton tools means you do not have to learn
diferent interfaces.
Net Explorer helps you view the nets you need to route and reduces your
overall routng schedule.
During the layout of your PCB, when users need to perform
Placement and Routng, Xpediton xPCB Layout ofers several
new navigaton tools that can be used throughout the layout
process.
Additonal PCB Layout Navigaton Tools
Component Explorer
This spreadsheet interface allows you to create Component
Planning Groups, Filter and Mark components. You can
use this with Display Control features to view Netlines for
Marked Components, Nets Between Marked Components,
and Nets From Marked Components functons to show only
the netlines of interest.
Component Explorer helps you navigate to the components
in your layout and reduce the tme required to complete
placement.
147
Editor Control
In Xpediton xPCB Layout, there are many opton
setngs that you can use while placing and
routng your layout. These setngs are
controlled with Editor Control. You can save
groups of setngs in Editor Control as schemes
for recalling later in a design or share withother
designs.
Select Setup > Editor Control or click the
Editor Control icon on the Standard
Toolbar.
Editor Control contains three tabs:
Place, Route and Grids.
Placement setngs are available on the
Place tab.
Routng controls are available on the
Route tab.
Grid setngs for Placement, Routng, Vias,
and Draw items are on the Grids tab.
The Common Setngs secton allows you
to disable Online DRC, receive warnings
when moving fxed objects, change
the tme between Autosaves, and save
Schemes.
Note: Disabling Online DRC is NOT
recommended.
Tip: Since you use Editor Control ofen
during your layout, you may want to
Autohide the dialog box so that when
hovering over the collapse tab it will allow
the dialog to slide open automatcally for
usage.

148
Display Control
Display Control provides access to the commands and optons that defne the
display view characteristcs and selecton fltering in your design. Each of the
Display Control tabs shares a common set of elements: color boxes, radio
butons, item check boxes and group check boxes. These provide an intuitve and
consistent environment.
The Display Control interface is also customizable. You can Hide sectons that
you do not use ofen to increase the screen area for the sectons that you
do use. A Favorites secton is also available to place items that you use ofen
during a design to increase productvity. You can save all of these customizatons
to a Local, System, or a User Defned locaton Scheme for use with other
designs.
As with Editor Control, Display Control is a primary navigaton tool used during
your design process.
Click Fit Board.
Select View > Display Control or click the Display Control icon. Review
the optons available in each tab.
Note: Since Display Control is used ofen during a design, you may wish to
Auto-Hide it.
In Display Control, click the Scheme dropdown list and choose All Of.
In the Global View & Interactve Selecton secton of the Edit tab,
expand Board Objects and enable Visibility for all of the objects.
Zoom to the lower lef of the board and hover your mouse cursor over
the Board Outline and note that nothing highlights.
In the Global View & Interactve Selecton secton, enable Selecton
for all of the objects.
Repeat step 5 and note the Board Outline now highlights and can be
selected.
149
Display Control Search
The Display Control dialog contains a vast amount of informaton for viewing
and selectng objects within your layout. If you add User Draf Layers to your
designs, the amount of objects will increase. Display Control Search makes it
easy to fnd objects within the dialog when needed.
Click the Edit tab in Display Control.
Click the Display Control ttle bar and start typing the text Net.
The Search Bar appears, and the frst instance of the text Net in
Display Control appears highlighted.
Click the Find next buton in the Search Bar to fnd the next instance of
the text Net in Display Control.
Note: You can also use Find previous for your searches.
Once you have found the object you were searching for, click Finish
search.
150
Select Mode, Intelligent Cursors, and
Context Sensitve Menus
When designing in Xpediton xPCB Layout, you are in Select Mode. This mode
uses the Selecton Filters in Display Control to provide intelligent cursor
feedback and context sensitve right mouse buton menus based on the
objects you select.
Hover the cursor over the Fiducial. Note the Locked Cursor.
Note: The Status Bar also provides informaton on the object.
Right-click on the fducial and click Fix/Lock > Unlock.
Repeat step 1, but note the Move Cursor showing that this fducial can
be moved.
Repeat step 2 and click Fix/Lock > Fix. Note the Fixed Cursor.
Selecton List
In Xpediton xPCB Layout, selected objects are placed in the Selecton List.
You can easily access this list to verify or refne a selecton set.
Drag a frame select to defne a selecton area around the Board Outline,
Fiducial and Mountng Hole as shown. The objects are selected.
Right-click and click Selecton > Selecton List.
The Selecton List shows four objects selected.
You can select any object in the list to: Fit It in the view, Blink It so it
can be easily dectected, Defne the Sort Order, or Remove it from the
Selecton set.
Close the Selecton List.

151
Creatng a Scheme
There are many schemes already provided with Xpediton xPCB Layout.
You can edit any of them to your personal requirements, or you can
easily create new ones.
Click Fit Board.
In Display Control, choose the Placement_Create scheme. The scheme
has been started for you, but a few items should be added to make it
more efectve. Note the layers currently viewed.
In the Display Control > Objects tab, expand
Place and enable both Top and Botom
Facement: Group Outlines, Part Ref Des, and
Place Outlines.
Expand Part Items and enable Part Hazards and
Rooms for Top and Botom Facement.
Right-click on Part Ref Des and Add to Favorites
so you can easily access it from the Edit tab.
Enable Place Obstructs for the Top and Botom
Facement.
Expand Netlines > Netline Types and add
Non-Ordered Open and Ordered Open to your
Favorites.
Click the Edit tab and review the Favorites you
added.
Save the scheme and name it Placement_FirstLast
then enable Save locally with design and click OK.
Note the new display objects now
available in the view and thus saved in the
newly created Display Scheme for recall at
any tme.

152
Adding Views
Xpediton xPCB Layout allows you to add view windows to create multple work
areas that can be set for diferent graphical setngs and areas within a design.
These views are used individually but updated simultaneously.
Select Window > Add PCB View.
The view is added as a second tab, 2: CORPORATE.
Select Window > Tile Vertcally.
Click the 2:CORPORATE view to make it actve.
Click Display Control and choose the Routng scheme.
In the 1:CORPORATE view, zoom to and select U25.

Notce that U25 is also selected in the 2:CORPORATE
view.
Right-click the Tab for 2:CORPORATE and click Floatng.
The view is undocked and can be re-sized and moved
where you want it.
Close the 2:CORPORATE view and Maximize the
1:CORPORATE view.
Click Fit Board and Exit Xpediton xPCB Layout without
saving.
153
Review Questons
1 Do I need to have all of the Toolbars visible?
2 Can I create my own menus and toolbars?
3 Are my Favorites and Hidden Rows saved with my schemes?
4 Can I view multple schemes at the same tme?
Review Answers
1 Some designers like to have all of the toolbars visible, but this is your
choice. In Xpediton xPCB Layout, all of the commands needed during a
design session are available on the Standard Menu. Additonal
commands are also on right mouse buton context sensitve menus and
the Acton Keys.
2 Using the menu and toolbar Customize menus, you can create menus
and toolbars that contain only the commands you wish to use. These
are saved into your local confguraton.
3 Anything you change in Display Control that you save into a scheme is
saved. This includes Favorites, Hidden Rows, and also anything in the
Color by Net, Class, or Group sectons.
4 Only one scheme per Editor Window view is allowed, but by using
Multple PCB view windows, you can use diferent schemes in each
window, and move easily between the windows as you design.
154
Lesson 14: Setng Up a New Board Design
Setup Parameters
General Setngs
Open Xpediton xPCB Layout.
Select File > Open, then browse to
C:\Xpediton_Evaluaton\Lesson2\PCB , then double-click
CORPORATE.pcb.
Select Setup > Setup Parameters...
Click the General tab and review the setngs shown in the fgure.
Verify that they match.
Your PCB layout will have 6 physical layers.
The Units you will design in will be Thousandths or Mils.
Note: The General tab is also where you:
Remap Layers to add or reduce the PCB stackup layer count
Add or remove User Defned Layers
Change Padstack Technology fles
Modify Test Point setngs.
(Note: All of these setngs in Setup Parameters were preset in your
Layout Template. This is an easy way to be consistent and more
efcient with your layouts.)
Now that you have integrated your PCB database, you are ready to start your
PCB layout. First, setup the PCB database for any specifc design
requirements. This includes the Board Outline, Mountng Holes, Fiducials,
and Keepouts. Setngs for Database Units, Layer Stackup, and Vias will also
be needed to prepare your database for layout.

155
Setup Parameters (contnued)
Via Defniton
Click the Via Defnitons tab.
There is currently a Through Via setup in this design. In Via Defnitons,
there can be only one Through via defned. If you need additonal
Through via sizes in your design, they are added in Constraint Manager. You
will add one for Power and Ground signals prior to routng the layout.
Creatng HDI Vias (Blind and Buried)
Xpediton xPCB Layout makes it easy to set up HDI vias. When used during routng,
Xpediton xPCB Layout will automatcally recognize the HDI via layer structure for
you.
You need to change the outer layers of the design to Buildup layers. Click the
dropdown list for Laminate 1-2 and change to Buildup 1-2. Repeat the steps
for Laminate 5-6 and change it to Buildup 5-6.
Click the New icon to add a via. A new column appears in the dialog box.
In the new via column, for the Padstack row, click the dropdown list and
select the VC025D010P_UVIA_NSM via padstack. This via padstack is a
Micro Via, typically laser drilled during PCB fabricaton.
In the new via column, click in the green box for the Buildup 1-2 row. This
establishes the via padstack to be used when routng between layers 1 and 2.
Using the previous steps 3 through 5, create a new Micro via that will be used
to route between Buildup layers 5 and 6.
Again, use the previous steps 3 through 5, select the padstack VC060D030P
from the dropdown list to create the Buried via padstack on Laminate layers
2 through 5 that will connect the 2 Micro vias, creatng a 1-4-1 HDI via
structure.
Click the Sort icon and review the Via Defnitons you created. They should
match the fgure shown. You may need to click the sort icon a second tme
to match the screenshot.

156
Setup Parameters (contnued)
Via Clearances
Click the Via Clearances tab.
The Via Clearances tab is used to override same net Via to Via clearance
rules between diferent via stack defnitons. Take a moment to review
the dialog box.
Click OK to save the setngs and close Setup Parameters.
The board will reload with the new setngs.
Layer Stackup
You can defne the conductve and dielectric materials that make up the
structure of the board. Layer stackup structures are modifed in Constraint
Manager with the Stackup Editor.
You will need to adjust the thickness of the outer layers of the board since we
modifed these as Buildup layers for the HDI vias.
Open Constraint Manager by selectng Setup > CES..., or by clicking the
Constraint Manager toolbar icon. Select Setup > Stackup Editor.

157
Setup Parameters
Layer Stackup (contnued)
Select the text entry feld in the Thickness column for
Layer Name SIGNAL_1, enter the value 0.7.
Repeat step 5 for Layer Name SIGNAL_6.
Select the text entry feld in the Thickness column for the Dielectric
layer between SIGNAL_1 and SIGNAL_2, and change the value to 2.
Change the Thickness of the Dielectric between SIGNAL_5 and
SIGNAL_6 to the value 2.
Review the fgure shown for the Layer Stackup setngs you will use
in your board.
You can also change the Layer Name in the Stackup Editor, but the names
must be unique.
Select the text entry feld in the Layer Name column for SIGNAL_3
and enter the name change to PLANE_3.
Repeat step 10 for Layer Name SIGNAL_4, and change it to PLANE_4.
Click OK, to close the
Stackup Editor and save
the changes.
The New Layer Names
are refected in
Display Control.

158
Drawing the Board Outline
Your PCB design must have a Board Outline which defnes the physical border of
the PCB board. Xpediton allows only one. If you defne a new outline, it replaces
the existng outline. Your board will also need a Route Border to defne the route
and plane area of your board.
Click Fit Board to ft the Board Outline to the view.
Select Draw > Board Outline.
In the Propertes dialog box, the Type is set to Board Outline. Type 5 in the
Line width text entry feld .
Click in the Vertces 1 X text box, type 0, then press the Tab key.
In the Vertces 1 Y text box, type 0, then press the Tab key. A line now
extends from the 0,0 coordinates to your cursor and the Propertes dialog
box is ready to accept more coordinate entries.
Use steps 4 and 5 and startng from the Vertces X text box for
coordinate #2, enter the rest of the coordinates from the table shown.
Your cursor will show the coordinates as they are entered.
When you enter the last coordinate from the table, the polygon will
complete and a warning message will appear. Click OK and your Board
Outline is completed.
NOTE: Check the box in the warning dialog to not display the warning message
again.
Close the Propertes dialog box.
Save your design, but do not close it.
Note: All shapes (including the Board Outline), can be created using
coordinates entered manually in the Propertes dialog box, or by
digitzing the coordinates with the mouse.
You can also use the File > Import DXF or IDF commands to import any
shape coordinate fles created on 3rd party mechanical EDA systems.
159
Modifying Shapes (Board Outline)
You can easily edit all shapes, including the Board Outline. In order to edit
shapes, you must frst have the proper selecton flters enabled. You can also
easily Add Corners, Chamfers and Radii to any shape.
Click Display Control, or click the Display Control Auto Hide tab.
Click the Edit tab, and in the Global View and Interactve Selecton
secton, expand the Board Objects and make sure they are checked
for Visibility and Selecton.
From the menubar, select View > Toolbars > X-Y Readout.
Zoom into the Board Outline in the area shown, and select the outline.
Select the White Corner Handle at 590,324 and right-click Propertes,
change the Vertex Type to Round. The handle box should appear flled.
Select the White Corner Handle at 590,0 and in Propertes, change the
Vertex Type to Chamfer.
Select any Red Center Handle and Drag to move the segment. Click
Undo to put the segment back.
Select any Red Center Handle, press the CTRL key and Drag to add a
new Corner Handle. Click Undo to remove the new handle.
Note: You can Select and Drag any Corner Handle to move it.
Using step 4 and 5, change the vertces in the edge connector area as
shown, then Save your board.

160
Drawing the Route Border using Copy Shape
You could redraw the Route Border for this board, but you can also use Copy
to duplicate any shape. When a new Route Border is defned, it replaces the
existng one.
Select the Board Outline.
Hold the CTRL key and double-click on the Board Outline. It copies the
shape and highlights the newly-created copy.
Right-click and open Propertes. The new shape is shown as a Draw
Object on the Assembly Top layer.
Change the Type to Route Border.
To make sure that all routed copper is pulled back from the edge of the
Board Outline by 20th, in the Grow/Shrink text entry feld enter -20 to
Shrink the Route Border. Press <Enter>. Your Route Border is now
completed.

161
Plane Classes and Parameters
Before you assign planes, you need to defne the setngs for generated plane
copper. Plane Classes and Parameters defne Thermal defnitons, General
clearances, and Hatching optons for planes. You can also create Plane Classes
when diferences are required between plane structures.
Select Planes > Plane Classes and Parameters
Click New Plane Class, and enter POWER for the Plane Class.
Click the Thermal Defniton tab, and choose Buried from the Default
via connectons > Tie legs dropdown list.
All vias in your board will be directly connected to the planes.
Click the Clearances/Discard/Negatve tab, and select All unted areas from
the Discard plane area optons.
This setng allows the planes automaton to remove any small or large plane
area that is not directly connected to a pad or via.
Click the Hatch Optons tab, and verify that the Width and Distance are 6(th),
and the Metal is 100%.
These setngs create a Solid plane with no hatch patern.
Click OK to save the setngs.

162
Planes Setup
Set up planes for your main power rail signals at the beginning of the design so
they can be used as a reference during placement and routng.
Plane generaton is dynamic and WYSIWYG. You can have Positve, Negatve and
Split-Mixed planes in your board.
Select Planes > Plane Assignments
Click the dropdown box for Layer Usage on Layers 3 and 4, and choose
Plane.
Click the dropdown box for Plane Data State on Layers 3 and 4, and choose
Dynamic.
Note: There are other states for plane data: Draf and Statc, but to use true
WYSIWYG, set your planes to Dynamic.
Click the Assign Nets icon for Layer 3, Add/remove nets from plane
layer.
Find netname GND in the Excluded column and move it to the Included
column. Click OK.
HINT: Select the frst entry in the list and type "G" on the keyboard to quickly
locate the GND net.
Using steps 4 and 5 for Layer 4, and add netname VDD.
Click the opton buton for Layers 3 and 4, Use route border as plane
shape. Since you added a Route Border, for these planes you will not need
to add a separate shape.
Setup and verify your Plane Assignments to the fgure shown.
Note: The Plane Class is POWER. The Plane Data State is Inherited for
these two planes. They will adopt the Dynamic state and POWER class.
Click OK to save and close the Plane Assignments.

163
Defning Routeable Layers
Once you have defned planes, you must change the Layer Setngs to Enable
or Disable layers for routng. You must also set the routable layer pairing and
directon bias.
Click the Editor Control buton or the Editor Control Auto Hide tab, and
then click the Route tab in Editor Control.
Expand the Dialogs secton and click Layer Setngs...
Change the setngs for Layers 3 and 4 (Note the P signifying that this is a
Plane layer)by unchecking the box for Enable Layer. Since these are planes,
disabling this optons prevents routng on these layers from occuring.
The Bias column sets the directon for routed traces.
In the Layer Pair column, click the dropdown box in the Layer 1 row,
and choose Layer 6 to pair these layers.
Repeat step 5 for the Layer 2 row, and choose Layer 5 to pair these
layers.
Note: Layer Pairing defnes the complement layer for routng when an automatc
layer change method is used.
Click OK to save and close the Layer Setngs.
Click the Display Control tab, and then click the Edit tab.
In the Layer Display secton verify:
the Actve Layer and its pair are highlighted
the Planes are disabled (shown dimmed)
the Bias directons are shown

164
Adding Mechanical Features
When setng up a new board you may need to add mechanical features like
Mountng Holes, Fiducials, and Keep Out Areas.
Placing Origins
Click Fit Board to see the entre board.
Select Place > Origin
Click the Type dropdown, and choose Board, and for the Locaton enter
X: 295.28 and Y: 190.16.
Click Apply, then click Fit Board to see that the Board Origin has moved.
Note the warning dialog and dismiss it by clicking Yes.
Repeat steps 3 and 4 again, but choose NC Drill as the origin to move,
and for the Locaton enter X: 0 and Y: 0.
Close Place Origin.
Placing Mountng Holes
Select Place > Mountng Hole
Choose the Padstack MC100D380N dropdown box.
Enter X: 0 and Y: 0 for the frst Locaton.
Choose Locked from the Lock Status dropdown to keep the mountng
hole from being moved afer placement.
Click Apply to place the frst mountng hole.
Repeat steps 9 through 11 using the coordinates in the chart to place
the last 3 mountng holes.
Close Place Mountng Hole.

165
Placing Fiducials
Zoom in on the lower lef mountng hole.
Select Place > Fiducial...
Choose the Padstack Fiducial Round Cell 100.
Click Apply, the Fiducial ataches to the cursor.
Place the frst Fiducial as shown.
Note: The Fiducial is placed on the Top (Layer 1), which is the actve
layer.
Right-click and select Push to switch the actve placement layer to the
Botom of the board.
Place the Botom Fiducial in the same locaton as the previous one you
placed on the Top.
Repeat steps 2 through 7 to place 2 more sets of fducials as shown.
Right-click and select Cancel Place to end placement mode.
Close the Place Fiducial dialog box.

166
Placing Obstructs (Keepouts)
Zoom in on the lower lef mountng hole.
Click Display Control > Objects and expand Route Obstructs.
Check the Obstructs as shown to make them visible.
Note: The mountng holes and fducials have routed trace and via
obstructs built into the library components.
Click Editor Control > Grids > Other Grids, then enter 25 for the
Drawing grid.
Select Fit Board, then zoom in on the right hand board edge.
Select Draw > Placement Obstruct.
In Propertes, choose Top from the Layer dropdown.
Draw the Placement Obstruct approximately as shown to protect
placement of components too close to the board edge.
Save and Close your design.

167
Review Questons
1 Why do I want to create a Board Outline and Route Border?
2 Does the Board Outline need to be a single contnuous polygon?
3 Can I add cutouts to the board outline?
4 Can additonal planes be added to the board at any tme?
5 What types of Mountng Holes can I use?
Review Answers
1 The Board Outline acts as the design boundary. Components and
routng can be setup to maintain specifc clearances from the Board
Outline and Route Border. The Board Outline is used as a reference
point for ofsetng plane edges, and also represents the routng
(milling) path for producing the fnal board shape extents.
2 The Board outline is constructed as a contnuous closed polygon to
maintain the integrity of the design object.
3 Yes, Contours can be used to add Cutouts and Slots to the interior of
the Board Outline to accommodate any mechanical requirements.
4 Planes can be setup at the beginning of the design, but you may add
additonal planes during the placement, routng, or any phase of your
design.
5 Mountng Hole types are defned within your Library. They can be Plated
or Non-Plated. They can be any shape, including slots. They can also in-
clude Routng and Placement Obstructs as needed.
168 Placement
Lesson 15: Placement
Open the Design File for Placement
Open Xpediton xPCB Layout and from the Start
Page select Open, then browse to and choose:
C:\Xpediton_Evaluaton\Lesson3\PCB\CORPORATE.pcb
Select Display Control, then choose the Placement scheme from the
dropdown list.
Select Editor Control > Place and verify that Online 2D Placement
DRC is set to Warning.
Select Editor Control > Grids.
Expand the Part Grids secton, then enter 25 for the Primary and 5 for
the Secondary grid values.
Note: Components with more than 14 pins will use the Primary Grid.
Click the Constraint Manager toolbar icon, then click the Clearances
within the Navigator.
Click General Clearances, (or select Edit > Clearances
> General Clearances from the Constraint Manager
toolbar) and change the Placement Outline to
Placement Outline value to 10.
Note: This will allow component packages bodies to be placed at a
minimum distance of 10 without DRC violatons.
Click OK to save your changes, then close Constraint Manager.
When designing a PCB, the actual percentage of route completon depends
on your placement strategy. Careful placement will minimize issues later in
the design cycle.
You can place parts in pediton with multple methods. The most
common method is with Component Explorer, but you can also place by
schematc or the embedded schematc fle created during forward
annotaton. Component Explorer allows you to Group, Filter, Search, Sort and Mark
components for ease of use during the placement phase.
169 Placement
The Component Explorer Spreadsheet and Toolbar
Select Place > Component Explorer...
Click the Ref Des header in the frst column to sort the column.
Click Toggle Filters. These panes allow you to use the drop-down flter
or enter your own search criteria for the column.
The Navigator lists all of the Components, Planning Groups, Spares,
Mechanical and Drawing Cells available for placement.
The Components tab lists all electrical components. The Other tab
lists Mechanical and Drawing items.
Review and Scroll through the available column informaton. Move the
column locatons by selectng and dragging them to a new locaton.
Right-click on any column to choose which columns to display.
Select any component and click Component Preview for a preview of
the Cell.
Based on your selecton criteria, Connecton Optons provides
netlist informaton in the Connectons column about components.
Connecton optons drive the connecton count in the connectons
column of the spreadsheet.
Explore the spreadsheet interface, and when you are ready, you can
start placement.
Component Explorer
Component Explorer is a spreadsheet interface used during component
placement. It allows you to place individual components or Planning Groups
of components. Search and Sort features will also allow you to fnd and mark
components easily.

170 Placement
Placing Planning Groups
Component Explorer helps you to quickly foor plan your layout. Placing
these Top level groups frst, then extractng components from within the
groups will allow you to place your design with more efciency.
Click Fit Board.
In the Component Explorer Navigator, select the planning group
CONNECTORS and drag it into the board.
Inside of the bubble, right-click on the reference designator and choose
P1 from the list of available parts, then drag it to the locaton shown.
Click on each new Ref Des within the bubble and drag it to the
placement locatons shown. The bubble disappears when the group has
been completely placed and the Group Outline now represents all of the
placed items in that group.
171 Placement
Placing Planning Groups (contnued)
Repeat step 2 to place the remaining Planning Groups as shown.
Note: The Navigator shows the CONNECTORS group Placed, (notce the
icon next to the name has changed) and the other groups Unplaced.
You may right-click the group name for a status report.
Also, the LOGIC_REUSE group has Unplaced sub-groups which will be
placed later. The State column provides informaton if the components are:
Placed, Unplaced, or Dispersed outside of the board outline.
Connectvity relatonships are also shown between the Planning Groups.
172 Placement
Placing Components Individually or Sequentally
Enter U2 in the Filter pane of the Ref Des column and press enter to
search for the component (be sure the top level of the Navigator pane
is selected).
Select U2 and drag it into the board. Zoom into the area if needed.
Using the dropdown list in the Filter pane of the Ref Des column,
choose U*.
Select U3 thru U5, and drag them into the board. Each
component will atach to the cursor and be placed sequentally in the
order selected in Component Explorer (you may need to sort the Ref
Des column to make this task easier).
173 Placement
Create a New Planning Group
You can easily create New Planning Groups or add to existng groups within
Component Explorer and these group changes will be back annotated to your
schematc.
Right-click the Root Navigator group and select New.
Rename Newgroup1 to DIFFRECV.
Select and right-click the group DIFFRECV, and select Set to Actve
Group.
From the Ref Des column select the components U2 thru U5 that you
just placed.
Right-click and select Add to Actve Group to complete the group (you
may also add components directly from the layout view right-click
Selecton>Add Selected to Actve group).
Note: Making any existng group the Actve group will allow you to add more
components to that group.
174 Placement
Add New Components to Room
Select the Root level in Navigator and fnd Ref Des U101.
Scroll right to the Assigned Area column, and choose RM-ANALOG from
the drop-down list.
Right-click on the ANALOG_SW group and Set to Actve Group.
Right-click on U101 and Add to Actve Group.
Creatng Placement Rooms
In the Xpediton xDX Designer lesson Adding Rules and Constraints Using
Constraint Manager, you created a placement rule to constrain components
to a specifc area of your board. This is called a Room. You will now add the
Room to your board.
Click the Fit Selected and Toggle Cross Probe icons in the Component
Explorer toolbar.
Select the ANALOG_SW group in the Navigator and scroll the
spreadsheet to the last column. The Assigned Area (Room) is named
RM-ANALOG for this group.
Note: The Group has been selected and fted in the editor window
Zoom out slightly.
Select Draw > Room, in the Propertes dialog box Layer drop-down list
choose Both. In the Name drop-down list, choose ANALOG.
Draw the Room as shown (use the F9 Acton key to create a rectangle).
Close Propertes.
175 Placement
Placing Components from the Schematc
If you choose not to use Component Explorer for placement, you
can always cross probe and place from the Xpediton xDX Designer
schematc.
Click Fit Board.
Click Setup > Design Entry to open Xpediton xDX Designer, then
double-click on the control_bufers schematc sheet.
Zoom into the area of U15 and U16.
Note: The symbols for U15 and U16 are highlighted Gray, denotng that
the components are not placed on the PCB.
In the Layout, click Place by Schematc in the Component
Explorer toolbar.
Select U15 in the schematc, then move the cursor into the board
area. U15 is atached to the cursor. Place the component as
shown.
Repeat step 5 for U16.
Note: U15 and U16 are now highlighted Blue denotng that the
components are now placed in the PCB.
Close Xpediton xDX Designer.
176 Placement
Placing Components from the Embedded Schematc View
The Embedded Xpediton xDX Designer schematc view can be used for cross
probing and placement, without having to open Xpediton xDX Designer.
Click Fit Board.
Select Window > Add eDXD View, then select Window > Tile Vertcally
to show both windows side by side.
Note: You can also Undock the embedded view by right-clicking on the window
tab and choosing Floatng.
In the Layout, click Place by Schematc in the
Component Explorer toolbar.
Right-click anywhere inside the embedded view and
click Sheet > CORPORATE(control_bufers).
Select U23 in the embedded view, then move the cursor into the
board area. U23 will be atached to the cursor. Place the component as
shown.
Repeat step 5 for U17 and place it above U23 as shown.
Close the eDXD view and maximize the editor window.
Close Component Explorer.
177 Placement
Placement Editng
Xpediton xPCB Layout has multple methods in which to edit the component
placement in your board. Context sensitve selecton and menus make it easy
to Move, Rotate, Align, Fix and Lock, or Push components to the botom side
of the board. The editng commands also can be used during placement of
components.
Moving Components
Zoom into the lower lef of the board near L1 thru L4.
In the Display Control > Edit tab > Global View and Interactve
Selecton, expand Place. Disable the Selecton of both the Top and
Botom Facement Group Outlines.
Select L1, then drag and drop L1 outside the board edge.
Select L2, then CTRL+Click to add L3 and L4. Right-click and click
Move. Move the 3 components outside the board edge, then click
to place them under L1.
Note: You just used two diferent methods to Move components. You
could have also used the Move Acton Key or Place > Move Part from the
Main menu.
All of the Xpediton xPCB Layout editng commands work with any
of these methods. Its your choice how you want to use them.
Rotatng Components
Frame select L1-L4 by dragging a window over the components.
Right-click and choose Individual Movement > Rotate 90.
Note: You can easily Rotate individual or groups of components to any
angle needed in your board.

178 Placement
Aligning Components
Select L4 and move it to the locaton shown.
With L4 stll selected, CTRL+ Drag Frame select L1-L3.
Right-click and choose Align > Align Right.
Note: Components can be aligned to the Top, Botom, Right or Lef
according to the Editor Control > Place > Part Alignment setng.
Pushing Components to the Opposite Side of the Board
Zoom out to the area of the board shown.
Select the two groups of resistors near L1 through L4 and near the
connector P2.
Right-click and choose Individual Movement > Push. The
components are moved from the Top side to the Botom side of
the board. Individual Movement will Push the components to the
back side and maintain their current rotaton when more than one
component is selected.
Fixing/Locking Components
Click Fit Board.
Select component P2.
Right-click and choose Fix/Lock > Fix to keep this component from
moving during other placement editng.
Note: The pads on P2 have a stpple patern denotng the component is
Fixed. This patern can be changed in Display Control > Graphic > Fixed
and Locked Paterns.
Practce using the placement editng methods you have learned,
and clean up the placement of the L1-L4 area of your board as
shown.
179 Placement
Copying and Moving Circuits
In this design, there are four matching circuits, IO_Ports 1 through 4. The Placement
features in Xpediton xPCB Layout easily allow you to place these circuits individually,
but there is an easier method. Copy and Move Circuits allows you to Place, and even
Route, like type circuits. Then, you can replicate the other circuits on your host design
or even a diferent design containing the same circuit.
Placing Hierarchical Groups
Planning Groups in Xpediton xPCB Layout can have multple levels to separate
individual circuits within a main group.
Click Fit Board, then click Display Control > Edit > Global View and
Interactve Selecton, and enable Visibility and Selecton for Top and Botom
Facement Group Outlines.
Zoom into the area of the LOGIC_REUSE group bubble.
Select IO_Port1 inside of the LOGIC_REUSE bubble, then drag the IO_Port1
bubble onto the board.
Repeat step 3 for IO_Ports 2 through 4 and place as shown.
Auto Arrange a Group
Zoom into IO_Port1, then select the Group Outline.
Right-click Arrange > Arrange One Level, then place the group.
Note: All of the components within the Planning Group are dispersed
within the Group Outline.
Using the placement editng commands from this lesson, place the
group as shown.
180 Placement
Copying and Moving Circuits (contnued)
Deletng or Unplacing Placed Components
To make room for our Circuit Copy, you will delete a few placed components.
These components are not deleted from the database; they are just put back
into Component Explorer as Unplaced.
Select just the resistors placed near P2.
Right-click Delete, the components are Unplaced.
Copying Circuits
Select the IO_Port1 group that you arranged and placed, then
right-click Copy, or press CTRL+C.
Note: The next available duplicate circuit, IO_Port2, is atached to the cursor
for placement.
Place the IO_Port2 group, and watch the next circuit atach to the
cursor.
Place the last two circuits as shown. You can easily Move the groups
by selectng the Group Outline.
Cancel out of the Paste Map dialog box.
That was easy!
Note: Copy Circuit can also be used between two board layouts by Copying
the Circuit, then opening another board with the duplicate or similar circuit;
then Pastng the circuit into the new board.
181 Placement
Placement Optmizaton
When placing components, your task as a designer is to shorten and
untangle routng paths. Placement of the components alone may not
accomplish this, so you may need to optmize the placement by swapping
components or gates and pins within the individual components. You may
also need to use an alternate package due to component availability, or even
just to create space.
Note: Your library components will need to be created with swapping capability or
alternate cell defnitons to use these features.
Swapping Components
Zoom to the area around U15 and U16 on the board.
Select Place > Swap Parts.
Select U15 as the frst component to swap, then select U16 as the
component to swap it with.
Click anywhere in the Editor window to Confrm the swap.
Click Undo or press CTRL+Z to undo the swap.
Swapping Pins and Gates
Select Route > Swap > Gates, then select pin 1 on U16. The Gates
available to swap with will highlight.
Select the highlighted Gate on pin 4, then click again to confrm
the swap. Note the netlines have changed with the swap.
Select Route > Swap > Pins, and select pin 1 again on U16.
The Pins available to swap with will highlight.
Select the highlighted Pin, then click again to confrm the swap.
This swap caused the netlines to cross, so Undo the pin swap.
182 Placement
Using Alternate Cells
Select Place > Component Explorer.
Select U15.
Within Component Explorer select the dropdown box in the Cell
column and choose the Alternate Cell, SOIC16 from the dropdown
list in the Cell column.
Move the modifed footprint to the locaton shown.
Repeat steps 2 through 4 for components U16 and U17, and change
them to the Alternate Cells.
Finishing Placement
Now its your turn! Finish placing the board using the methods in this lesson.
For hints on placement, the fnished placement is shown on the next page.
If you do not want to fnish the placement at this tme, you can contnue to
the next lesson the board will be placed for you.
Note: When you are fnished, Save your design and close pediton xPCB Layout.
183 Placement
The Finished Placement
184 Placement
Review Answers
1 Although Component Explorer is the most powerful method for grouping and selectng components for
placement, you can disperse components outside the board edge in Xpediton xPCB layout and then use
the placement editng methods to complete your placement. The place and disperse Keyins are listed
in the Help menu.
2 Xpediton xPCB layout supports checking of spacing violatons during placement and routng operatons.
In Editor Control, on the Place tab you can set Place Online DRC to Prevent mode. Also, you can allow
components to be shoved when a spacing violaton occurs.
3 During placement and move operatons you have many optons that allow you to rotate and push
components. The optons can be accomplished using the Toolbars, Menus, Acton Keys, Right Mouse
Buton Context Sensitve Menus, and modeless Keyin Commands.
4 Many designers partton a design into functonal blocks before fnal placement, which can be done in
the schematc or in the PCB. Rather than placing each component individually directly onto the board,
you can create planning groups of the parts in a partcular circuit. You then move them to a clear area in
the workspace for placement arrangement. Once you have the planning group optmally arranged, you
can move the entre planning group to the desired locaton on the board. As the layout matures, you can
also use the group selecton capability to move clusters of components around the design as required.
You can even rotate, push, and freeze groups during move operatons.
5 Radial placement is useful when you have components that you want to place on an arc or in a radial
array. An IC test fxture board is a common example of a design requiring radial placement. There are
also many modern products that have form-ftng smooth curves in their design that would require you
to place parts in a radial patern.
Review Questons
1 Can I place components directly in Xpediton xPCB layout?
2 How do I place components without creatng spacing violatons?
3 Can I rotate a component while moving it?
4 How would I utlize Group Planning and Placement?
5 When would I use Radial Placement?
185
Creatng Rules and Constraints with Constraint Manager in the PCB Layout
Lesson 16: Creatng Rules and Constraints with
Constraint Manager in the PCB Layout
Entering Constraints
From the Start Page, select Open and browse to:
C:\Xpediton_Evaluaton\Lesson4\PCB\CORPORATE.pcb.
Select Setup > CES, or click the toolbar buton to open the Constraint
Manager spreadsheet interface.
The Spreadsheet interface is exactly the same as the one you used with
Xpediton xDX Designer. You do not need to learn a new interface.
In the Xpediton xDX Designer lessons you learned that pediton has a built-in
constraint management system. This lesson will review some of the features
within Constraint Manager. You will add constraints using the same graphical
spreadsheet interface you used in Xpediton xDX Designer, and see how
Xpediton xPCB Layout is linked through the iCDB database to your schematc to
keep the design constraints synchronized. You will discover that constraints are
easily maintained in Xpediton xPCB Layout and you do not have to learn a new
tool or interface for constraint management.
To review the Constraint Manager interface and toolbars, refer to Lesson 7:
Adding Rules and Constraints with Constraint Manager.
186
Constraint Manager Cross Probing to the PCB
In Xpediton xPCB Layout, cross probing is bi-directonal to Constraint Manager
and works the same as in Xpediton xDX Designer.
Look at your Constraint Manager Interface. On the Main toolbar, the Cross
Probe toggle icon should be enabled. If not, enable it. You can also turn on
Cross Probing using Setup > Cross Probing.
In the Xpediton xPCB Layout Editor window, click Display Control and
choose the Routng scheme.
In the layout, select Setup > Cross Probe > Setup and enable the setngs
for Select, Highlight, and Fit view in PCB, then click OK.
Select Edit > Find or the Find buton and choose the Net Tab.
Enter CLK_IN in the search text box, then click Apply.
Double-click the CLK_IN netline highlighted in the Find dialog box.
Notce the CLK_IN net is Selected, Highlighted, and Fit within the Editor
window, and the net is also highlighted in Constraint Manager.
Note: In Display Control > Graphic Tab > Graphic Optons you may need
to expand the Selecton & Highlights secton and adjust Dim Mode
to beter view highlighted objects.
Close the Find dialog box.
187
Constraint Manager Cross Probing to the PCB (contnued)
In Constraint Manager, on the Nets tab, scroll down to the Constraint
Class/Net BSYNC and click on the Box to the lef of the Constraint Class.
Notce that both of the nets in the Constraint Class BSYNC are selected
and viewed in the PCB Editor window.
Select Filters > Level > Pin to flter down to the pins level of a net.
Expand the BSYNC+ net and select the box next to the P1-1 pin within
the net.
Notce that the P1-1 pin is now selected and highlighted in the PCB
Editor window.
In Display Control, choose the Placement scheme.
In Constraint Manager, select the Parts tab, then expand the 101-RES
part type.
Select the box next to R24. R24 is selected and highlighted in the Editor
window.
Constraint Manager can Cross Probe to Constraint Classes, Nets, Pins, and
Parts in Xpediton xPCB Layout as well as in Xpediton xDX Designer.
All at the same tme!
188
Updatng Constraints and Clearances
Although constraints were entered into the schematc in Xpediton
xDX Designer and passed to Xpediton xPCB Layout during Forward
Annotaton, ofen a PCB designer needs to modify those constraints.
Constraint Manager allows you to easily update constraints in the
PCB layout and keep the schematc design synchronized.
Updatng Powers and Grounds
In Constraint Manager, select the Nets tab.
From the Group Box drop-down list, select Power Nets.
Scroll and fnd the Physical Net PWR and check the Power Net box and
enter 0 for the Supply Voltage (V).
Repeat Step 3 for Physical Net V2.7. and enter Supply Voltage (V) value
of 2.7.
Note the Power Net icon on the net names in the Constraint Class/Net
column.
Update the Net Class dropdown list for Net Name PWR to
PWR_020_MIL.
Sort by the Net Class column to easily view the net names in the
PWR_020_MIL Net Class.
189
Updatng Constraint Manager Schemes
Schemes in Constraint Manager defne categories of physical design rules
that will be used during PCB Layout. The Master and Minimum schemes are
the default schemes.
In this lesson we will update the Master scheme and create a new scheme
that will be used for a Rule Area on the PCB.
In the Navigator window, expand the Master scheme and expand
Trace & Via Propertes tab.
Select the Filters Group dropdown and choose All.
Click on the Master Scheme to see the trace and via propertes
currently set for the design.
Follow the illustraton at the right to update the Trace Widths for
Minimum, Typical, and Expansion, and the Diferental Spacing for all
of the Net Classes in the Master scheme.
Click OK when the dialog box appears, or check the box if you do not
want to be warned about further changes being made.
Expand the BSYNC Net Class to see that your updates were
propagated to all layers in the Net Class.
Creatng a New Scheme
In the Navigator, right-click Schemes and choose New Scheme.
Right-click on the new scheme and Rename it to FPGA.
Expand the FPGA scheme and change the values for the Default Net
Class to match the picture.
Click the AMBER indicator to update the Pending CES Changes.
You will now create a Rule Area on your PCB to use this scheme
when routng.
190
Creatng a PCB Rule Area
Rule Areas are used on PCB Layouts to create an area where specifc routng
constraints may need to be overridden due to density, circuit impedance, or
other engineering requirements.
The New Scheme that you just created contains reduced trace widths that
will be used during routng of a smaller pitch FPGA device.
In the Editor Window, Zoom to U12, the FPGA device on the right side of
the board.
In Display Control > Objects > Route Areas, verify that Route Border
and Rule Areas are enabled.
Select Draw > Rule Area.
In the Propertes dialog box, select the dropdown list for Layer and choose
(All).
In the Propertes dialog box, select the dropdown list for Name and choose
the FPGA scheme that you just created in Constraint Manager.
Select View > Toolbars > Draw Create and choose Add Rectangle.
Select a coordinate at the upper lef of the FPGA, then drag the
rectangle and select a second coordinate at the lower right of the FPGA.
Close Propertes.
This new Rule area reduces all traces that pass through it to 4(th) for All
layers. You can also use Rule Areas to change the required Via within the
area if needed.
Note: You created this Rule Area in the PCB database. Rule Areas can
also be created inside your Cells using the Cell Editor in Xpediton xDM
Librarian.
191
Updatng Clearances
In the Constraint Manater Navigator, expand Clearances under
the Master scheme.
Select the HS_3W Clearance rule.
In the spreadsheet, fnd the Trace To Pad column, then in the
HS_3W row update the parent entry to 8 and press Enter.
Repeat step 3 and update the columns: Trace To Via,
Trace To Plane, and Trace To SMD Pad to 8.
Note: You may also paint the number across any spreadsheet entry by
selectng the entry box and dragging the small + indicator across the
spreadsheet.
Assigning Clearances
Click the Class to Class Clearance Rule icon in the Clearances
toolbar.
The Class to Class Clearances dialog box opens and is set to the
Master Scheme.
Under the (ALL) column, choose the dropdown list for the CLOCK2
Net Class and choose HS_3W. This assigns the HS_3W rule to all
nets within the Net Class CLOCKS2, and applies it against ALL
other nets within the design.
Click OK. Your Clock signal spacing rule has been completed and
saved to the database.
Note: If you do not assign a Class to Class Clearance rule to a Net Class, then the
Default rules will be used.
192
Creatng Net Classes
In the Navigator, right-click on Net Classes and select New Net Class.
Name the New Net Class FADDR and click on the FADDR Net Class.
Right-click on FADDR, and select Assign Nets.
In the Assign Physical Nets to Net Class dialog box, make sure the
Source Net Class is Default and the Target Net Class is FADDR.
In the Search Bar, search for FADDR* nets, then click on the Search icon.
Click > to move the FADDR* nets to the FADDR Net Class, then click OK.
Create a New Net Class called FDATA.
Repeat steps 1 to 6 and add the FDATA* nets to the FDATA Net Class.
Deletng Net Classes
When you create constraints you may fnd that you no longer need some Net
Classes. You can easily delete them.
Warning: Any constraint informaton you entered into a Net Class will be
deleted also.
Right-click on the Net Class ANALOG and choose Delete.
Verify that you want to delete the Net Class by clicking Yes.
193
Automatcally Creatng Diferental Pairs
In the Constraint Manager lesson for Xpediton xDX Designer, you created a
diferental pair manually. For this lesson, you will learn how to automatcally
assign multple nets as diferental pairs to help speed up constraint entry.
In Constraint Manager, select Edit > Diferental Pairs > Auto Assign Dif-
ferental Pairs
Select Assign by Net Name, then choose *_P from the Net Name
dropdown list.
Choose *_N from the Pair net name dropdown list.
194
Automatcally Creatng Diferental Pairs (contnued)
Click Assign Matches. The Dif Pairs matching the search criteria appear in
the Proposed diferental pairs list.
Click Apply to create the diferental pairs.
Close the Auto Assign Diferental Pairs dialog box.
On the Nets tab, sort the net column so the new Dif Pairs appear at the
top of the listng. Right-click and select Sort > Ascending.
Select the box for the frst Dif Pair, then press and hold the Shif key to
select the last of the four Dif Pairs.
Now press the Ctrl key and click the Net Class dropdown list, then choose
DP_ 100_OHM to add all of the dif pairs to the Net Class.
195

Customizing Constraint Groups
There are several preset Constraint Groups within Constraint Manager, but you
have the ability to customize them or create your own based on the needs of
your design.
Click the Constraint Group dropdown list and select Edit Constraint
Groups.
Click the Select constraint group dropdown list and select the Lengths
group.
In the All constraints: secton scroll down and select Stub Length Actual
and Stub Length Max.
Click the Move selected right buton to move these constraints to the
Constraints assigned to group secton.
Click Apply to save the changes, and the Stub Lengths columns will now be
available from within the Lengths group.
Click Close to exit Edit Constraint Groups.
196
Creatng a Constraint Class
In the Navigator, right-click on Constraint Classes and select New
Constraint Class.
Name the New Constraint Class MATCHTRACK.
Right-click on MATCHTRACK and choose Assign Nets
In the Assign Nets to Constraint Class dialog box, make sure the Source
Constraint Class is All and the Target Constraint Class is MATCHTRACK.
In the Search Bar, search for ASYNC* nets, then click on the Search icon.
Click > to move the ASYNC* nets to the MATCHTRACK Constraint Class,
then click OK.
197
Creatng a Constraint Class (contnued)
Select the Nets tab, then select the Group box drop-down list and select
Delays & Lengths to set the columns for length constraints.
While on the Nets tab, select the MATCHTRACK Constraint Class in
the navigator to isolate it in the spreadsheet, then scroll to the
Length Columns.
In the Length > Match column for nets ASYNC+ and ASYNC-, enter the
text ASYNC.
In the Length > Tolerance column 'Tol(th)' for MATCHTRACK,
ASYNC+ and ASYNC-, enter a value of 200. You will NOT need to re-add
the 200th tolerance as its assumed for the match group ASYNC.
Repeat steps 8 and 9 to add Length Matching Constraints to the Dif
Pairs you auto-assigned. (Click on All in the navigator and sort to
see the other nets).
Note: Follow the illustraton to set the correct Min Length and Max Length.
Update the Stub Length for the Dif Pairs to a Max of 300.
Note: Normally you would need to change the Group box back to ALL to
view these columns, but since you added these columns through Edit
Constraint Groups, they appear in the Length group.
Close Constraint Manager and save your layout in Xpediton to
save the updates to the iCDB.
198
Ordering Nets with Netline Manipulaton
In the Constraint Manager lesson for Xpediton xDX Designer, you created Ordered
Nets within Constraint Manager. You can also set up Net Ordering graphically in
Xpediton xPCB Layout using Netline Manipulaton. Any netline topologies that
you graphically order are automatcally updated in Constraint Manager.
Using Color by Nets or Net Class
In Xpediton xPCB Layout, you can easily change the color of individual Netlines,
Net Classes, and Constraint Classes to make them more visible.
Click Fit Board.
So you can identfy the nets to be ordered, select Display Control >
Graphic > Color By Net or Class and enable Constraint Classes.
Click Add and enable the MATCHTRACK Constraint Class, then click OK.
Click on the MATCHTRACK color selector and change it to a color that is
easy for you to see, then click Close.
The MATCHTRACK Constraint Class is highlighted. These are the two nets
you will re-order.
199
Ordering Nets with Netline Manipulaton (contnued)
Using Net Filter to Control Netline Visibility and Selecton
Even though you have highlighted your nets to make them easier to see,
you may want to turn of the visibility of the other netlines that you are not
currently editng. Do this using Net Filter.
Select Editor Control > Route > Dialogs, and enable Net Filter.
Click Net Filter.
Choose Constraint from the Display Class Type dropdown list,
and sort the Included Constraint Class column so that
MATCHTRACK is at the top of the list.
Select the nets in the MATCHTRACK Constraint Class and click
the < buton to move the nets to the Excluded list.
Select (Net0) and click the > buton to move it to the Included
list.
Click the Swap Included and Excluded Nets buton and enable
Apply flter to Netlines.
Click Apply to view your changes in the Editor window.
In Net Filter, save the Selecton Scheme as Matchtrack and choose Save
locally with the job, then click OK.
Note: You can save as many Net Filtering schemes as you need in your design
and recall them later for easy net handling. Schemes are saved to the PCB/
Confg directory locally but may be saved at other locatons.
Close Net Filter. Be sure that the net flter is enabled as shown.
200 Creatng Rules and Constraints with Constraint Manager in the PCB Layout
Ordering Nets with Netline Manipulaton (contnued)

Netline Manipulaton
The nets ASYNC+ and ASYNC- are currently ordered from components P2 to P1
to U11. You will adjust the ordering and make it: P2 to U11 to P1.
Select Display Control > Objects > Place and enable Top Facement.
Zoom into the area near P1 and U11.
Select Route > Netline Manipulaton. The highlightng changes while
you are in this command.
Select the ASYNC- netline between P2 and P1.
Drag the netline to the pin locaton on U11.
Repeat steps 4 and 5 for net ASYNC+.
Right-click and choose Save Changes and Exit.
Open Constraint Manager, and the ASYNC+ and ASYNC- nets are
ordered.
Close Constraint Manager.
Save your PCB layout and close Xpediton xPCB Layout.
201 Creatng Rules and Constraints with Constraint Manager in the PCB Layout
Review Questons
1 Why would I want to change the rules and constraints entered by the engineer in the schematc?
2 If the schematc and PCB are both open, will Constraint Manager Cross Probe to both at the same
tme?
3 When would I want to use a Net Class?
4 Do Dif Pair nets need to be named to a specifc naming conventon?
Review Answers
1 The rules and constraints you entered during the schematc design are very helpful to a PCB layout
engineer, but ofen an engineer can over-constrain a design, making the layout impossible to
complete. Constraint Manager allows the PCB layout engineer to adjust the constraints to make the
design easier to manufacture but stll maintain the intent of the engineer.
2 Constraint Manager cross probes to Xpediton xDX Designer and pediton simultaneously if you have
the cross probe setngs enabled in both applicatons. Cross Probing is linked through diferent dialog
boxes and features throughout Xpediton.
3 Use Net Classes to group nets that require the same physical constraints in the board. By grouping them
in a Net Class, if the physical constraints require changing, you can change them for all of the nets within
the class.
4 There are no standard naming conventons for Diferental Pairs, but following a few good practces
can make it much easier to assign constraints to them. If you use the sufxes _P and _N or _HI
and _LOW, or something similar, you can take advantage of the Auto Assign Dif Pairs command. This
command allows you to assign multple diferental pairs at one tme.
202
Variant Manager in Xpediton xPCB Layout

Lesson 17: Variant Manager in Xpediton xPCB Layout
In the Xpediton xDX Designer lesson Variant Manager, you learned how multple
variants can exist in a single design. You can generate separate schematcs and
BOMs for each variant of your design, and can integrate them with Xpediton xPCB
layout to create the necessary assembly drawings based on each variant. Please
review the Xpediton xDX Designer Variant Manager lesson, if needed.
In Xpediton xPCB layout, you can also use Variant Manager to create a unique BOM
for assembly variants. This informaton is integrated with Xpediton xDX Designer
and you can back annotate it to the schematc.
Launching Variant Manager
Start Xpediton xPCB layout, and from the Start Page select Open and
browse to and open
Launch Variant Manager by selectng Output > Variants. Variant Manager
opens with the same familiar interface, and the two variants you created in
Xpediton xDX Designer.
203
The PCB Interacton Tab

The PCB Interacton tab lets you determine which items you want to
display for the Assembly and Silkscreen layers when creatng PCB
Variant views. Disable Reference Designators and Outlines for these
layers so they will be removed from your variant views.
You can also remove the Soldermask and/or Solderpaste padstacks
from Unplaced parts. (This is not typical for most designs).
Enable Display Nested Mechanical Cells so they appear in the grid
when you have them in your designs.
Reviewing the Variant Manager Setngs
The General Tab
In Variant Manager, click Setngs.
Use the General tab to name unplaced parts and to set report optons.
Any parts that you choose not to install in the PCB Assembly process are
labeled with the Unplaced keyword. You can also use keywords such as;
DNI, DoNotInstall, or DEPOP.
Note: This tab contains the informaton you entered in Xpediton xDX Designer.
You do not need to be change it for this lesson.
204 Variant Manager in Xpediton xPCB Layout
The Library Query Setup Tab

The setngs for the Library Query Setup tab were setup during the schematc
design and were transferred to Xpediton xPCB Layout. Below is a review of the
tab setngs.
The Library Query Setup tab allows you to defne and edit how the
project interacts with the Xpediton xDX Databook database. The Data
source confguraton fle indicates the Xpediton xDX Databook fle you
access when creatng your design variant.
The Defne Libraries buton allows you to edit your Xpediton xDX
Databook confguraton. The data source confguraton is required
when you make Part Number replacements (overrides) in your variants.
For this lesson, the setup is done for you but you can refer to the
Appendix: Confguring Variant Manager if you are using your own
database.
The Query setngs secton controls the database search when using the
Replace functon. Allow sufcient results to be returned from each library
by setng the Results/library value appropriately. If you want to use
replacement parts from more than one library, you must set the Results
total number to be larger than the number of results returned from each
individual library. Verify that the Part number atribute dropdown list is
set to Part Number.
The Output format controls your database query results. The Part number
feedback line allows you to display more informaton about a partcular
part. This will be shown later.
The Query results format controls the results shown for the Replace
functon. This determines the columns displayed and the flter optons to
help you choose a replacement part.
Note: Because you have associated the Part number atribute to Part Number, we
also want to be sure that it is included in the Query results format.
Click Cancel to close the Setngs dialog box.
205
Adding a Variant
Select Variant Defniton.
From the Variant Defniton dialog box, click Create New Variant to add a
third variant to this database.
Name the variant Variant3.
Enter the Number and Descripton as shown.
For Variant3: Number = VAR3, Descripton = New Var3
The Variant Groups tab is helpful for sortng or fltering for specifc variants
when there are many in a single project.
Note: Any groups setup on the Variant Groups tab will be available from the
dropdown list in the main window.
Click OK to save the new variant and exit.
In the Variant Manager window you can see the added variant.
Disable Flat Design View so you can see the Blocks containing variant
modifcatons that were done in the schematc.
Defning Variants
Now that you have added a new variant, make some modifcatons to the
current variant parameters and defne some new ones.
Enable the Transmit and Receive butons to allow cross probing.
In Display Control, select the Loc:Placement scheme.
Click the cell under the Variant1 column, next to C9. Variant Manager
cross probes from the PCB layout to the variant and vice-versa.
In the Analog Switch block Variant3 column, select R5 and drag select to
R7.
Right-click Unplaced or click Unplace Selected Cells in the Variant
Manager toolbar.
Repeat steps 4 and 5 for the Variant1 column.
207
Change Multple Parts Simultaneously

To change several parts at the same tme, select R7 in the Variant1 column.
CTRL + Click and select R7 in the Variant3 column.
Right-click on one of the selected reference designators and click Reset,
or click Reset on the toolbar. The selected parts are reset and the variant
cells are cleared.
Replacing (Substtutng) Parts
Select the cell for C5 in IO_Port2 in Variant3, then right-click and choose
Replace. You can also select Replace Part from the toolbar.
A new window appears that lists the possible replacement parts.
Note: The columns in the list are based on the setngs you created. All of the
replacement parts have the same PKG_TYPE property as the original part. Also,
the VM Match is set to PKG_TYPE in the .dbc confguraton as shown in the
Appendix at the end of this Evaluaton Guide.
Sortng Parts
Select the Column Header for the Value column.
From the dropdown Filter list, select Ascending.
Replace C5 with the smallest value capacitor by double-clicking the frst
part available, 12308-CAP.
Flaten the Design View
Enable the Flat Design View checkbox to faten the Variant Manager grid
to a Ref Des list.
In the layout Editor window, fnd and select R29 near U11 in the
middle of the layout. The part is also selected in Variant Manager.
Hint: You may need to choose the Placement display scheme to select the
component.
209
Replacing Parts Across Library Parttons

Replace the R29 resistor with a capacitor in Variant3. With R29 selected,
right-click over the cell in the Variant3 column and click Replace.
Sort the Library column by Capacitor and double-click the frst capacitor
in the list.
Note: Since the PKG_TYPE property is the same for both the resistor and capacitor,
you are able to replace these parts.
Mutually Exclusive Variants

In Xpediton xPCB layout, you can overlap two components provided they do not
exist in the same variant. These components can share a pin locaton if they are
ted to the same net, use the same padstack, and the pin is placed at the same
X-Y coordinate.
Select R2 from the upper right corner of the layout in the Analog Switch
group.
Unplace R2 in Variant3.
Select C9 and Unplace it in Variants 1 and 2.
Move C9 so that it is placed directly on top of R2.
Note: You do not get a placement DRC for the two components because C9 only
exists in Variant3, and R2 does not.
Once you have created the variant view, you will see how pediton places the
correct markings on your PCB layout.
211
Generatng PCB Variant Outputs

Your design now has three variants and you will need to Generate PCB Variant
Views for Assembly Drawings, create BOMs, and Back Annotate the new variant
informaton to your schematc.
Back Annotatng the Variant Manager Changes
In Xpediton xPCB, select ECO > Back Annotate to update your schematc
with your Variant Manager changes.
Unplaced Cell Graphics in Variants
You can defne the graphics that appear in your variant views for the Silkscreen
and Assembly Layers. The graphics are defned in the Cell using the Cell Editor in
Xpediton xDM Librarian. We have already created some graphics for you in this
design.
Your design has No Graphics displayed for Unplaced components on the
Silkscreen layers.
Your design has an X and Outline graphics displayed for the Assembly
layers.
Generatng PCB Variant Views

In Variant Manager, select the Variant3 column and then click Generate
PCB Variant View.
In Display Control, select the scheme SILK_TOP.
Notce that the Unplaced components R5 and R6 have no silkscreen, and
the mutually placed C9 has silkscreen, but R2 does not.
In Display Control, select the scheme ASSEMBLY_TOP to see the variant
view for the assembly layer.
Note: Afer generatng a variant view, you can use the view to create printed
documents or fabricaton outputs.
In Variant Manager, select Reset PCB Variant View to Master.
Note: To create views for the other variants in the design, select the Variant
column and re-generate the variant view.
213
Generatng a Variant BOM Report

To generate Variant PCB BOMs, right-click in the Variant window and
choose Report > BOM Reports.
Choose HTML Document for the output fle type.
Select all three variants and defne the Output locaton:
C:\Xpediton_Evaluaton\Lesson5 and name it VariantPCB.
Click OK to create the BOM reports.
You may review the HTML documents in any browser.
Close Variant Manager and Save your PCB layout.
Review Questons
1 When creatng library component land paterns, do I need to add special
graphics in order for variants to display correctly?
2 Does Xpediton xDX Designer see the changes made in the Variant
Manager in Xpediton xPCB Layout?
3 Can I generate Gerber outputs from my PCB variants?
Review Answers
1 No, it is not a requirement. Variant Manager will automatcally remove
silkscreen and assembly graphics from your components when variant views
are generated. If you do add special graphics in your land paterns, Variant
Manager will use them in your variant views.
2 Xpediton xDX Designer will see any changes or additons made while you
are working in the layout tools when you run a Back Annotaton.
3 Once you have generated a PCB variant view, you can create PDF prints or
Gerber output fles from that view.
215 AutoActve Interactve Routng
Lesson 18: AutoActve Interactve Routng
In this lesson you will learn about the award winning Auto-Actve Routng
Technology in Xpediton xPCB Layout. The routng capabilites allow you to
quickly and easily Fanout, Plow (Route), and Multplow (Mult Trace Route)
nets. You can also easily route diferental Pairs and tune high speed nets.
Sketch Router helps you to Auto-Actvely route bundled netlines. While you
route your design, Online DRC (Design Rule Checking) funtonality keeps you
from introducing errors. You can customize your routng style to help you
route your designs more efciently.
Open the Design File for Routng
From the Start Page select Open and browse to and choose:
Routng with Online DRC
In Xpediton xPCB Layout the default for Interactve Place and Route DRC is
ON. While routng, Online DRC maintains all of the spacing constraints and
does not allow for copper to copper errors within your design. The preferred
routng method is to leave DRC on, but you can turn it of when needed.
INTERACTIVE DRC OFF
Select Editor Control > Common Setngs, then disable Interactve
Place/Route DRC.
Click Yes to turn of Online DRC checking. The DRC Of Warning dialog
box remains open untl you turn DRC back On.
Close the DRC Of Warning dialog box, then click No for the Batch DRC
message. You will run Batch DRC in an upcoming lesson.
Note: If you do any Placement or Route edits with Interactve DRC Of, you should
always run Batch DRC on your design prior to releasing it to manufacturing.

The Net Explorer Spreadsheet and Toolbar
The Net Explorer interface is similar to Component Explorer that you used for
placement, and contains many of the same features.
Select Route > Net Explorer
Click the Net column to sort the column.
Expand CORPORATE, then expand Planning Groups. This is where any
User Groups you create appear.
Click Toggle Filter. These panes allow you use the dropdown flter or enter
your own search criteria for the column.
The Navigator lists all of the User Planning Groups, and pre-defned groups
created from the constraints you entered in Constraint Manager.
Review and Scroll through the available column informaton.
Click Fit Selected and Toggle Cross Probe on the Net Explorer
toolbar so that Net Explorer cross probes to the Editor window.
Explore the spreadsheet interface, and when you are ready, you can move on
to the next secton to prepare for routng.
Netline Display with Net Explorer
Routng a PCB requires the selecton of Netlines. Boards that have thousands
of nets can present a problem. Netlines can completely fll a viewing area,
making it impossible to select the one you want to route. The best way to
avoid this problem is to organize netlines into groups and then display them
as you route them.
Net Explorer is a spreadsheet interface that provides many methods of
organizing and displaying nets. You can create User Planning Groups of
netlines, then Filter and Mark them so that you only display those groups.
Net Classes, Constraint Classes, Dif Pairs, Tuned/Matched Nets, and Ordered
Nets, also appear as groups within Net Explorer. Once you have your groups
created, you can save Net Explorer schemes, similar to Net Filter in the
previous lesson.
Fit
Selected
Mark/Unmark
Selected
Toggle
Cross Probe
Unmark
All
Enable Cross
Highlight
Toggle
Filter
Creatng Net Planning User Groups
You can create user Planning Groups by selectng nets within the spreadsheet, or
by selectng Netlines within the Editor window.
Select CORPORATE, and using the Filter Pane dropdown in the Net
column choose DATA*.
Select the DATA_BUS* nets, right-click and click Create User Group.
Name the new User Group MemData.
Repeat Steps 1 through 3 to select the ADDR* nets and Create the User
Group MemAddr.
Fit the board, then select the MemAddr User Group. The Memory
Address nets are selected and highlighted in the Editor window.
If you ever need to remove a User Group, select the group then
right-click Dissolve. Do not remove any User Groups at this tme.
Expand Net Class.
Select the Net Class FDATA that you created in Constraint Manager.
The nets in the FDATA Net Class are selected and highlighted.

Marking Nets and Creatng Schemes
Similar to using the Net Filter, you can use Net Explorer to mark nets or
groups of nets so that they are the only nets displayed in the Editor window.
Also, just like Net Filter, you can save these setngs as Schemes for future
routng.
Marking nets in the Net Explorer works in conjuncton with the Netlines
Setngs in Display Control.
Select Display Control > Objects > Netlines and expand the Netlines for
Marked Comps and Nets secton.
Enable From Marked Nets.
Right-click From Marked Nets and choose Add to Favorites.
From Marked Nets now appears on the Display Control > Edit tab in
the Favorite secton making access easy.
Select the MemData User Group, then click Mark/Unmark.
The MemData User Group nets are now the only nets displayed in
the Editor window.
Click Mark/Unmark again, and all of the nets in the design are displayed.
Select the MemAddr User Group, then click Mark/Unmark.
Save a Scheme called MemAddr, then Unmark the MemAddr User Group.
Select the scheme you just created and notce that the marking of the
User Group MemAddr has been restored.
Select Display Control > Edit > Favorites secton and disable
From Marked Nets.
You can create as many diferent Net Explorer schemes as you want when
designing your PCB.

Routng Optons
While routng in Xpediton xPCB Layout, there are several methods of
specifying the way traces are edited, plow styles, and glossing. Editor Control is
used to specify these setngs, as you route, you can change these setngs using the
right-click context sensitve menus. You will use these setngs throughout the
lesson.
Editor Control
Click the Editor Control > Grids tab and expand the Route Grids secton.
Ensure that 5 is entered for the Via Grid value.
Note: You will route the design with no Routng grid. This is the optmal setng for
dense designs. In HDI layer buildup designs it may also be benefcial to use a Via
grid of None.
Click the Editor Control > Route tab and expand the Dialogs secton.
This secton controls the setngs for nets and route handling. You have
used some of these setngs in previous lessons.
Click Tuning....
Tuning Paterns specifes the paterns used when you Manual Tune nets
with a length constraint requirement.
Close Tuning Paterns.
Click Dif Pairs.
Dif Pairs specifes how Dif Pairs are coupled during routng and editng:
Coplanar (same layer) or Broadside (adjacent layer).
Close Dif Pairs.
Click Pad Entry.
Pad Entry specifes how you would like traces to enter or exit a pad when
you route.
You can specify setngs for groups of pads or individual pads.
You can specify the trace entry angle and locaton, including Extended Pad
Entry which allows Odd Angle entry.
For surface pads, you can specify if Vias are allowed within the surface pad
area. Close Pad Entry.

Editor Control (contnued)
Click Expand Traces.
Expand Traces defnes the minimum distance rules for increasing or
decreasing the trace widths defned in Constraint Manager during
interactve routng.
Click OK to close Expand Traces.
Plow Styles and Edit & Route Controls
Expand the Plow secton. This secton specifes the Mouse Up and
Mouse Drag plow styles you are using, and how DRCs, Vias, Loops
and Angles will be defned when routng.
Mouse Up Styles add traces by clicking to place distnct Anchor
Points for trace segments.
Mouse Drag Styles use a click and drag method for adding traces.
Expand the Edit & Route Controls secton. This secton defnes the
Glossing method you use when routng or editng traces and vias.
Enable Via Move to allow vias to be shoved when Plowing, and
Remove excess meanders to provide additonal cleanup to routed
traces upon completon.
Expand Angles, Corners. This secton provides setngs to allow Any
Angle Routng and Curved trace routng.
Expand Vias & Fanouts. This secton provides setngs for Via and Fanout
controls during plowing and editng.
Expand Net Rule Overrides. This secton allows you to override
setngs placed in your constraint in Constraint Manager.
Disable all of the Overrides.
As with other dialog boxes in Xpediton xPCB, you can save your
Editor Control setngs as a Scheme. In Common Setngs, save the
Editor Control scheme locally as Route.

Plowing with Actve Clearances and DRC Visualizaton
When you are routng or editng, Xpediton xPCB Layout can help you to visualize
both Clearances and DRCs.
Lets practce plowing a few traces with the setngs you have learned so far
Zoom into the Area of U2 through U5.
Click the Display Control > Graphics tab and expand the Graphics
Optons secton.
Expand the General optons and change the color of Actve Clearance to
a color of your choice.
Note: To be able to use Actve Clearances your system will require an OpenGL
capable video graphics card.
Click the Editor Control > Route tab, and in the Plow secton set your
Mouse Up style to Hockey Stck/On Click.
Select U5 pin 8 as shown and click the F3 Acton Key Plow/Mult to
route the trace as shown. Notce that you must click multple trace
anchor points to get the trace to pass through the pins.
In Editor Control, set your Gloss to Local, or use the F10 Acton Key
Toggle Gloss. Local Glossing minimizes the area of the trace that is glossed
during routng or editng.
Note: Practce using the diferent Gloss Modes throughout this lesson to become
comfortable with the diferences between them.
Select U5 pin 7 as shown, right-click and choose Mouse Up Style > Real
Trace Delayed, then route the trace as shown. Notce as you route, the
shoving of the previously routed trace is Delayed untl you click a new
anchor point.
Contnue to add anchor points for the trace. Notce you do not have to
enter as many and the Actve Clearance circle displays all of the
spacing clearances per your
design constraints as you
route.

Plowing with Actve Clearances and DRC Visualizaton (contnued)
Select U5 pin 6 as shown, right-click and choose Mouse Up Plow Style >
Real Trace Dynamic, then route the trace as shown. Notce that your
trace will immediately shove other traces as you route.
Select U5 pin 5 as shown, then right-click and choose Mouse Up Plow Style >
Segment/On Click.
Right-click and click Angle Mode and choose Any, then route the trace
as shown. Notce that each Segment requires an anchor point, and you
can route at Any Angle in this plow mode.
Reset your Angle Mode back to 45.
Route U4 pins 7 and 8 using Mouse Drag Plow Styles. These work exactly like
their Mouse Up counterparts, but you use a click and drag method.
The drag method is very helpful when a trace you are routng travels of
screen because these plow styles will auto pan as you route.
Click Editor Control, and in the Common Setngs secton disable
Interactve Place/Route DRC and answer Yes to the warning.
Using any plow style, route the connecton from U4 pin 5 as shown.
Zoom in on the trace and notce the DRC Visualizaton paterns showing
trace to trace DRCs.
Enable Interactve Place/Route DRC and click No. We will not run Batch
DRC at this tme.
Right-click to Cancel Plow, or press Esc.
Select Route > Edit Routes > Delete all Traces and Vias to remove your
practce routng.
Click Yes for the Delete all traces and vias warning.
Now lets move on to Routng the rest of the layout

Fanouts and Fanout Paterns
When there are Surface Mount components in a layout, fanout vias must be
created to allow connectons to other layers. While routng you can place
vias to complete connectons, but it is best to place all fanouts initally to
keep routng from blocking future fanout locatons.
Interactve Fanout
Click Display Control > Graphic and expand the Color By Net or Class
secton.
In the Nets secton, click Add, then enable netnames GND, VDD, and
VDDQ3.3V from the list of nets.
Change the Color Fill so that each net has a diferent color.
Zoom to U5 and select the VDD net pin, then click the acton key F3
Plow/Mult.
Use plow to add a fanout via at a locaton just inside U5 pin 1 as shown.
Double-click to add a via.
Cancel out of the Plow command.
Select the GND net pin on U5, then click the acton key F2 Fanout.
The fanout via is added close to the pin and on the via grid you set
previously.
Triple-click the VDD net pin on U4, the entre VDD net will be selected in
the layout.
Click the acton key F2 Fanout and all of the selected VDD pins in the
layout will be routed with a fanout vias.
Repeat steps 8 and 9 for the GND net.

Fanout Paterns Wizard
In Xpediton xPCB Layout you can also use the Fanout Paterns Wizard to
create specifc fanout paterns in commonly used surface mount device
packages.
Click Display Control > Edit, and enable selecton of Place in the Global
View and Interactve Selecton secton.
Zoom to U7 in the upper lef secton of the layout, then select the U7
reference designator text to select the component.
Select Route > Fanout Paterns.
Click the SOIC/QUAD package tab and set the dropdown box setngs as
shown.
Click Fanout Selected and U7 will be routed with fanout vias with the
patern you selected.
Note: Paterns can be created for SOICs, Quad Flat Packs, BGAs, and Staggered
BGAs.
Click OK to close the Fanout Patern Results.
Close Fanout Paterns.

Creatng Split/Mixed Dynamic Planes
In Lesson 14: Setng Up a New Design, you learned how to create
plane layers. Please review the lesson if needed.
In this lesson you will create a Split Voltage Plane and a Mixed Plane.
Xpediton xPCB Layout Dynamic Planes Engine maintains the spacing clearances
you created in Constraint Manager between planes and other copper objects in
your design.
Click Fit Board.
Select Planes > Plane Assignments.
On Layer 4, Add the net VDDQ3.3V, then click OK to close
Nets and Plane Assignments.
Click Net Explorer and click PWR_020_MIL in the Net Class secton. If
needed, reset the Net column flter to (ALL).
Click net VDDQ 3.3V to select the net.
Click F2 Fanout to route fanout vias for the entre net.
Click Display Control and enable the PLANE_4 layer.
Select Planes > Plane Shape and set the Propertes as shown.

Creatng Split/Mixed Planes (contnued)
Draw the plane shape as shown to include the connectons for net
VDDQ3.3V. Close the Propertes dialog box when completed.
Note: The net automatcally connects to the plane, and the plane shape is also
automatcally Split from the existng VDD plane.
Creatng Split/Mixed Planes (contnued)
Now you will create a Mixed Plane on layer SIGNAL_1 for the Analog_SW group.
Click Display Control and disable the Plane_4 layer.
Select Place > Component Explorer, then click Fit Selected and Toggle
Cross Probe.
Select the ANALOG_SW group, then Auto Hide Component Explorer.
Select Planes > Plane Shape and use the Acton Key F9 Add Rectangle
to draw a shape with the specifed Propertes around the ANALOG_SW
group as shown. Close the Propertes dialog box when completed.
Hint: Try copying the Room shape you created for this group in the
Placement lesson to create the new plane shape. In the Setng Up
a New Board Design - Drawing the Route Border Using Copy Shape,
you learned how to copy existng shapes to create additonal objects.
Note: The plane shape automatcally connects to the GND connectons and
clears objects per your assigned Constraint Manager clearances.

Plowing and Plow Editng Features
Lets take a look at a few more Plowing (Routng) and Plow Editng features in
In this secton you may use the Plow Style of your choice.
Mult-Plow
Mult-Plow allows you to route multple traces at one tme.
Zoom to the area of U2 through U5.
Frame select the four pins for the four nets on U5 as shown, then click
F3 Plow/Mult.
Route the traces to U3 as shown.
Click near one of the pin connecton points on U3 to complete the
routes.
Right-click then Cancel Mult-Plow.
Plow Auto Finish
Select the pin on U4 as shown, then click F3 Plow/Mult.
Route the trace towards U2, pausing near U3 as shown.
Click F5 Auto Finish to automatcally complete the route.
Route the additonal connectons on U4 using Auto Finish.
Cancel Plow.

Deletng Traces or Trace Segments
Select the trace segment from U5.
Press Delete, to delete the segment.
Click Undo or use Alt+Backspace to undo the delete.
Select two points within a trace segment from U5.
Press Delete to remove the porton of the segment,
then click Undo.
Double-click on the trace from U5, and the entre
connecton is selected.
Press Delete to delete the entre connecton, then click
Undo.
Note: Previously in this lesson, you used a Triple-click to
select the entre net within the design.
Re-Routng a Trace
You can easily re-route any trace using the Plow command.
Click F3 Plow/Mult, and select the U5 trace. Re-route
begins.
Suspending a Route
If you need to move of screen while routng to change
setngs, you can suspend routng for the currently selected
trace.
While re-routng the trace, press the Shif key and trace
routng is Suspended.
Click in the Editor window to Unsuspend the route.

Context Sensitve Right Mouse Buton Menus
While you route in Xpediton xPCB Layout the right mouse buton menus
can save you tme by placing the most common editng features at your
fngertps.
While re-routng the trace, right-click to review the available editng
features.
You can Change Layers by selectng the new layer.
You can Change Widths or Add Width to a trace.
You can override and change the Via Type for the trace.
Complete the re-route of the trace to U3 and cancel Plow.
Moving Traces and Vias
Once you have completed routng, you can easily Move traces and vias
or groups of traces. There are also context sensitve menus available with
additonal edit features.
Select the VDD net via on U5.
Drag the via to the opposite side of the pad on U5.
Drag all of the voltage and ground vias to the new locatons as shown.
Notce that the vias will shove the traces as needed.
You will need to drag the voltage vias on U2 and U3 farther to maintain
plane connectvity.
Hint: Enable the PLANE_4 layer to see the plane shape locaton.

Moving Traces and Vias (contnued)
Now use Move to clean up the routes in the U2 through U5 area.
Click the acton key F10 Toggle Gloss and set to Gloss Local.
Select a pad on U5, then click Editor Control > Route tab > Pad Entry.
The Oblong 24x74 pad is selected.
In the Rules for selected pads secton, enable diagonal pad entry.
Click OK.
Zoom to U3 and select the trace segment as shown.
Drag the trace segment towards the inside of the U3 patern.
Repeat step 6 to clean up the additonal segments on U3 as shown.
Glossing Traces
Use Gloss to quickly cleanup and remove unnecessary segments.
Frame select the traces between U2 and U5, then right-click Selecton >
Add Partally Selected Nets. All of the net segments are selected.
Click the acton key F11 Gloss to clean up the trace segments.
Press Esc to end the command.
Save your layout.

Routng Critcal Nets
Afer fanout, route your critcal nets. Critcal nets are any nets whose
performance must be managed to achieve a working design. These nets include
Diferental Pairs and Length-constrained nets that require tuning. These nets
should be routed frst and then fxed before startng other routng.
Routng Dif Pairs
Click Fit Board.
Select Display Control > Edit > Favorites secton and enable
Netlines - From Marked Nets.
Click Route>Net Explorer and select Diferental Pairs, then Mark.
Only the Dif Pairs are shown in the Editor Window.
Zoom into U5 and select the two pins for the Dif Pair.
Click F2 Fanout and notce the pins fanout symmetrically for the dif
pair spacing.
Select one of the vias and click F3 Plow/Mult. Notce that both traces
of the dif pair are atached to the cursor.
Right-click Layers > 2 HS or press 2 to switch to layer SIGNAL_2 for
routng.
Route the traces as shown and zoom to the connecton locaton.
Click F9 Toggle Via to change the dif vias to a horizontal patern prior
to placing them.
Switch to Layer SIGNAL_1 and complete the routes by selectng near
one of the connecton pins.
Cancel Plow.

Routng Matched Length Traces
In the previous lesson you added length and matching constraints to nets
within this design. When you route these traces, they may not fall within the
requirements you provided. Xpediton xPCB Layout determines which traces
are not within constraint tolerances and allows you to interactvely tune
them to the required lengths.
Interactve Tuning
The tuning paterns used during interactve tuning are set in Editor
Control.
Click Editor Control > Route > Tuning.
Review the setngs in Tuning Paterns, then click OK.
Click Constraint Manager and expand Constraint Classes , then set
the Group dropdown list to Delays and Lengths.
In Constraint Manager, expand the DIFF1 and DIFF2 dif pairs and
scroll right to the Length columns.
In Constraint Manager, Select Data > Actuals > Update All. Notce
that the dif pair you just completed is shorter than the required
length constraints.
You will now tune the dif pair you routed to add length. To help you
know when the length is within tolerance you can use the Tuning Meter.
Click Display Control > Graphic and expand the Graphics Optons
> General secton.
Enable the Tuning Meter, if needed.

Interactve Tuning (contnued)
Zoom to the DIFF2 dif pairs connectons near U8.
Select one of the dif pair traces.
Select Route > Tune Routes > Manual Tune. A tuning box appears with
one full cycle completed.
Select a Tuning Box handle and drag it to add tuning cycles.
When the Tuning Meter reads GREEN, your net lengths are tuned to the
proper constraint lengths.
You can adjust the size of the tuning window to ft the traces into an
area.
Right-click and choose Cancel Tuning.
Select both dif pair traces and click Selecton > Add Partally Selected
Nets, then right-click Fix/Lock > Fix to protect the traces from additonal
editng.
To verify your length constraints, in Constraint Manager click Data >
Actuals > Update All.
Close Constraint Manager.

Sketch Router
The Sketch Router is an important development in the long quest to provide
efectve and productve routng tools. It is a revolutonary approach for
interactvely routng groups of netlines. It is easy to setup, use and control;
has quality that rivals that of any designer; is 10 to 40 tmes faster than
manual routng.
This lesson covers the basic use of the Sketch Router. If you would like more in-
depth informaton afer you complete the lesson, ask to see the Sketch Router
Quick Design Guide.
Netline Selecton
The Sketch Router routes netlines, not entre nets. It automatcally selects
the netlines based on proximity to the start and end points of the sketch
path. Or, you can select specifc netlines. If you select route objects such as
pins, vias or traces, the Sketch Router atempts to route the net-selected
netlines if no other netlines are selected.
Click Fit Board.
Select View > Message Window to allow you to see Sketch Route status
messages.
Click Route>Net Explorer and Unmark All nets.
In Net Explorer, expand Net Class, then select and Mark Net Class FDATA.
Note: Organize Netlines into groups with one of the numerous methods in Xpediton xPCB
Layout: Net Classes, Constraint Classes, Net Explorer, Net Filter, and Display Control.
This will enable you to easily view and select netlines for routng.
Drawing a Sketch Path

Sketch Router routes netlines based on a path and directon that you defne.
The path that the routes follow is called the Sketch path.
Select Route > Draw Sketch, then press 2 to begin the path on layer
SIGNAL_2.
Click to start the path near P2 and draw the free-form path as shown.
Notce the netlines become selected automatcally.
When the path is near U12 press 5 to change the path layer to SIGNAL_5.
Right-click and choose Via Patern > Reverse Single.
Contnue the path on SIGNAL_5 into U12 as shown, then right-click
Finish Drawing.
Click the acton key F9 Sketch Route and watch as your netlines are routed.
That was easy! Get ready to do another one

Understanding Sketch Paths and Via Paterns
SKETCH PATHS
By default, the sketch path is free-form.
You can choose a hockey stck sketch path by clicking F10 Toggle
Sketch Style or by using the right mouse menu while drawing the
sketch path.
If you start a new sketch path on the endpoint of another sketch
path, it will extend the sketch path.
If a sketch path exists, startng a new one deletes the previous one.
VIA PATTERNS
There are six diferent via paterns available for sketch paths. The
color of the via symbol indicates the startng layer.
You can choose a via patern by clicking F2 Add Via Patern or by
using the right mouse menu while drawing the sketch path.
(A) The arrow indicates the directon the traces will exit a via
patern.
(B) The via symbol indicates a single or double row via patern.
(C) The traces symbol indicate the directon the traces will enter
the symbol.
Rotate via Paterns using F4 Rotate 45 or F5 Rotate 90 or by using
the right mouse menu while drawing a sketch path.
In some cases, an X appears on the via patern to show that the
rotaton is invalid.

Unpacked Sketch Routng
The frst sketch route you completed was routed as Packed. The second method of
sketch routng is Unpacked.
Click Route > Net Explorer and Unmark All nets, then select and Mark
Net Class FADDR.
Start your sketch path on SIGNAL_2 near P2, then click F10 Toggle
Sketch Style to change to an angled path.
Click F11 Toggle Route Style to change to Unpacked.
Switch layers to SIGNAL_5 and fnish the sketch path near U12 as
shown. You will use the default Automatc Via Patern.
Click F9 Sketch Route to start the routng.
Right-click and choose Close, then Save your layout.
You can Auto-Hide or Close the Message Window.
Click Fit Board and Unmark All nets in Net Explorer.

Copying Circuits
In the Placement lesson you were able to create the four Logic IO circuit
placements from one placed circuit using Copy Circuit. In this secton you
will copy the routng from one of those same circuits to the other three using
Copy Trace. Copying traces can save tme when used to copy similar circuits
or fanout paterns on similar device packages.
Note: In this secton you will copy routed traces and vias, but you could copy the entre
placement and routng of a circuit using Copy Circuit.
In Place > Component Explorer, select the IO_Port1 group.
Frame select the routng in the IO_Port1 circuit then right-click and choose
Copy Trace. The routes are copied to the cursor.
Place the routng over the pad locatons on IO_Port2 and click to place the
routes.
Contnue to place the routes on IO_Port3 and IO_Port4 as shown.
Right-click and choose Cancel to end Copy Trace.

Placing Via Paterns
In Mixed Signal PCB layouts, you may need to add sttching or shield vias to a
shape. Xpediton xPCB Layout allows you to create interactve via paterns
easily within shapes and around traces using Add Via.
In Component Explorer, select the ANALOG_SW group.
Select Route > Add Via.
Click the Array tab and adjust the Padstack, Span, Netname and
Placement Control setngs as shown.
Click Pick Reference, then click the locaton at the lower lef corner of
the GND plane shape.
Click Apply to place the via patern within the plane shape.
Close Add Via and Save your layout.
Click Fit Board and Unmark All groups in Component Explorer.
Now it is your turn! Using the training in this lesson, contnue routng your PCB
layout. An example of the completed routng is on the next page. If you do not
have tme to complete the routng, that's OK. The next lesson will start with
the routed board.
The Finished PCB Layout Routng

Review Questons
1 What is DRC?
2 Will routng with DRC ON keep me from creatng routng errors?
3 When would I want to route with DRC OFF?
4 What is the advantage of using Sketch Router?
Review Answers
1 DRC is an acronym for Design Rule Checking. When DRC is ON, it is
constantly monitoring and enforcing your design rules. This is
powerful technology that helps you to maintain the integrity of your design
during placement and routng operatons.
2 During Placement there are three modes of operaton: Warning,
Prevent with Shove Parts, and Interactve DRC Of. If you atempt to
create placement violaton in Prevent mode with DRC On, the system
does not allow you to complete the operaton. Similarly, in Warn mode,
the system presents a message warning you of the potental violaton
and asks permission to complete the task. While Routng with Interactve
DRC On you cannot create copper to copper errors. This saves you tme
by preventng errors you must clean up later.
3 During routng, you may have a rule that specifes a partcular clearance
for your traces as they transiton across the board. At tmes when you
near the end of the route, the signal must atach to a high density
component such as a connector or BGA and there may not be enough
room to get the trace to its destnaton pin without creatng a spacing
violaton. You can set up a component rule to allow the trace through at
a smaller spacing, or you can turn of DRC temporarily so that you can
complete the traces. The DRC errors created by turning of DRC
will be given a Visualizaton Patern are reported during Batch DRC
Verifcaton.
4 When you have a group of signals that follow a similar routng
path, you can route them as a Packed or Unpacked group (or bus).
You can select a group of nets and draw a sketch path for the routng
to follow. The traces route as a group, maintaining proper clearances.
This is a quick and easy way to route multple traces with a quality that
is very similar to your own hand routng.
243 Final Layout Consideratons
Adding Test Points
In Xpediton xPCB Layout, you can place test points manually on Through Pins,
SMD pins, Vias, Traces, and open areas on the Top or Botom sides of the layout.
Defne Test Point setngs with the Setup Parameters dialog box.
In Xpediton xPCB Layout, from the Start Page, select Open and browse
to and choose:
Select Setup > Setup Parameters > General tab and review the Test
point setngs secton.
When you routed the layout, the Via Grid was set to 5. Change the Test
Point Grid setng to 5 to match the via grid setng in Editor Control.
Click OK to update the database setngs.
Zoom to U5 and select the via from one of the dif pair traces.
Note: You must select a net item prior to placing a test point.
Select Place > Test Points > Place and place the test point directly on
the via on the botom side of the layout.
Repeat steps 5 and 6 to add a test point to the other via from the dif pair
traces.
Lesson 19: Final Layout Consideratons
Afer completng the routng of your layout, you may stll be required to
make a few additons or changes to it. These changes, or ECOs (Engineering
Change Orders), for example, may require you to add Test Points, Teardrops
on pads, or Component updates. Xpediton xPCB Layout can easily manage these
additons and changes for you.
Teardrops and Tracedrops

Teardrops and Tracedrops are used to add flletng to pads and/or vias in a
PCB layout. They provide additonal stability at the trace entry point, or
provide additonal copper for annular ring requirements. You can also add
Teardrops at the juncton of two traces or between pads and Mult-Via
objects.
Zoom to P1 on the top edge of the layout.
Select Route > Teardrops & Tracedrops > Teardrops.
On the Pad Teardrops tab, enable Pad to Trace and Include
fxed/locked traces.
Enable Rato and enter a value of 1 for the Pad and Via pad rato.
Select the four routed pads on P1 as shown. (Select individually with
<CTRL> key depressed or frame select and then remove the middle pin
from selecton).
On the Process dropdown list, choose Selected Padstacks.
In the Teardrops dialog box, click Apply.
Note: No Teardrops were added to traces where clearance violaton
would be created.
Review the Trace Teardrops and Multple Via Teardrops tabs showing
the many types of teardrops that can be created.
Close the Teardrops dialog box.
ECOs (Engineering Change Orders)
A few more changes may be required prior to releasing your layout for
fabricaton. Reference Designator Renumbering will allow the engineers to easily
fnd components on the board once it is manufactured.
You may also need to replace or reset cells and update the cells and
padstacks from the library to make sure your layout is synchronized.
Renumber Reference Designators
You can renumber Reference Designators by Selecton, Individually, or for the
entre layout.
Click Fit Board.
Select ECO > Renumber Ref Des.
In Renumber Reference Designators, enable Test Points and Exclude
P Prefxes.
Note: The connectors P1 and P2 will not be renumbered.
Click Auto Renumber.
The reference designators will be renumbered according to the
Directon listed in the Top and Botom tabs.
The Startng Number is 1, click OK. The Process list is completed.
Click OK in the Renumber Reference Designators dialog box to apply
the changes to the layout.
Review the renumbering changes, then Save your layout.

Replacing and Resetng Cells
In the Placement lesson, you used Component Explorer to replace a cell with
a provided alternate. You can replace or completely reset cells using ECO
also.
Select ECO > Replace Cell.
Click Process type Replace.
Replacement Cell allows you to select individual or all cells for
Alternate Cell replacement.
Click Process type Reset.
Reset allows you to select individual components or component part
numbers to reset from the Local library.
Note: Resetng cells does not update cells from the Central Library.
Enable Keep text atributes during replace/reset if you have made
changes to cell silkscreen text items in your layout. Otherwise, the
locatons will also be updated from the original placement.
Close Replace Cell.
Update Cells and Padstacks
It is good practce to update all of the components on your layouts from the
Central Library before verifying the design for fabricaton. This verifes that
the components and padstacks on your layout are the most
up-to-date with any library changes that may have taken place during the
layout schedule.
Select ECO > Update Cells and Padstacks, then click Yes to update the
layout.
Note: Running a Forward Annotaton using the Update local libraries
with newer Central Library data opton performs the same process.

Pending Forward/Back Annotaton Report
At any tme during your layout, you can view a report of the changes that will
take place during the next Forward or Backward Annotaton cycle.
Select ECO > Pending FA/BA Report.
The File Viewer opens showing the report.
Note the diferences you created in the Reference Designators
between the Layout and the Schematc.
Close File Viewer.
Select ECO > Back Annotate to synchronize the layout and schematc
databases.
Save your layout.
Back Annotaton of ECO Changes
Once you have completed any required ECO changes, they need to be Back
Annotated to update the schematc database.

Review Questons
1 Do I need to add Test Points to my layout?
2 Should I add Teardrops to every pad in my layout?
3 Why do I need to renumber reference designators?
4 Why should I update my cells and padstacks?
Review Answers
1 Depending on the testng requirements for your layout, you may not
need to add test points. If the board will be mass produced, engineering
will usually require test points so the fabricated and assembled boards
can be tested prior to packaging for customer use.
2 Teardrops on pads in your layout should be discussed with your PCB
fabricaton vendors. Dense designs with minimal annular ring on pads,
or fne line technology, may require teardrops on all vias and most pads
in your design.
3 Renumber reference designators to make the components easier for
assemblers and testers to fnd by creatng a sequental patern. You do
not have to search through hundreds, or even thousands of
components to fnd a part on the board.
4 If your library components are maintained and edited by someone else,
you may not be aware of changes taking place to library components
that could afect your layout. Updatng the cells and padstacks verifes
that you have the most up-to-date library informaton in your layout.
249 Design Verifcaton
Status Reportng
When verifying the completeness of your PCB layout, you should check two
reports: Design Status and Dynamic Plane Status.
In Xpediton xPCB Layout, from the Start Page, select Open and
browse to and choose:
Select Output > Design Status, or click Design Status.
Review the informaton in the Design Status report.
Look for the following key informaton in this report when you are
verifying your layout.
Open Connectons should read 0.
Percent Routed should read 100%
Parts not Placed should read 0
Note: There is one part that you did not place earlier. You need to
correct this error when you run Batch DRC during the verifcaton process.
Lesson 20: Design Verifcaton
In Xpediton xPCB Layout, the Online DRC capabilites signifcantly reduce the
errors you may create during PCB layout. In order to completely verify your
design prior to fabricaton, you should always complete a Batch DRC and Review
cycle. Verifcaton of all constraints, connectvity, and high speed
requirements are accomplished using Batch DRC. Status reports and Review
Hazards will help you to easily identfy and correct any errors.

Batch DRC
You can set up Batch DRC for any number of checking scenarios, and save each
scenario as a scheme for use on other designs. You can also run Batch DRC on
the full layout or a selected secton of a layout using a DRC Window.
Select Analysis > Batch DRC, or click Batch DRC.
Batch DRC is set to use the Final DRC scheme to check
the entre design.
You will be checking for Proximity (Clearance) errors on
all layers of the design according to the constraints you
created in Constraint Manager.
In Batch DRC, click Advanced Element to Element Rules.
Status Reportng (contnued)
Select Output > Dynamic Plane Status.
Review the informaton in the Dynamic Planes Status report.
Look for the following informaton in this report for each plane layer and
shape when verifying your layout:
Pads Unconnected to Plane for each shape should be 0.
Note: Any error found in these reports will also be reported in Batch DRC.
You can use these reports to quickly review the completeness of your layout at
any phase during the layout.

Batch DRC (contnued)
Advanced Element to Element Rules allows you to create new DRC checks
between specifc element types within your layout or override current Net
Class rules between elements.
You can change the DRC checking between elements by clicking the
matrix box for checking Generated Silkscreen to Soldermask and enter
a value of 2. This check will make sure there is no Silkscreen in areas
without Soldermask coverage.
Repeat step 1 to check Generated Silkscreen to Generated Silkscreen
to make sure no Silkscreen is on top of another. You may need to scroll
right to see the other matrix element.
Note that you can add Layer Specifc elements and User Layer elements
to the matrix.
Click OK to save your matrix changes.
In Batch DRC, click the Connectvity and Special Rules tab.
Review the sectons and elements that you will be checking on your
layout.
Note: Any combinaton of checks can be created specifc to the requirements of
your layout type.
Click OK to run Batch DRC and see the results. Overwrite the current
scheme if asked.

DRC Visualizaton Update
Before you review hazards, you will update the DRC Visualizaton status so
that you can easily see copper to copper errors that may have been created
in your layout if you disabled Online DRC.
Click DRC Visualizaton to update the status.
Note: This can be done at anytme during the layout, but should always be done
prior to reviewing hazards.
Select Analysis > Review Hazards or click Review Hazards.
Click Update Hazards Count.
Note the Type dropdown list is set to Show All hazards.
Note the Graphic optons are set to Select, Highlight and Fit view any
selected hazard.
Understanding Verifcaton Hazards
Select Online, these errors were found by Online DRC during the layout.
Select Batch, these errors were found when you ran Batch DRC.
These are the errors you will be correctng.
Reviewing DRC Errors
You can easily review the DRC errors found with Batch DRC using Review
Hazards. Review Hazards allows you to select and cross probe directly to an
error and then correct it, or accept it.

Acceptng Verifcaton Hazards
Sometmes in a PCB Layout, errors need to be created intentonally. Although
this is not a good layout practce, it may be unavoidable. When this is the
case, you will need to tell the DRC checking to Accept these errors but mark them
for future reference.
Select Online, then click (9) Components errors.
In Display Control, choose the Placement scheme.
In the Review Hazards Components dialog box, click the Violaton for L1,
then double-click the frst L1 violaton in the Descripton secton.
L1 is highlighted and the Descripton shows that the violaton is due to the
component overhanging the Board Outline. This violaton is intentonal.
Click Accept, the violaton is highlighted and the Accepted count is
updated.
Note: This Hazard can also be corrected in your Library by marking the Allow Cell
Overhang switch in Package Cell Propertes. This library change will keep the error
from occurring in future designs.
Contnue to review the other Component and Online violatons, updatng
them to Accepted as needed.
Note: You will need to switch back to the Display Control > Routng scheme to see
some of the errors.
Understanding Verifcaton Hazards (contnued)

In the Review Hazards dialog box, click Batch and
choose (1) Unplaced Parts.
This is the Unplaced Part found in the Design
Status report you ran earlier in this lesson.
Placing this Part on the layout will remove the
error.
Note: You can correct this at a later tme. C34_1
should be placed on the botom side of the layout
between U3 and U4 found on the top side of the layout.
Understanding Verifcaton Hazards (contnued)
Using DRC Visualizaton and Repair DRC
Select Batch, and click (xx) Proximity.
Double-click Hazard #1. The error is a Trace to
Trace violaton.
You can see the DRC Visualizaton patern where
the error has occurred.
Select the trace containing the patern.
Right-click and choose Repair Selected and the
trace to trace violaton is corrected.
Contnue to correct or accept the other listed
Proximity violatons.
When completed, Close Review Hazards then
rerun Batch DRC and Review Hazards to see how
well you corrected the DRC errors.
Note: It is always a good idea to rerun the DRC
Verifcaton process afer correctng DRC errors, or if
any changes are made to the layout.
Save your layout and close Xpediton xPCB.

Review Questons
1 Why should I verify my layout?
2 Which Batch DRC checks should I run?
3 What fabricaton checks are available with Batch DRC?
4 Do I need to correct every error found in Review Hazards?
Review Answers
1 A PCB layout is a very complex project that requires thousands of
design details to be accomplished to complete a fnished product.
Managing these details can be a large task, and it is possible for
unexpected errors to occur. Verifcaton allows you to analyze the
details of your layout and correct errors prior to generatng
manufacturing outputs.
2 You should always run checks for the entre design, Connectvity and
Special rules, and all of the Proximity optons to check clearances on
all layers. Additonally, you can add checks in Connectvity and Special
rules based on the requirements of your design.
3 While routng in Xpediton xPCB, the system tries to maintain good DFM
rules to reduce trace slivers and acid traps. Batch DRC does provide
checking for some manufacturing errors like Missing Pads, Plane
Islands, and padstacks with Minimum Annular Ring.
4 It is a good idea to review every error listed in Review Hazards before
sending your design to manufacturing. Some designs may require you
to correct every error found in Review Hazards. In some cases, the
errors listed may be considered by engineering as warnings and are
allowed within the design. These errors can be Accepted as intentonal
and not required to fx, but logged for future reference.
257
In this secton:
Simulaton with
HyperLynx BoardSim
& HyperLynx Thermal
Simulaton with HyperLynx BoardSim
Thermal Analysis with HyperLynx Thermal
258 HyperLynx BoardSim Simulaton
Lesson 21: HyperLynx BoardSim Simulaton
This exercise walks you through the process of sending a fnished design
from Xpediton xPCB Layout to HyperLynx BoardSim and selectng a net for
simulaton. You will run a post route simulaton to validate the simulaton
results from LineSim completed in the pre-layout stage. HyperLynx BoardSim
simulaton validates the signal quality and will help you to determine if the
routng topology, board stackup, trace lengths, widths, and terminaton are
suitable for a given interface.
HyperLynx BoardSim
From the Xpediton xPCB Layout Start Page, click Open and browse to
and select:
C:\Xpediton_Evaluaton\LessonFinal\PCB\CORPORATE.pcb.
Select Analysis > Export to HyperLynx SI/PI/Thermal.
HyperLynx BoardSim opens with your PCB database loaded.
Note: HyperLynx Power Integrity analysis requires additonal HyperLynx
licensing.
In HyperLynx BoardSim, click NET.
In the Select Net by Name dialog box, scroll down, select the
DATA_BUS0 net and then click OK. This shows only that specifc net
routed on the board.
Simulaton with HyperLynx BoardSim & HyperLynx Thermal
HyperLynx BoardSim (contnued)
Select COMP.
In the Assign Models dialog box, double-click on pin U13.M26.
Hint: These are the same steps used in the HyperLynx LineSim lesson
(Lesson 10).
In Select IC Model, choose xc9500.ibs from the Libraries list, and then
choose XC95216_BGA352[SLW=0;VIO=0] from the Devices list, then click
OK.
In Assign Models select U13.M26 pin and change the Bufer setngs to
Output.
Repeat steps 6 and 7 for U15.13 and U26.13 and choose mc74lcx125.ibs
from the Libraries list, and then choose MC74LCX125 from the Devices
list, then click OK.
Close Assign Models.
Select Run Simulaton.
In the Digital Oscilloscope dialog box, select the Rising edge radio
buton. Make sure you have a probe color assigned to pins and click
Start Simulaton.
Click two points in the Oscilloscope window on the top and botom
of the overshoot of the waveform to review the span of the voltage
overshoot.
Note: Receivers have a lot of voltage overshoot (about 1.95V, in LineSim we had
2.1V).

Now we want to compare the pre-layout simulaton results from LineSim with
the BoardSim results that we just observed.
In the Digital Oscilloscope dialog box, click Save/Load and then select the
HyperLynx.LIS radio buton.
Click Load and browse to C:\Xpediton_Evaluaton\LessonFinal.
Select the fle DATA_BUS0_no_terminaton.lis, then close
Load/Save Waveforms.
You can toggle to see both the pre-layout and post layout simulaton
results by checking the Loaded results check box.
Note: Diferences between pre- and post-layout simulaton results for receiver
propagaton delay (Green and Cyan color wave forms) are due to topology and
trace length diferences. However, the overshoot is almost the same (1.95V versa
2.10V).
To fx the Signal Integrity problem, click Terminaton Wizard.
The Terminaton Wizard dialog suggests using AC terminaton at the U15.13
receiver pin.
From the Apply tolerance dropdown list, choose Exact value.
Click Apply Values. This assigns the terminator and its value.
Click OK.
21
21
Click Erase, then Start Simulaton to rerun the simulaton with the AC
Terminaton in place.
Notce that we removed almost all of the Signal Integrity problems related
to overshoot.
Now we want to compare pre-layout simulaton results from LineSim with
BoardSim results afer terminaton.
In the Digital Oscilloscope dialogbox, click Save/Load, then select the
HyperLynx .LIS radio buton.
Click Load and browse to and select the fle
C:\Xpediton_Evaluaton\LessonFinal\DATA_BUS0 _terminated.lis
Check the Loaded results check box so you can toggle to see both the pre-
and post-layout results of the simulaton.
Note: Diferences between pre- and post-layout simulaton results with
Terminaton in place for receiver propagaton delay are due to topology and trace
length diferences.
Close Digital Oscilloscope, then close HyperLynx BoardSim.
22
23
24
25
26
22
22
25
262
Review Questons
1 When would I want to use HyperLynx BoardSim?
2 Can I compare HyperLynx BoardSim results with those from HyperLynx
LineSim?
3 What do I do with the results?
Review Answers
1 Early in the design process, you can use HyperLynx LineSim to model
the behavior of specifc signals and/or specify terminatons that might
be required. HyperLynx BoardSim then lets you model the actual
physical trace on the board to see if the physical implementaton of the
signal performs as expected against the earlier simulaton.
2 HyperLynx BoardSim lets you run simulatons on specifc signals and also
lets you compare the simulaton results with previous simulatons created in
HyperLynx LineSim. This capability lets you carefully examine the projected
performance against the actual layout to determine if any tweaking is
required.
3 The results provided by HyperLynx BoardSim help you determine if any
additonal components need to be added to the design or if values of
current components need to be adjusted. Any changes can be
incorporated into the design at the schematc level and forwarded to
Layout.
HyperLynx BoardSim Simulaton
263
Lesson 22: HyperLynx Thermal Analysis
This exercise walks you through the process of sending a fnished design from
Xpediton xPCB Layout to HyperLynx Thermal to evaluate possible heat problems
and corresponding solutons for eliminatng areas of excessive heat. This
exercise does not cover all of the aspects of the HyperLynx Thermal sofware
but highlights a few important features.
HyperLynx Thermal Analysis
This secton demonstrates how to perform a HyperLynx Thermal simulaton.
From the Xpediton xPCB Layout Start Page, select Open, then browse
and select
C:\Xpediton_Evaluaton\LessonFinal\PCB\LessonFinal.pcb.
Select Analysis > Export to HyperLynx SI/PI/Thermal. BoardSim will
open.
In BoardSim, click Run Thermal Simulaton. The simulaton is displayed
along with the Components dialog box.
Note: Some components are running as hot as 67degC. We will try to resolve
some component problems.
You can view the simulaton results in 2D or 3D by selectng
View > Toggle 2D/3D mode.
264
HyperLynx Thermal Analysis (contnued)
Create a screw component in the Master Library by selectng Library >
Master.
In the Edit Master Library dialog box, highlight the frst component and
click Copy Part.
Enter the name Screw_#6 for the new part.
Click OK.
In the Edit Master Library dialog box, scroll down and, select the Screw_#6
part then click Edit part.
In the Edit part dialog box, change the parameters for this screw as shown
and click OK.
HyperLynx Thermal Analysis 264

265
In the Edit Master Library dialog box, select Save to disk and click
Close.
Copy the Screw_#6 part from the Master Library to the Working
Library to be used in this design by Selectng Library > Working.
In the Edit Working Library dialog box (in the lef-hand window) Master
library: scroll down and select Screw_#6.
Click >> to copy it to Working Library: window.
Click Close.
Select Placement > Screw and the part ataches to your cursor.

266
Place the part in the locaton as shown, then click OK in the Component
propertes dialog box.
Repeat step 17 and place the remaining 3 screws at the locatons shown.
Rerun the analysis by clicking Run Thermal Simulaton.
Note: Afer adding screws around the upper lef IC component, the
temperature decreased from 67degC to 51degC. Overall temperature
for the board decreased to 52degC.
Save and exit HyperLynx, then save and close Xpediton xPCB Layout.
267
Review Questons
1 When would I use HyperLynx Thermal?
2 How does HyperLynx Thermal compute the temperature of areas of the board?
3 Can I add my own custom heat sinks and mechanical components to HyperLynx Thermal?
4 How do I utlize the results?
Review Answers
1 Many designs can be temperature sensitve depending upon their
applicaton. You can use HyperLynx Thermal to create a thermal model
of your design and determine if you will need to add heat sinking
components or adjust your system cooling and air fow specifcatons to
guarantee proper performance.
2 HyperLynx Thermal uses an extensive library of thermally modeled
components and air velocity statstcs to create a sophistcated model
of the thermal behavior of your design. Through careful monitoring
and adjustment of these parameters, you can discover what changes
you need to consider in order to bring your design into an acceptable
window of thermal performance.
3 You can add additonal models to HyperLynx Thermal to represent
specifc components that you might add to your design to improve
thermal performance. You must give careful atenton to the creaton
of these models so that the applicaton can properly interpret their
thermal characteristcs.
4 Once you identfy problem areas and possible solutons, you can
incorporate the necessary changes into your design and rerun
additonal simulatons to confrm the adjusted behavior of your design.
268
269
In this secton:
Adding Drawing Documentaton
Generatng Manufacturing Outputs
Data Archiving and Transfer
Library Component Creaton
Conclusion
Completng the
Design
270
Lesson 23: Adding Drawing Documentaton
Once you have completed your design, you will need to prepare documentaton
for releasing it to manufacturing. Xpediton xPCB Layout has built-in functonality to add
drawing details, formats, notes, and dimensioning. You can add Drawing Details from
your Personal Library, or import them using DXF drawings from third party design tools.
Dimensioning in Xpediton xPCB Layout is associatve, and can be created using both
Linear and Ordinate methods.
In this exercise, you will learn how to update your fabricaton drawing to prepare it for
release output for manufacturing.
Dimensioning Setup
Before you dimension your design, you need to prepare the dimensioning environment.
You must set the layer display or set up display schemes for repeated use. You must
also determine which type of dimensioning method is most appropriate.
In Xpediton xPCB Layout, from the Start Page, select Recent and choose:
Click Fit Board, then open Display Control and select the FAB_DWG_SH2
display scheme.
Select View > Toolbars > Dimension to add the Dimensioning Toolbar.
On the Dimensioning toolbar, click Dimension Parameters and select the
Local: Default dimension scheme.
Review the setngs in the scheme on the General tab of the Dimension
Parameters dialog box.
Note: You create the Dimension Style, Layer, and Font setngs here.
Review the setngs on the Placement tab then click OK.
Note: You create the Dimension Leader Terminatons, Line Styles, and Placement here.
You can save all of the Dimension Parameters as multple schemes for your designs.

271
Completng the Design
Associatve Dimensioning
Xpediton supports two types of associatve dimensioning; Linear and
Ordinate. Linear measures the distance between one feature of an object to
another. Ordinate measures all dimensions from a common origin point (0,0) for
the entre board. Once you have dimensioned an object with either method, if
you edit the object locaton, the dimensions will update automatcally for that
object.
Placing Ordinate Dimensions
Zoom to the lower lef area of the board, near the Board Origin.
From the Dimension toolbar, click Place An Ordinate Dimension.
Select the mountng hole and place the dimension as shown.
Select the Board Outline locatons and the dimensions are placed in
alignment with the frst dimension.
Note: The added dimension values are measured from the (0,0) Board Origin.
Automatcally Updatng Dimensions
Zoom to the lower right area of the board and place a dimension for the
mountng hole.
Note: Right-click and select Cancel to exit Placement mode.
Select the mountng hole, then right-click and select Fix/Lock > Unlock
from the menu.
Right-click the mountng hole and click Propertes > Padstack Propertes.
Change the X: Locaton of the mountng hole to 5,500 and click OK.
Note the dimension changes automatcally.
Click Undo to move the mountng hole to the original locaton and Lock it.

272
Associatve Dimensioning (contnued)
Placing Linear Dimensions
Click Dimension Parameters on the Dimensioning Toolbar to launch the
Dimension Parameters dialog. Then, on the Dimension Parameters
General tab change the Dimension Method to Associatve and click OK.
Click Place Dimension Between Two Elements.
Select the two Board Outline locatons to place a dimension for the overall
length of the board as shown.
Using both Ordinate and Associatve dimensioning, complete the
dimensioning of your board as shown.

273
Adding and Editng Text
You can add and edit text in your documentaton using WYSIWYG True Type fonts.
You have full control over the size, justfcaton, and rotaton. You can even create
Mirrored text if needed for the botom side of your layout. You can also edit multple
text items simultaneously to save tme.
Adding Text
Zoom to the area around the Film Title Block below the Board Outline.
Select Draw > Text.
In the Propertes dialog box, setup the Layer, Font, Size, and Justfcaton as
shown.
Enter My Design Inc. for the String value, and place the text as shown by
clicking the locaton.
Editng Text
Double-click on the text string First Last.
In the Propertes dialog box edit the String value and enter your name.

274
Adding and Editng Text (contnued)
Editng Multple Text Items
In this design, the Drawing Number is a text item that appears in several places
and is identcal in all locatons. You do not have to edit these individually; you can
change them all with one edit.
Hint: In most designs, text strings like the Drawing Number can be in multple places on
multple pages. So editng them all at the same tme can reduce the chance for errors.
Select the Drawing Number text string in the Film Title Block.
Select View > Fit All to see the entre Title Block.
Using CNTL + Select, select the other two text strings on the ttle block for
the Drawing Number.
Right-click Propertes and edit the String with the value 12345-000.
Close Propertes and note that all of the text strings you selected are edited.


275
Placing Drawing Cells
You can create Drawing Cells in your Personal Library to use as drawing details,
formats, and notes. You place Drawing Cells using Component Explorer.
Select Place > Component Explorer.
In the Component Explorer Navigator, click Drawing Cells.
Select the Drawing Cell Fab_PCI_EdgeConnDetail, then right-click Place.
Place the Drawing Cell as shown.
Note: Once you place a Drawing Cell, you can move it or edit it like any other cell item
by selectng it and using the Move and editng commands.

276
Copying Data for External Documentaton
Sometmes the documentaton for a PCB Design may be completed in other
tools; for example word processor or spreadsheet programs. Xpediton provides
an easy method for grabbing screen shot data to supply to other tools.
Copy Bitmap
Select Edit > Copy Bitmap to Clipboard.
Frame Select the area of the design that you want to capture for use
externally.
Note: The area is captured to the clipboard using the current Display setngs.
Open a word processor or spreadsheet document of your choice, and Paste
the contents from the clip board into the document.
Save your design and Exit Xpediton xPCB Layout.

277
Review Questons
1 How do I set the Tolerance for Dimensions in my design?
2 Can I change the Dimension units to be diferent than the design units?
3 Can I add text on trace and plane layers?
4 How are Drawing Cells created?
Review Answers
1 You set the tolerances for your dimensions using the Dimension
Parameters dialog box. You can set the decimal Precision, Tolerance Style,
and Plus and Minus tolerance values for your dimensions.
2 The units for your dimensions need not be the same as the design units.
You can dimension in Inch, Thousands, Millimeter, and Micron units. You
also have the capability to dimension in two diferent units using the
Dual Dimensioning feature.
3 You can add Free Text on any layers within the design, including Trace and
Plane copper layers. Text added on copper layers is subject to all of the
spacing DRC checks used for traces, vias, pads, and planes.
4 You create Drawing Cells using the Cell Editor in xDM Librarian for your
Personal Library. Once created, you can import them into your local design
cache.
278
Lesson 24: Generatng Manufacturing Outputs
This secton will step you through the process of creatng Manufacturing outputs.
Xpediton xPCB layout supports many diferent fle formats to facilitate automated
manufacturing and design operatons. ODB++ or Gerber outputs are usually
required to fabricate a PCB. ODB++ and Gerber fles contain design informaton
for each layer. There are also other critcal outputs such as NC Drill Files, PDF
Drawings, Bill of Materials, and other interface report fles for manufacturing of
Pick and Place and Testng.
Creatng NC Drill Files
When creatng manufacturing outputs, create NC Drill fles frst to make sure that
the output fles created aferwards contain the correct drill data.
In Xpediton xPCB Layout, from the Start Page, select Recent and choose:
From the Output menu, select NC Drill to open the NC Drill Generaton
dialog box for defning the Drill Optons, Chart Optons, Symbols, Custom
Columns, and Feature Control Frames.
Select the Drill Scheme Loc: Default. You can save all of the drill optons to a
scheme for use in future layouts.
Review all of the tabs in the dialog box for the features available.
Click OK to create the NC Drill fles and Drill Chart for the drawing. Drill fles
are placed in the \PCB\Output\NCDrill project directory.
Once the drill is completed, select the Drill Chart in the editor window and
Move it to the locaton as shown.
Note: If your design has multple via layer spans, a drill chart for each span will be
created.

279
Generatng Silkscreen
Although the Silkscreen layers in Xpediton xPCB Layout can be used for your
silkscreen output, fabricaton vendors prefer to generate silkscreen based on the
natve layers. Silkscreen generaton extracts reference designators and component
outlines from each cell in the design and uses a process known as clipping to
ensure that no silkscreen data touches pads or solder mask areas. As shown in
the previous verifcaton lesson, you can also check generated silkscreen using the
Batch DRC process.
Click Fit Board, and in Display Control select the scheme SILK_TOP.
In Display Control > Edit tab, enable the Top Fabricaton Objects Solder
Mask and the Route Objects as shown.
Select Output > Silkscreen Generator, and setup the dialog box as shown.
Process Both sides of the board on All Package Groups using the
Silkscreen Reference Designators and Outlines design layers.
Break silkscreen with Soldermask Pads using a Pad Clearance of 2(th).
Set Graphics Lines and Text widths to 5(th).
Click OK to generate silkscreen, then click OK to close the results message.
In Display Control > Fab tab > Fabricaton Objects, expand the Silkscreen
Items and disable Outlines and Ref Des to see only the Generated
Silkscreen.
Hint: You can make a Display Scheme for the Generated Silkscreen layers.
Select any Reference Designator. Note that the generated silkscreen is just a
graphic line.
Note: If you make changes to your design that require you to update the silkscreen
layers, you will need to re-process the Generated Silkscreen prior to output for
fabricaton.
Deselect the silkscreen and Save your layout.

280
Creatng Gerber Output
Gerber format is stll used in the industry for PCB manufacturing outputs. There
are two typical format standards: RS-274X and RS-274D, and both are
unintelligent vector and raster data for plotng trace, via, and pad circuitry. In the next
secton you will use a more intelligent form of data output. Xpediton xPCB Layout
can provide both. It is a good idea to set up Gerber output in your design, although
you may not use it.
Select Output > Gerber. Note the \Output\Gerber project directory. This is
where any fles will be saved.
The Loc:GerberMachineFile1.gmf has set the format to use the RS-274X
Data type.
On the Parameters tab, select GeneratedSilkscreenBotom.gdo and Copy it to
create a new Gerber fle to process.
Rename the new fle to Generated SilkscreenTop.gdo.
Click the Contents tab with the new Gerber fle selected.
In the Board items secton, select Generated Silkscreen Top. Note the
other sectons and the selected items that will be processed to create this
Gerber layer output.
Click OK and then click Yes to save the GerberPlot setup. All of the selected
Gerber layers will be processed.
It is good practce to check the GerbPlot.txt log in the File Viewer to verify
that there are no Gerber processing errors on any layers.

281
ODB++ Fabricaton Output
In the PCB Manufacturing and Assembly industry, vendors prefer to receive a
complete and intelligent database output from PCB designers. ODB++ is an open
format that captures the CAD/EDA, assembly, and PCB fabricaton data in a single,
unifed, and intelligent database. ODB++ interfaces directly with Valor assembly and
manufacturing sofware which is the most widely used tool by PCB manufacturing
vendors worldwide. ODB++ also interfaces with many third party applicatons.
Providing ODB++ data format to your fabricaton vendors ofers a tme-to-market
advantage that gerber data cannot provide.
Select Output > ODB++.
Enter the Output job name 12345-000. The fle 12345-000.tgz will be
saved in the \Output project directory. This is the fle you send to your PCB
fabricaton vendor.
Enable Generated Silkscreen data.
Note the other optons available for output, and the selected layers that will be
included in the ODB++ data output.
Enable Launch ODB++ Inside to automatcally start the Cam Compare
process.
Click OK and then click Yes to save the ODBSetup and start the ODB++ output
processing.
Click OK to close the warning message.

282
ODB++ Inside Cam Compare
ODB++ Inside creates a temporary copy of the NC Drill and Gerber output
based on your setngs in those dialog boxes. Then, it runs a Valor Cam Compare,
which compares the ODB++ output with the temporary NC Drill and Gerber
versions.
When ODB++ Inside launches, the Cam Compare has been completed.
You can select layers to display the compare results. Note the two colors for
the layer: one for the ODB++ data and one for the Gerber data. This allows
you to see the miss-matches in the data.
Note the trafc light columns. Green lights are shown for matching data.
Red lights are shown for data miss-matches.
You can browse and verify the miss-matches using Show Next result.
Explore the diferent layers using the Pan and Zoom features.
Once you are satsfed with the compare results, click Contnue to close
ODB++ Inside.
Save your design.

283
Creatng PDFs with Extended Print
You can output your designs and drawings in Portable Document Format (PDF),
making them easily viewed by almost any applicaton on any computer system.
Extended Print will print the layers and types of design elements shown on each
sheet, and you can save multple printng setup schemes for use in future designs.
Extended Print
From Display Control, select the scheme FAB_DWG_SH2 then select View >
Fit All.
Select File > Printng > Extended Print.
On the Extended Print Sheets Setup tab, add a new sheet for the fab drawing
by selectng New Sheet.
Rename the New Sheet to Fab Sheet 2.
Select Fab Sheet 2 and click the Contents tab.
Enable Assign Current View to create a PDF sheet for the displayed screen
data.
Note: You can also choose the Layers and Board Items that you would like printed from
the Contents tab.
Click OK to print a PDF containing all of the selected sheets on the Sheets
Setup Tab.
When your print is completed you
can click OK to exit the Extended
Print dialog box and review your
PDF.

284
Generatng a PCB Layout Bill of Materials (BOM)
In Xpediton xDX Designer, you created a custom Bill of Materials using Part Lister.
Xpediton xPCB Layout can also create a custom Bill of Materials. The Bill of Materials
output in Xpediton xPCB Layout allows you to generate a BOM based on the Part
Number or the Reference Designators as a key sortng feld, or you can choose to output
both. You can customize the outputs to include Variant informaton, Mechanical Cells,
and User Propertes. You can also save all of your custom BOM setups as schemes.
Bill of Materials
Select Output > Bill of Materials.
In the Setngs secton, enable Part Number and Reference Designator to create
both sorted BOMs.
Note: You may change the column Titles and ordering when needed.
Enable Include user propertes and Include Mechanical cells.
In the Descripton secton, enable Descripton to place this property informaton
in the DESCRIPTION column on the BOMs. This is the property informaton
contained in Xpediton xDX Databook.
Note: You can use CTRL+Select to choose more than one property to add to the
DESCRIPTION column.
Click OK and then click Yes to save the scheme changes.
Close the Bill of Materials dialog box and review your generated BOM in
the \PCB\Output directory. You can use any text editor to open the fle.
Note the two diferent sortng sectons in the BOM.

285
Additonal Manufacturing Reports and Outputs
In order to complete the fabricaton, assembly, and testng of your layout, your vendor
will require other informaton. Pick and Place fles and Bare Board testng fles will
be needed to help program vendor equipment. You may also need to send fles to
third partes for review in a format that is neutral and can be used by many third party
applicatons. Xpediton xPCB Layout can generate all of the fle outputs you need to
complete your layout release.
Pick and Place and Bare Board Testng
Select File > Export > General Interfaces.
Select the Generic AIS report and Identfy parts by Part Number, and click OK to
run the report. Click OK to close the results message.
Using any text editor, open the vb_ais.txt fle created in your project
\PCB\Output directory. This is a generic format Auto Inserton fle that vendors
can use to program Pick and Place Assembly machines. Close the report afer
reviewing.
Repeat step 1 and select the Generic ATE report and Identfy parts by Part
Number, then click OK to run the report. Click OK to close the results message.
Using any text editor, open the vb_ate.txt fle created in your project
\PCB\Output directory. This is a generic format Automated Testng fle that
vendors can use to program Bare Board Testng equipment and
create test fxture data for your layout. Close the report afer reviewing.
Note: You can also create a Mitron GenCad testng fle if your vendor prefers the
GenCad format.

286
Export CCZ and the Free visECAD Viewer
Xpediton has the ability to export a format from the schematc and PCB layout that you
can use with the Mentor Graphics free visECAD viewer. Your customers or vendors can
use this free viewer to review the schematc and layout databases if they do not have
Xpediton sofware.
The free visECAD Viewer is a fully functonal applicaton for viewing designs in the
neutral CCZ format. The visECAD viewer includes many features such as Print with
Preview, Queries, Measuring, as well as many others.
To Download the free visECAD Viewer, use this link:
htp://www.mentor.com/products/pcb-system-design/fabricaton-assembly-test/
visecad/visecad-evaluaton
Select File > Export > CCZ, and set the Export units to Thousand.
Click OK to export the data, and click YES to save the setngs when asked.
When the Save Scheme dialog box appears, check the opton checkbox labelled
Save locally with design and select OK.
Once you have visECAD installed, you can double-click on the fles to open them
in the viewer.
The fles will be located here:
Schematc will be in the project \PCB\Logic directory Filename.cce.
PCB layout will be in the project \PCB\Output directory Filename.cce.

287
Export and Import DXF and IDF
While designing your PCB layout, you may need to interface with other engineers
that are designing the chassis or enclosures for your board. Xpediton xPCB Layout
allows you to provide the most common neutral formats used in the industry. Also,
Xpediton xPCB Layout allows you to import mechanical data from your engineers
using these formats.
Export DXF
Select File > Export > DXF.
Click Browse and name the DXF output fle TopAssembly.
Enable the ExpPCB Elements: Assembly Outlines Top, Assembly Ref Des Top,
Board Outline, Fiducial Pads Top, Mountng Holes Layer 1, Placement Keepouts
Layer 1.
Click OK to export the fle, and click Yes when asked to save the setngs. Your
fle will exported to the project \PCB\Output directory.
Note: You can create schemes for diferent DXF outputs that you can use in future
designs
Export IDF
Select File > Export > IDF.
Click Browse for the Board and Library Output fles and name the fles
CORPORATE.
Enable Use Board thickness from layer stackup and Export Component
placement outline with height.
Click OK to export the fles, and click Yes when asked to save the setngs.
Your fles will be exported to the project \PCB\Output directory.
Save your layout and Exit Xpediton xPCBLayout.

288
Review Questons
1 How do I output multple drill fles when my layout has blind and buried
vias?
2 What is ODB++?
3 If I use ODB++ Output, do I have to output NC Drill and Gerber?
4 Can I output Variant BOMs?
Review Answers
1 The NC Drill Output automatcally handles blind and buried vias. It will output
each via span into a diferent drill fle named per the via span. It will also create
diferent NC Drill Charts for each via span on separate layers.
2 ODB++ is an object oriented database format developed by the Mentor
Graphics Valor. The format contains all of the informaton required to
fabricate and assemble your board layout. It is an intelligent format that
provides vendors with much more valuable informaton that allows them
to quickly verify, test, and create Tools. ODB++ is widely recognized as the
leading format used by PCB fabricaton and assembly vendors.
3 No, it is not necessary as the ODB++ fles contain all of the required
fabricaton informaton. If you want to use the Cam Compare tool in
Xpediton, you will have to set up your NC Drill and Gerber outputs.
4 Yes, the PCB layout Bill of Materials output will allow you to generate
separate BOMs for as many variants that you have in your design. Each
BOM will be sufxed per your setup.
289
Lesson 25: Data Archiving and Transfer
The DxArchiver provides a quick and easy method for automatcally creatng
archives for backup or transfer of your Xpediton Projects. The DxArchiver utlity
collects and stores schematcs, PCB layout and library informaton, and other data
associated with a specifc design or project in Xpediton.
It provides a self-contained design that is ready to be checked into DMS or other
data management tools. You can also use this self-contained fle to transfer the
database to another user or locaton to contnue work on the design. You can
choose to add additonal fles that are not related to the Xpediton database, but
that you would like to keep with the other project fles.
Archiving
DxArchiver
Start Xpediton xDX Designer.
Click File>Open>Project then browse to and open
From the Tools menu, select Archiver to open the wizard.
Take a moment to look at the optons available in the DxArchiver Wizard.
For the Target Directory, click the Browse buton and navigate to
C:\Xpediton_Evaluaton\Lesson6.
This is the locaton where your archive fle will be saved.
Enable Compress using zip format, then select Next.

290
Archiving (contnued)
The DxArchiver will archive your complete project database, and it will condense
the fles that are no longer needed. The Additonal Files porton of the dialog box
allows you to select fles or entre folders that are not automatcally added to the
project archive.
Click Add Files, and browse to the
C:\Xpediton_Evaluaton\Lesson6 directory.
Select the PDF datasheet fle FCT16244.pdf.
This fle will be added to the archive output.
Click Finish.
The archive is created and results are shown.
Click Close.
Your archive fle Lesson620120120160010.zip is created. Note that the
fle is sufxed automatcally with a date and tme code.
Close your project and Xpediton xDX Designer.

291
Lesson 26: Creatng Components in your Library
The key to successful PCB design is ensuring that the physical design data
matches the logical intent of the design. Managing this relatonship ensures
the design is correct by constructon. Xpediton xDM Librarian provides a
common interface to the various elements that make up the library objects like
symbols, cells and padstacks, and parts. Xpediton xDM Librarian is where you create
and maintain the relatonships between these objects.
Objects in your Library may be parttoned into related groups. Changes made to one
object afectng another object are propagated automatcally. For example, if you
modify a padstack object, all cells that use the padstack update automatcally in the
Library. Built-in data checking ensures the relatonships between objects are valid
and that objects cannot be deleted if used by other objects. This tght integraton
ensures data reliability throughout the library development and design processes.
This lesson will give you the basics of what xDM Librarian can do for you. If you would
like more in-depth informaton, please use this link for the Xpediton xDM Librarian
Process Guide.
Library Manager Process Guide
Opening xDM Librarian
You can open Xpediton xDM Librarian from within Xpediton xDX Designer or
Double-click the Xpediton xDX Designer icon on your desktop to open
Xpediton xDX Designer to the Start Page.
Click Open on the Start Page and browse to and select
Select Tools > Library Manager.
Xpediton xDM Librarian opens, and is connected to the current project
library.
Creatng Components in your Library

292
The Xpediton xDM Librarian Workspace
The Xpediton xDM Librarian interface is used for library management and
editng. It contains utlites that are specifc to Xpediton xDM Librarian and
access to editng tools for library component creaton.
Library Navigator Tree
Use the Library Navigator to explore the diferent parttons for each of the
library enttes: Parts, Cells, Symbols, Padstacks, and Models.
Expand and Review the library sectons.
The xDM Librarian Toolbar
New
Part
Editor
Reusable
Blocks
Editor
Padstack
Editor
Material/
Process
Editor
Help
Contents
Visual
IBIS
Editor
Library
Services
Partton
Search
Paths
Units
Display
Setup
Parameters
File
Viewer
Open Refresh Property
Verifcaton
Parts
Manager
Symbol
Editor
Simulaton
Model
Propertes
Partton
Editor
Unreserve
Parttons
Property
Defniton
Editor
Cell
Editor
Layout
Templates
Editor

293
Creatng a Symbol with the Symbol Editor
The symbol editor allows you to create new symbols very quickly. You can
use a spreadsheet to copy and paste pin informaton into the symbol or you
can enter the data manually. The editor provides a basic symbol
automatcally and allows you to modify the symbol in any way you desire.

Open the Symbol Editor and Set the Grid
Select Tools > Symbol Editor.
Select File > New to create a new symbol.
Prior to adding pins, open the Symbol Editor Preferences with
File > Preferences to review the setngs.
In the General Secton set the following:
Grid step: 0.050,
Show grid every: 1 grid points,
Large dot every: 4 displayed grid,
Default length: 4 grid points,
Default Spacing: 4 grid points and
Pin property positon: Above Pin
Click OK.
Adding Pins to a Symbol
To add pins click Add-Pin & Edit.
Place the pin on the upper lef corner of the symbol body as shown
below. Then type the Pin Name CLK and press Enter. Use the ESC key to
exit pin placement mode afer placed.
Now defne this pin to be pin 1. Select View > Windows > Propertes if
the Propertes window is not visible. Select the pin and then click
<new_property> in the PCB Propertes secton Propertes window.
Note: If you have difculty selectng the pin, make sure that the Select Pins
buton on the toolbar is selected.
Click in the dropdown list and select the property Pin Number.
Enter a value of 1 in the Value feld and the pin number is placed on the
pin.

294
Adding Pins to a Symbol (contnued)
Using the previous steps, add 2 Power pins to the Top of the
symbol as shown. The Pin Names are VDD_1 and VDD_2 and will be
assigned the pin numbers 19 and 20.
Note: Pin Names cannot be duplicated on symbols, so use sufxes for
multple pin names.
Hint: Right-click when placing the pins to change the Pin Type and Locaton.
Add a Ground pin to the Botom of the symbol with a Pin Name of
GND and a Pin Number of 10 as shown.

295
Add an Array of Pins
Add an array of input and output pins by clicking Add Pin Array.
Use the following setngs for the input pin array:
Pin Name = IN
Range 7 to 0
Step = 1
Pin type = IN
Pin locaton = Lef
Pin spacing = 4
Click OK to create the array of pins.
Place on the lef side approximately 4 grids down from the CLK pin.
Note: You can use View > Show Port Type to toggle the port type graphical
indicators On and Of.
Add another array for the output pins using the following setngs:
Pin Name = OUT
Range 7 to 0
Step = 1
Pin type = OUT
Pin locaton = Right
Pin spacing = 4
Place the array on the right side of the symbol so that the output pins align
with the input pins as shown.

296
Adding Pin Numbers
Select the IN pins (other than CLK) from the Pins window.
Note: The pins highlight in all windows (including the working area).
Click Add Propertes to update the pins.
Set the values as shown below. Make sure Type = Pin Property, Name =
Pin Number, Prefx is Empty, Value = 2, Delta = 1, Sufx is Empty and
Positon and Visibility are set to Above Pin and Value.
Click OK. This automatcally adds and increments the Pin Numbers. Positon
them as shown.
Repeat steps 1 through 4 for the OUT pins. Use Value = 18 as the
startng value and Delta = -1 to decrement the Pin Numbers down to 11.
Positon them as shown.

297
Adjustng the Symbol Outline
Note: You need to shrink to symbol shape and the outline to create a complete symbol.
To shrink the outline, enable Select Graphics.
Select the symbol shape and notce pick points appear on the shape.
Note: Use View > Symbol Outline if you don't see the outline.
Select the Middle pick point and drag the botom segment of the symbol closer
to the lowest pins. Place it four grid points below the lowest pins.
Do not forget to move the GND Pin afer adjustng the symbol outline.
Select and drag the pin to the new locaton shown.
Automatcally update the bounding box by selectng Symbol > Update Symbol
Outline.
Note: The symbol outline helps with avoidance rules when connectng nets in the
schematc.
Note: The symbol outline may be set to update automatcally as you adjust the symbol
shape. If it is and you wish to manually adjust it, you may need to turn of the automatc
adjustment mode frst. Do this by selectng File > Preferences > General > Symbol and
disabling Automatc Outline Update.

Moving the Symbol Origin
To complete the graphical modifcatons you need to move the origin to the
appropriate locaton.
Select the Origin marker and drag the marker to the lowest lef pin on the new
symbol.
Your symbol should appear as shown.

298
Saving the Symbol

Select File > Save As and choose the Sample library partton.
Name the symbol, Symbol_YourName.1 and click Save.
In the Propertes window, notce that the Symbol Name has been updated to
match the name you used.
The symbol is now complete and ready for use.
Verifying the Symbol Availability
Select File > Exit to exit the Symbol editor.
In xDX Designer select Tools > Update Libraries.
In xDX Designer click DxDataBook to open xDX Databook.
In xDX Databook, select the CL View tab and the Symbol View tab.
Select the [+] symbol to expand the Sample partton and scroll down to fnd
your new symbol.
Notce the Symbol_YourName.1 symbol has been saved and is ready for use.

299
Creatng a Symbol from a Spreadsheet
Entering all of the pins manually on large pin count devices can be tedious and error
prone.By entering all your pins into a spreadsheet, you can quickly and easily import
them into the Symbol Editor for placement on a symbol.
Start a New Symbol and Load the Pin Data
Open the Symbol Editor and start a new symbol by selectng File>New.
Right-click in the Pins window and click Import Pins.
Browse to C:\Xpediton_Evaluaton\LessonFinal and select
SerialIO.csv to import all of the pins from this fle.
All unplaced pins are marked with an *. You can add pins to the symbol by
selectng them from this list.

300
Adding Pins to the Symbol
You can select pins from the pins list and drag them into the Symbol window to
place them on the symbol body. As you place each pin the * is removed.
Select the ~RST_N pin name in the pins list.
Drag the pin into the Symbol view. Notce the pin ataches itself to the cursor so
that it can be placed in the Symbols working pane.
Release the mouse buton when the pin is in the desired locaton on the symbol
body.
Notce there is in invert bubble on the pin and a strike over the name. This is an
indicaton that in the CSV fle, the pin was set as inverted. The Pin Label began
with ~ which results in the strike over.

301
Adding Multple Pins to the Symbol
You can also add multple pins simultaneously from the Pins list. Click
on the Pin Type column in the Pins list to sort the pins by type (IN or OUT).
Lef-click on the frst OUT pin. Hold the Shif key and select all the OUT-
type pins.
Drag the highlighted pins (blue area) to a desired destnaton on the right
side of the symbol body.
Experiment with adding other pins and modifying the symbol graphics.
Notce that as you place pins the * is removed so that its easy to sort
and/or visually scan for unplaced pins.
When you are done, exit Symbol Editor without saving.

302
Creatng Land Patern Informaton
This lesson will walk you through creatng a PCB Land Patern. In Xpediton, land
paterns are called Cells. Cells can be Package cells, Mechanical cells, or Drawing
cells. You will use wizards to create both the padstack informaton and the physical
representaton for the PCB layout.
The Padstack Editor
The Padstack Editor allows you to create many diferent types of padstacks: Through
Pins, SMD Pins, Fiducials, Mountng holes, Vias, and others. Once defned and
named, you can assign diferent pads to padstack layers, specify pad flters, defne
pads to use within stacks, defne holes and defne any custom pads or drill symbols.
Tip: The standard method to create a new pad is to click the New icon and rename
the pad to your own naming conventon. In this lesson, the method shown in the
following steps accelerates pad creaton by naming the pad automatcally per the
size informaton entered.
In Xpediton xDM Librarian, select Tools > Padstack Editor. Review the tabs
and informaton in each secton.
Click the Pads tab and set the Filter pad list to Rectangle.
In the Propertes secton, set the Units to th (mils).
In Pad parameters, enter 25 for the height and 75 for the width of the pad.
Note the graphic in the Preview window adjusts to display your modifcatons.
Click New to create your newly defned pad.
The new pad is automatcally named Rectangle 75x25.
Repeat steps 1 through 5 and create a Rectangle pad with a height of 29 and
a width of 79. You will use this pad as the Oversize pad for Solder Mask
layers.

303
The Padstack Editor
Click the Padstacks tab and set the Filter padstack list to Pin SMD.
In the Propertes secton, set the Pad flter to Rectangle.
Click New Padstack and name it Pad Rectangle 75x25.
From the Available pads list, select Rectangle 75x25.
Click in the box next to Top mount, then click the Assign Pad arrow to
move the pad into the assignment list.
Assign the Rectangle 75x25 pad to the Botom mount and Top and
Botom Solderpaste layers.
Repeat steps 4 and 5 to assign the Oversize Rectangle 79x29 pad to the
Top and Botom Solder Mask layers of the padstack.
Note: When creatng padstacks, you can have diferent pads for a Top Mounted
land patern or Botom Mounted land patern.
Select File > Save to save your new pads and padstack, then Exit the
Padstack Editor.
You can view and edit the new padstacks by double-clicking them in the
Library Navigator Tree.

304
Creatng a New Cell
Creatng components for Xpediton is quick and easy. You can create them with
wizards or manually depending on the complexity of the land patern.
The Cell Editor
In xDM Librarian, select Tools > Cell Editor.
Set the Partton to Sample.
On the Package tab click New Cell.
Enter the Cell name SO20L and enter the informaton as listed:
Total number of pins: 20
Layers while editng cell: 2
Package group: IC SOIC
Mount type: Surface
Click Cell Propertes and set Units to th (mils).
Enter a Height value of 15, then click Close.
Click Next and the Place Pin wizard will open along with the Cell Editor
window.
Note: The Menus, Toolbars and Commands are very similar to the PCB Editor.

305
Creatng a Cell with the Place Pins Wizard
The Place Pins wizard allows you to place pins by Parameters or use
pre-defned Paterns for standard industry land patern types. You can also
add, modify, and renumber pins for your cell.
Select the Patern Place tab and choose the Patern type SOIC.
Enable Include Assembly outline and Include Silkscreen outline.
Enter the values shown:
Body Width: 500
Body Height: 260
Pin Pitch: 50
Pin Row Spacing: 380
In the Pins secton, select Pin 1 then press and hold the Shif key.
Scroll down and select Pin 20, and while stll pressing the Shif key,
select Pad Rectangle 75x25 from the Padstack Name dropdown list.
While stll pressing the Shif key, choose 90 from the Rotaton dropdown
list.
Click Place to create the cell patern.
Save the cell, but do not exit Cell Editor.

306
Modifying Cells in the Cell Editor Window
Once you have created your patern with the wizard, you can make any
modifcatons necessary to your cell to fulfll your PCB layout requirements.
All of the capabilites available to you in the PCB Editor are also available in
the Cell Editor.
Select the Ref Des placeholder for the Silkscreen layer and move it to a locaton
that is not beneath the component when placed in a layout.
Make a few modifcatons on your own
You can add pre-defned Fanouts or Routng.
Add a Ground Slug plane and sttch some vias in it.
Add a predefned Rule Area to your cell. A named Rule Area in your cell is
automatcally added to your Constraint Manager Schemes if the cell is used in
your design.
If you made any modifcatons, Save your cell and Exit the Cell Editor.

307
Creatng a New Part in the Part Editor
Now that you have created a Schematc Symbol and a Land Patern Cell,
link them together logically with a new Part Number. The Part Editor links
the logical and physical pieces of the component together. It also creates
Pin and Gate Swapping informaton for the component.
In the xDM Librarian Navigator Tree, expand Symbols > Sample
and select Symbol_YourName to preview the symbol and use it for
reference while completng the next steps.
In the xDM Librarian, select Tools > Part Editor and select the IC
partton. These are all of the Parts in your current library.
Click New to create a new part.
Assign the value Part_YourName for Number, Name, and Label.
In the Component Propertes secton, set the Type to IC.
Enter a Descripton for the part.
Set the Reference des prefx to U.
Click Pin Mapping.

308
Importng the Symbol and Cell into Pin Mapping
Importng your symbol and cell can help automate the pin mapping process in the
Part Editor. You can also import additonal alternate symbols and cells if needed.
For this exercise you will import your symbol and cell, then manually defne the Pin
Mapping because your symbol has swappable gates.
In the Assign Symbol secton, click Import.
In the Import dialog box on the Symbols tab,
select the Sample partton and select Symbol_YourName.
Uncheck Create new gate informaton.
Click the Cells tab and select the Sample partton.
Select the Package group IC-SOIC and the Number of pins: 20.
Select the cell SO20L.
Click OK.
Review the Logical and Physical tabs to see that the pin informaton has
been loaded into Pin Mapping.

309
Assigning Gates
In Pin Mapping, click the Logical tab then click New and create
8 swappable slots with 2 pins per swappable slot. Click OK.
On the Logical pins list, select IN0 and OUT0 using the CTRL+Select method.
Click the top box of the Slot #1 column.
Click Paste Down to assign the pins to Slot #1 as shown.
Repeat steps 2 through 4 to assign the remaining
Input/Output pins into
Slots 2 through 8 as shown.
Repeat step 1 and create a new gate with 1 slot and 4 pins.
Assign the remaining pins to the new gate as shown.
Note: Any Slots within the same gate are swappable.

310
Assigning Gates (contnued)
You will now map the physical pins to the gates.
In Pin Mapping, click the Physical tab.
From the Physical pins list, select pin numbers 9 and 11.
Select the top box in the Pin # column for Slot #1.
Click Paste Down to assign the pin numbers to Slot #1 as shown.
Repeat steps 2 through 4 to assign the remaining pin numbers
to the correct Slots as shown. Use the Symbol/Cell Preview as
a reference guide.
Select the remaining 4 pin numbers and assign them to the second gate as
shown.
Click OK.
Note: When you click OK, the Part Editor does a verifcaton of your entre part to make
sure the symbol pins match the physical cell pins. If you cannot save the part you will
need to correct the errors frst.
Select File > Save, and Exit the Part Editor.

311
Adding Component Records for Xpediton xDX Databook
Once you have completed your component, add a record to Xpediton xDX Databook
so you can query and place it in DxDesigner.
In the Xpediton xDM Librarian Navigator Tree, expand Parts, then right-click
IC and click Edit Parametric Data.
Click the Table: IC tab, then click Last Record.
Enter the record informaton as shown:
Part Number: Part_YourName
Part Name: Part_YourName
Part Label: Part_YourName
Cell Name: SO20L
Descripton: My First Part
Symbol: Symbol_YourName
The other columns can be lef blank
Exit the table to Save your additons.

312
Adding Component Records for Xpediton xDX Databook (contnued)
In Xpediton xDX Designer, select Tools > Update Libraries.
In Xpediton xDX Designer, open Xpediton xDX Databook and select the IC
Library.
Scroll to the botom of the components listng and select Part_YourName.
Your Symbol is in the Preview Window.
Your Parametric Data is listed.
Select the Preview Window dropdown list and choose your cell to preview.

313
The Layout Template Editor
In a previous lesson you were able to integrate your schematc using a
PCB Layout Template. The layout templates are maintained in Xpediton
xDM Librarian with the Layout Template Editor. Templates can contain
as much informaton as you need for your designs. Data can include
formats, notes, detail views, etc.
In the Xpediton xDM Librarian, select Tools > Layout Template
Editor.
A list of the Templates in your library appears. Select
Template_2Layer_Formated.
Click Copy and rename the copy to
Template_2Layer_YourName.
Click Edit Template to open the template in the Xpediton
editor window.
In Xpediton xPCB Layout, choose the Loc:Min Contents display
scheme from the dropdown list on the Standard toolbar.
Modify the Title Block to contain YourName as DRAWN.
Save the template and Close the Templates list. YourName will
always be flled in when you integrate to this template.

314
Exportng Library Objects from your Library using EDX
Xpediton uses EDX to transfer library objects between your libraries from within
Xpediton xDM Librarian. The library objects can be exported from a library
individually, by Partton, or through a bulk selecton. Some objects like Drawing
or Mechanical cells, or Symbols not referenced by Parts, can also be exported as
Orphans from within the bulk selecton. When you export Parts from your library
using EDX, all of the part, cell, symbol, and padstack informaton is also included.
From the Library Navigator Tree, expand Library.lmc > Parts > IC.
Right-click the frst IC listed, 500_5R5V_IC, and click Export EDX.
Click Save to generate the EDX fle.
Close the EDX generaton successful message window.
Enterprise Data eXchange (EDX)

EDX is a standard format for the exchange of library, component and design
data between the design authoring systems and ANY consumer of the data. The
EDX format is a neutral format that is independent of the internal tool database
structures and ensures stability as the PCB design applicatons and fow contnue
to evolve.
In additon, Mentor encrypts the data within the EDX extracton to provide security
for the data objects to limit unauthorized access and edit of their fles; this inherently
protects the natve tool data from outside edit.
To learn more about EDX, see the EDX Solutons Alliance website at
www.edx-sa.com or click the graphic to the right to watch a quick video.
315
Exportng Multple Library Objects using EDX
From Library Manager select File > Export EDX. This opens the bulk selecton
dialog box.
Browse to the C:\Xpediton_Evaluaton\Library directory and enter
PartalLibrary for the Output fle name.
Enable Preview items.
Disable the Library check box, and then select Resistor in the Parts secton
and Drawings in the Orphans > Cells secton.
In the frst column, select On from the dropdown flter to show only the
items to export.
Note: All of the columns can be fltered and sorted as needed for review.
You can deselect any items by disabling the check box in the frst column.
Click OK and Close the EDX generaton successful message window.

316
Creatng a New Library
You can import EDX data into any Xpediton Central Library, or you can create a
completely new Library and build a library based on informaton exported from
other libraries.
From Xpediton xDM Librarian, select File > New.
Browse to the C:\Xpediton_Evaluaton directory and Create New Folder
named MyNewLibrary.
Double-click MyNewLibrary so that you are within that directory, then click
OK to create the new library.
Your new library will now be actve in xDM Librarian.
Importng Library Objects using EDX
Select File > Import EDX.
Note: The Bulk mode opton allows you to import the entre contents of the fle in a
single step.
Browse to and select the EDX export fle
C:\Xpediton_Evaluaton\Library\PartalLibrary.edx.
Note the EDX fle content will be imported into the open library.
Click OK and Library Services will open to allow selecton of individual library
objects to import.

317
Importng Library Objects using EDX (contnued)
From the Parts tab, select and import the frst 5 Resistors from the Resistor
partton to the Current partton Resistor.
Click Include Selected and then click Apply to import the parts to your library.
Click the Cells tab then select and import the Drawings cell Fab_Notes to the
Current partton Drawings using the method shown in step 3.
Click Close to exit Library Services.
Note the new part, cell, symbol, and padstack informaton in Library
Navigator Tree of your new library.
Exit Xpediton xDM Librarian and exit Xpediton xDX Designer.
318
Review Questons
1 Is there a right or wrong way to create a symbol?
2 What is the purpose of the symbol origin?
3 Do I need to assign a PKG_TYPE in my Symbol?
4 What are the advantages of creatng a symbol from a spreadsheet?
5 Cant I just download a symbol from the component manufacturer?
6 Where do I get the data to input into the Pin Patern Place wizard?
Review Answers
1 There is no right or wrong way to create a symbol as long as the symbol accurately represents the signals and connectvity of the device. There are formal
design specifcatons for symbols (such as ANSI/IEEE Standard 91- 1984 Graphic Symbols for Logic Functons), but each company tends to formulate their own
internal standards that meet their design requirements.
2 The symbol origin represents a predictable reference point for anchoring and placing a symbol into the design environment. It is usually placed at the end of
the lowest pin on the lower lef of the symbol.
3 There is no need to assign a PKG_TYPE in Xpediton. When you create your part in the Part Editor you will import the Cell that links to the Symbol. The symbol
in Xpediton xDX Designer represents the electrical connectvity of the component. In order to pass the design to Xpediton xPCB Layout for physical design,
each component symbol needs to have a corresponding physical package assignment so that the layout tool can properly represent the physical parts on the
printed circuit board.
4 As the complexity of components increases, it is not uncommon to have symbols with hundreds of pins. Entering the data for each of these pins into the
Symbol Editor can be a very tme-consuming and error-prone task. Using a spreadsheet, you can copy and paste signal data from PDF data sheets into a
spreadsheet and then import it directly into the Symbol Editor. This saves tme and improves accuracy.
5 Unfortunately, except for the PDF of the datasheet, very few manufacturers ofer any symbols that can be directly imported into an EDA applicaton. Due to
the multtude of diferent components and systems, this would be very difcult for the manufacturers to support. Most designers prefer to create (and check)
their own symbols prior to use.
6 You can create a cell in the wizard by entering the physical dimensions of the recommended land patern from the manufacturers component data sheet. You
can also use the IPC Land Patern Calculator to determine the appropriate decal dimensions and then enter that data directly into the wizard.
319
Conclusion
This Evaluaton Guide has introduced you to some of the power and fexibility available in Xpediton, but that
is just a beginning. This evaluaton has only scratched the surface and presented you with an abbreviated view
into the full spectrum of the design capabilites of the products. If you want to learn more about the many
features and functons of these applicatons, there is a wealth of knowledge to experience and discover in the
extensive resources that are available.
Additonal resources Include:
Tutorials
Concepts Guides
Extensive Help fles
User Manuals
The InfoHub
On-line video presentatons
Click the icons below for additonal resources:
Conclusion
320 Conclusion
In this secton:
Appendix
Appendix 1: ODBC Setup
Appendix 2: Confguring Xpediton xDX Databook
Appendix 3: Confguring Variant Manager
A-1
Appendix 1 - ODBC Setup
The acronym ODBC stands for Open Database Connectvity which is an industry
database standard. Most databases developed or upgraded since the 1980s
support this standard. It is the technology that Xpediton xDX Databook uses
to connect to databases. Xpediton xDX Databook also supports a web server
connecton using ODBC. In this example, you will set up an ODBC connecton for
a Microsof Access Database format.
Establishing ODBC Connectvity - Windows 7 , 32bit
Select the Start Menu and then select Control Panel.
Select System and Security > Administratve Tools, click
Administratve Tools.
Double click Data Sources (ODBC).
Under the System DSN tab click Add.
Select the Microsof Access Driver (*.mdb) item from the list.
Click Finish.
Type Sample in the feld called Data Source Name.
Type Database for Xpediton Evaluaton in the Descripton text box.
Click Select.
Browse to the access database called Sample.mdb which will be
located in the C:\Xpediton_Evaluaton\Library\DataBookData
directory.
Select the Sample.MDB fle and then click OK to accept the selecton.
Click OK in the parent dialog boxes. Your setup is complete.
Establishing ODBC Connectvity - Windows 7 , 64bit
From Windows Explorer, browse to the directory
C:\Windows\SysWOW64.
Double-click odbcad32.exe.
Follow the previous steps 4 through 11 to complete the setup.

Note: The setup steps shown here are for Microsof Windows 7 OS, 32bit and 64bit
respectvely. You may also be required to download the Microsof Access ODBC
driver from Microsofs website. If you are using a diferent OS, please refer to the
instructons specifc to your OS for ODBC setup.
APPENDIX 1: ODBC Setup A-2

Appendix 2 - Confgure Xpediton xDX Databook
Xpediton xDX Databook allows easy searching and selectng of components. It
tes into your companys purchasing database so that Engineering can make more
intelligent part selectons based on lead tme, cost, stock availability, and so on.
The Xpediton xDX Databook Confguraton fle (.dbc) tells Xpediton xDX Databook
which propertes to show in the search window, which to load and annotate onto
your schematc when placing symbols, and which to verify when you use Xpediton
xDX Databook Verifcaton.
NOTE: To use Xpediton xDX Databook, you must create an ODBC data source that points
to the database, then Xpediton xDX Databook must be atached to this data source. If
Confguraton: None is displayed in the lower secton of the Xpediton xDX Databook ap-
plicaton window, this indicates that no database is atached.
See Appendix1: ODBC Setup for details on performing the ODBC setup if steps in this
exercise do not work.
Confguring Xpediton xDX Databook
Select File > Open > Project and select
C:\Xpediton_Evaluaton\FirstLast\FirstLast.prj.
In the Navigator Pane, double-click Board1 to enable Sheet1.
Click xDX Databook to open the Xpediton xDX Databook search
window.
Right-click anywhere within the Xpediton xDX Databook and select
Confgure > Open.
Click Browse... and navigate to the
C:\Xpediton_Evaluaton\Library\DatabookData
directory.
Select the Sample.DBC fle and click Open to actvate the
Xpediton xDX Databook confguraton setngs.
Right-click anywhere within the Xpediton xDX Databook pane and
select Confgure > Edit Confguraton.
Take a moment to look over the setngs in the Confgure dialog
box for the Sample.dbc. Click Cancel to exit without changes and
click No if asked to save the confguraton.
Appendix
APPENDIX 2: Confgure Xpediton xDX Databook A-3
Appendix 3 - Confguring Variant Manager
This appendix shows some of the errors you might see if Variant Manager is not
confgured properly.
Confguraton
Before creatng a variant, you will need to set the
Variant Match conditon in your Xpediton xDX
Databook .dbc fle. In Variant Manager click the Setngs
icon, then select the Library Query Setup tab and click
the Defne Libraries buton. The Confgure dialog box
opens.
Note: This VM Match column is only visible from within
Variant Manager. If you try to edit the confguraton from
Xpediton xDX Databook you will not see this column.
Be sure you have the VM Match column in each library
set as: PKG_TYPE is =.
If you fail to confgure the VM Match conditon
correctly, you will see multple package types available
for replacement as shown.
APPENDIX 3: Confguring Variant Manager A-4

Confguraton (contnued)
Add Part Number to the Query results. If you fail to do this, you
may see an error message when choosing a replacement part.
Property values are case sensitve. Check your database
confguraton for property cases. For example, a confguraton
might show the value PART NUMBER rather than Part Number.
If you have a case sensitvity problem then you may see an error
message when replacing a part.
Appendix
APPENDIX 3: Confguring Variant Manager A-5

Mentor Graphics Corporaton
8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777.
Telephone: 503.685.7000
Toll-Free Telephone: 800.592.2210
Website: www.mentor.com

Expedition PCB Guide

Hochgeladen von

Dokumentinformationen

Originaltitel

Copyright

Verfügbare Formate

Dieses Dokument teilen

Dokument teilen oder einbetten

Freigabeoptionen

Stufen Sie dieses Dokument als nützlich ein?

Sind diese Inhalte unangemessen?

Copyright:

Verfügbare Formate

Expedition PCB Guide

Hochgeladen von

Copyright:

Verfügbare Formate

Xpediton xPCB Layout

Xpediton xDX Designer Workspace

Xpediton xDX Designer Workspace

Design Capture with Xpediton xDX Designer

Xpediton xDX Designer Workspace

Design Capture with Xpediton xDX Designer

Xpediton xDX Designer Workspace

Design Capture with Xpediton xDX Designer

Xpediton xDX Designer Workspace

Design Capture with Xpediton xDX Designer

Xpediton xDX Designer Workspace

Design Capture with Xpediton xDX Designer

Setng Up a New Project

Using the Start Page

Setng Up a New Project

Setng Up a New Project

Setng Up a New Project

Setng Up a New Project

Selectng and Verifying Parts with Xpediton xDX Databook

Design Capture with Xpediton xDX Designer

Selectng and Verifying Parts with Xpediton xDX Databook

Design Capture with Xpediton xDX Designer

Selectng and Verifying Parts with Xpediton xDX Databook

Design Capture with Xpediton xDX Designer

Selectng and Verifying Parts with Xpediton xDX Databook

Design Capture with Xpediton xDX Designer

Selectng and Verifying Parts with Xpediton xDX Databook

Design Capture with Xpediton xDX Designer

Selectng and Verifying Parts with Xpediton xDX Databook

Placing Symbols in the Schematc

Design Capture with Xpediton xDX Designer

Placing Symbols in the Schematc

Placing Symbols in the Schematc

Placing Symbols in the Schematc

Design Capture with Xpediton xDX Designer

Placing Symbols in the Schematc

Placing Symbols in the Schematc

Placing Symbols in the Schematc

Wiring the Schematc

64 Wiring the Schematc

Mult-pin Component Inserton

Wiring the Schematc

Wiring the Schematc

67 Wiring the Schematc

Design Capture with Xpediton xDX Designer

Wiring the Schematc

Wiring the Schematc

Wiring the Schematc

Wiring the Schematc

Wiring the Schematc

Wiring the Schematc

Wiring the Schematc

Wiring the Schematc

Wiring the Schematc

Creatng Rules and Constraints with Constraint Manager

Creatng Rules and Constraints with Constraint Manager

Design Capture with Xpediton xDX Designer

Creatng Rules and Constraints with Constraint Manager

Design Capture with Xpediton xDX Designer

Creatng Rules and Constraints with Constraint Manager

Design Capture with Xpediton xDX Designer

Creatng Rules and Constraints with Constraint Manager

Design Capture with Xpediton xDX Designer