Beruflich Dokumente
Kultur Dokumente
http://www.mhhe.com/patel/mbes
CHAPTER 1
INTRODUCTION TO MICROCONTROLLERS
1. The differences between microprocessor and microcontrollers are given in the
following table.
Microprocessor Microcontroller
Microprocessor is complete
functional CPU i.e. it contains ALU,
registers, stack pointer, program
counter, instruction decode and
control unit and interrupt processing
circuits.
Microcontroller is complete functional
microcomputer i.e. it contains the
circuitry of microprocessor and in
addition it has built in memory (ROM,
RAM), I/O circuits and peripherals
necessary for an application.
Microprocessor instruction sets are
data processing intensive, means
powerful addressing modes and many
instructions to move data between
memory and CPU to handle large
volumes of data.
Microcontrollers have instruction sets
that are related to the control of inputs
and outputs, means they have many bit
handling instructions along with byte
processing instructions.
Microprocessor based products are
primarily designed to interact with
humans and are more flexible to
design
Microcontroller based products are
primarily designed to interact with
machines; once a system is designed they
are less flexible.
Access times for external memory
and I/O devices are more, resulting in
a slower system.
Access times for on-chip memory and
I/O devices are less, resulting in a faster
system.
Microprocessor based systems
require support devices and are
usually bulkier, costly, less reliable
and consume more power.
Microcontroller based systems require
less external hardware, reducing PCB
size and hence are compact, cheaper,
more reliable and consume less power.
Software protection is not possible
because of the requirement of
external
code memory.
Software protection is possible because
of on-chip code memory.
2. Various applications of microcontrollers are given below:
Household appliances: Microwave oven, washing machine, coffee machines,
refrigerators, digital cameras, alarm clocks, toys, home security systems, remote
controllers, exercise machines, sewing machines, air conditioners etc.
Office and commercial appliances: Fax machine, photocopier, scanner or printer
machine, intercom, computer systems (discussed below), calculators, ATM
The8051MicrocontrollerbasedEmbeddedSystems,Firstedition,McGrawHillEducation
http://www.mhhe.com/patel/mbes
the instructions. All control signals (or sequence of steps) required to fetch, decode
and execute the instructions are generated and controlled by combinatorial logic and
state machine circuitry.
A microcoded core is simpler to design, and can be implemented faster. A hardwired
microcontroller is more complex to design because instruction decoder will be
complex and difficult to debug and is less flexible. The advantage of hardwired design
is that it will execute instructions faster.
5. The CISC architecture require less the number of instructions per program at the cost
of number of cycles per instruction. Hence, small program size and higher code
density.
6. The Boolean processor provides direct support for bit manipulation. This leads to
more efficient programs that need to deal with binary operations frequently used in
the machine control applications. Bit addressing can be used for test pin monitoring or
user defined program control flags.
7. The key features of 8051 microcontroller are:
8 bit CPU with Boolean processing capabilities.
4K bytes on-chip *program memory.
128 bytes on-chip data memory.
64 Kbytes each program and external data address space.
32 bidirectional I/O lines organized as four 8-bit I/O ports.
serial port Full duplex UART.
2 16-bit timers/counters.
Two-level prioritized interrupt structure.
Direct byte and bit addressability.
Four register banks.
Binary or decimal arithmetic support.
Hardware multiply and divide operations.
12 clock cycles per machine cycle
Comparison of hardware resources of MCS 51 family.
Feature 8031 8051 8751 8032 8052 8752
Program memory
None
ROM less
4K ROM
4K
EPROM
None
ROM less
8K ROM
8K
EPROM
Data memory 128 Bytes 128 Bytes 128 RAM 256 Bytes 256 Bytes 256 Bytes
The8051MicrocontrollerbasedEmbeddedSystems,Firstedition,McGrawHillEducation
http://www.mhhe.com/patel/mbes
Timers/counters
(16-bit)
2 2 2 3 3 3
I/O pins 32 32 32 32 32 32
Serial port 1 1 1 1 1 1
Interrupt sources
(Reset not
included)
5 5 5 6 6 6
Different family member exist to fulfill requirements of different types of
applications.
8. Required aspects are given below:
1. Amount of program memory
2. Amount of data Memory
3. Number of timers or counters
4. Number of I/O pins
5. Number of serial ports
6. Number of Interrupt sources
9. RAM is widely used by programmers to store temporary data and intermediate
results. The advantage of using this memory is that their access is faster compared to
other off-chip RAM. Larger on-chip RAM means large storage area for temporary
data and intermediate results.
10. The use of 8051 family microcontrollers offers following advantages:
Availability and support: Easily and readily available and widely supported, free
and commercial third party support is easily available because they are more
popular. Hardware and software development tools and training are easily
available and are inexpensive. High level language compilers are also available.
Low cost: High level integration of many peripherals within single chip, only a
few external components needed to create a working system.
Effective architecture: Architecture optimized for the single bit operations,
highly desirable for control applications. Single bit instructions require fewer
bytes of code and hence faster execution.
Multiple vendors: More than 20 manufacturers, more than thousand variants,
something for everyone.
Compatibility: Op-codes are same for all variants, therefore, easy to upgrade to
newer variants.
The8051MicrocontrollerbasedEmbeddedSystems,Firstedition,McGrawHillEducation
http://www.mhhe.com/patel/mbes
12. The differences among various 8051 family members are given in following table.
Feature 8031 8051 8751 8032 8052 8752
Program memory
None
ROM less
4K ROM
4K
EPROM
None
ROM less
8K ROM
8K
EPROM
Data memory 128 Bytes 128 Bytes 128 RAM 256 Bytes 256 Bytes 256 Bytes
Timers/counters
(16-bit)
2 2 2 3 3 3
I/O pins 32 32 32 32 32 32
Serial port 1 1 1 1 1 1
Interrupt sources
(Reset not
included)
5 5 5 6 6 6
13. Every microcontroller/processor has a native word size i.e. word length of 8, 16 or 32
etc. bits. The microcontroller works most efficiently with a data of native word size.
The microcontroller can directly process the data which is having size equal to word
length of microcontroller. Therefore the processing will be faster and efficient.
The 8051 and its variants are all 8 bit microcontrollers, therefore they works more
efficiently with 8 bit data.
14. Von Neumann Architecture has single memory storage to hold both program
instructions and data i.e. common program and data space. The CPU can either read
an instruction or data from the memory one at a time (or write data to memory)
because instructions and data are accessed using same bus system. The advantage of
Von Neumann architecture is simple design of microcontroller chip because only one
memory is to be implemented (for data as well as code) which in turn reduces
required hardware (buses). The disadvantage is slower execution of a program.
15. The RISC architecture has simple instructions. The simple instructions which perform
a few operations at a time will provide high performance because of less hardware
requirements for instruction decoder simple design, small die area, less power
consumption). Thus, instructions require very less time to execute. The RISC
instructions have few addressing modes for supported by all instructions. It reduces
the cycles per instruction at the cost of the number of instructions per program. This
will improve the performance of a microcontroller.
The8051MicrocontrollerbasedEmbeddedSystems,Firstedition,McGrawHillEducation
http://www.mhhe.com/patel/mbes
16. The microcontrollers/processors can be classified on the basis of word length,
memory architecture, core (CPU) architecture and instruction set architecture.
Word length: The 4, 8, 16, 32, 64 bit Microcontrollers.
Memory Achitecture: Harvard Architecture or Von Neumann Architecture.
Core Architecture: Microcoded or Hardwired Architecture.
Instruction Set Architecture: RISC and CISC
17. RISC based microcontrollers has simple hardware and therefore the gap between high
level language and actual hardware is more. To bridge this gap, the compiler design is
more complex (emphasis is more on software therefore compiler design is more
complex).
18. Programming the microcontroller chip (burning a program in to ROM) while the
microcontroller chip is within the system (within the board) is known as ISP.
Program download through serial port eliminating need of EPROM programmer and
need of removing chip from the system, this feature is known as In System
Programming (ISP).This results in faster and easier downloading of program in ROM.
19. We know that power consumption of a chip is directly proportional to the speed at
which it operates (system clock frequency). Therefore operating the microcontroller at
higher speeds (than required) will unnecessarily increase the power consumption
without providing any improvement in system performance.
20. Analog devices, Atmel, Dallas Semiconductors, Infenion, Intel, NXP semiconductors,
Silicon laboratories, SI Microclectronics, Texas instruments, Microchip are the
leading manufacturers of the microcontrollers.
Features and on-chip resources of the microcontrollers from some leading
manufacturers are given below.
8051 variants from NXP (Philips)
The major manufacturer of the 8051 variants is NXP (around50 variants). With the
basic 8051 core, the variants have high capacity on-chip program memory
(upto32K/64K), with peripherals like I
2
C bus, 8/10 bit ADCs, CAN Bus, Capture and
The8051MicrocontrollerbasedEmbeddedSystems,Firstedition,McGrawHillEducation
http://www.mhhe.com/patel/mbes
Compare registers, WDT, PWM, IAP,ISP, additional timer/counter.NXP has few high
speed variants, for example, P89C54X2 microcontroller requires only 6 clocks per
machine cycle and P89LPC916/917 requires two to four clocks per machine cycles.
The following Table shows some of the variants from NXP.
8051 variants from NXP
89C51RB2xx
89C51RC2xx/
89C51RD2xx
89C662/
89C664
89LPC916/
89LPC917
89LPC980/
89LPC985
On-chip program
memory (Flash)
16 Kbytes 32/64 Kbytes 32/64 Kbytes 2Kbytes 4K/8Kbytes
On-chip RAM 256 +256 256+256/768 1/2KBytes 256 bytes 256/512 bytes
I/O Pins 32 32 32 14 26
Timer/ Counters 3 3 3 2 7
UART 1 1 1 1 1
Interrupts 7 7 8 14/13 13
Other features
WDT, ISP, 2
DPTRs, IAP,
PWM
WDT, ISP, 2
DPTRs, IAP,
PWM
WDT, 2
DPTRs, IAP,
ISP, I2C,
PWM
WDT, 2 DPTRs,
SPI, IAP, ISP,
ADC/DAC
WDT, 2 DPTRs, SPI,
IAP, ISP, ADC,
PWM, RTC, I2C,
Analog comparators
8051 variants from Atmel Corporation
Atmel Corporation is another major manufacturer of the 8051 variants. It has
introduced flash memory based variants at a low cost. The devices have peripherals
like ISP, WDT and SPI. The variants are available in 20/40 pins and varying
operating voltages from 2.7 to 6 V. The following Table shows some of the variants
from Atmel.
8051 variants from Atmel
89C51/89L
V51*
89C52/89L
V52*
89C2051
(20 pin)
89C1051
(20 pin)
89S8252/8
9S8253
89S53
On-chip program
memory(Flash)
4KBytes 8KBytes 2KBytes 1KBytes
8/12
KBytes
12KBytes
On-chip RAM 128 bytes 256 bytes 128 bytes 64bytes 256 bytes 256 bytes
On-chip EEPROM - - - - 2KBytes -
I/O Pins 32 32 15 15 32 32
Timer/Counters 2 3 2 1 3 3
UART 1 1 1 - 1 1
Interrupt Sources 6 8 6 3 9 9
Lock Bits 3 3 2 2 3 3
The8051MicrocontrollerbasedEmbeddedSystems,Firstedition,McGrawHillEducation
http://www.mhhe.com/patel/mbes
Others
Analog
comparator
2 DPTR,
SPI,WDT
2DPTR,
SPI,WDT
* 89LV51/52 are low voltage devices i.e. operating voltage range is 2.7V to 6V
8051 variants from Dallas semiconductor
Dallas has redesigned the 8051 architecture (hardwired in place of microcoded) and
introduced high speed microcontrollers (HSMs). All instructions are executed in a
single clock cycles (4 clock cycles in some variants) which require 12 clock cycles in
traditional 8051. Moreover, the devices have additional serial port, WDT, RTC
second data pointer, IAP, ISP and NV RAM (battery backed).The following Table
shows some of the variants from Dallas semiconductor.
8051 variants from Dallas semiconductor
DS89C430 DS89C450 DS5000 DS87C550 DS8C7520
On-chip program
memory
16Kbyte
Flash
64Kbyte
Flash
8Kbyte
NV-RAM
8Kbyte EPROM
16Kbyte
EPROM
On-chip RAM
256 Bytes +
1Kbyte
256 Bytes +
1Kbyte
128 Bytes 256 Bytes +1Kbyte
256 Bytes +
1Kbyte
I/O Pins 32 32 32 55 32
Timer/ Counters 3 3 2 3 3
UART 2 2 1 2 2
Interrupt Sources 14 14 6 15 14
Other features
2 DPTRs,
IAP, ISP,
WDT
2 DPTRs,
IAP, ISP,
WDT
IAP, ISP
2 DPTRs, WDT,
RTC, 10bit ADC
(8ch), 8bit PWM
(4ch)
2 DPTRs,
WDT
8051 variants from Silicon Laboratories
Silicon Laboratories (SiLab) 8 bit mixed signal microcontrollers utilizes Silicon Labs'
proprietary CIP 51 Hardwired microcontroller core. The CIP 51 is fully compatible
with the MCS-51 instruction set and have pipelined architecture which greatly
improves its instruction throughput. It executes most instructions (around 70%) in one
or two system clock cycles. These devices deliver up to 100 MIPS (million
instructions per second) peak throughput. They have an on-board J TAG debug
capability which supports read/write access to memory/registers, breakpoints, watch
points, single stepping and free running commands. The following Table shows some
of the 8051 variants from Silicon Laboratories.
Table 8051 variants from Silicon Laboratories
The8051MicrocontrollerbasedEmbeddedSystems,Firstedition,McGrawHillEducation
http://www.mhhe.com/patel/mbes
C8051F020
(20MIPS)
C8051F060
(25 MIPS)
C8051F122*
(100MIPS)
On-chip program
memory (Flash)
64K FLASH 64K FLASH 128K
On-chip RAM 256 bytes +4K 256 bytes +4K 256 bytes +8K
I/O Pins 64 59 64
Timer/ Counters 5 5 5
UART 2 2 2
Other features
SPI, I2C, 12 and 8 bit ADCs
(8ch), on-chip temperature
sensor,
12bit DAC (2ch), PCA
WDT, PCA, SPI, I2C, CAN
2.0B, 16 bit ADC (2ch), 10
bit ADC (8ch), 12 bit DAC
(2ch), 3 Analog
Comparators, On-Chip
Temperature sensor
Capture/Compare, SPI, I2C,
RTC, 10 and 8 bit ADCs
(8ch), 12 bit DAC (2ch), On-
Chip Temperature sensor
The8051MicrocontrollerbasedEmbeddedSystems,Firstedition,McGrawHillEducation
http://www.mhhe.com/patel/mbes
CHAPTER 2
PROGRAMMING MODEL AND ACHITECTURE OF THE 8051
1. Accumulator register is used to store (collect or accumulate) the result of all
arithmetic and majority of logical operations, because of this reason it is named as
Accumulator.
2. Program counter (PC) is a 16-bit register. It always contains the memory address of
the next instruction to be executed i.e. it points to the instruction that is to be executed
next.
3. The memory in which temporary data are stored is called data memory. RAM is
referred as data memory.
4. The memory in which program instructions are stored is called program memory.
ROM (PROM/EPROM/EEPROM/Flash) is referred as program memory.
5. The power on default value of the SP register is 07H. The stack on the 8051 grows
upwards in memory therefore SP is incremented before data is stored as a result of
special instructions (PUSH and CALL). This means that location 08H is the first
location being used for the stack. As data is retrieved from the stack (using POP and
RET), the byte is read from the stack and then SP is decremented by one. So in
conclusion, the address held in the SP register is the location where the last byte was
stored by a stack operation.
The SP register can be initialized with any address within internal RAM i.e. 00H to
7FH. The stack is usually defined (and thus located) at higher addresses in RAM by
loading new address into SP before performing any stack operation.
6. Four ports are available in 8051.Yes, all ports are bit addressable.
7. Programming model is programmers view of a microcontroller/processor. It shows
(memory or registers) which can be accessed (read/write) by a programmer along with
their internal organization. It is a collection of internal registers (and memory
locations) that can be used by a programmer to develop any software (i.e. control and
application programs) and to use several features of a particular microcontroller. As
these registers and memory locations are used by software instructions, it is necessary
to have knowledge of the programming model before we start developing any
program.
Programming model of 8051 is given below:
The8051MicrocontrollerbasedEmbeddedSystems,Firstedition,McGrawHillEducation
http://www.mhhe.com/patel/mbes
8. Peripheral data registers: TL0, TH0, TL1, TH1, and SBUF.
Peripheral control registers: IP, IE, TMOD, TCON, SCON, and PCON.
9. When we switch the bank, complete new set of memory locations with names R0 to
R7 are made available for use by instructions. So without saving the contents of
current banks R0 to R7 we can directly use new set of R0 to R7. This will save time
to preserve the registers contents when we call a subroutine i.e. save context
switching time.
10. The stack is a section of memory locations in the internal RAM that is used for
temporary storage and retrieval of data (or addresses) while the execution of a
program. It is the last in first out (LIFO) type memory. This section of memory is
accessed by certain instructions or events (like interrupts).
The8051MicrocontrollerbasedEmbeddedSystems,Firstedition,McGrawHillEducation
http://www.mhhe.com/patel/mbes
The register used to access contents of the stack is called stack pointer. It is an 8 bit
register. The power on default value of the SP register is 07H. The stack on the 8051
grows upwards in memory therefore SP is incremented before data is stored as a result
of special instructions (PUSH and CALL). This means that location 08H is the first
location being used for the stack. As data is retrieved from the stack (using POP and
RET), the byte is read from the stack and then SP is decremented by one. So in
conclusion, the address held in the SP register is the location where the last byte was
stored by a stack operation
11. Yes, we can interface of both ROM and RAM at the same time with the 8051.
If EA
pin is connected to V
CC
(+5V), the 8051 will access first 4K bytes (0000H to
0FFFH) from internal ROM and any address above 0FFFH will be accessed from
external ROM. If EA