Elsevier Publications, 2013

Proceedings of International Conference on Computing Sciences

WILKES100 ICCS 2013
ISBN: 978-93-5107-172-3
Secured data transmission for distributed ground telemetry station
P. Avinash
1
, J N V R Swarup Kumar
2
, Lakshmana Phaneendra Maguluri
3
0F
*
,
G.V.S.N.R.V. Prasad
4
, M Siva Naga Srikanth
5
1
Project Trainee in RCI DRDO and PG Student, Deptt. Of CSE, Gudlavalleru Engineering College
2, 3
Assistant Professor, Department of CSE, Gudlavalleru Engineering College
4
Professor, Departmenf of CSE, Gudlavalleru Engineering College
5
PG Student, Deptt. Of CSE, L P University
Abstract
Advanced Encryption Standard (AES), a Federal Information Processing Standard (FIPS), is an approved cryptographic
algorithm that can be used to protect electronic sensible data. The Telemetry System which needs several parameters to be
analyzed is established in a network and integrity of significant data is guaranteed by encrypting the data transferred in the
network using AES 256. The investigations implicated that data looses its confidentiality when connected in a network. In this
article we perform implementation of AES-256 cipher standard for distributed networks. The proposed architecture is suited
for network applications implementing both encryption and decryption operations.
2013 Elsevier Science. All rights reserved.
Keywords: AES-256, Telemetry Systems, Distributed Networks
1. Introduction
Computer communication started with copper wire as the medium for carrying electrical signals encoding the
data to be communicated from one computer to another. Copper as a medium of communication has a number of
limitations and, in the last two decades, enormous progress has been made in using alternative media for
communication. First-generation networks simply replaced copper wire with optical fber. Optical networks have
found widespread use because the bandwidth of such networks using current technology is up to 50 Giga-bits per
second. At present a majority of computer and telecommunication systems requires data security when data is
transmitted over network. Thus data encryption is performed to protect intrusion sensible data. Usually
appropriate software algorithm is used for coding data at sender site and decode at receiver one. Such a solution
is adequate and then high speed processing is necessary due to high transmission medium bandwidth and real
time requirements. For integer based data this technology guarantees better performance. In the Telemetry system
when data is received at the ground station several parameters need to be analyzed. To analyze all the parameters
at a time a network is established. When the systems are connected in the network the main issue is security. The
electronic sensible data should not loose integrity. This significant data should be protected from exploitation. At
the same time the data is required to be transmitted in the fullness of time without much delay.
In this Article we propose a new method for Providing Security in flying machines data analysis. Section II.
Presents Telemetry system, Section III. Presents Overview of Providing Security by Using AES-256, IV. Presents
Connection Establishment Using UDP, V. Proposed System and VI. Conclusions.
*
Corresponding author. Lakshmana Phaneendra Maguluri
Elsevier Publications, 2013
P. Avinash, J N J R Swarup Kumar, Lakshmana Phaneendra Maguluri, G.J.S.N.R.J. Prasad, M Siva Naga Srikanth
2. Overview of Telemetry System
Telemetry is the process by which an objects characteristics are measured and the results transmitted to a
distant station where they are displayed, recorded, and analyzed. The transmission media may be air and space
for satellite applications.
A telemetry system is often viewed as two components, the Airborne System and the Ground System. A
telemetry system is absolutely necessary to evaluate the performance of flight vehicle. A large number of
physical parameters such as temperature, strain, vibration, pressure, electrical parameters from the control,
guidance system and mission sequencing status are monitored from the various sub systems of vehicle for post
flight data reduction and analysis. The onboard Telemetry system shown in figure 1 takes the sensors output as
input. It consists signal conditioner, PCM Encoder and Transmitter. The Telemetry ground station system shown
in figure 2 consists of receiver, bit synchronizer, decommutator and display.
Data acquisition begins when sensors measure the amount of a physical attribute and transform the
measurement to an engineering unit value. Sensors attached to signal conditioners provide power for the sensors
to operate or modify signals for compatibility with the next stage of acquisition. Sensor data plus other sources of
digital data are merged by the Output Formatter along with synchronization data for measuring identification in
the PCM Encoder. The Output Formatter serializes the composite parallel data stream to a binary string of pulses
(1s and 0s) for transmission. The output of the main encoder is filtered and transmitted via radio transmitter and
antenna.
Fig. 1. On-Board Telemetry system block diagram Fig. 2. Ground station system block diagram
3. Providing Security Using AES
As the culmination of a four-year competitive process, NIST (the National Institute of Standards and
Technology) has selected the AES (Advanced Encryption Standard). The competition was an open one, with
public participation and comment solicited at each step of the process. The AES, formerly known as Rijndael,
was chosen from a field of five finalists.
AES is suitable for any application that requires strong encryption technology. This new encryption standard
may replace the previously used triple-DES where the superior efficiency of Rijndael algorithm can be used to
gain much increased data throughput for less logic realestate. Typical applications might include secure
communications, program content protection for digital media applications, storage area, networks, VPN, secure
VoIP, wireless LAN, electronic banking etc..
AES is a 128-bit symmetric cryptographic algorithm. It is symmetric since same key is used for encryption
and decryption. The general Rijndael algorithm is a block cipher with multiple options for its block and key size.
The NIST approved AES is a subset of these options with a fixed block size of 128-bits, but the key may be 128,
192 or 256 bits in length usually referred as AES-128, AES-192 and AES-256. This means, that a basic AES
engine is capable of encrypting plain text data in blocks of 128-bits using any of the specified key sizes. Higher
levels of security can be achieved by using bigger key sizes.
Each round of processing includes one single-byte based substitution step, a row-wise permutation step, a
column-wise mixing step, and the addition of the round key. The order in which these four steps are executed is
different for encryption and decryption.
Signal
condition
PCM
Encoder
Transmitter
Sensor Outputs
Decommutate
Display
Bit Synchronizer Receiver
Elsevier Publications, 2013
Secured data transmission for distributed grounded telemetry station
The input data will be transformed to the cipher text by performing the cycle (round) operations. The number
of cycles will be the number of rounds. In each cycle, the following steps will be done. Encryption Process of
AES Shown in Figure 5.
Fig. 3. The representation of State and the Key
Sub bytes: The operation Sub Bytes is performed using the S-box in the AES-algorithm. The design criteria
for the S-box are such that it is resistant against the known differential and linear cryptanalysis and attack using
algebraic manipulations.
Shift Rows: In this operation, each row of the state is cyclically shifted to the left, depending on the row
index. Arranges the state (sub byte output) in a matrix and then performs a circular shift for each row. This is not
a bit wise shift. The circular shift just moves each byte one space over.
Mix Columns: In this operation, a Round Key is applied to the state by a simple bitwise XOR. The Round
Key is derived from the Cipher Key by the means of the key schedule. The Round Key length is equal to the
block key length (=16 bytes).
Add round key: In this operation, a Round Key is applied to the state by a simple bitwise XOR. The Round
Key is derived from the Cipher Key by the means of the key schedule. The Round Key length is equal to the
block key length (=16 bytes).
The third step consists of XORing the output of the previous two steps with four words from the key schedule.
Note the differences between the order in which sub-situation and shifting operations are carried out in a
decryption Round vis-a-vis the order in which similar operations are carried out in an encryption round.
For decryption, each round consists of the following four steps:
Inverse shift rows: InvShiftRows ( ) is the inverse of the Shift Rows () transformation. The bytes in the last
three rows of the State are cyclically shifted over different numbers of bytes (offsets). The first row, r = 0, is not
shifted. The bottom three rows are cyclically shifted by Nb-shift(r, Nb) bytes, where the shift value shift(r,Nb)
depends on the row number
Inverse subbytes:InvSubByte: Inverse Affine Transformation Multiplicative Inversion in GF (2
8
). The
InvSubByte transformation, the inverse affine transformation is applied first prior to computing the multiplicative
inverse.
Add round key:The Key Schedule is responsible for expanding a short key into a larger key, whose parts are
used during the different iterations. Each key size is expanded to a different size:
A 128 bit key is expanded to an 176 byte key.
A 192 bit key is expanded to an 208 byte key.
A 256 bit key is expanded to an 240 byte key.
Inverse mix columns: InvMixColumns ( ) is the inverse of the Mix Columns ( ) transformation.
InvMixColumns ( ) operates on the State column-by-column, treating each column as a four- term polynomial as
described in previous Section. The columns are considered as polynomials over GF (2
8
) and multiplied.
K0 K1 K2 K3
K4 K5 K6 K7
K8 K9 K10 K11
K12 K13 K14 K15
K16 K17 K18 K19
K20 K21 K22 K23
K24 K25 K26 K27
K28 K29 K30 K31
A0 A1 A2 A3
A4 A5 A6 A7
A8 A9 A10 A11
A12 A13 A14 A15
Elsevier Publications, 2013
Fig. 4. Key schedule algorithm expansion of aes 256-bit cipher key
Fig. 5. AES Encryption and Decryption Flow Diagram
4. Connection Establishment Using UDP
The User Datagram Protocol (UDP) is one of the core members of the Internet protocol suite. With UDP,
computer applications can send messages, in this case referred to as datagrams, to other hosts on an Internet
Protocol (IP) network without prior communications to set up special transmission channels or data paths. The
protocol was designed by David P. Reed in 1980 and formally defined in RFC 768.
4.1. Packet Structure
UDP is a minimal message-oriented Transport Layer protocol that is documented in IETF RFC 768.UDP
provides no guarantees to the upper layer protocol for message delivery and the UDP protocol layer retains no
Add round key
K
e
y

S
c
h
e
d
u
l
e
W0 W3
W4 - W7
W8 W11
W56 W59 W56 W59
W8
W4 W7
W0 - W3
Round 1
Round 2
Round 14
Add round key
Round 12
Round 13
Round 14
P. Avinash, J N J R Swarup Kumar, Lakshmana Phaneendra Maguluri, G.J.S.N.R.J. Prasad, M Siva Naga Srikanth
Elsevier Publications, 2013
Secured data transmission for distributed grounded telemetry station
state of UDP messages once sent. For this reason, UDP is sometimes referred to as Unreliable Datagram
Protocol.
UDP provides application multiplexing (via port numbers) and integrity verification (via checksum) of the
header and payload. If transmission reliability is desired, it must be implemented in the user's application.
In our network no handshaking or acknowledgement of packets is necessary only the fast capturing of data
from Bit synchronizer is required .So, we use UDP for connection establishment. The UDP header consists of 4
fields, each of which is 2 bytes (16 bits). The use of the fields "Checksum" and "Source port" is optional in IPv4.
In IPv6 only the source port is optional.
UDP Header
Offsets Octet 0 1 2 3
Octet Bit 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
0 0 Source port Destination port
4 32 Length Checksum
5. Implementation Procedure
In established network shown in figure 3 which consists of N Systems that can be handled at a time through
Ethernet. Transferring the information through these channels must be confidential and need to be secured. We
also need to retrieve this information for future reference. So, for providing security we purpose a global AES
enabled system which is connected through Ethernet. An appropriate software algorithm is used for encoding
data at sender side and decodes the data at receiver side. Such a solution is adequate. Proposed system consists of
the cryptographic algorithm is configured that provides better performance. The expert team at SITE-A monitors
the received data and transmits the corrected data through Ethernet, enabled with the most advanced encryption
Elsevier Publications, 2013
technique the Advanced Encryption Standard. This can be used by expert team at SITE D. Similarly the other
teams who know the key can access the data in the network. The AES is one of the best cryptographic algorithms.
The larger the key size the more security is guaranteed.
Fig. 6. Proposed Secure N-system connected in a network.
6. Experimental Results:
The Telemetry System Data that need to be analyzed is captured and the encrypted data is transferred in the
network. The figure shows the encrypted file obtained at site D1. This encrypted data can be decrypted at
authorized SITE.
7. Conclusion
There is currently no evidence that AES has any weaknesses making any attack other than exhaustive search,
i.e. brute force, possible. Even AES-128 offers a sufficiently large number of possible keys, making an
exhaustive search impractical for many decades, provided no technological breakthrough causes the
computational power available to increase dramatically and that theoretical research does not find a short cut to
bypass the need for exhaustive search. There are many pitfalls to avoid when encryption is implemented and keys
are generated. Correctly implemented AES-256 is likely to protect for at least 10 20 years.
References
[1] J. Foti, Status of the advanced encryption standard (AES)development effort, in Proc. 21st NIST-NCSC National InformationSystems
Security Conference, 1998, pp. 549554. [Online]. Available: citeseer.ist.psu.edu/foti98status.html
[2] N. Ferguson and B. Schneier, Practical Cryptography. New York, NY,USA: John Wiley & Sons, Inc., 2003.
[3] J. Daemen and V. Rijmen, Aes proposal: Rijndael. [Online]. Available:citeseer.ist.psu.edu/daemen98aes.html
[4] E. Biham, How to decrypt or even substitute des-encrypted messagesin 228 steps, Inf. Process.Lett., vol. 84, no. 3, pp. 117124, 2022.
[5] J. Daemen and V. Rijmen, Aes proposal: Rijndael, proceedings of thefirst advanced encryption standard, NIST, Ventura, California,
August1998.
P. Avinash, J N J R Swarup Kumar, Lakshmana Phaneendra Maguluri, G.J.S.N.R.J. Prasad, M Siva Naga Srikanth
Elsevier Publications, 2013
Secured data transmission for distributed grounded telemetry station
[6] K. Gaj and P. Chodowiec, Hardware performance of the aesfinalists survey and analysis of results.[Online].
Available:citeseer.ist.psu.edu/460345.html
[7] Fast implementation and fair comparison of the final candidatesfor advanced encryption standard using field programmable
gatearrays, Lecture Notes in Computer Science, vol. 2020, pp. 84??,2001. [Online]. Available:
citeseer.ist.psu.edu/article/gaj01fast.html
[8] Comparison of the hardware performance of the aescandidatesusing reconfigurable hardware, in AES Candidate Conference, 2000,pp.
4054.
[9] P. J. Ashenden, The Designers Guide to VHDL. San Francisco, CA,USA: Morgan Kaufmann Publishers Inc., 1999.
[10] L. E. B. III, Efficiency testing of ANSI c implementations of round2 candidate algorithms for the advanced encryption standard,
inAES Candidate Conference, 2000, pp. 136148. [Online]. Available: citeseer.ist.psu.edu/bassham00efficiency.html.
[11] An all-digital controlled AC-DC matrix converter with high-frequency isolation and power factor correctionGarcia-Gil, R. ; Espi, J.M. ;
Dede, E.J. ; Maset, E. Industrial Electronics, 2004 IEEE International Symposium onVolume:2Digital Object Identifier:
10.1109/ISIE.2004.1571963 Publication Year: 2004 , Page(s): 1075- 1080 vol. 2 Cited by: Papers (5)
[12] In-Situ, Real-Time Detector for Faults in Solder Joint Networks of Operational, Fully-Programmed Field Programmable Gate Arrays
(FPGAs)Hofmeister, J.P. ; Lall, P. ; Graves, R. Instrumentation & Measurement Magazine, IEEE Volume: 10 Issue: 4Digital Object
Identifier: 10.1109/MIM.2007.4291220 Publication Year: 2007 , Page(s): 32- 37 Cited by: Papers (6)
[13] Building Integrated Remote Control Systems for Electronics Boards Jacobsson, R. Nuclear Science, IEEE Transactions on Volume:55,
Issue: 1 , Part: 1Digital Object Identifier: 10.1109/TNS.2007.914028 Publication Year: 2008 , Page(s): 356- 361 Cited by: Papers (3)
[14] Statistical Pattern Recognition and Built-in Reliability Test for Feature Extraction and Health Monitoring of Electronics Under Shock
LoadsLall, P. ; Choudhary, P. ; Gupte, S. ; Hofmeister, J. Components and Packaging Technologies, IEEE Transactions on Volume:32,
Issue: 3Digital Object Identifier: 10.1109/TCAPT.2009.2026426 Publication Year: 2009 , Page(s): 600- 616.
[15] FPGA-Based Runtime Adaptive Multiprocessor Approach for Embedded High Performance Computing ApplicationsGohringer, D. ;
Becker, J. VLSI (ISVLSI), 2010 IEEE Computer Society Annual Symposium on Digital Object Identifier: 10.1109/ISVLSI.2010.30
Publication Year: 2010 , Page(s): 477 - 478.
[16] Methods for detection and compensation of alignment errors occurring between a programmable optically reconfigurable gate array and
its writer system Kubota, S. ; Watanabe, M. Aerospace and Electronics Conference (NAECON), 2012 IEEE National Digital Object
Identifier: 10.1109/NAECON.2012.6531052 Publication Year: 2012 , Page(s): 182- 185
[17] ReClick - A Modular Dataplane Design Framework for FPGA-Based Network VirtualizationUnnikrishnan, D. ; Lu,
J. ; LixinGao ; Tessier, R. Architectures for Networking and Communications Systems (ANCS), 2011 Seventh
ACM/IEEE Symposium on Digital Object Identifier: 10.1109/ANCS.2011.31 Publication Year: 2011 , Page(s): 145 155.
[18] Mismatch Characterization and Calibration for Accurate and Automated Analog DesignShapero, S. ;Hasler, P. Circuits and Systems I:
Regular Papers, IEEE Transactions on Volume:60,Issue:3 Digital Object Identifier: 10.1109/TCSI.2012.2215741 Publication Year:
2013, pp. 548- 556
Index

F
Fuzzy inference system (FIS), 513
membership functions, 514
Fuzzy rules, 514

S
Sleep, 511512
implementation, 513514
materials and methods, 512513
results, 514