Sie sind auf Seite 1von 15

Analog Integrated Circuit Design

A video course under the NPTEL


Nagendra Krishnapura
Department of Electrical Engineering
Indian Institute of Technology, Madras
Chennai, 600036, India
National Programme on Technology Enhanced Learning
Nagendra Krishnapura Analog Integrated Circuit Design
Course goals
Learn to design negative feedback circuits on CMOS ICs
Negative feedback for controlling the output
Ampliers, voltage references, voltage regulators, biasing
Phase locked loops
Filters
Nagendra Krishnapura Analog Integrated Circuit Design
Course contents-Negative feedback ampliers
Ampliers using negative feedback
Stability, Frequency compensation
Negative feedback circuits using opamps
Opamp models
Nagendra Krishnapura Analog Integrated Circuit Design
Course contents-Opamps on CMOS ICs
Components available on a CMOS integrated circuit
Device models-dc small signal, dc large signal, ac small
signal, mismatch, noise
Single stage opamp
Cascode opamps
Two- and three-stage opamps with miller compensation
Two- and three-stage opamps with feedforward
compensation
Nagendra Krishnapura Analog Integrated Circuit Design
Course contents-Fully differential circuits
Differential and common mode half circuits
Common mode feedback
Fully differential miller compensated opamp
Fully differential feedforward compensated opamp
Nagendra Krishnapura Analog Integrated Circuit Design
Course contents-Phase locked loop
Frequency multiplication using negative feedback
Type I, type II loops
Oscillators
Phase noise basics
PLL noise transfer functions
Nagendra Krishnapura Analog Integrated Circuit Design
Course contents-Applications
Bandgap reference
Constant current and constant gm bias generators
Continuous-time lters
Switched capacitor lters
Nagendra Krishnapura Analog Integrated Circuit Design
What you should be able to do now
Analyze and design adequately stable negative feedback
loops
Design transconductors and opamps
Design appropriate biasing circuits
Design fully differential circuits with common mode
feedback
Analyze circuit noise and offsets
Design the basic type-II Phase locked loop
Understand other opamp architectures
Understand other phase locked loops, frequency
synthesizers, and clock and data recovery circuits
Nagendra Krishnapura Analog Integrated Circuit Design
What you should be able to do now
Bandgap
reference

+
V
dd
R
(k-1)R
V
ref
V
out
=kV
ref
L
O
A
D
b
0
b
0
b
M-1
b
M-1

+
C
R
C
R
Q
R
R
1
R
V
i1,R
V
2
V
1
V
3
OPA1
OPA2
OPA3
R

+
R
(k-1)R

+
kR
R
Voltage regulator with reference Current steering DAC
Active RC filter Feedback amplifiers
Nagendra Krishnapura Analog Integrated Circuit Design
What you should be able to do now
Design
Multiple options
Trial and error approach
Multiple ways of looking at building blocks
Intuitive thinking/understanding
Curiosity
Open mind
Thoroughness
Nagendra Krishnapura Analog Integrated Circuit Design
Other opamp architectures
Class AB output stage
Nagendra Krishnapura Analog Integrated Circuit Design
Class AB opamp

+
Vdd
R
c
C
c
I
1
single stage
opamp
out
inp
inn
M
11
g
m1

+
Vdd
R
c
C
c
single stage
opamp
out
inp
inn
M
11
g
m1
V
g11
+ v
sig
V
g11
+ v
sig
V
g12
+ v
sig
M
12
Large output current drive with a small quiescent current
Signal coupled to both transistors of the output stage
Crossover distortion
Used with heavy loads-speaker driver etc.
Nagendra Krishnapura Analog Integrated Circuit Design
Class AB opamp
V
b1
V
b2
V
bn1
V
bn2
V
bp2
+ - out

+
out
I
0
I
0
I
0
2I
0
2I
0
2I
0
I
0
I
0
I
0
I
out
I
p
I
n
I
0
I
0
Nagendra Krishnapura Analog Integrated Circuit Design
Class AB opamp: References
D. M. Monticelli, A quad CMOS single-supply op amp with
rail-to-rail output swing, IEEE Journal of Solid-State
Circuits, vol. 21, pp. 1026 - 1034, December 1986.
Nagendra Krishnapura Analog Integrated Circuit Design
References
P. R. Gray and R. G. Meyer, MOS operational amplier design-A tutorial overview, IEEE Journal of
Solid-State Circuits, vol. 17, pp. 969 - 982, December 1982.
D. M. Monticelli, A quad CMOS single-supply op amp with rail-to-rail output swing, IEEE Journal of
Solid-State Circuits, vol. 21, pp. 1026 - 1034, December 1986.
K. N. Leung and P. Mok, Analysis of multistage amplier frequency compensation, IEEE TCAS-II, vol. 48,
no. 9, Sep. 2001.
J. N. Harrison, Dynamic Range and Bandwidth of Analog CMOS Circuits, PhD dissertation, Macquarie
University, Sydney, 2002.
Nagendra Krishnapura Analog Integrated Circuit Design

Das könnte Ihnen auch gefallen