MOSFETs

Application Note 558

Ralph Locher
Caracteristicas
high input impedance and to the fact that being
a majority carrier device,
they do not suffer from minority carrier storage time
effects, thermal runaway, or second breadown!
its turn"off is not delayed by minority carrier storage time in the
base! A #$%&'( begins to turn off as soon as its gate voltage drops
down to its threshold voltage!
&uncionamiento del #$%&'( Lateral
)ith no electrical bias applied to the gate *, no current can
flow in either direction underneath the gate because there
will always be a blocing +N junction! ,a -ue el sustrato es
+ y los drain y source son N!
Con polari.acion /gs y /dd
the holes have been repelled from the gate channel,
the electrons are the 0majority carriers1 by default! , se
forma el canal!
(his mode of operation is called 0enhancement1 but is
easier to thin of enhancement mode of operation as the
device being 0normally off1, i!e!, the switch blocs the
current until it receives a signal to turn on!
(he opposite is depletion mode, which is normally 0on1
device !
Enhancement Mode = Canal Inducido
Depletion Mode = Canal Permanente (normally on
!enta"as
"No gate current can flow into the gate after the small gate
o2ide capacitance has been charged!
" &ast switching speeds because electrons can start to flow from
drain to source as soon as the
channel opens!
" (he channel depth is proportional to the gate voltage and pinches
closed as
soon as the gate voltage is removed, so there is no storage time
effect as occurs in transistors bjt!
3esventaja 4igh resistance channels
Channel resistance may be decreased by creating wider
channels but this is costly since it uses up valuable silicon real
estate! 5t also slows down the switching speed of the device by
increasing its gate capacitance
MOSFET DMOS !E#TIC$%
A typical MOSFET consists of many thousands of N+
sources conducting in parallel. => menor dson
(here are many vertical construction designs possible, e!g!, /"
groove and 6"groove, and many
source geometries, e!g! s-uares, triangles, he2agons, etc! (he
many considerations that determine
the source geometry are R3%7on8, input capacitance,
switching times and transconductance
(his vertical geometry maes possible lower on"state resistances
7R3%7on88 for the same blocing voltage and faster switching
than the lateral #$%&'(s!
(ransistor N+N parasito y el parasitic diode
6n tranistor N+N se forma N del source + del canal y N del
drain! %e elimina no se como y se forma un diodo parasito
(he parasitic N+N action is suppressed by shorting the N9 source to
the +9 body using the
source metalli.ation! (his now creates an inherent +N diode anti"
parallel to the #$%&'( transistor
Caracteristicas del parasitic diode :
;ecause of its e2tensive junction area, the current ratings and
thermal
resistance of this diode e2hibit a very long reverse recovery time
and large reverse recovery current due to the long minority carrier
lifetimes in the N"drain layer, which precludes the use of this diodes
e2cept for very low fre-uency applications! e!g!, motor control circuit
shown in &igure 5!
4owever in high fre!uency applications" the parasitic diode
must #e paralleled e$ternally #y an
ultra%fast rectifier to ensure that the parasitic diode does not
turn on. Allo&ing it to turn &ill su#stantially
increase the de'ice po&er dissipation due to the re'erse
reco'ery losses &ithin the diode
and also leads to higher 'oltage transients due to the larger
re'erse reco'ery current.
S&itching del MOSFET
(. ) a tdelay on
*gs aumenta e$ponencialmente con tau = g$+gs hasta
'gs = *gs threshold.
,.
Ahora al ser *gs > *th la -d su#e y *ds decrece
.a capacitancia +dg de#e descargarse /esta es
in'ersamente proporcional a *ds y entonces 'a a aumentar0.
NOSE por!ue se tiene !ue descargar1
6nless the gate driver can -uicly supply the current re-uired to discharged C3*,
voltage fall will be slowed with increases in turn"on time!
3.
(he #$%&'( is now on so the gate voltage can rise to the overdrive level!
(4R'%4$L3 /$L(A*'
)hile a high value of /*%7th8, can apparently lengthen turn"on
delay time, a low value for
+ower #$%&'( is undesirable for the following reasons:
<! /*%7th8 decreases with increased temperature!
=! (he high gate impedance of a #$%&'( maes it susceptible to
spurious turn"on due to gate
noise!
>! $ne of the more common modes of failure is gate"o2ide voltage
punch"through! Low /*%7th8
re-uires thinner o2ides, which lowers the gate o2ide voltage rating!
SAFE O2EAT-N3 AEA
(he +ower #$%&'( is not subjected to forward or reverse bias
second breadown!
%econd breadown is a potentially catastrophic condition in
transistors
caused by thermal hot spots in the silicon as the transistor turns on
or off! 4owever in the
#$%&'(, the carriers travel through the device much as if it were a
bul semiconductor, which
e2hibits positive temperature coefficient. 5f current attempts to self"
constrict to a locali.ed area,
the increasing temperature of the spot will raise the spot resistance
due to positive temperature
coefficient of the bul silicon! (he ensuing higher voltage drop will
tend to redistribute the current away from the hot spot!
+AR'C' ?6' 6N %'#5C$N36C($R +6R$ (5'N' ('#+C$
N'*A(5/$ +'R$ C6AN3$ '%(A 3$+A3$ '% ('#+C$
+$%5(5/$!
ON%ES-STAN+E 4S/on0
After being turned on, the on"state is defined simply as its on"state
voltage divided by on"state
current! /ds@5ds
)hen conducting current as a switch, the conduction losses + are:
5d7R#%8A=BRdson
Rds on aumenta con la (j y con la 5d
it does facilitate parallel operation of #$%&'(s!
Any imbalance between #$%&'(s does not result in current
hogging 7tomar para si solo8 because the device with the most
current heat up and ensuing higher on"voltage will divert some
current to the other devices in parallel!
3ATE 4-*E +-+5-TS FO 2O6E MOSFETs
(he drive circuit for a +ower #$%&'( will affect its switching behavior and its power dissipation!
Conse-uently the type of drive circuitry depends upon the application!
5f on"state power losses due to R3%7on8, will predominate, there is little point in designing a
costly drive circuit! (his power dissipation is relatively independent of gate drive as long as the
gate"source voltage e2ceeds the threshold voltage by several volts and an elaborate drive
circuit to decrease switching times will only create additional '#5 and voltage ringing!
5n contrast, the drive circuit for a device switching at =CCD4. or more will affect the power
dissipation since switching losses are a significant part of the total power dissipation
E&TO&CES si se tiene perdidas de conduccion predominantes(dadas por
la #ds on ' el dri(er puede ser simple) Si es rapido la conmutaci*n
entonces EMI y rin+in+)
P$#$ , s-itchin+ altas si con(iene un dri(er rapido)
E"emplos
#. tiene un (alor minimo por la corriente /ue puede sin0ear el 12T) Esta da
el Turn on time)
(he .ener diodes shown in &igure =5 is included to reset the pulse
transformer -uicly! (he duty cycle can approach 7)8 with a <=/
.ener diode! &or better performance at turn"off, a +N+
transistor can be added as shown in &igure =E!
&igure =F illustrates an alternate method to reverse bias the
#$%&'( during turn"off by inserting a capacitor in series with the
pulse transformer! (he capacitor also ensures that the pulse
transformer will not saturate due to 3C bias! 363A% pero se
camplea la tension en el primarioGGG
At turn"on, ringing in the gate
circuit may produce a voltage transient in e2cess of the ma2imum /*% rating, which will
puncture
the gate o2ide and destroy it! (o prevent this occurrence, a .ener diode of appropriate value
may
be added to the circuit as shown in &igure =8! Note that the .ener should be mounted as close
as
possible to the device!
At turn"off, the gate voltage may ring bac up to the threshold voltage and turn on the device for
a
short period! %$L6C5$NGGGG
(here is also the possibility that the drain"source voltage will e2ceed its
ma2imum rated voltage due to ringing in the drain circuit! A protective RC snubber circuit or
.ener
diode may be added to limit drain voltage to a safe level!