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Discrete-Time Signals and Systems

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Content and igures are from Discrete-Time Signal Processing! "e by #ppenheim! Shafer! and $uck! %&'''-"((( Prentice )all *nc.
Copyright (C
) 2005 Gner
Arslan
351M Digital Signal Processing 2
Discrete-Time Signals+ Se,uences
- Discrete-time signals are represented by se,uence of numbers
. The n
th
number in the se,uence is represented with /0n1
- #ften times se,uences are obtained by sampling of
continuous-time signals
. *n this case /0n1 is 2alue of the analog signal at /
c
3nT4
. 5here T is the sampling period
0 20 40 60 80 100
-10
0
10
t (ms)
0 10 20 30 40 50
-10
0
10
n (samples)
Copyright (C
) 2005 Gner
Arslan
351M Digital Signal Processing 3
$asic Se,uences and #perations
- Delaying 3Shifting4 a se,uence
- 6nit sample 3impulse4 se,uence
- 6nit step se,uence
- 7/ponential se,uences
1 n n 0 / 1 n 0 y
o
=

=
( n &
( n (
1 n 0

<
=
( n &
( n (
1 n 0 u
n
8 1 n 0 / =
-10 -5 0 5 10
0
0.5
1
1.5
-10 -5 0 5 10
0
0.5
1
1.5
-10 -5 0 5 10
0
0.5
1
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) 2005 Gner
Arslan
351M Digital Signal Processing 4
Sinusoidal Se,uences
- *mportant class of se,uences
- 8n e/ponential se,uence with comple/
- /0n1 is a sum of weighted sinusoids
- Different from continuous-time! discrete-time sinusoids
. )a2e ambiguity of "k in fre,uency
. 8re not necessary periodic with "9
o
[ ] ( ) + = n cos n /
o

= =
: :
e 8 8 and e
o
[ ]
( )
[ ] ( ) ( ) + + + =
= = =
+
n sin 8 : n cos 8 n /
e 8 e e 8 8 n /
o
n
o
n
n :
n
n :
n
: n
o o
( ) ( ) ( ) + = + + n cos n k " cos
o o
( ) ( ) integer an is
k "
; if only ; n cos n cos
o
o o o

= + + = +
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) 2005 Gner
Arslan
351M Digital Signal Processing 5
Demo
otating Phasors De!o
Copyright (C
) 2005 Gner
Arslan
351M Digital Signal Processing "
Discrete-Time Systems
- Discrete-Time Se,uence is a mathematical operation that
maps a gi2en input se,uence /0n1 into an output se,uence
y0n1
- 7/ample Discrete-Time Systems
. Mo2ing 3<unning4 82erage
. Ma/imum
. *deal Delay System
1= n 0 / > T 1 n 0 y =
T>.= /0n1 y0n1
1 ? n 0 / 1 " n 0 / 1 & n 0 / 1 n 0 / 1 n 0 y + + + =
{ } 1 " n 0 / 1! & n 0 / 1! n 0 / ma/ 1 n 0 y =
1 n n 0 / 1 n 0 y
o
=
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) 2005 Gner
Arslan
351M Digital Signal Processing #
Memoryless System
- Memoryless System
. 8 system is memoryless if the output y0n1 at e2ery 2alue of n
depends only on the input /0n1 at the same 2alue of n
- 7/ample Memoryless Systems
. S,uare
. Sign
- Counter 7/ample
. *deal Delay System
( )
"
1 n 0 / 1 n 0 y =
{ } 1 n 0 / sign 1 n 0 y =
1 n n 0 / 1 n 0 y
o
=
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) 2005 Gner
Arslan
351M Digital Signal Processing $
@inear Systems
- @inear System+ 8 system is linear if and only if
- 7/amples
. *deal Delay System
{ } { }
{ } { } 3scaling4 1 n 0 / aT 1 n 0 a/ T
and
y4 3additi2it 1 n 0 / T 1 n 0 / T 1= n 0 / 1 n 0 / > T
" & " &
=
+ = +
1 n n 0 / 1 n 0 y
o
=
{ }
{ }
{ } 1 n n 0 a/ 1 n 0 / aT
1 n n 0 a/ 1 n 0 a/ T
1 n n 0 / 1 n n 0 / 1 n 0 / T 1= n 0 / > T
1 n n 0 / 1 n n 0 / 1= n 0 / 1 n 0 / > T
o &
o &
o " o & & "
o " o & " &
=
=
+ = +
+ = +
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) 2005 Gner
Arslan
351M Digital Signal Processing %
Time-*n2ariant Systems
- Time-*n2ariant 3shift-in2ariant4 Systems
. 8 time shift at the input causes corresponding time-shift at output
- 7/ample
. S,uare
- Counter 7/ample
. Compressor System
{ } 1 n n 0 / T 1 n n 0 y 1= n 0 / > T 1 n 0 y
o o
= =
( )
"
1 n 0 / 1 n 0 y =
[ ] ( )
[ ] ( )
"
o o
"
o &
1 n n 0 / n - n y gi2es output the Delay
1 n n 0 / n y is output the input the Delay
=
=
1 Mn 0 / 1 n 0 y =
[ ]
[ ] ( ) [ ]
o o
o &
n n M / n - n y gi2es output the Delay
1 n Mn 0 / n y is output the input the Delay
=
=
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) 2005 Gner
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351M Digital Signal Processing 10
Causal System
- Causality
. 8 system is causal itAs output is a function of only the current and
pre2ious samples
- 7/amples
. $ackward Difference
- Counter 7/ample
. orward Difference
1 n 0 / 1 & n 0 / 1 n 0 y + + =
1 & n 0 / 1 n 0 / 1 n 0 y =
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) 2005 Gner
Arslan
351M Digital Signal Processing 11
Stable System
- Stability 3in the sense of bounded-input bounded-output
$*$#4
. 8 system is stable if and only if e2ery bounded input produces a
bounded output
- 7/ample
. S,uare
- Counter 7/ample
. @og
< <
y /
$ 1 n 0 y $ 1 n 0 /
( )
"
1 n 0 / 1 n 0 y =
<
<
"
/
/
$ 1 n 0 y by bounded is output
$ 1 n 0 / by bounded is input if
( ) 1 n 0 / log 1 n 0 y
&(
=
[ ] [ ] [ ] ( ) = = =
<
n / log ( y ( n / for bounded not output
$ 1 n 0 / by bounded is input if e2en
&(
/

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