Ex.

no:14 CMOS INVERTER BY TSPICE

Date:
AIM:
To implement and study the transient analysis of cmos inverter by tspice simulator
TOOLS REQUIRED:
Tanner EDA, tspice simulator
PROGRAM:
*main circuit:module0
M1 output input gnd gnd M!" #$%u,&$%%u,AD$$''p,(D$%)u,A"$''p,("$%)u
M% output input vdd vdd (M!" #$%u,&$%%u,AD$$''p,(D$%)u,A"$''p,("$%)u
*include+c:,tanner,models,m1%-1%.*md+
/1 vdd gnd .
/% input gnd bit01010123
*trans 10n )0n
*print trans output input
*end of the main circuit:module0
LOGIC DIAGRAM:
OUTPUT WAVEORM:
PROCEDURE:
"tart the tspice simulator
"elect 4symbol bro5ser6 icon and place the re7uired components
To copy an element select the element ,hold the control 8ey drag the element to ne5
space*
To move an element select it and hold A#T8ey drag the element to the ne5 space
&iring are done as per circuit diagram
9or simulation clic8 tspice icon include necessary files and enter the coding
Trace the output 5aveform
RESULT:
Thus,:M!" inverter is implemented and studied in transient analysis using tspice simulator*
Exno:1! CMOS NAND BY TSPICE
Date:
AIM:
To implement and study the transient analysis of cmos AD gateby tspice simulator
TOOLS REQUIRED:
Tanner EDA, tspice simulator
PROGRAM:
*main circuit:module0
M1 1 A gnd gnd M!" #$%u,&$%%u,AD$$''p,(D$%)u,A"$''p,("$%)u
M% output ; 1 1 M!" #$%u,&$%%u,AD$$''p,(D$%)u,A"$''p,("$%)u
M< output A vdd vdd (M!" #$%u,&$%%u,AD$$''p,(D$%)u,A"$''p,("$%)u
M) output ; vdd vdd (M!" #$%u,&$%%u,AD$$''p,(D$%)u,A"$''p,("$%)u
*include+c:,tanner,models,m1%-1%.*md+
/1 vdd gnd .
/% A gnd bit01001123
/< ; gnd bit01010123
*trans 10n )0n
*print trans A ; output
*end of the main circuit:module0
LOGIC DIAGRAM:
OUTPUT WAVEORMS:
PROCEDURE:
"tart the tspice simulator
"elect 4symbol bro5ser6 icon and place the re7uired components
To copy an element select the element ,hold the control 8ey drag the element to ne5
space*
To move an element select it and hold A#T8ey drag the element to the ne5 space
&iring are done as per circuit diagram
9or simulation clic8 tspice icon include necessary files and enter the coding
Trace the output 5aveform
RESULT:
Thus,:M!" AD is implemented and studied in transient analysis using tspice simulator*
Ex.no:1" D#LATC$ES BY TSPICE
Date:
AIM:
To implement and study the D=#AT:>E" by tspice simulator
TOOLS REQUIRED:
Tanner EDA, tspice simulator
PROGRAM:
*main circuit:module0
*include+c:,tanner,models,m1%-1%.*md+
M1 ? cl8 7 . M!" #$%u,&$%%u,AD$$''p,(D$%)u,A"$''p,("$%)u
M% ? cl8 ip1 %< M!" #$%u,&$%%u,AD$$''p,(D$%)u,A"$''p,("$%)u
M< op ? gnd gnd M!" #$%u,&$%%u,AD$$''p,(D$%)u,A"$''p,("$%)u
M) gnd op 7 gnd M!" #$%u,&$%%u,AD$$''p,(D$%)u,A"$''p,("$%)u
M. ? cl8bar ip1 @ (M!" #$%u,&$%%u,AD$$''p,(D$%)u,A"$''p,("$%)u
M' ? cl8bar 7 1% (M!" #$%u,&$%%u,AD$$''p,(D$%)u,A"$''p,("$%)u
MA vdd op 7 vdd (M!" #$%u,&$%%u,AD$$''p,(D$%)u,A"$''p,("$%)u
M@ op ? vdd vdd (M!" #$%u,&$%%u,AD$$''p,(D$%)u,A"$''p,("$%)u
/1 vdd gnd .
/% cl8 gnd bit01101023
/< cl8bar gnd bit01010123
/) ip1 gnd bit01101023rt $*01n n ft$*01n3
*trans 10n )0n
*print trans ip1 7 op
*end of the main circuit:module0
LOGIC DIAGRAM:
OUTPUT WAVEORMS:
PROCEDURE:
"tart the tspice simulator
"elect 4symbol bro5ser6 icon and place the re7uired components
To copy an element select the element ,hold the control 8ey drag the element to ne5
space*
To move an element select it and hold A#T8ey drag the element to the ne5 space
&iring are done as per circuit diagram
9or simulation clic8 tspice icon include necessary files and enter the coding
Trace the output 5aveform
RESULT:
Thus,D=#AT:>E" is implemented and studied in transient analysis using tspice simulator*