Beruflich Dokumente
Kultur Dokumente
DGK-8
D-8
THS4211
THS4215
DRB-8
FEATURES
23
DESCRIPTION
Unity-Gain Stability
Wide Bandwidth: 1 GHz
High Slew Rate: 970 V/s
Low Distortion:
90 dBc THD at 30 MHz
130-MHz Bandwidth (0.1 dB, G = 2)
0.007% Differential Gain
0.003 Differential Phase
High Output Drive, IO = 170 mA
Excellent Video Performance:
130-MHz Bandwidth (0.1 dB, G = 2)
0.007% Differential Gain
0.003 Differential Phase
Supply Voltages
+5 V, 5 V, +12 V, +15 V
Power Down Functionality (THS4215)
Evaluation Module Available
APPLICATIONS
DESCRIPTION
THS4271
THS4503
THS3202
NC
ININ+
VS-
NC
VS+
VOUT
NC
-50
50
Gain = 2
Rf = 392
RL = 150
VO = 2 VPP
VS = 5 V
-55
49.9
THS4211
_
-5 V
392
392
VO
+
VI
HARMONIC DISTORTION
vs
FREQUENCY
+5 V
50 Source
-60
-65
-70
-75
-80
HD2
-85
HD3
-90
-95
-100
1
10
f - Frequency - MHz
100
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
THS4211
THS4215
SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009 ................................................................................................................................... www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
16.5 V
Input voltage, VI
VS
Output current, IO
250 mA
+150C
(3)
+125C
(1)
(2)
(3)
65C to +150C
HBM
4000 V
CDM
1500 V
MM
200 V
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
The absolute maximum ratings under any condition is limited by the constraints of the silicon process. Stresses above these ratings may
cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied.
The maximum junction temperature for continuous operation is limited by package constraints. Operation above this temperature may
result in reduced reliability and/or lifetime of the device.
(1)
(2)
(3)
POWER RATING
(3)
PACKAGE
JC
(C/W)
JA (2)
(C/W)
TA +25C
TA= +85C
D (8-pin)
38.3
97.5
1.02 W
410 mW
4.7
58.4
1.71 W
685 mW
DGK (8-pin)
54.2
260
385 mW
154 mW
DRB (8-pin)
45.8
2.18 W
873 mW
The THS4211/5 may incorporate a PowerPAD on the underside of the chip. This acts as a heat sink and must be connected to a
thermally dissipative plane for proper power dissipation. Failure to do so may result in exceeding the maximum junction temperature
which could permanently damage the device. See TI technical briefs SLMA002 and SLMA004 for more information about utilizing the
PowerPAD thermally enhanced package.
This data was taken using the JEDEC standard High-K test PCB.
Power rating is determined with a junction temperature of +125C. This is the point where distortion starts to substantially increase.
Thermal management of the final PCB should strive to keep the junction temperature at or below +125C for best performance and long
term reliability.
Dual supply
Single supply
MIN
MAX
2.5
7.5
15
VS + 1.2
VS+ 1.2
UNIT
V
V
THS4211
THS4215
www.ti.com ................................................................................................................................... SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009
PACKAGE TYPE
PACKAGE MARKING
SOIC-8
MSOP-8
BEJ
QFN-8-PP (2)
BET
MSOP-8-PP (2)
BFN
SOIC-8
MSOP-8
BEZ
QFN-8-PP (2)
BEU
MSOP-8-PP (2)
BFQ
Non-power-down
THS4211D
THS4211DR
THS4211DGK
THS4211DGKR
THS4211DRBT
THS4211DRBR
THS4211DGN
THS4211DGNR
Rails, 75
Tape and Reel, 2500
Rails, 100
Tape and Reel, 2500
Tape and Reel, 250
Tape and Reel, 3000
Rails, 80
Tape and Reel, 2500
Power-down
THS4215D
THS4215DR
THS4215DGK
THS4215DGKR
THS4215DRBT
THS4215DRBR
THS4215DGN
THS4215DGNR
(1)
(2)
Rails, 75
Tape and Reel, 2500
Rails, 100
Tape and Reel, 2500
Tape and Reel, 250
Tape and Reel, 3000
Rails, 80
Tape and Reel, 2500
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
The PowerPAD is electrically isolated from all other pins.
PIN ASSIGNMENTS
(TOP VIEW)
THS4211
NC
NC
IN-
IN+
VS-
(TOP VIEW)
THS4215
REF
PD
VS+
IN-
VS+
VOUT
IN+
VOUT
NC
VS-
NC
NC = No Connetion
NC = No Connection
See Note A.
NOTE A: The devices with the power down option defaults to the ON state if no signal is applied to the PD pin.
THS4211
THS4215
SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009 ................................................................................................................................... www.ti.com
ELECTRICAL CHARACTERISTICS: VS = 5 V
At RF = 392 , RL = 499 , and G = +2, unless otherwise noted.
TYP
OVER TEMPERATURE
UNITS
MIN/
TYP/
MAX
GHz
Typ
G = 1, POUT = 16 dBm
325
MHz
Typ
G = 2, POUT = 16 dBm
325
MHz
Typ
G = 5, POUT = 16 dBm
70
MHz
Typ
PARAMETER
TEST CONDITIONS
+25C
+25C
0C to
+70C
40C
to
+85C
AC PERFORMANCE
G = 1, POUT = 7 dBm
Small-signal bandwidth
35
MHz
Typ
G = 1, POUT = 7 dBm
70
MHz
Typ
350
MHz
Typ
Full-power bandwidth
G = 1, VO = 2 Vp
77
MHz
Typ
G = 1, VO = 2 V Step
970
V/s
Typ
G = 1, VO = 2 V Step
850
V/s
Typ
22
ns
Typ
55
ns
Typ
78
dBc
Typ
RL = 499
90
dBc
Typ
RL = 150
100
dBc
Typ
RL = 499
100
dBc
Typ
RL = 150
68
dBc
Typ
RL = 499
70
dBc
Typ
RL = 150
80
dBc
Typ
RL = 499
Slew rate
Settling time to 0.1%
Settling time to 0.01%
G = 1, VO = 4 V Step
Harmonic distortion
RL = 150
82
dBc
Typ
53
dBc
Typ
32
dBm
Typ
0.007
Typ
0.003
Typ
G = 2, RL = 150
f = 1 MHz
nV/Hz
Typ
f = 10 MHz
pAHz
Typ
VO = 0.3 V, RL = 499
70
65
62
60
dB
Min
12
14
14
mV
Max
40
40
V/C
Typ
15
18
20
Max
10
10
nA/C
Typ
DC PERFORMANCE
Open-loop voltage gain (AOL)
Input offset voltage
Average offset voltage drift
Input bias current
Average bias current drift
VCM = 0 V
0.3
Max
10
10
nA/C
Typ
THS4211
THS4215
www.ti.com ................................................................................................................................... SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009
TEST CONDITIONS
OVER TEMPERATURE
40C
to
+85C
UNITS
MIN/
TYP/
MAX
Min
+25C
+25C
0C to
+70C
3.8
3.7
3.6
52
50
48
INPUT CHARACTERISTICS
Common-mode input range
Common-mode rejection ratio
VCM = 1 V
56
dB
Min
Input resistance
Common-mode
Typ
Input capacitance
Common-mode/differential
0.3/0.2
pF
Typ
OUTPUT CHARACTERISTICS
Output voltage swing
4.0
3.8
3.7
3.6
Min
220
200
190
180
mA
Min
170
140
130
120
mA
Min
Typ
RL = 10
f = 1 MHz
0.3
POWER SUPPLY
Specified operating voltage
7.5
7.5
7.5
Max
19
22
23
24
mA
Max
19
16
15
14
mA
Min
64
58
54
54
dB
Min
65
60
56
56
dB
Min
Enable
Power-down
Enable
Power-down
REF+1.8
Min
REF+1
Max
REF1
Min
REF1.5
Max
650
850
900
1000
Max
450
650
800
900
Max
Typ
Typ
Typ
250
Typ
Input impedance
Output impedance
f = 1 MHz
THS4211
THS4215
SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009 ................................................................................................................................... www.ti.com
ELECTRICAL CHARACTERISTICS: VS = 5 V
At RF = 392 , RL = 499 , and G = +2, unless otherwise noted.
TYP
PARAMETER
TEST CONDITIONS
OVER TEMPERATURE
+25C
+25C
0C to
+70C
40C
to
+85C
UNITS
MIN/
TYP/
MAX
AC PERFORMANCE
Small-signal bandwidth
G = 1, POUT = 7 dBm
980
MHz
Typ
G = 1, POUT = 16 dBm
300
MHz
Typ
G = 2, POUT = 16 dBm
300
MHz
Typ
MHz
Typ
G = 5, POUT = 16 dBm 65
G = 10, POUT = 16 dBm
30
MHz
Typ
G = 1, POUT = 7 dBm
90
MHz
Typ
300
MHz
Typ
Full-power bandwidth
G = 1, VO = 2 Vp
64
MHz
Typ
G = 1, VO = 2 V Step
800
V/s
Typ
G = 1, VO = 2 V Step
750
V/s
Typ
22
ns
Typ
84
ns
Typ
RL = 150
60
dBc
Typ
RL = 499
60
dBc
Typ
RL = 150
68
dBc
Typ
RL = 499
68
dBc
Typ
70
dBc
Typ
Slew rate
Settling time to 0.1%
Settling time to 0.01%
G = 1, VO = 2 V Step
Harmonic distortion
2nd-order harmonic distortion
G = 1, VO = 1 VPP,
f = 30 MHz
3rd-order harmonic distortion
3rd-order intermodulation (IMD3)
3rd-order output intercept (OIP3)
34
dBm
Typ
Input-voltage noise
f = 1 MHz
nV/Hz
Typ
Input-current noise
f = 10 MHz
pA/Hz
Typ
VO = 0.3 V, RL = 499
68
63
60
60
dB
Min
12
14
14
mV
Max
40
40
V/C
Typ
15
17
18
Max
10
10
nA/C
Typ
0.3
Max
10
10
nA/C
Typ
Min
DC PERFORMANCE
Open-loop voltage gain (AOL)
Input offset voltage
Average offset voltage drift
Input bias current
Average bias current drift
VCM = VS/2
1/4
1.2/3.8
1.3/3.7
1.4/3.6
50
48
45
54
dB
Min
Input resistance
Common-mode
Typ
Input capacitance
Common-mode/differential
0.3/0.2
pF
Typ
OUTPUT CHARACTERISTICS
Output voltage swing
1/4
1.2/3.8
1.3/3.7
1.4/3.6
Min
230
210
190
180
mA
Min
150
120
100
90
mA
Min
Typ
RL = 10
f = 1 MHz
0.3
THS4211
THS4215
www.ti.com ................................................................................................................................... SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009
TEST CONDITIONS
OVER TEMPERATURE
40C
to
+85C
UNITS
MIN/
TYP/
MAX
+25C
+25C
0C to
+70C
15
15
15
Max
19
22
23
24
mA
Max
19
16
15
14
mA
Min
POWER SUPPLY
63
58
54
54
dB
Min
65
60
56
56
dB
Min
Enable
Power down
Enable
Power down
REF+1.8
Min
REF+1
Max
REF1
Min
REF1.5
Max
450
650
750
850
Max
400
650
750
850
Turn-on-time delay(t(ON))
Turn-off-time delay (t(Off))
Input impedance
Output impedance
f = 1 MHz
Max
Typ
Typ
Typ
75
Typ
THS4211
THS4215
SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009 ................................................................................................................................... www.ti.com
TYPICAL CHARACTERISTICS
Table of Graphs (5 V)
FIGURE
Small-signal unity-gain frequency response
Slew rate
vs Output voltage
Harmonic distortion
vs Frequency
Harmonic distortion
vs Frequency
14, 16
vs Frequency
15, 17
vs Frequency
18
Differential gain
vs Number of loads
19
Differential phase
vs Number of loads
20
6, 7, 8, 9
10, 11, 12, 13
Settling time
21
Quiescent current
vs supply voltage
22
Output voltage
vs Load resistance
23
Frequency response
vs Capacitive load
24
vs Frequency
25
Open-loop gain
vs Case temperature
26
Rejection ratios
vs Frequency
27
Rejection ratios
vs Case temperature
28
29
vs Case temperature
30
vs Case temperature
31
32
33
Overdrive recovery
34
vs Frequency
35
vs Supply voltage
36
vs Frequency
37
38
THS4211
THS4215
www.ti.com ................................................................................................................................... SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009
Table of Graphs (5 V)
FIGURE
Small-signal unity-gain frequency response
39
40
41
42
Slew rate
vs Output voltage
Harmonic distortion
vs Frequency
Harmonic distortion
vs Frequency
52, 54
vs Frequency
53, 55
vs Frequency
56
Settling time
43
57
Quiescent current
vs Supply voltage
58
Output voltage
vs Load resistance
59
Frequency response
vs Capacitive load
60
vs Frequency
61
Open-loop gain
vs Case temperature
62
Rejection ratios
vs Frequency
63
Rejection ratios
vs Case temperature
64
65
vs Case temperature
66
vs Case temperature
67
68
69
Overdrive recovery
70
vs Frequency
71
vs Supply voltage
72
vs Frequency
73
74
THS4211
THS4215
SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009 ................................................................................................................................... www.ti.com
TYPICAL CHARACTERISTICS: 5 V
SMALL-SIGNAL UNITY GAIN
FREQUENCY RESPONSE
SMALL-SIGNAL FREQUENCY
RESPONSE
22
Gain = 1
RL = 499
VO = 250 mV
VS = 5 V
0.1
20
2
1
0
-1
-2
Gain = 10
18
Small Signal Gain - dB
-0.1
16
Gain = 5
14
RL = 499
Rf = 392
VO = 250 mV
VS = 5 V
12
10
8
6
Gain = 2
4
2
-4
100 k
1M
10 M
100 M
1G
Gain = -1
-2
-4
100 k
1M
10 G
f - Frequency - Hz
-0.6
-0.7
Gain = 1
RL = 499
VO = 250 mV
VS = 5 V
10 M
100 M
f - Frequency - Hz
-1
1M
1G
10 M
100 M
f - Frequency - Hz
Figure 2.
Figure 3.
LARGE-SIGNAL FREQUENCY
RESPONSE
SLEW RATE
vs
OUTPUT VOLTAGE
HARMONIC DISTORTION
vs
FREQUENCY
1400
-1
-2
Gain = 1
RL = 499
VO = 2 VPP
VS = 5 V
-4
100 k
Fall, Gain = 1
1000
800
Fall, Gain =- 1
Rise, Gain = -1
600
400
RL = 499
Rf = 392
VS = 5 V
200
10 M
100 M
1G
f - Frequency - Hz
-60
-90
0.5
1.5
2.5
3.5
4 4.5
HARMONIC DISTORTION
vs
FREQUENCY
HARMONIC DISTORTION
vs
FREQUENCY
HARMONIC DISTORTION
vs
FREQUENCY
Gain = 2
Rf = 392
VO = 1 VPP
VS = 5 V
-60
-80
-85
-90
-65
-70
HD3, RL = 150,
and RL = 499
-75
-80
HD2, RL = 499
-85
HD2, RL = 150
-90
-60
-65
-70
HD2, RL = 499
-75
-90
-95
-100
-100
10
100
HD3, RL = 150,
and RL = 499
-85
-100
HD2, RL = 150
-80
-95
100
Gain = 2
Rf = 392
VO = 2 VPP
VS = 5 V
-55
-95
10
10
f - Frequency - MHz
f - Frequency - MHz
f - Frequency - MHz
Figure 7.
Figure 8.
Figure 9.
100
-50
-55
HD3, RL = 150
and RL = 499
HD2, RL = 150
10
f - Frequency - MHz
Figure 6.
HD2, RL = 499
-75
HD2, RL = 499
-85
Figure 5.
-65
-70
HD2, RL = 150
-80
Figure 4.
Gain = 1
VO = 2 VPP
VS = 5 V
-55
-75
VO - Output Voltage - V
-50
HD3, RL = 150
and RL = 499
-100
0
1M
-70
-95
-3
Gain = 1
VO = 1 VPP
VS = 5 V
-65
Harmonic Distortion - dBc
SR - Slew Rate - V/ s
1G
-60
1200
Large Signal Gain - dB
-0.5
-0.9
Rise, Gain = 1
-0.4
Figure 1.
10
-0.3
-0.8
-3
-0.2
100
THS4211
THS4215
www.ti.com ................................................................................................................................... SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009
-85
-90
HD2, RL = 499
-95
-65
HD2, RL = 499
-70
HD2, RL = 150
-75
-80
-85
-90
0.5 1
1.5 2
2.5 3
3.5 4
4.5 5
HD3, RL = 499
HD2, RL = 150
-90
-100
0
0.5 1
1.5 2
2.5 3
3.5 4
4.5 5
0.5 1
1.5 2
2.5 3
3.5 4
Figure 12.
HARMONIC DISTORTION
vs
OUTPUT VOLTAGE SWING
THIRD-ORDER INTERMODULATION
DISTORTION
vs
FREQUENCY
THIRD-ORDER OUTPUT
INTERCEPT POINT
vs
FREQUENCY
-50
-55
HD3, RL = 150
HD3, RL = 499
-60
HD2, RL = 499
-65
-70
-75
-80
HD2, RL = 150
-85
-90
-95
-100
0
0.5
1.5
2.5
3.5
4.5
60
-45
Third-Order Output Intersept Point - dBm
Gain = 2
Rf = 249
f = 32 MHz
VS = 5 V
Figure 11.
-45
Gain = 1
RL = 150
VS = 5 V
200 kHz Tone Spacing
-50
-55
-60
-65
-70
VO = 2 VPP
-75
-80
-85
-90
-95
-100
4.5 5
Figure 10.
-40
VO = 1 VPP
10
55
50
45
VO = 1 VPP
40
VO = 2 VPP
35
30
0
100
Gain = 1
RL = 150
VS = 5 V
200 kHz Tone Spacing
20
40
60
80
100
f - Frequency - MHz
f - Frequency - MHz
Figure 13.
Figure 14.
Figure 15.
THIRD-ORDER INTERMODULATION
DISTORTION
vs
FREQUENCY
THIRD-ORDER OUTPUT
INTERCEPT POINT
vs
FREQUENCY
-55
-60
-65
-70
VO = 2 VPP
-75
-80
-85
-90
VO = 1 VPP
-95
-100
10
100
Gain = 2
RL = 150
VS = 5 V
200 kHz Tone Spacing
55
50
45
35
VO = 2 VPP
30
In
20
20
40
60
80
100
f - Frequency - MHz
Figure 16.
10
25
f - Frequency - MHz
Vn
10
VO = 1 VPP
40
100
Hz
-50
60
Gain = 2
RL = 150
VS = 5 V
200 kHz Tone Spacing
-45
Hz
-40
nV/
-85
HD3, RL = 499
HD3, RL = 150
-80
-100
0
HD2, RL = 499
-95
-95
-100
-75
HD2, RL = 150
-60
Gain = 2
Rf = 249
f = 8 MHz
VS = 5 V
-70
HD3, RL = 150
Harmonic Distortion - dBc
HD3, RL = 150
HD3, RL = 499
-80
-65
Gain = 1
f= 32 MHz
VS = 5 V
-55
Vn - Voltage Noise -
-75
HARMONIC DISTORTION
vs
OUTPUT VOLTAGE SWING
-50
Gain = 1
f= 8 MHz
VS = 5 V
-70
HARMONIC DISTORTION
vs
OUTPUT VOLTAGE SWING
Figure 17.
1k
10 k
100 k
1M
10 M
1
100 M
f - Frequency - Hz
Figure 18.
11
THS4211
THS4215
SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009 ................................................................................................................................... www.ti.com
DIFFERENTIAL PHASE
vs
NUMBER OF LOADS
0.030
0.015
Differential Phase -
0.020
Gain = 2
Rf = 392
VS = 5 V
40 IRE - NTSC and Pal
Worst Case 100 IRE Ramp
0.18
PAL
NTSC
0.010
0.16
0.14
2
VO - Output Voltage - V
Gain = 2
Rf = 392
VS = 5 V
40 IRE - NTSC and Pal
Worst Case 100 IRE Ramp
0.025
Differential Gain - %
SETTLING TIME
3
0.20
0.12
0.10
PAL
0.08
0.06
NTSC
0.04
0.005
Rising Edge
1
-1
Gain = -1
RL = 499
Rf = 392
f= 1 MHz
VS = 5 V
-2
Falling Edge
0.02
0
0
0
-3
10
15
20
Figure 21.
QUIESCENT CURRENT
vs
SUPPLY VOLTAGE
OUTPUT VOLTAGE
vs
LOAD RESISTANCE
FREQUENCY RESPONSE
vs
CAPACITIVE LOAD
TA = 85C
TA = 25C
0.5
14
12
Normalized Gain - dB
VO - Output Voltage - V
TA = -40C
16
18
2
1
TA = -40 to 85C
0
-1
-2
3.5
4.5
10
0
-0.5
R(ISO) = 15
CL = 50 pF
-1
-1.5
R(ISO) = 25
CL = 10 pF
-2
-2.5
-5
2.5
VS =5 V
R(ISO) = 10
CL = 100 pF
-3
-4
10
100
-3
100 k
1000
RL - Load Resistance -
VS - Supply Voltage - V
1M
10 M
100 M
Figure 23.
Figure 24.
OPEN-LOOP GAIN
vs
CASE TEMPERATURE
REJECTION RATIOS
vs
FREQUENCY
70
90
180
70
160
TA = 25C
50
120
40
100
30
80
20
60
10
40
20
Open-Loop Gain - dB
140
Phase -
85
60
100 k
1M
10 M
100 M
0
1G
f - Frequency - Hz
Figure 25.
PSRR-
TA = 85C
80
75
TA = -40C
70
65
-10
10 k
VS = 5 V
60
Rejection Ratios - dB
VS = 5 V
1G
Capacitive Load - Hz
Figure 22.
80
25
t - Time - ns
Figure 20.
20
Open-Loop Gain - dB
Figure 19.
22
12
Quiescent Current - mA
50
CMRR
40
30
PSRR+
20
10
60
2.5
3.5
4.5
0
100 k
1M
10 M
Case Temperature - C
f - Frequency - Hz
Figure 26.
Figure 27.
100 M
1G
THS4211
THS4215
www.ti.com ................................................................................................................................... SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009
VS = 5 V
PSRR-
70
CMMR
PSRR+
40
30
20
10
0
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90
55
50
45
40
35
30
25
20
15
10
VS = 5 V
TA = 25C
5
0
-4.5
-3
Case Temperature - C
1
0
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90
4.5
TC - Case Temperature - C
LARGE-SIGNAL TRANSIENT
RESPONSE
0.65
0.6
0.55
IIB-
0.5
IOS
0.45
0.4
0.35
IIB+
5.8
0.3
5.7
0.25
VO - Output Voltage - V
0.7
VS = 5 V
0.12
0.1
1.5
0.08
0.06
0.04
0.02
0
-0.02
Gain = -1
RL = 499
Rf =392
tr/tf = 300 ps
VS = 5 V
-0.04
-0.06
-0.08
-0.1
0.2
-40 -30 -20-10 0 10 20 30 40 50 60 70 80 90
0.5
0
Gain = -1
RL = 499
Rf = 392
tr/tf = 300 ps
VS = 5 V
-0.5
-1
-1.5
-0.12
-1
TC - Case Temperature - C
3 4 5 6
t - Time - ns
-2
10
8 10 12 14 16 18 20
t - Time - ns
Figure 31.
Figure 32.
Figure 33.
OVERDRIVE RECOVERY
CLOSED-LOOP OUTPUT
IMPEDANCE
vs
FREQUENCY
POWER-DOWN QUIESCENT
CURRENT
vs
SUPPLY VOLTAGE
100 k
2.5
1.5
0.5
0
0
-1
-0.5
-2
-1
-3
-1.5
-4
-2
-5
-2.5
-6
-3
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
3
VS = 5 V
VI - Input Voltage - V
SMALL-SIGNAL TRANSIENT
RESPONSE
6
5
VS = 5 V
6.1
5.6
Figure 30.
6.2
5.9
1.5
VS = 5 V
Figure 29.
6.4
6.3
Figure 28.
6.6
6.5
-1.5
VO - Output Voltage - V
50
60
10 k
1k
100
10
1
0.1
0.01
100 k
t - Time - s
Figure 34.
800
RL = 499 ,
RF = 392 ,
PIN = -4 dBm
VS = 5 V
Rejection Ratios - dB
60
80
REJECTION RATIOS
vs
CASE TEMPERATURE
TA = 85C
700
600
500
TA = 25C
400
TA = -40C
300
200
100
0
1M
10 M
100 M
f - Frequency - Hz
1G
Figure 35.
2.5
3
3.5
4
4.5
VS - Supply Voltage - V
Figure 36.
13
THS4211
THS4215
SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009 ................................................................................................................................... www.ti.com
1000
0.1
1M
10 M
100 M
1G
4.5
0.03
10
0.001
100 k
0.035
0.04
Gain = 1
RL = 499
PIN = -1 dBm
VS = 5 V
3
1.5
0.025
0.02
0.015
0.01
-3
-4.5
0.005
-6
-7.5
-0.005
-0.01
10 G
-1.5
Gain = -1
RL = 499
VS = 5 V
f - Frequency - Hz
Figure 37.
Figure 38.
TYPICAL CHARACTERISTICS: 5 V
SMALL-SIGNAL UNITY GAIN
FREQUENCY RESPONSE
SMALL-SIGNAL
FREQUENCY RESPONSE
22
Gain = 1
RL = 499
VO = 250 mV
VS = 5 V
0
-1
-2
10 M
100 M
1G
16
Gain = 5
14
RL = 499
Rf = 392
VO = 250 mV
VS = 5 V
12
10
8
6
Gain = 2
4
2
0
Gain = -1
-2
-4
100 k
1M
-3
1M
10 G
f - Frequency - Hz
-0.3
-0.4
-0.5
-0.6
Gain = 1
RL = 499
VO = 250 mV
VS = 5 V
-0.7
-0.8
-0.9
-1
10 M
100 M
f - Frequency - Hz
1G
1M
10 M
100 M
f - Frequency - Hz
Figure 40.
Figure 41.
LARGE-SIGNAL
FREQUENCY RESPONSE
SLEW RATE
vs
OUTPUT VOLTAGE
HARMONIC DISTORTION
vs
FREQUENCY
1000
-1
-2
Gain = 1
RL = 499
VO = 2 VPP
VS = 5 V
-4
100 K
800
Rise, G = 1
700
600
Rise, G = -1
500
Fall, G = -1
400
300
RL = 499
Rf = 392
VS = 5 V
200
100
10 M
100 M
1G
f - Frequency - Hz
Figure 42.
-60
-65
-70
HD2
-75
-80
HD3
-85
-90
-95
0
1M
Gain = 1
VO = 1 VPP
RL = 150 , and 499
VS = 5 V
-55
Harmonic Distortion - dBc
SR - Slew Rate - V/ s
1G
-50
Fall, G = 1
900
-0.2
Figure 39.
14
0
-0.1
Gain = 10
18
-4
100 k
0.1
20
-3
-100
0.4
0.6
0.8
1
1.2 1.4 1.6
VO - Output Voltage -V
1.8
Figure 43.
10
f - Frequency - MHz
100
Figure 44.
THS4211
THS4215
www.ti.com ................................................................................................................................... SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009
HARMONIC DISTORTION
vs
FREQUENCY
-60
HD3
-65
HD2
-70
-75
-80
-30
-50
-40
-60
HD2
-70
HD3
-80
Gain = 2
VO = 1 VPP
Rf = 392
RL = 150 and 499
VS = 5 V
-90
-85
-100
-90
10
100
f - Frequency - MHz
HD3
-60
-70
Gain = 2
VO = 2 VPP
Rf = 392
RL = 150 and 499
VS = 5 V
-80
-90
100
10
f - Frequency - MHz
100
Figure 47.
HARMONIC DISTORTION
vs
FREQUENCY
HARMONIC DISTORTION
vs
OUTPUT VOLTAGE SWING
HARMONIC DISTORTION
vs
OUTPUT VOLTAGE SWING
HD2
-70
-75
HD3
-80
-85
Gain = 1
RL = 150 , and 499 ,
f = 8 MHz
VS = 5 V
-90
-95
-100
-45
-50
-50
-55
-55
HD2
-60
-65
HD3
-70
-75
Gain = 1
RL = 150 , and 499 ,
f = 32 MHz
VS = 5 V
-80
-85
-90
0.5
1
1.5
2
VO - Output Voltage Swing - V
2.5
0.5
1
1.5
2
VO - Output Voltage Swing - V
HD2
-60
-65
HD3
-70
-75
-80
Gain = 2
Rf = 392
RL = 150 and 499
f = 8 MHz
VS = 5 V
-85
-90
-95
-100
0
2.5
0.5
1.5
2.5
Figure 48.
Figure 49.
Figure 50.
HARMONIC DISTORTION
vs
OUTPUT VOLTAGE SWING
THIRD-ORDER INTERMODULATION
DISTORTION
vs
FREQUENCY
-40
-45
HD2
-50
-55
HD3
-60
-65
Gain = 2
Rf = 392
RL = 150 and 499
f = 32 MHz
VS = 5 V
-70
-75
-80
0
0.5
1.5
2.5
HD2
Figure 46.
-65
-50
Figure 45.
-60
10
f - Frequency - MHz
-55
-40
-40
50
Gain = 1
RL = 150
VS = 5 V
200 kHz Tone
Spacing
-45
-50
-55
-60
-65
VO = 2VPP
-70
-75
-80
-85
VO = 1VPP
-90
-95
-100
10
-50
Gain = 1
VO = 2 VPP
RL = 150 , and 499
VS = 5 V
-45
-40
HARMONIC DISTORTION
vs
FREQUENCY
100
f - Frequency - MHz
Figure 51.
Figure 52.
Gain = 1
RL = 150
VS = 5 V
200 kHz Tone Spacing
45
VO = 1VPP
40
VO = 2VPP
35
30
0
10
20
30
40
50
60
70
80
f - Frequency - MHz
Figure 53.
15
THS4211
THS4215
SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009 ................................................................................................................................... www.ti.com
-60
VO = 2 VPP
-70
-80
VO = 1 VPP
-90
-100
10
100
40
35
Hz
nV/
-50
45
VO = 1 VPP
30
Vn
10
VO = 2 VPP
25
20
10
In
15
20
40
60
80
1k
100
10 k
100 k
1M
10 M
f - Frequency - Hz
f - Frequency - MHz
Figure 54.
Figure 55.
Figure 56.
SETTLING TIME
QUIESCENT CURRENT
vs
SUPPLY VOLTAGE
OUTPUT VOLTAGE
vs
LOAD RESISTANCE
1.5
22
Rising Edge
-0.5
18
TA = -40C
16
14
Falling Edge
-1
VO - Output Voltage - V
Gain = -1
RL = 499
Rf = 392
f= 1 MHz
VS = 5 V
TA = 25C
Quiescent Current - mA
0.5
1.5
TA = 85C
20
1
100 M
10
f - Frequency - MHz
VO - Output Voltage - V
100
Vn - Voltage Noise -
-40
Gain = 2
RL = 150
VS = 5 V
200 kHz Tone Spacing
Hz
50
Gain = 1
RL = 150
VS = 5 V
200 kHz Tone
Spacing
-30
Third-Order Output Intersept Point - dBm
THIRD-ORDER INTERMODULATION
DISTORTION
vs
FREQUENCY
1
0.5
TA = -40 to 85C
0
-0.5
-1
12
-1.5
10
-1.5
0
10
15
t - Time - ns
20
3.5
4.5
10
100
RL - Load Resistance -
Figure 57.
Figure 58.
Figure 59.
FREQUENCY RESPONSE
vs
CAPACITIVE LOAD
OPEN-LOOP GAIN
vs
CASE TEMPERATURE
80
R(ISO) = 25 , CL = 10 pF
70
-1
R(ISO) = 10
CL = 100 pF
-2
140
50
120
40
100
30
80
20
60
10
40
20
Open-Loop Gain - dB
Open-Loop Gain - dB
R(ISO) = 15
CL = 50 pF
-1.5
TA = 25C
85
0
-0.5
160
60
1000
90
180
VS = 5 V
Phase -
0.5
Normalized Gain - dB
VS - Supply Voltage - V
TA = 85C
80
75
TA = -40C
70
65
-2.5
VS = 5 V
-3
100 k
1M
10 M
100 M
Capacitive Load - Hz
Figure 60.
16
-2
2.5
25
1G
-10
10 k
100 k
1M
10 M
100 M
60
0
1G
2.5
3.5
4.5
Case Temperature - C
f - Frequency - Hz
Figure 61.
Figure 62.
THS4211
THS4215
www.ti.com ................................................................................................................................... SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009
70
VS = 5 V
50
CMRR
40
30
PSRR+
20
PSRR-
60
Rejection Ratios - dB
50
CMMR
PSRR+
40
30
20
10
10
0
100 k
1M
10 M
100 M
0
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90
1G
50
45
40
35
30
25
20
15
10
5
0
0
1
2
3
4
Input Common-Mode Voltage Range - V
Figure 64.
Figure 65.
SMALL-SIGNAL TRANSIENT
RESPONSE
VS = 5 V
6
5
VS = 5 V
4
3
2
0.65
6.4
6.3
0.6
IIB-
0.55
6.2
6.1
0.5
0.45
IIB+
0.4
5.9
0.35
IOS
5.8
0.3
5.7
LARGE-SIGNAL TRANSIENT
RESPONSE
-1
-1.5
0
-0.02
-0.06
-1
3 4 5 6
t - Time - ns
OVERDRIVE RECOVERY
0.5
-2
-1
-3
-1.5
100 k
t - Time - s
Figure 69.
CLOSED-LOOP OUTPUT
IMPEDANCE
vs
FREQUENCY
1.5
Figure 68.
-0.5
8 10 12 14 16 18 20
Figure 67.
-1
t - Time - ns
Gain = -1
RL = 499
Rf =392
tr/tf = 300 ps
VS = 5 V
-0.04
-0.1
VI - Input Voltage - V
Gain = -1
RL = 499
Rf = 392
tr/tf = 300 ps
VS = 5 V
-0.5
0.02
0
-0.12
VS = 5 V
0.04
-0.08
0.25
1.5
0.5
0.06
TC - Case Temperature - C
Figure 66.
0.08
0.2
5.6
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90
TC - Case Temperature - C
0.12
0.1
Figure 70.
0.7
VS = 5 V
VO - Output Voltage - V
6.5
I IB - Input Bias Current - A
6.6
0
-40 -30-20 -10 0 10 20 30 40 50 60 70 80 90
VO - Output Voltage - V
VS = 5 V
55
Figure 63.
-2
60
Case Temperature - C
f - Frequency - Hz
Rejection Ratios - dB
VS = 5 V
70
PSRR-
60
REJECTION RATIOS
vs
FREQUENCY
10 k
1k
10
RL = 499 ,
RF = 392 ,
PIN = -4 dBm
VS = 5 V
100
10
1
0.1
0.01
100 k
1M
10 M
100 M
f - Frequency - Hz
1G
Figure 71.
17
THS4211
THS4215
SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009 ................................................................................................................................... www.ti.com
600
500
TA = 25C
400
TA = -40C
300
200
100
0
2.5
3
3.5
4
4.5
VS - Supply Voltage - V
Figure 72.
0.035
Gain = 1
RL = 499
PIN = -1 dBm
VS = 5 V
0.03
10
0.1
0.001
100 k
10 M
100 M
f - Frequency - Hz
1G
10 G
Figure 73.
1.5
0
0.02
0.015
-1.5
-3
0.01
Gain = -1
RL = 499
VS = 5 V
0.005
0
-0.005
-0.01
1M
4.5
0.025
VO - Output Voltage Level - V
700
800
18
POWER-DOWN QUIESCENT
CURRENT
vs
SUPPLY VOLTAGE
-4.5
-6
-7.5
0.01 0.02 0.03 0.04 0.05 0.06 0.07
t - Time - ns
Figure 74.
THS4211
THS4215
www.ti.com ................................................................................................................................... SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009
APPLICATION INFORMATION
HIGH-SPEED OPERATIONAL AMPLIFIERS
100 pF
50 Source
0.1 F 6.8 F
VI
VO
THS4211
49.9
Rf
392
499
392
Rg
0.1 F 6.8 F
100 pF
space
space
-5 V
space
-VS
19
THS4211
THS4215
SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009 ................................................................................................................................... www.ti.com
0.1 F
6.8 F
+
RT
200
CT
0.1 F
VO
THS4211
499
50 Source
VI
Rg
Rf
392
RM
57.6
392
0.1 F
100 pF
-5 V
6.8 F
+
-VS
20
THS4211
THS4215
www.ti.com ................................................................................................................................... SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009
SINGLE-SUPPLY OPERATION
The THS4211 is designed to operate from a single
5-V to 15-V power supply. When operating from a
single power supply, care must be taken to ensure
the input signal and amplifier are biased appropriately
to maximize output voltage swing. The circuits shown
in Figure 77 demonstrate methods to configure an
amplifier for single-supply operation.
+VS
50 Source
+
VI
49.9
RT
THS4211
VO
499
+VS
Rf
2
Rg
392
392
Rf
392
VS
50 Source
VI
57.6
Rg
392
THS4211
RT
VO
+VS
+VS
+VS
2
499
DEVICE
ENABLED
Ref + 1.0 V
Ref + 1.8 V
Ref 1.5 V
Ref 1 V
PACKAGES
THS4215D, THS4215DGN, and
THS4215DRB
21
THS4211
THS4215
SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009 ................................................................................................................................... www.ti.com
APPLICATION CIRCUITS
Driving an Analog-to-Digital Converter with the
THS4211
The THS4211 can be used to drive high-performance
analog-to-digital converters. Two example circuits are
presented below.
The first circuit (in Figure 78) uses a wideband
transformer to convert a single-ended input signal into
a differential signal. The differential signal is then
amplified and filtered by two THS4211 amplifiers.
This circuit provides low intermodulation distortion,
suppressed even-order distortion, 14 dB of voltage
gain, a 50- input impedance, and a single-pole filter
at 100 MHz. For applications without signal content at
dc, this method of driving ADCs can be very useful.
Where dc information content is required, the
THS4500 family of fully differential amplifiers may be
applicable.
22
5V
VCM
THS4211
_
50
(1:4 )
Source 1:2
196
-5 V
392
24.9
ADS5422
15 pF
14-Bit, 62 Msps
15 pF
196
24.9
392
_
THS4211
VCM
+5 V
VI
49.9
RT
RISO
0.1 F
THS4211
-5 V
16.5
68 pf
12-Bit,
1.82 k
Rg
ADS807
CM 53 Msps
IN
Rf
392
IN
0.1 F
392
THS4211
THS4215
www.ti.com ................................................................................................................................... SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009
3.3 V 3.3 V
100
3.9 pF
392
100
50 Source
392
+5 V
392
DAC5675
14-Bit,
400 MSps
196
VI
49.9
392
RF
5V
57.6
THS4211
49.9
THS4211
392
-5 V
392
VO
LO
33 pF
-5 V
3.3 V 3.3 V
_
100
100
100
CF
1 nF
VI+
1 nF
49.9
IF+
DAC5675
14-Bit,
400 MSps
392
100
392
392
49.9
392
49.9
RF(out)
392
787
IF1 nF
1 nF
VO+
100
392
CF
_
+
THS4211
VI-
100
49.9
VO-
space
space
space
23
THS4211
THS4215
SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009 ................................................................................................................................... www.ti.com
The
THS4211
features
execllent
distortion
performance for monolithic operational amplifiers.
This section focuses on the fundamentals of
distortion, circuit techniques for reducing nonlinearity,
and methods for equating distortion of operational
amplifiers to desired linearity specifications in RF
receiver chains.
Rg2
Rf2
THS4211
_
Rf1
Rg1
_
100
Rf1
THS4211
49.9
VO
THS4211
Rg2
49.9
Rf2
VI+
2R f1
V i)V i R f2
VO + 1 1 )
2
Rg1
Rg2
(1)
PO
PO
fc = fc - f1
Power
100
VI-
fc = f2 - fc
IMD3 = PS - PO
PS
fc - 3f
space
PS
f1 fc
f2
fc + 3f
f - Frequency - MHz
Figure 85.
24
THS4211
THS4215
www.ti.com ................................................................................................................................... SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009
OIP 3 + P O )
POUT
(dBm)
1X
P O + 10 log
OIP3
IMD2 where
3
2RL
(2)
V 2P
0.001
(3)
PO
NOISE ANALYSIS
PIN
(dBm)
IIP3
IMD3
3X
PS
Figure 86.
Due to the intercept point's ease of use in system
level calculations for receiver chains, it has become
the
specification
of
choice
for
guiding
distortion-related design decisions. Traditionally,
these systems use primarily class-A, single-ended RF
amplifiers as gain blocks. These RF amplifiers are
typically designed to operate in a 50- environment.
Giving intercept points in dBm implies an associated
impedance (50 ).
However, with an operational amplifier, the output
does not require termination as an RF amplifier
would. Because closed-loop amplifiers deliver signals
to their outputs regardless of the impedance present,
it is important to comprehend this when evaluating
the intercept point of an operational amplifier. The
THS4211 yields optimum distortion performance
when loaded with 150 to 1 k, very similar to the
input impedance of an analog-to-digital converter
over its input frequency band.
As a result, terminating the input of the ADC to 50
can actually be detrimental to system performance.
The discontinuity between open-loop, class-A
amplifiers and closed-loop, class-AB amplifiers
becomes apparent when comparing the intercept
points of the two types of devices. Equation 2 and
Equation 3 define an intercept point, relative to the
intermodulation distortion.
ENI
+
RS
ERS
IBN
EO
4kTRS
Rf
Rg
4kT
Rg
IBI
ERF
4kTRf
4kT = 1.6E-20J
at 290K
(4)
25
THS4211
THS4215
SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009 ................................................................................................................................... www.ti.com
E NI 2 ) I BNRS ) 4kTR S )
INGR ) 4kTR
NG
BI
0.5
VS =5 V
R(ISO) = 10
CL = 100 pF
(5)
Normalized Gain - dB
EO +
FREQUENCY RESPONSE
vs
CAPACITIVE LOAD
0
-0.5
R(ISO) = 15
CL = 50 pF
-1
-1.5
R(ISO) = 25
CL = 10 pF
-2
-2.5
-3
100 k
1M
10 M
100 M
1G
Capacitive Load - Hz
BOARD LAYOUT
Achieving optimum performance with a high
frequency amplifier like the THS4211 requires careful
attention to board layout parasitics and external
component types.
Recommendations that optimize performance include
the following:
1. Minimize parasitic capacitance to any ac
ground for all of the signal I/O pins. Parasitic
capacitance on the output and inverting input pins
can cause instability: on the noninverting input, it
can react with the source impedance to cause
unintentional band limiting. To reduce unwanted
capacitance, a window around the signal I/O pins
should be opened in all of the ground and power
planes around those pins. Otherwise, ground and
power planes should be unbroken elsewhere on
the board.
2. Minimize the distance (< 0.25) from the
power supply pins to high frequency 0.1-F
decoupling capacitors. At the device pins, the
ground and power plane layout should not be in
close proximity to the signal I/O pins. Avoid
narrow power and ground traces to minimize
inductance between the pins and the decoupling
capacitors. The power supply connections should
always be decoupled with these capacitors.
Larger (2.2-F to 6.8-F) decoupling capacitors,
effective at lower frequency, should also be used
on the main supply pins. These may be placed
somewhat farther from the device and may be
shared among several devices in the same area
of the PCB.
space
space
26
THS4211
THS4215
www.ti.com ................................................................................................................................... SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009
27
THS4211
THS4215
SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009 ................................................................................................................................... www.ti.com
Thermal
Pad
Single or Dual
68 Mils x 70 Mils
(Via Diameter = 13 Mils)
(6)
THS4211
THS4215
www.ti.com ................................................................................................................................... SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009
3.5
8-Pin DGN Package
3
2.5
2
DESIGN TOOLS
Performance vs Package Options
The THS4211 and THS4215 are offered in a different
package options. However, performance may be
limited due to package parasitics and lead inductance
in some packages. In order to achieve maximum
performance of the THS4211 and THS4215, Texas
Instruments recommends using the leadless MSOP
(DRB) or MSOP (DGN) packages, in addition to
proper high-speed PCB layout. Figure 92 shows the
unity-gain frequency response of the THS4211 using
the leadless MSOP, MSOP, and SOIC package for
comparison. Using the THS4211 and THS4215 in a
unity-gain with the SOIC package may result in the
device becoming unstable. In higher gain
configurations, this effect is mitigated by the reduced
bandwidth. As such, the SOIC is suitable for
application with gains equal to or higher than +2 V/V
or (1 V/V).
12
_
10
499
49.9
6
4
SOIC, Rf = 100
2
0
-2
8-Pin D Package
PIN = -7 dB
VS =5 V
-4
1.5
SOIC, Rf = 0
Rf
8
Normalized Gain - dB
THERMAL ANALYSIS
10 M
1G
f - Frequency - Hz
1
0.5
0
-40
-20
0
20
40
60
TA - Ambient Temperature - C
80
29
THS4211
THS4215
SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009 ................................................................................................................................... www.ti.com
17
15
13
Rf
Rf = 50
9
7
Rf = 200
3
1
-1
-3
-5
PIN = -7 dBm
VS = 5 V
10 M
100 M
1G
10 G
f - Frequency - Hz
30
499
49.9
2
1
0
-1
-2
PIN = -7 dBm
VS = 5 V
-3
-4
100 k
1M
10 M
100 M
f - Frequency - Hz
1G
10 G
Rf = 100
W)T
Rf = 0
499
49.9
11
where
W = Width of trace in inches.
= Length of the trace in inches.
T = Thickness of the trace in inches.
K = 5.08 for dimensions in inches, and K = 2 for dimensions
in cm.
(8)
space
THS4211
THS4215
www.ti.com ................................................................................................................................... SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009
Vs+
J9
Power Down
R8
C8
R9
R5
Vs -
Vs+
7 8
2 _
R3
J1
Vin -
U1
R6
J4
Vout
3 +
R2
R7
4 1
Vs -
J2
Vin+
J8
Power Down Ref
C7
R1
R4
J7
VS-
J6
GND
J5
VS+
TP1
FB1
FB2
VS-
C5
C6
VS+
C1
C2
+
C3
C4
31
THS4211
THS4215
SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009 ................................................................................................................................... www.ti.com
Vs+
7 8
2 _
U1
R6
J4
Vout
3 +
R7
4 1
J2
Vin+
Vs R4
J7
VS-
J6
GND
J5
VS+
TP1
FB1
FB2
VS-
C5
VS+
C1
C6
C2
+
C3
C4
32
THS4211
THS4215
www.ti.com ................................................................................................................................... SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009
33
THS4211
THS4215
SLOS400E SEPTEMBER 2002 REVISED SEPTEMBER 2009 ................................................................................................................................... www.ti.com
space
REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (November, 2004) to Revision E .......................................................................................... Page
Changed high output drive (IO) bullet in Features list from 200 mA to 170 mA ................................................................... 1
Changed Absolute Maximum Ratings table; increased output current specification, deleted lead temperature
specification .......................................................................................................................................................................... 2
34
www.ti.com
10-Jun-2014
PACKAGING INFORMATION
Orderable Device
Status
(1)
Eco Plan
Lead/Ball Finish
(2)
(6)
(3)
Op Temp (C)
Device Marking
(4/5)
THS4211D
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
4211
THS4211DG4
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
4211
THS4211DGK
ACTIVE
VSSOP
DGK
80
Green (RoHS
& no Sb/Br)
CU NIPDAU |
CU NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
BEJ
THS4211DGN
ACTIVE
MSOPPowerPAD
DGN
80
Green (RoHS
& no Sb/Br)
CU NIPDAU |
CU NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
BFN
THS4211DGNR
ACTIVE
MSOPPowerPAD
DGN
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU |
CU NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
BFN
THS4211DGNRG4
ACTIVE
MSOPPowerPAD
DGN
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
BFN
THS4211DR
ACTIVE
SOIC
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
4211
THS4211DRBR
ACTIVE
SON
DRB
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
4211
THS4211DRBT
ACTIVE
SON
DRB
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
4211
THS4211DRBTG4
ACTIVE
SON
DRB
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
4211
THS4211DRG4
ACTIVE
SOIC
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
4211
THS4215D
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
4215
THS4215DGK
ACTIVE
VSSOP
DGK
80
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
BEZ
THS4215DGN
ACTIVE
MSOPPowerPAD
DGN
80
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
BEQ
THS4215DR
ACTIVE
SOIC
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
4215
THS4215DRBR
ACTIVE
SON
DRB
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
4215
THS4215DRBT
ACTIVE
SON
DRB
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
4215
Addendum-Page 1
Samples
www.ti.com
10-Jun-2014
(1)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
13-Mar-2014
Device
THS4211DGNR
MSOPPower
PAD
THS4211DR
THS4211DRBR
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
DGN
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
SOIC
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
SON
DRB
3000
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
THS4211DRBT
SON
DRB
250
180.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
THS4215DR
SOIC
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
THS4215DRBR
SON
DRB
3000
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
THS4215DRBT
SON
DRB
250
180.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
Pack Materials-Page 1
13-Mar-2014
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
THS4211DGNR
MSOP-PowerPAD
DGN
2500
364.0
364.0
27.0
THS4211DR
SOIC
2500
367.0
367.0
35.0
THS4211DRBR
SON
DRB
3000
338.1
338.1
20.6
THS4211DRBT
SON
DRB
250
210.0
185.0
35.0
THS4215DR
SOIC
2500
367.0
367.0
35.0
THS4215DRBR
SON
DRB
3000
338.1
338.1
20.6
THS4215DRBT
SON
DRB
250
210.0
185.0
35.0
Pack Materials-Page 2
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