Edc Lab Record 15-10-2014.2

Electronic Devices & Circuits Lab II B.Tech I Semester DEPT.
OF ECE

SRI SAI ADITYA INSTITUTE OF SCIENCE AND TECHNOLOGY 0

LIST OF EXPERIMENTS PAGE NO
1. PN JUNCTION DIODE CHARACTERISTICS
A.GE Diode Forward bias & Reverse bias
B.SI Diode Forward bias & Reverse bias
2. ZENER DIODE CHARACTERISTICS
A.V-I Characteristics
B. Zener diode as voltage regulator
3. RECTIFIERS (WITHOUT AND WITH C-FILTER)
A. Half- wave rectifier
B.Full-wave rectifier
4. CRO OPERATION AND ITS MEASUREMENTS
COMMON BASE CHARACTERISTICS (OPTIONAL)
5. COMMON EMITTER CHARACTERISTICS
6. FET CHARACTERISTICS
7. CE AMPLIFIER
8. EMITTER FOLLOWER -CC AMPLIFIER
9. UJT CHARACTERISTICS
10. FET AMPLIFIER
11. SCR CHARACTERISTICS

Electronic Devices & Circuits Lab II B.Tech I Semester DEPT. OF ECE




LAB INTERNAL EVALUATION

S.No

Name of the Experiment

Date

Remarks



CIRCUIT DIAGRAM:

MODEL GRAPH:



EXP No: Date:
PN JUNCTION DIODE CHARACTERISTICS

AIM:
To study & plot the V-I characteristics of a given P-N junction diode in both forward bias and reverse
bias and find the static and dynamic resistance of the given P-N diode.
Part A: Germanium Diode(forward bias and reverse bias)
Part B: SiliconDiode(forward bias and reverse bias)

APPARATUS:
EQUIPMENT/COMPONENT SPECIFICATIONS QUANTITY
PN Junction Diode(Ge) IN34A 1
PN Junction Diode(Si) IN4007 1
Resistor 470 1
Bread Board General purpose 1
DC Voltmeter
0-1V 1
0-20V 1
DC Ammeters
0-100mA 1
0-500A 1
Regulated power supply 0-30V 1
Connecting wires 1set few

THEORY:

A p-n junction diode conducts only in one direction. The V-I characteristics of the diode are
curve between voltage across the diode and current through the diode. When external voltage is zero,
circuit is open and the potential barrier does not allow the current to flow. Therefore, the circuit current
is zero. When P-type (Anode )is connected to +ve terminal and n- type (cathode) is connected to ve
terminal of the supply voltage, is known as forward bias. The potential barrier is reduced when diode is
in the forward biased condition. At some forward voltage, the potential barrier altogether eliminated
and current starts flowing through the diode and also in the circuit. The diode is said to be in ON state.
The current increases with increasing forward voltage.
When N-type (cathode) is connected to +ve terminal and P-type (Anode) is connected ve
terminal of the supply voltage is known as reverse bias and the potential barrier across the junction
increases. Therefore, the junction resistance becomes very high and a very small current (reverse
saturation current) flows in the circuit. The diode is said to be in OFF state. The reverse bias current due
to the minority charge carriers.


GERMANIUM DIODETABULAR FORMS:
(FORWARD BIAS):
S.No
Forward bias voltage(Vf )
in volts .
Forward bias
current(If)in mA.
1
2
3
4
5
6
7
8
9
10

(REVERSE BIAS:

S.No
Reverse bias voltage(Vr )
in volts.
Reverse bias current(Ir)
in A.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16


CUT-IN VOLTAGE:
By the term cut-in voltage, indicated by V
, is meant the voltage below which the current is

very small. As the voltage exceeds cut-in voltage, the current increases very rapidly. The cut-in voltage
is sometimes called offset voltage, break point voltage or threshold voltage.
Cut-in voltage for germanium diode is 0.2 V and about 0.6V for silicon diode.
DYNAMIC (ac) RESISTANCE:
The a.c. resistance of a diode, at a particular D.C. voltage, is equal to the reciprocal of the slope
of the characteristic at that point, i.e. the a.c. resistance, r
ac
= V/I. The resistance offered by the diode
to an a.c. signal is called its dynamic or a.c. resistance. The resistance we calculated using the relation
V/I is called the ac or dynamic resistance(r).
Hence we will refer to the ac resistance of the diode as r
D
where the lower case letter r is in
keeping with the convention of using lower case letters for ac quantities. Thus r
ac=
V/I .
The a.c. resistance of a diode, at a particular D.C. voltage, is equal to the reciprocal of the slope of the
characteristic at that point. The value of a.c. resistance of a diode is in range of 1 to 25.usually, it is
smaller than the D.C. Resistance of a diode.
STATIC (dc) RESISTANCE:
When dc voltage is applied across the diode certain dc current will flow through it. The dc
resistance of a diode is found by dividing the dc voltage across it by the dc current through it. Thus the
dc resistance also called the static resistance is found by direct application of ohms law. This denoted
by R
D
. R
D =
V/I .
The static resistance of diode is quite low (in ohms)
PROCEDURE:
Forward Characteristics:
Germanium diode:
1. Connect the circuit as per the circuit diagram.
2. Increase source voltage V
F
in steps of 0.1 V
3. Note down the corresponding Ammeter readings for every incremented value of V
F
.
4. Tabulate the values and plot a graph with V
F
on x-axis and I
F
on y-axis.
5.Repeat the same steps from 1-4 for Silicon diode.
Reverse Characteristics:
Germanium diode:
R
in steps of 1 V
3. Note down the corresponding Ammeter readings for every incremented value of V
R
.
R
on x-axis and I
R
on y-axis.
V =(V
2
-V
1
) Small Change in forward voltage.


SILICON DIODETABULAR FORMS:
(FORWARD BIAS):
S.No
Forward bias voltage(Vf )
in volts .
Forward bias
current(If)in mA.
1
2
3
4
5
6
7
8
9
10
11
12

REVERSE BIAS:

S.No
Reverse bias voltage(Vr )
in volts.
Reverse bias current(Ir)
in A.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16



I = (I
2
-I
1
) Small Change in reverse Current.
5.Repeat the same steps from 1-4 for Silicon diode.

CALCULATIONS:

Static forward resistance, R
f
= V
F
/ I
F

For Germanium diode =

For Silicon diode =
Static reverse resistance, R
r
= V
R
/ I
R


For Silicon diode =
Dynamic forward resistance = V
F
/ I
F


For Silicon diode =
Dynamic reverse resistance = =V
R
/ I
R


For Silicon diode =
Cut-in voltage of given diode

For Silicon diode =

PRECAUTIONS:
1. Avoid loose connections.
2. Care must be taken that all the sources and meters are connected with correct polarity.
3. Before connecting the meter,ensure that it indicates zero reading.
4.Voltmeter reading should not exceed 0.9v for forward bias and 15v for reverse bias.

RESULT:


CIRCUIT DIAGRAM:

MODEL GRAPH:



EXP No: Date:
ZENER DIODE CHARACTERISTICS

AIM:
1. To study& plot the V-I characteristics of given Zenerdiodeand voltage regulator
Part A :Zener break down voltage
Part B :Line regulation and load regulation.
APPARATUS:
Zener diode 1MZ6.2V, 3watts 1
Resistor
470 1
100 1
Decade Resistance Box 1
Bread Board 1
DC Voltmeter
0-1V 1
0-20V 1
DC Ammeters 0-100mA 2
Connecting wires few

V-I CHARACTERICS OF ZENER
THEORY:
Zener diode is a reverse biased heavily doped silicon or germanium P-N junction diode, which is
operated in the breakdown region. When a zener diode is forward biased its characteristics are just as
those of ordinary diode. As the reverse voltage applied to P-N junction is increased, a value is reached
at which the current increases greatly from its normal cutoff value. This voltage is called a Zener
voltage or breakdown voltage. There are two mechanism of the breakdown

Zener breakdown:
Zener breakdown takes place in very thin junction i.e., when both sides of junctions are very
heavily doped and consequently the depletion layer is narrow. When a small reverse bias voltage is
applied, a very strong electric field is set up across the thin depletion layer. This field is enough to break
or rapture the covalent bonds. Now extremely large number of electrons and holes are produced which
constitute the reverse saturation current. Zener current is independent of the voltage depends only on
the external resistance.



V-I CHARACTERISTICS TABULAR FORMS:
FORWARD CHARACTERISTICS:

S.No
Forward bias
voltage(Vf) in volts
for 6.2V zener
diode
Forward bias
current(If)in
mA
1
2
3
4
5
6
7
8
9
10
11
12
13

REVERSE CHARACTERISTICS:

S.No
Reverse bias
voltage(Vr) in volts
for 6.2V zener
diode
Reverse bias
current(Ir)in
mA
1
2
3
4
5
6
7
8
9
10
11



Avalanche breakdown:
This type of breakdown takes place when both sides of junction are lightly doped and
consequently the depletion layer is large. In this case, the electric field across the depletion layer is not
so strong to produce Zener breakdown. Here, the minority carriers accelerated by the field collide with
the semiconductor atoms in the depletion region. Due to the collision with valance electrons, covalent
bonds are broken and electron hole pairs are generated. These new carriers so produced acquire energy
from applied potential and in turn produce additional carriers. This forms a cumulative process called as
avalanche multiplication. The breakdown is called avalanche breakdown e. This breakdown occurs at
higher reverse voltages.
When the breakdown voltage is reached in zener diode, the current increases rapidly with
additional voltage. As a result, a diode in breakdown maintains an almost constant voltage across itself
over a wide current range. Thus the zener diode is most suited for voltage-regulation.
PROCEDURE:
FORWARD CHARACTERISTICS:
s
in steps of 0.1V
3. Note down the corresponding Ammeter and Voltmeter readings for every incremented value of V
F
.
F
on x-axis and I
F
on y-axis.
REVERSE CHARACTERISTICS:
s
in steps of 0.5 V
3. Note down the corresponding Ammeter and voltmeter readings for every increment of V
s
.
R
on x-axis and I
R
on y-axis.
PRECAUTIONS:
1. Avoid loose connections.
2. Care must be taken that all the sources and meters are connected with correct polarity.
3. Before connecting the meter, ensure that it indicates zero reading.
CALCULATIONS:
Breakdown voltage - - - - - - - - - in volts.



CIRCUIT DIAGRAM

MODEL GRAPH:



ZENER VOLTAGE REGULATOR

THEORY:

Zener diode is a P-N junction diode specially designed to operate in the reverse biased mode. It is acting
as normal diode while forward biasing. It has a particular voltage known as break down voltage, at
which the diode break downs while reverse biased. In the case of normal diodes the diode damages at
the break down voltage. But Zener diode is specially designed to operate in the reverse breakdown
region.The basic principle of Zener diode is the Zener breakdown. When a diode is heavily doped, its
depletion region will be narrow. When a high reverse voltage is applied across the junction, there will
be very strong electric field at the junction. And the electron hole pair generation takes place. Thus
heavy current flows. This is known as Zener break down.

So a Zener diode, in a forward biased condition acts as a normal diode. In reverse biased mode, after the
break down of junction current through diode increases sharply. But the voltage across it remains
constant. This principle is used in voltage regulator using Zener diodes. The figure shows the zener
voltage regulator, it consists of a current limiting resistor RS connected in series with the input voltage
Vs and zener diode is connected in parallel with the load RL in reverse biased condition. The output
voltage is always selected with a breakdown voltage Vz of the diode.

The input source current, I
S
= I
Z
+ I
L
.. (1)

The drop across the series resistance, Rs = Vin Vz .. (2)

And current flowing through it, Is = (Vin V
Z
) / R
S
.. (3)

From equation (1) and (2), we get, (Vin - Vz )/Rs = Iz +I
L
(4)

Regulation with a varying input voltage (line regulation): It is defined as the change inregulated
voltage with respect to variation in line voltage. It is denoted by L
R
.

In this, input voltage varies but load resistance remains constant hence, the load current remains
constant. As the input voltage increases, form equation (3) Is also varies accordingly. Therefore, zener
current Iz will increase. The extra voltage is dropped across the Rs. Since, increased Iz will still have a
constant Vz and Vz is equal to Vout.

The output voltage will remain constant. If there is decrease in Vin, Iz decreases as load current remains
constant and voltage drop across Rs is reduced. But even though Iz may change, Vz remains constant
hence, output voltage remains constant.

Regulation with the varying load (load regulation): It is defined as change in load voltagewith
respect to variations in load current. To calculate this regulation, input voltage is constant and output
voltage varies due to change in the load resistance value.

Consider output voltage is increased due to increasing in the load current. The left side of the equation
(4) is constant as input voltage Vin, IS and Rs is constant. Then as load current changes, the zener
current Iz will also change but in opposite way such that the sum of Iz and I
L
will remain constant.
Thus, the load current increases, the zener current decreases and sum remain constant. Form reverse
bias characteristics even Iz changes, Vz remains same hence, and output voltage remains fairly
constant.



LOAD REGULATION (INPUTV
I
=12V fixed)

S.No
Load resistance
R
L
(V)
Zener current
I
Z
(mA)
Load current
I
L
(mA)
Output voltage
V
O
(V)
% Regulation
1

2

3

4

5

6

7

8

9

10

11

12

13



PROCEDURE:
Static characteristics:
1. Connections are made as per the circuit diagram.
2. The Regulated power supply voltage is increased in steps.
3. The Zener current (l
z
), and the Zener voltage (V
z
) are observed and then noted in the tabular form.
4. A graph is plotted between Zener current (I
z
) and Zener voltage (V
z
).

Regulation characteristics:
1. The voltage regulation of any device is usually expressed as percentage regulation
2. The percentage regulation is given by the formula
((V
NL
-V
FL
)/V
FL
)X100
V
NL
=Voltage across the diode, when no load is connected.
V
FL
=Voltage across the diode, when load is connected.
3. Connection are made as per the circuit diagram
4. The load is placed in full load condition and the Zener voltage (V
z
), Zener current (l
z
), load current
(I
L
) are measured.
5. The above step is repeated by decreasing the value of the load in steps.
6. All the readings are tabulated.
7. The percentage regulation is calculated using the above formula.

PRECAUTIONS:
1. The terminals of the Zener diode should be properly identified.
2. While determined the load regulation, load should not be immediately shorted.
3. Should be ensured that the applied voltages & currents do not exceed the ratings of the diode.

RESULT:



CIRCUIT DIAGRAM:

WITHOUT FILTER:

WITH FILTER:



EXP No: Date:

HALF WAVE RECTIFIER
AIM:
To find the ripple factor, % regulation of the half wave rectifier and also to display the output
waveform in the CRO.
APPARATUS:

CRO 1
Step down transformer 230/12V 1
Diode IN4007 1
Multimeter 1
Capacitor 1000F 1
Bread Board 1

THEORY:
Electronic equipment needs for its operation both alternative current and direct current. The AC
power is available to us through the distribution network of state electricity board. We get DC power by
changing AC power to DC power using rectifiers.
There are 3 basic rectifiers.
Half Wave Rectifiers
Full Wave Rectifiers
Bridge Wave Rectifiers
HALF WAVE RECTIFIER
It converts an AC voltage into a pulsating DC voltage using only one half of the applied AC
voltage. The rectifying diode conducts during one half of AC cycle only. During the remaining half
cycle of the input signal, the anode of diode becomes more positive with respect to the cathode and
hence diode D conducts. During negative half cycle of the input signal, the anode of diode becomes
negative with respect to the cathode and hence diode D does not conduct.



TABULAR FORM:
WITHOUT FILTERNoloadvoltageV
dcNL
= volts

S. No.
Load
Resistance
in Ohms

Ripple Factor
=Vac/vdc
% of Regulation

1
2
3
4
5
6
7
8
9
10

WITH FILTER NoloadvoltageV
dcNL
= volts

S. No.
Load
Resistance
In Ohms

Ripple
Factor =
% of Regulation

1
2
3
4
5
6
7
8
9
10



RIPPLE FACTOR:
The ratio of the rms value of the AC component to the DC component in the output is known as
Ripple Factor.

PEAK INVERSE VOLTAGE(PIV):
It is defined as the maximum reverse voltage that a diode can with stand without destroying the
junction. The PIV across a diode is the peak of the negative half cycle. For half wave rectifier, PIV is
V
m
.

PROCEDURE:

2. Connect the primary side of the transformer to ac mains and the secondary side to the rectifier
input.
3. The decade resistance box is set in different resistance values. By using multimeter, measure the ac
input voltage of the rectifier and ac and dc voltage at the output of the rectifier.
4. Ripple factor and % regulation are calculated as per the formula

Ripple factor=RMS voltage of ac components at output/DC voltage

%Regulation =(( V
NL
-V
FL
)/ V
FL
)X100

5.Capacitor filter is put in the parallel to the DRB plus 20 ohms and the above process
is repeated.



MODEL GRAPH:

LOAD CHARECTERISTICS
With Out Filter

With Filter



PRECAUTIONS:
1. The primary and secondary side of the transformer should be carefully identified
2. The polarities of all the diodes should be carefully identified.

RESULT:



CIRCUIT DIAGRAM:
WITHOUT FILTER

WITH FILTER



FULL WAVE RECTIFIER
AIM:
To find the ripple factor, % regulation of the full wave rectifier and also to display the output
waveform in the CRO.
APPARATUS:

Step down transformer 230/12V 1
Diode IN4007 4
Multimeter 1
Capacitor 1000F 1
Connecting wires
Bread Board 1
CRO

THEORY:
Electronic equipment needs for its operation both alternative current and direct current. The
AC power is available to us through the distribution network of state electricity board. We get DC
power by changing AC power to DC power using rectifiers.
There are 3 basic rectifiers.
Half Wave Rectifiers
Full Wave Rectifiers
Bridge Wave Rectifiers
Rectifier is defined as an electronic device used for converting ac voltage into
unidirectional voltage. It uses four diodes and load resistance RL. The secondary of the transformer is
being connected to the bridge formed by. the four diodes as shown. The output load R
L
is connected in
between the terminals as shown. The output V
o
can be taken across the load R
L
.
During the positive portion of the cycle, the transformer polarity is in such a way those diodes 1 and 3
are conducting and the current passes through the load.
During the next half cycle the polarities of the transformer are changed and this causes 2 and 4 are
forward biased and the rest of two are reverse biased. Now the current passes in the same direction as in
previous cycle. To reduce the ripples after rectification a capacitor filter is used.



TABULAR FORM:
Without Filter Noload voltage V
dcNL
= volts

S. No.
Load
Resistance
in Ohms

Ripple Factor

% of Regulation

1
2
3
4
5
6
7
8
9
10

With Filter Noload voltage V
dcNL
= volts

S. No.
Load
Resistance
in Ohms

Ripple
Factor =
% of Regulation

1
2
3
4
5
6
7
8
9
10



RIPPLE FACTOR:
The ratio of the rms value of the AC component to the DC component in the output is known as
Ripple Factor.
PEAK INVERSE VOLTAGE (PIV):
It is defined as the maximum reverse voltage that a diode can with stand without destroying the
junction. The PIV across a diode is the peak of the negative half cycle. For full wave bridge rectifier,
PIV is 2V
m
.
PROCEDURE:
2. Connect the primary side of the transformer to ac mains and the secondary side to the rectifier
input.
3.The decade resistance box is set in different resistance values. By using multimeter, measure the ac
input voltage of the rectifier and ac and dc voltage at the output of the rectifier.
4. Ripple factor and % regulation are calculated as per the formula:

Ripple factor=RMS voltage of ac components at output/DC voltage
%Regulation =(( V
NL
-V
FL
)/ V
FL
)X100

5.Capacitor filter is put in the parallel to the DRB plus 20 ohms and process is repeated.



MODEL GRAPH:

LOAD CHARECTERISTICS
With filter

Without filter



PRECAUTIONS:

1. The primary and secondary side of the transformer should be carefully identified
2. The polarities of all the diodes should be carefully identified.

RESULT:



BLOCK DIAGRAM:



EXP No: Date:

CRO OPERATION AND ITS MEASUREMENT

AIM:- To study the different waveforms, to measure peak and rms voltages and thefrequency
of A.C.

APPARATUS:-

EQUIPMENT/COMPONENT QUANTITY
Oscilloscope 1
Function generator 2
probes 4

THEORY:- Cathode ray oscilloscope is one of the most useful electronic equipment,which gives a
visual representation of electrical quantities, such as voltage and current waveforms in an electrical
circuit. It utilizes the properties of cathode rays of being deflected by an electric and magnetic
fields and of producing scintillations on a fluorescent screen. Since the inertia of cathode rays is
very small, they are able to follow the alterations of very high frequency fields and thus electron
beam serves as a practically inertia less pointer. When a varying potential difference is established
across two plates between which the beam is passing, it is deflected and moves in accordance with
the variation of potential difference. When this electron beam impinges upon a fluorescent screen, a
bright luminous spot is produced there which shows and follows faithfully the variation of potential
difference.

When an AC voltage is applied to Y-plates, the spot of light moves on the screen vertically up
and down in straight line. This line does not reveal the nature of applied voltage waveform. Thus to
obtain the actual waveform, a time-base circuit is necessary. A time-base circuit is a circuit which
generates a saw-tooth waveform. It causes the spot to move in the horizontal and vertical direction
linearly with time. When the vertical motion of the spot produced by the Y-plates due to alternating
voltage, is superimposed over the horizontal sweep produced by X-plates, the actual waveform is
traced on the screen.



MODEL WAVE FORMS:



SETTING UP AN OSCILLOSCOPE:

Oscilloscopes are complex instruments with many controls and they require some care to
set up and use successfully. It is quite easy to 'lose' the trace off the screen if controls are
set wrongly.

There is some variation in the arrangement and labeling of the many controls. So,
the following instructions may be adapted for this instrument.

1. Switch on the oscilloscope to warm up (it takes a minute or two).
2. Do not connect the input lead at this stage.
3. Set the AC/GND/DC switch (by the Y INPUT) to DC.
4. Set the SWP/X-Y switch to SWP (sweep).
5. Set Trigger Level to AUTO.
6. Set Trigger Source to INT (internal, the y input).
7. Set the Y AMPLIFIER to 5V/cm (a moderate value).
8. Set the TIMEBASE to 10ms/cm (a moderate speed).
9. Turn the time base VARIABLE control to 1 or CAL.
10. Adjust Y SHIFT (up/down) and X SHIFT (left/right) to give a trace across the
middle of the screen, like the picture.
11. Adjust INTENSITY (brightness) and FOCUS to give a bright, sharp trace.

PROCEDURE:-

MEASUREMENT OF D.C.VOLTAGE: -
1. Connect DC voltage to the X-plates or horizontal input connector.
2. Adjusttheheight of the figure displayed on the screen, suitably by adjusting the gain
controls.
3. Adjust the time volts/division knob so as to get clear output on the screen.
4. Note down the height(h) from the zero corresponds to the number of divisions on the Y-
axis and the value of volts/divisions(d) on the front panel of CRO.
5. Compute the DC voltage by given formula.



DC VOLTAGE MEASUREMENT :

Height in cm (h) =

Value of volts/divisions in v/cm(d) =

DC Voltage h*d =



MEASUREMENT OF A.C VOLTAGE: -
1. Connect AC voltage to the X-plates or horizontal input connector.
2. Adjustthe size of the sine wave displayed on the screen, suitably by adjusting the gain
controls.
3. Adjust thevolts/division and time base frequency knobs so as to accommodate one, two or
more cycles of the sine/square/triangular signal.
4. Tabulate the vertical height (h) i.e. peak-to-peak height of the output signal on the screen
and the value of volts/divisions(d) on the front panel of CRO.
5. Compute the AC voltage by given formula.

MEASUREMENT OF FREQUENCY: -
1. Connect unknown frequency from signal generator to the X-plates or horizontal input
connector.
2. Adjustthe size of the sine wave displayed on the screen, suitably by adjusting the gain
controls.
3. Adjust thevolts/division and time base frequency knobs so as to accommodate one, two or
more cycles of the sine/square/triangular signal.
4. Tabulate the horizontal length(l) between two successive peaks of the output signal on the
screen andthe value of volts/divisions(d) on the front panel of CRO.
5. Compute the frequency by given formula.

PHASE MEASUREMENT
1.The connections are made as shown in the circuit with C=10F and R=1K.
. 2.The time base (X-plates) band switch is kept in external mode.
3.The gain band switch of Y-plates is kept in desired range,
4.The maximum deflection (B) from the mean position and the deflection (A) at t = 0, from the
mean position of a circle are measured using the divisions on the screen.
5.Compute Phase difference by given formula.



TABLE-1:ACVOLTAGE MEASUREMENT :

S.No Peak to peak Voltage Peak to Peak voltage Rms Voltage Measured voltage

(Vertical) Sensitivity. peak V
o
=(2V
o
/2)

with

V
rms
=(V
o
/ 2 )

length. (Volt/Div) Voltage (volts) Multi-meter

(volts)

(Divisions) (n) 2V
o
=nxh

(volts)

(h) (volts)

1.

2.

3.

4.

5.

TABLE-2:FREQUENCY MEASUREMENT :

S.No. Peak to peak Time-base Time-period Measured Applied
(Horizontal) Sec/Div T = mxl frequency Frequency
length (m) Sec. f = 1/T Hz
(Divisions) (l) Hz
1.
2.
3.
4.
5.
6.

PHASE MEASUREMENT:
Height of A =
Height of B =
=Sin
-1
[A/B] =



PRECAUTIONS:- 1) The continuity of the connecting wires should be tested first.

2) The frequency of the signal generator should be varied such that steady wave form is formed.

RESULTS:



CIRCUIT DIAGRAM:

MODEL GRAPHS:



EXP No: Date:
COMMON BASE CHARACTERISTICS
AIM:
To plot the input and output characteristics of a transistor in common base configuration.
APPARATUS:
Transistor BC107 1
Resistor
100 1
1K 1
Bread Board 1
DC Voltmeter
0-1V 1
0-20V 1
Connecting wires
Multimeter 1

THEORY:
A transistor is a three terminal active device. The terminals are emitter, base and collector. In
CB configuration, the base is common to both input (emitter) and output (collector). For normal
operation, the E-B junction is forward biased and C-B junction is reverse biased.
In CB configuration, I
E
is +ve, I
C
is ve and I
B
is ve. So,
V
EB=
f1 (V
CB,
I
E
) and
I
C=
f2 (V
CB,
I
B)
With an increasing the reverse collector voltage, the space-charge width at the output junction
increases and the effective base width W decreases. This phenomenon is known as Early effect.
Then, there will be less chance for recombination within the base region. With increase of charge
gradient within the base region, the current of minority carriers injected across the emitter junction
increases. The current amplification factor of CB configuration is given by,
= I
C
/ I
E
PROCEDURE:
INPUT CHARACTERISTICS:
2. For plotting the input characteristics, the output voltage V
CE
is kept constant at 0V and for different
values of V
BE
, note down the values of I
E
.


TABULAR FORMS:
INPUT CHARACTERISTICS

OUTPUT CHARACTERISTICS

S.No
VCB =Open VCB =5 V VCB =10 V
VEB(v)
IE(mA
)
VEB(v) IE(mA) VEB(v) IE(mA)
1

2

3

4

5

6

7

8

9

10

11

S.No
IE = 5 mA IE = 10 mA IE = 15 mA
V CB(V) IC(mA) VCB(V) IC (mA) VCB(V) IC (mA)
1
2
3
4
5
6
7
8
9
10
11



3. Repeat the above step keeping V
CB
at 5V and 10V.All the readings are tabulated.
4. A graph is drawn between V
EB
and I
E
for constant V
CB.

OUTPUT CHARACTERISTICS:
2. For plotting the output characteristics, the input I
E
is kept constant at 5mA and for different values
of V
CB
C.

3. Repeat the above step for the values of I
E
at 10mA and 20mA, all the readings are tabulated.
CB
(V)and I
c
for constant I
E

PRECAUTIONS:
1. The supply voltages should not exceed the rating of the transistor.
2. Meters should be connected properly according to their polarities.

RESULT:



CIRCUIT DIAGRAM:

MODEL GRAPHS:



EXP No: Date:
COMMON EMITTER CHARACTERISTICS
AIM:
To plot the input and output characteristics of a transistor in common emitter configuration.
APPARATUS
Transistor BC107 1
Resistor 10K 1
Resistor 1K 1
Bread Board 1
DC Voltmeter
0-2V 1
0-30V 1
DC Ammeters
0-100mA 1
0-500A 1

THEORY
A transistor is a three terminal device. The terminals are emitter, base and collector. In
common emitter configuration, input voltage is applied between base and emitter terminals and out
put is taken across the collector and emitter terminals.
Therefore the emitter terminal is common to both input and output.
The input characteristics resemble that of a forward biased diode curve. This is expected since
the Base-Emitter junction of the transistor is forward biased. As compared to CB arrangement I
B
increases less rapidly with V
BE .
Therefore input resistance of CE circuit is higher than that of CB
circuit.
The output characteristics are drawn between I
c
and V
CE
at constant I
B.
the collector current
varies with V
CE
up to few volts only. After this the collector current becomes almost constant, and
independent of V
CE.
The value of V
CE
up to which the collector current changes with V
CE
is known as
Knee voltage. The transistor always operated in the region above Knee voltage, I
C is
always constant
and is approximately equal to I
B.

The current amplification factor of CE configuration is given by
= I
C
/I
B



TABULAR FORMS:
INPUT CHARACTERISTICS

OUTPUT CHARACTERISTICS

S.No
VCE=Open VCE=1 V VCE=2 V
VBE(v) IB(mA) VBE(v) IB(mA) VBE(v) IB(mA)
1

2

3

4

5

6

7

8

9

10

S.No
IB= 50 A IB= 70 A IB= 100 A
VCE (V) IC(mA) VCE (V) IC (mA) VCE (V) IC (mA)
1

2

3

4

5

6

7

8

9

10

11



The two sets of characteristics are necessary to describe the behavior of the CE configuration
one for input or base emitter circuit and other for the output or collector emitter circuit.
In input characteristics the emitter base junction forward biased by a very small voltage V
BB
where as collector base junction reverse biased by a very large voltage V
CC
. The input characteristics
are a plot of input current I
B
Verses the input voltage V
BE
for a range of values of output voltage V
CE
.
The following important points can be observed from these characteristic curves.
1. The characteristics resemble that of CB configuration.
2. Input resistance is high as I
B
increases less rapidly with V
BE

3. The input resistance of the transistor is the ratio of change in base emitter voltage V
BE
to
change in base current I
B
at constant collector emitter voltage V
CE
i.e... Input resistance or
input impedance h
ie
= V
BE
/ I
B
at V
CE
constant.
OUTPUT CHARACTERISTICS:
A set of output characteristics or collector characteristics are a plot of output current I
C
Verses
output voltage V
CE
for a range of values of input current I
B
.The following important points can be
observed from these characteristic curves.
The transistor always operates in the active region. i.e. the collector current I
C
increases with
V
CE
very slowly. For low values of the V
CE
the I
C
increases rapidly with a small increase in V
CE
.The
transistor is said to be working in saturation region.
Output resistance is the ratio of change of collector emitter voltage V
CE ,
to change in collector
current I
C
with constant I
B.
Output resistance or Output impedance h
oe
= V
CE
/ I
C
at I
B
constant.

Input Impedance h
ie
= V
BE
/ I
B
at V
CE
constant
Output impedance h
oe
= V
CE
/ I
C
at I
B
constant
Reverse Transfer Voltage Gain h
re
= V
BE
/ V
CE
at I
B
constant
Forward Transfer Current Gain h
fe
= I
C
/ I
B
at constant V
CE

PROCEDURE:

2. For plotting the input characteristics, the output voltage V
CE
is kept constant at 0V and for
different values of V
BE
. Note down the values of I
B

3. Repeat the above step by keeping V
CE
at 5V and 10V.
4. Tabulate all the readings.
5. plot the graph between V
BE
and I
B
for constant V
CE





OUTPUT CHARACTERSTICS:
2. For plotting the output characteristics, the input I
B
is kept constant at 20A and for different
values of V
CE
C.

3. Repeat the above step for the values of I
B
at 40A and 60A,
4. Tabulate all the readings.
5. plot the graph between V
CE
and I
C
for constant I
B

RESULT:



CIRCUIT DIAGRAM:

MODEL GRAPH:



EXP No: Date:
FET CHARACTERISTCS
AIM:
To plot the drain characteristics and transfer characteristics of JFET.
APPARATUS:

FET BFW10 1
Resistor
33K 1
100 1
Bread Board 1
DC Voltmeter
0-20V 1
0-10V 1
THEORY:
The FET is a device in which the flow of current through the conducting region is
controlled by electric filed hence the name field effect transistor (FET).
JFET PARAMETERS:
The electrical behavior of JFET may be described in terms of certain parameters called
JFET parameters, which are obtained from the characteristics curves.
1. D.Cdrain resistance (R
dS
):
It is also called the static or Ohmic resistance of the channel and is given by the ratio of
voltage (V
ds
) to the drain current (I
D
).
2. A.C drain resistance (R
d
):
It is also called Dynamic drain resistance and the ratio of the A.C. resistance between
the drain and source terminal when the JFET is operating in the Pinch-off or saturation region.
It is given by the ratio of small change in drain to source voltage (V
ds
) to corresponding change
in drain current (I
D
) for a constant gate to source voltage (V
gs
).



OBSERVATIONS:
DRAIN CHARACTERISTICS:
S.no
VGS=0V VGS= 0.5 V VGS= 1 V
VDS(V) ID(mA) VDS(V) ID(mA) VDS(V) ID(mA)
1

2

3

4

5

6

7

8

TRANSFER CHARACTERISTICS:

S.no
VDS= 1 V VDS= 2 V VDS= 3 V
VGS(V) ID(mA) VGS(V) ID(mA) VGS(V) ID(mA)
1

2

3

4

5

6

7

8

9



3. TRANSCONDUCTANCE (g
m
):
It is also called trans conductance or forward transmittance. It is given by the ratio of small
change in drain current ((I
d
) to the corresponding change in gate to source voltage for a
constant V
ds
. g
m
=I
d
/V
gs
(constV
dS
). The value of g
m
is expressed in Siemens or mhos.

4. AMPLIFICATION FACTOR
It is given by the ratio of small change in drain to source voltage (V
dS
) to the
corresponding change in gate to source voltage (V
gs
) for a constant Drain current (I
D
)
A=V
ds
/V
gs
(const I
D
)
5. INPUT RESISTANCE (R
i
):
Since the gate to source junction of a JFET is used as an i/p, therefore the input resistance
is an advantage of JFET over the bipolar transistor.
R
i
=V
gs
/I
gs
V
gs
= gate to source voltage.
I
gss
= gate reverse current. It is in the order of nA.
PROCEDURE:
2. For drain characteristics the gate to source voltage is maintained constant and variations
in V
ds
andI
d
are noted.
3. The same is repeated for various values of V
gs
.
4. For transfer characteristics the drain to source voltage is maintained constant and
variations Id and V
gs
are noted.
5. The above is repeated for different constant values of V
ds
.

PRECAUTIONS:

1 .There should not be any loose connections.
2. The readings are noted without parallax error.

RESULT:



CIRCUIT DIAGRAM:

FREQUENCY RESPONSE MODEL GRAPH:



EXP No: Date:
COMMON EMITTER AMPLIFIER
AIM:
To study and plot the frequency response of single stage CE amplifier and find its bandwidth.
APPARATUS:
CRO 1
Transistor BC107 1
Resistor
1.5K 1
33K 1
3.3K 1
330 1
Capacitor
10F 2
100F 1
Function Generator 1
Bread Board 1

THEORY:
The CE amplifier provides high gain & wide frequency response. The emitter terminal is
common to both input & output circuits and is grounded. The emitter-base circuit is forward biased.
The collector current is controlled by the base current rather than emitter current. The input signal is
applied to base terminal of the transistor and amplifier output is taken across collector terminal. A
very small change in base current produces a much larger change in collector current. When +VE
half-cycle is fed to the input circuit, it increases the forward bias of the circuit which causes the
collector current to increase, it decreases the voltage more VE. Thus when input cycle varies through
a -VE half-cycle, decreases the forward bias of the circuit, which causes the collector current to
increases thus the output signal is common emitter amplifier is in out of phase with the input signal.

PROCEDURE:
1. Connect the circuit as shown in circuit diagram
2. Apply input of 20mV peak-to-peak and 1 KHz frequency using Function Generator
3. Measure the Output Voltage Vo (p-p) for various load resistors
4. Tabulate the readings in the tabular form.
5. The voltage gain can be calculated by using the expression A
v
= (V
0
/V
i
)


TABULAR FORMS:
Input voltage (V
i
) =20mv/10mv

S. No InputFrequency(Hz)
Output
Voltage(V)
Gain
AV=Vo/Vi
Gain in dB
20 log Av
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15



6. For plotting the frequency response the input voltage is kept Constant at 20mV peak-to-peak and the
frequency is varied from 10Hz to 1MHz Using function generator
7. Note down the value of output voltage for each frequency.
8. All the readings are tabulated and voltage gain in dB is calculated by using the expression A
v
=20
log
10
(V
0
/V
i
)
9. A graph is drawn by taking frequency on x-axis and gain in dB on y-axis on Semi-log graph.
10. The band width of the amplifier is calculated from the graph using the expression,
Bandwidth, BW=f
2
-f
1
Where f
1
lower cut-off frequency of CE amplifier, and
Where f
2
upper cut-off frequency of CE amplifier
11.The bandwidth product of the amplifier is calculated using the expression
Gain Bandwidth product=3-dBmidband gain X Bandwidth
PRECAUTIONS:
1. Be sure that connections are made correctly before supply is ON and avoid loose connections.
2. Readings should be tabulate without parallax error.

Bandwidth =

RESULT:



CIRCUIT DIAGRAM:



EXP No: Date:

COMMON COLLECTOR AMPLIFIER (EMITTER FOLLOWER)
AIM:
To study and plot the frequency response of CC amplifier.
APPARATUS:
Transistor BC107 1
Resistor
4.7K 1
68K 1
33K 1
10K 1
Capacitor 10F 1
Function Generator 1
CRO 1
Bread Board 1

THEORY:
The circuit shows a common- collector (CC) amplifier using NPN transistor. Since the
collector resistance (R
C
) is zero, therefore the collector is at a.c ground.
That is why this circuit is also known as grounded collector amplifier. In this circuit, the input is
applied between the base and collector terminals and the output is taken across the emitter and collector
terminal s. The capacitors C
1
and C
2
block the direct current; but pass the a.c Signal current in the
circuit.
It will be interesting to know that when there is no a.c. Signal source (i.e., Vs is equal to zero), the
current flowing through the emitter (or load) resistor is the quiescent operating current. Now let an a.c.
signal be applied across the input terminals. Then during the positive half cycle of the input a.c. Signal,
the forward bias is increased because the voltage V
B
is positive with respect to the collector (i.e.,
ground). This causes the base current to increase, due to which the emitter current is also increased. As
a result of this the voltage drop across resistor R
E
is increased and hence the output voltage (V
O
) is also
increased. Consequently, we get positive half cycle of the output. It means that a positive going input
signal results in a positive going output signal. Thus the input and output signals are in phase with each



GRAPH:



other as shown in figure. In other words, the emitter voltage follows the base voltage. That is why the
common collector amplifier is known as emitter follower. The voltage gain of an Emitter follower is
less than unity. But it has a large current gain and large power gain.

PROCEDURE:
1. Connect the circuit as shown in circuit diagram
2. Apply input of 100mV peak-to-peak and 1 KHz frequency using Function Generator
3. Measure the Output Voltage Vo (p-p) for various frequencies.
4. Tabulate the readings in the tabular form.
5. The voltage gain can be calculated by using the expression A
v
= (V
0
/V
i
)
6. For plotting the frequency response the input voltage is kept Constant at 100mV peak-to-peak and the
frequency is varied from 10Hz to 1MHz Using function generator
7. Note down the value of output voltage for each frequency.
8. All the readings are tabulated and voltage gain in dB is calculated by using the expression A
v
=20
log
10
(V
0
/V
i
)
9. A graph is drawn by taking frequency on x-axis and gain in dB on y-axis on Semi-log graph.
10. The band width of the amplifier is calculated from the graph using the expression,
Bandwidth, BW=f
2
-f
1
Where f
1
lower cut-off frequency of CE amplifier, and
Where f
2
upper cut-off frequency of CE amplifier
11.The bandwidth product of the amplifier is calculated using the expression
Gain Bandwidth product=3-dBmidband gain X Bandwidth
PRECAUTIONS:
1. Be sure that connections are made correctly before supply is ON and avoid loose connections.
2. Readings should be tabulate without parallax error.



TABULAR FORMS:
Input Voltage VI =100 mV
S. No.
Input frequency
(Hz)
Output voltage
(V)
Gain

Gain in dB

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15



RESULT:



CIRCUIT DIAGRAM

MODEL GRAPH:



EXP No: Date:
UJT CHARACTERISTICS

AIM: To observe& plot the characteristics of UJT and to calculate the Intrinsic Stand-Off Ratio ().

APPARATUS:
UJT 2N2646 1
Resistors
470 1
1K 2
Bread Board 1
Multimeter 1
Voltmeter (0-20) V 2
Ammeter (0-20)mA 1

THEORY:
A Uni junction Transistor (UJT) is an electronic semiconductor device that has
only one junction. The UJT Uni junction Transistor (UJT) has three terminals an emitter (E)
and two bases (B1 and B2). The base is formed by lightly doped n-type bar of silicon. Two
ohmic contacts B1 and B2 are attached at its ends. The emitter is of p-type and it is heavily
doped. The resistance between B1 and B2, when the emitter is open-circuit is called inter
base resistance. The original Uni junction transistor, or UJT, is a simple device that is
essentially a bar of N type semiconductor material into which P type material has been
diffused somewhere along its length. The 2N2646 is the most commonly used version of the
UJT.
The UJT is biased with a positive voltage between the two bases. This causes a potential drop along the
length of the device. When the emitter voltage is driven approximately one diode voltage above the
voltage at the point where the P diffusion (emitter) is, current will begin to flow from the emitter into
the base region. Because the base region is very lightly doped,



TABULAR FORMS:

S.No
V
BB
= 2V
V
BB
= 5V
V
BB
= 10V
V
EB
(V) I
E
(mA) V
EB
(V) I
E
(mA) V
EB
(V) I
E
(mA)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

CALCULATIONS:
V
P
= V
BB
+ V
D
= (V
P
-V
D
) / V
BB



the additional current (actually charges in the base region) causes (conductivity modulation) which
reduces the resistance of the portion of the base between the emitter junction and the B2 terminal. This
reduction in resistance means that the emitter junction is more forward biased, and so even more current
is injected. Overall, the effect is a negative resistance at the emitter terminal. This is what makes the
UJT useful, especially in simple oscillator circuits. When the emitter voltage reaches V
p
, the current
starts to increase and the emitter voltage starts to decrease. This is represented by negative slope of the
characteristics which is referred to as the negative resistance region, beyond the valley point ,R
B1

reaches minimum value and this region, V
EB
proportional to I
E.

PROCEDURE:
1. Connections are made as per circuit diagram.
2. Output voltage is fixed at a constant level and by varying input voltage corresponding
emitter current values are noted down.
3. All the readings are tabulated and Intrinsic Stand-Off ratio is calculated using = (V
p
-V
D
)
/ V
BB

4. A graph is plotted between V
EB
and I
E.

RESULT:



CIRCUIT DIAGRAM:

MODEL GRAPH:



EXP No: Date:

FET AMPLIFIER (COMMON SOURCE)
AIM: To obtain the frequency response of single stage common source JFET amplifier.
APPARATUS:
EQUIPMENT/COMPONENT QUANTITY
Oscilloscope 1
Function generator 1
Bread board 1
BFW11(FET) 1
Resister 1K 1
Resister 2.2K 1
Resister 47K 1
Capacitors10F 3
probes 1 set

THEORY:
The FET amplifier uses n-channel field effect transistor. Unlike a bipolar transistor, the input
impedance of FET is very high and it works like a vacuum pentode. The combination R
S,
C
S
provides
self bias. R
G
provides DC path for reverse biasing of gate source junction. R
D
is the load resistance of
the amplifier. Typical values of components are shown in the figure. From the drain and transfer
characteristics of FET, the drain current of FET is a function of drain to source voltage and gate to
source voltage. The linear small signal equivalent circuit for FET can be drawn analogous to the BJT. A
low frequency model for FET has a Nortons output circuit with a dependent current generator whose
magnitude is proportional to gate to source voltage.
The proportionality constant is the Transconductance. The output resistance r
d
, the input
resistance between gate and source is infinite, since it is assumed that the reverse biased gate draws no
current. A low frequency model for FET has a dependent current generator whose magnitude is
proportional to the gate to source voltage. The FET has three parameters:

1) Dynamic drain resistance (R
d
)
2) Amplification factor ()
3) Transconductance (g
m
)



TABULAR FORM:
Input Voltage V
in
= 50 mV
S. No. Input Frequency (Hz)
Output Voltage
(V)
Gain
A
V
=V
o
/V
i

Gain in dB
20 log Av
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21

OBSERVATIONS:
Maximum gain (A
v
) = ----------- dB
Lower cut-off frequency (F
l
) = ----------- Hz
Upper cut-off frequency (F
H
) = ----------- MHz
Band width (B.W) = (F
H
F
L
) = ----------- kHz
Gain bandwidth product = A
v
(B.W) = ----------- Hz


PROCEDURE:
1. Connect the circuit as shown in the circuit diagram.
2. Connect the signal generator output to input terminals of the circuit and CH-I of dual trace
CRO.
3. Connect the output terminal of the circuit to CH-II of the dual trace CRO.
4. Switch on the trainer.
5. Set the signal generator output sine wave at 50 mV constant.
6. Vary the function generator frequency from 50 Hz to 1 MHz (as per in the given tabular form)
and note the corresponding output voltage.
7. Calculate the gain A
V
=V
O
/V
I

8. Plot the graph frequency verses gain (dB) on a semi log sheet.

PRECAUTIONS:

1. Connections must be given very carefully.
2. Check the connections before Switching on the power supply.

RESULT:



CIRCUIT DIAGRAM:



EXP NO:
SILICON CONTROLLED RECTIFIER (SCR) CHARACTERISTICS
AIM: To draw the V-I Characteristics of SCR.
APPARATUS:
SCR TYN616 1
Resistor
10K 1
1K 1
Bread Board 1
Voltmeter 0-10V 1
Connecting wires
Ammeter (0-50) A 1

THEORY:

It is a four layer semiconductor device being alternate of P-type and N-type silicon. It
consists of 3 junctions J
1
, J
2
, J
3.
J
1
and J
3
operate in forward direction and J
2
operates in reverse
direction and three terminals called anode (A)
,
cathode (K), and a gate (G). The operation of
SCR can be studied when the gate is open and when the gate is positive with respect to
cathode.
When gate is open, no voltage is applied at the gate due to reverse bias of the junction
J
2
no current flows through R
2
and hence SCR is at cutoff. When anode voltage is increased
J
2
tends to breakdown.
When the gate positive, with respect to cathode J
3
junction is forward biased and J
2
is
reverse biased. Electrons from N-type material move across junction J
3
towards gate while
holes from P-type material moves across junction J
3
towards cathode. So gate current starts
flowing, anode current increase is in extremely small current junction J
2
break down and SCR
conducts heavily.
When gate is open thee break over voltage is determined on the minimum forward
voltage at which SCR conducts heavily. Now most of the supply voltage appears across the


OBSERVATIONS:

V
AK
(V) I
AK
( A)

MODEL WAVEFORM:

.


load resistance. The holding current is the maximum anode current gate being open, when
break over occurs
PROCEDURE:
1. Connections are made as per circuit diagram.
2. Keep the gate supply voltage at some constant value
3. Vary the anode to cathode supply voltage and note down the readings of voltmeter and
ammeter. Keep the gate voltage at standard value.
AK
and I
AK
.
PRECAUTIONS:
1. There should not be any loose connections.
2. The readings are noted without parallax error.

RESULT:

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Electronic Devices & Circuits Lab II B.Tech I Semester DEPT.

, is meant the voltage below which the current is

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