Electronic Engineering Lab Manual

Department of
Electronics & Communication

Engineering
Manual and Observation Book
Electronic Engineering Lab-1
K.Sridhar Raju www.engglabs.blogspot.com
2
Department of
Electronics & Communication Engineering
Electronic Engineering Lab !
Name of te student ! """""""""""""""""""""""""""""""""""""""""""
Class ! """"""""""""""""""""""""""""""""""""""""""""
#oll No! ! """"""""""""""""""""""""""""""""""""""""""""
$emester ! """"""""""""""""""""""""""""""""""""""""""""
%cad &ear ! """"""""""""""""""""""""""""""""""""""""""""
"
#
L'$( O) E*+E#'MEN($
1, Comparison of $emiconductor diodes -.e/ $i & 0ener1
2, $tatic Caracteristics of B3( -CE1
4, $tatic Caracteristics of B3( -CB1
5, $tatic Caracteristics of )E( -C$1
6, Design of 7alf 8ave and )ull 8ave rectifier 8itout filters
9, Design of 7alf 8ave and )ull 8ave rectifier 8it filters -L/ C/ L section/
: $ection1
;, $tatic Caracteristics of $C#
<, $tatic Caracteristics of =3(
>, Measurement of +ase/ )re?uenc@ and $ensitivit@ using C#O
1A, Biasing of B3( and )E(
11, )re?uenc@ response of #C coupled %mplifier using B3(
12, )re?uenc@ response of #C coupled %mplifier using )E(
14, Emitter )ollo8er
$
%
Department of
Electronics & Communication Engineering
Electronic Engineering Lab !

&ame of the student'
Class (.E'
Roll &o' )cad *ear'
'NDE*
$l
No
Name of te EBperiment Date
Conducted
'nitials of staff
+
,
EBperiment! 1 Date!
C7%#%C(E#'$('C$ O) $EM'COND=C(O#
D'ODE$ -.e/ & $i,1%ND 0ENE# D'ODE
1, %'M! a- .o obtain forward and re/erse characteristics of the 0& junction diode 12e and Si-.

2, %++%#%(=$!
Sl &o. &ame of the de/ice Range3 &o 4t5.
!. 2e Diode DR2$ 6!&os
2. Si Diode 7 & #66+ 6!&os
". D.C.)mmeter 16$6 m)- 6!&os
#. D.C )mmeter 16!66 )- 6!&os
$. D.C 0ower Suppl5 16"68- 6!&os
%. Connecting wires !6&os
+. Resistor !K 6!&os
,. D.C 8olt meter 16 9 2$8 - 6!&os

4,(7EO#&!
D'ODE $+EC')'C%('ON$!
DR 2$ )llo5 junction suitable for low /oltage: low power rectifier applications such as batter5
eliminator etc.
8RR; 2$ 8 ma<
7=)8 2$6 m) ma<
7=R; 7 ) ma<
0tot 1upto 2$ c- 2$6 m/ ma<
8= 17= > 2$6m)- 8 ma<
.j ?6 C ma<
0& junction diode is a two terminal solid state de/ice.
.he S5mbolic representation of a diode is shown below.
)node1@- cathode 1-

.he terminal K is called the cathode or the negati/e electrode. .he terminal ) is called the anode
or the positi/e terminal. Ae also refer the terminals as pside and nside terminals.
?
)- =BRA)RD (7)S' Ahen the terminal CKD is connected to the negati/e terminal of the suppl5
and the terminal C)D is connected to the positi/e of the power suppl5 the diode is said to be
Eforward biasedF. 7n other words when pside of the junction diode is connected to the
positi/e and nside is connected to the negati/e of the power suppl5 the diode is connected in
the EforwardF direction . .he diode gets forward biased onl5 when
8f G 8r. .he forward biased diode is shown in figure 1"-. .he atomic
/oltage drop across the bod5 of the de/ice is Hero under ideal conditions. 7n the forward
biased diode the height of the E potential energ5 barrier E at the junction gets lowered b5 the
magnitude of the forward bias 8=. .his disturbs the initial eIuilibrium between the forces
tending to cause diffusion of Emajorit5 carriersF across the junction and the opposing
influence of the potential energ5 barrier at the junction. &ow EholesF cross the junction from
the pregion to the nregion while the electrons cross the unction from the nregion to the p
region. =low of both t5pes of carriers causes con/entional electric current from pregion to n
region and these components get added. Jence under forward biased condition 1i.e 8f G /r-
the following occur.
!. Resistance offered b5 the junction is low.
2. 0& junction acts as a closed switch.
". Aidth of the depletion region is reduced.
#. Drift current increases with increase in bias.
Cutin 8oltage 8' Cutin /oltage is defined as the /oltage at which !K of the rated current flows.
7n practical terms: this is the /oltage at which the diode ma5 be considered to start the
conduction.
=or 2e: 8 > 6.2/.
=or Si: 8> 6.%/.
(- RE8ERSE (7)S CB&D7.7B&' a 0& diode with re/erse bias condition i.e.: with positi/e
terminal of the batter5 8r connected to the nside and negati/e terminal connected to the p
side. .his re/erse bias causes both holes in the pregion and electrons in the nregion to mo/e
awa5 from the junction. Jence the region of negati/e charge densit5 on the pside and region
of positi/e charge densit5 on the nside become wider i.e.: the width of the depletion region
increases. =urther the height of the potential energ5 barrier increases with increase in 8r: the
applied /oltage. .his increased barrier height ser/es to reduce the flow of majorit5 carriers to
the other side i.e: holes from pside to nside and electrons from nside to pside. Jowe/er
the flow of minorit5 carriers remains uninfluenced b5 the increased barrier height. Since
these minorit5 carriers fall down the potential energ5 barrier: nominall5 Hero current flows
under re/erse bias condition as there are a few number of minorit5 carriers. Jowe/er a small
current does flow in the re/erse direction i.e.: from nregion to pregion across the junction.
.his e<tremel5 small re/erse current is called re/erse saturation current 17o- .he magnitude of
7o for 2e is about few ) and for silicon it is a few n).
Jence under re/erse biased condition.
!. .he resistance of the diode increases
2. .he width of the depletion region increases.
". .he current is e<tremel5 low.

!6
5, C'#C='( D'%.#%M'
=BRA)RD (7)S

RE8ERSE (7)S

6, +#OCED=#E !
=BRA)RD CJ)R)C.ER7S.7CS'
!. Connect the circuit as shown in the corresponding circuit diagram.
2. 7ncrease the suppl5 /oltage from Hero /olts. Bbser/e the corresponding /alue of current.
". =or e/er5 /alue of forward /oltage across the diode: obser/e the /alue of current and record
it.
NO(E! .he graph should be drawn showing that the /oltage 8f is an
7ndependent parameter hence the suppl5 /oltage must be /aried and
corresponding /alue of current must be noted.
#. Bbser/e the /oltage across the diode where current 7f just starts flowing through the diode.
&ow record the /alues of /oltage and current.
$. .he cutin /oltage should be clearl5 obser/ed and noted.
%. 7ncrease the diode /oltage in suitable steps without e<ceeding the ma<imum /alues indicated
after the cutin /oltage to obtain a smooth cur/e.
+. Repeat the abo/e procedure for Si diode also obser/ing some precautions.
!!
,. 0lot the graphs and obtain the d5namic and static resistance from the 87 characteristics.
Compare them with the e<pected /alues.
RE8ERSE (7)S CJ)R)C.ER7S.7CS'
!. Connections are to be made as per the corresponding circuit diagram.
2. .he independent parameter i.e.: the diode /oltage 8R is /aried from Hero /olts and
corresponding /alues of the re/erse current 7R is obser/ed.
". 8ar5 the suppl5 /oltage from Hero /olts. &ote the /alues of
8R and 7R.
#. .abulate all the obser/ations.
$. Repeat the abo/e procedure for Si diode.
%. =ind the d5namic and static resistance from the graph.
9, OB$E#C%('ON$ ' =or 2e diode
1a- =or =orward (iased Condition '
$l,No Cs Cd -C1 'd-m%1
!2

1b- =or Re/erse (iased Condition'
Sl.&o 8s 8d 18- 7d 1)-

!"
;, OB$E#C%('ON$ ' =or Si. Diode
1a- =or =orward (iased Condition '
Sl.&o 8s 8d 18- 7d 1m)-

!#
1b- =or Re/erse (iased Condition'
Sl.&o 8s 8d 18- 7d 1)-
<,E*+EC(ED .#%+7 !
71m)-
2e Si

8 @ 8

71)-

!$
>, #E$=L(!-
1A, C'C% D=E$('ON$!
!. Ahat do 5ou understand b5 a junction diodeL
2. 7s the 0& junction diode a passi/e element or an acti/e elementL
". Ahat is the importance of the t5pe number gi/en to the /arious diodesL
#. Ahat is meant b5 potential barrier across a 0& junctionL
$. Ahat is the significance of a diode as a de/iceL
%. Ahat is cut in /oltageL Ahat is the /alue of cutin /oltage for 2e
and Si diodes. Ahat is the reason for the difference in cutin
/oltage of 2e and Si.

+. E<plain ph5sicall5 how a 0& junction functions as a rectifier.
,. Ahat is the e<pression for the total current in a 0& junction. Jow
does it /ar5 with the applied /oltageL
?. Ahat do 5ou understand b5 a re/erse saturation currentL Ahat
are the t5pical /aluesL
!6. Ah5 is the magnitude of the current in the forward biased diode
greater than that in the re/erse biased diodeL
!!. Jow does the re/erse saturation current /ar5 with temperature
for 2e and Si diodesL 7s it of significance while the circuit
designer chooses a particular de/ice in designL
!2. Ahat do 5ou understand b5 d5namic and static resistanceL Jow
are these /alues obtained graphicall5L
!". Define the terms forward and re/erse resistance of a 0&
Munction diode.
!#. E<plain the capaciti/e effects in a junction.
!$. Ahat are the /arious applications of a 0& junction diodeL
!%. &ame the /arious t5pes of diodes a/ailable.
!+. Ahat is meant b5 breaNdown of diodesL
!%
1, %'M! b- .o obtain the /oltampere characteristics of Hener diode
2, %++%#%(=$!
S.&o. 7tem Range3Specification 4t5
! Oener diode ESO $.2 !
2 DC )mmeter 6$6 m) !
" DC 8oltmeter 626 8 2
# Resistor 2.2 N Jalf Aatt !
$ Regulated 0ower Suppl5 6"6 8 !
% Decade Resistance (o< ! !6 ; !
+ 0atch cords 3 Connecting wires
4, (7EO#&!
(ecause of the e<istence of an electric field across a re/erse biased junction: it is possible to
rupture co/alent bonds. .his can be done b5 e<erting a strong force on the bound electrons so
that the5 are Etorn awa5F from the bonds.
.his process leads to additional electronhole pairs. Ahen additional electronhole pairs are
generated: the re/erse current increases. .his mechanism is called Oener (reaNdown.
)/alanche (reaNdown or )/alanche ;ultiplication is a process wherein: a carrier acIuires
enough energ5 from the applied potential: to collide with a cr5stal ion and disrupt a co/alent
bond.
Ahen a bond is disrupted in this fashion: a new electronhole pair is generated. &ow: these
carriers can also gain energ5 from the applied potential and go on to disrupt other co/alent bonds.
.his process becomes cumulati/e leading to large re/erse currents.
.he strong field reIuired for Oener (reaNdown is reached in the range of #6%8 in highl5 doped
diodes. .he high doping concentration is reIuired to ha/e a sufficientl5 thin depletion region.
7f the depletion region is thin: then a strong field is produced that can rupture co/alent bonds.
2enerall5 the doping concentration is around one impurit5 atom per !6
$
silicon atoms. .he
electric field at the junction is of the order of !6
%
83cm.
7n the re/erse characteristic of a Oener diode: the Nnee /oltage is called the breaNdown 8oltage
8H.
2enerall5: in lightl5 doped diodes: the depletion region is relati/el5 thicNP )/alanche (reaNdown
is predominant and occurs at higher /oltages. 1)bo/e ,8-.
!+
5, C'#C='( D'%.#%M$!
=or Re/erse (ias'
=or =orward (ias'

6. +#OCED=#E!
1=or Re/erse (ias-
!- Connect the circuit as per th" circuit diagram. Keep the /oltage of the power suppl5 at
minimum and switch it on.
2- Starting from Hero: increase the suppl5 /oltage in small steps. Each time: note the
corresponding /ales of the Oener /oltage 8H 1as indicated b5 the /oltmeter- and the current
1as indicated b5 the ammeter-.
"- .abulate all readings and plot i /ersus 8H.
1=or =orward (ias-
!- Connect the circuit as per the circuit diagram. Ensure powersuppl5 /oltage Nnobs are in the
minimum position and switch it on.
2- 8ar5 the suppl5 /oltage in small con/enient steps. &ote down the corresponding /ales of
forward /oltage 1as indicated b5 the /oltmeter- and the current 1as indicated b5 the ammeter-.
"- .abulate all readings. 0lot i /ersus 8f.
!,
9, E*+EC(ED .#%+7!
;, (%B=L%# COL=MN$!
=orward Characteristics '
S.&B 8O 18olts- 7O 1m)-
!?

Re/erse Characteristics'
S.&B 8O 18olts- 7O 1m)-
<, #E$=L(!
>, C'C% COCE!
!- Ahat are the t5pical applications of a Oener diodeL
2- Ah5 a Oener diode is generall5 not connected in forward biasL
"- Define the /arious t5pes of breaNdown possible in diodes.
26
EBperiment 2: Date!
C7%#%C(E#'$('C$ O) B3( (#%N$'$(O# -CE1
1, %'M! b- .o obtain the input & output characteristics of (M. in common emitter configuration.
2, %++%#%(=$!

S.&o. &ame Range3Specification 4t5
! &0& (M. (C!6+ !
2 Resistor !., NQ !
" Resistor ,% NQ !
# 8oltmeter 6!6 8 !
$ ;icroammeter 6266 R) !
% ;illiammeter 6!6 m) !
+ Dual Channel
Regulated
0ower Suppl5
6"68 !
4, C'#C='( D'%.#%M!

8
CE

!.,K
5, (7EO#&!
2!
!.,K
.here are two sets of characteristics that can be drawn for a (M. in common emitter
configuration. .he5 are the input and the output characteristics. .he input characteristics
are obtained from the following relation.
8(E >f18CE:7(-
Ahere 8(E is the base to emitter /oltage: 8CE is collector to emitter /oltage and 7( stands for
abase current.
.he output characteristics are obtained from the following relation'
7C >f18CE:7(- where 7C is the collector current
'nput caracteristics'
=or 8CE > 68 the collector is effecti/el5 shorted to the emitter. .he resulting structure is
nothing but a diode 1pn junction-. .he characteristic cur/e obtained 18(E 8ersus 7(- if
essentiall5 that of a junction diode.
7n the case of input characteristics for 8CE > 68: 7f 8(E > 6: the base current 7(>6m) since
both the emitter and collector junctions are shorted.
=or an5 nonHero /alue of a 8CE the base current for 8(E >68 is not Hero. 7ts /alue is
/er5 small to be obser/ed. 7n general for constant 8(E as 8CE increases the base width increases
as per the Earl5 effect 1base width modulation- and this results in decreased recombination base
current.
Output caracteristics!- .he output characteristics can be di/ided into three parts . .he5 are'
1i- )cti/e region 1ii- cut off region 1iii- saturation region.

%ctive region!- 7n the acti/e region the emitter base junction 1ME- is forward biased and
collector base junction1MC- is re/erse biased. 7n the acti/e region collector current responds
more readil5 to an5 input signal. .he operation of the common emitter stage is used as an
amplif5ing stage onl5. Due to EEarl5 EffectF: the current gain increases with increase in 8CE.
.he large slope of the characteristic cur/e of the CE transistor signifies that the incremental
output impedance of the (M. in CE is lower that that in C( configuration
Cutoff region!- .he transistor is said to be in cut off when emitter current is Hero. =or achie/ing
this condition: it is not enough to ha/e the base current 7( > 6: because e/en with 7( >6: the
collector current 7C>1!@S-7C6. So: in order to achie/e cutoff condition: it is necessar5 to slightl5
re/ersebias the emitter base junction: which can be achie/ed b5 appl5ing 6.! /olt for
2ermanium and 68 for silicon. .his will ensure the reIuired conditions for cutoff i.e.
7E > 6: 7C > 7C6: 7( > 7C > 7C6
$aturation region!- 7n saturation region both the junctions ME and MC are forward biased b5 at
least the cut in /oltage. .he /oltage 8(E 18(C- across forward biased emitter 1collector-
junction has magnitude of just a few tenths of a /olt. Jence the saturation region lies e<tremel5
close to Oero /oltage a<is. .his is the region where all cur/es merge and decline rapidl5 towards
the origin. 7t ma5 be obser/ed that the saturation region begins at the EKneeF of the characteristic
cur/es.
6, +#OCED=#E!
22
7&0T. CJ)R)C.ER7S.7CS!
!. ;aNe the connections as per the circuit diagram.
2. Ensure the /oltage Nnobs of the power supplies are in the minimum position before switching
them on.
". Choose a /alue for 8CE. =i< the power suppl5 Nnow 8CC to get the desired /alue of 8CE.
#. 8ar5 the /oltage 8(( in small steps. Each time: note down the /alue of 8(E and the
corresponding /alue of 7(.
$. Choose another /alue for 8CE and repeat the abo/e steps.
%. .abulate all readings and plot 7( /ersus 8(E.
BT.0T. CJ)R)C.ER7S.7CS'
!. Tse the same circuit as abo/e for obtaining the output characteristics.
2. &ow maintain 7( at some constant /alue. 8ar5 8CC and obser/e the changes in 7C due to
the changes in 8CE.
". 7nitiall5 Neep 7(>6 R). 8ar5 8CC from Hero /olts and note down the readings of 7C & 8CE.
#. Repeat the abo/e procedure for a few other /alues of 7( such as !66 R). .abulate all the
readings as per the tabular form.
9, (%B=L%# COL=MN$!
7nput Characteristics'
8CE>68 8CE>28
8CE>%8
7(1R)- 8(E18- 7(1R)- 8(E18- 7(1R)- 8(E18-

2"
Butput characteristics!
;, EBpected
.raps!

BT.
0T.
CJ)R)C.ER7S.7CS'
7(>6 R) 7(>!$ R)
7(>2$ R)
8CE18- 7C1m)- 8CE18- 7C1m)- 8CE18- 7C1m)-
2#

7&0T. CJ)R)C.ER7S.7CS '
8CE > 28
7( 1R)-
8CE >68 8CE >%8
8(E 18olts-
<, #E$=L(!
2$
>, C'C% COCE!
!- Ahat is a transistorL Ahat is the difference between an &0& and a 0&0 .ransistorL
2- Draw the s5mbolic representations of &0& and 0&0 transistors.
"- E<plain ph5sicall5 how amplification is achie/ed in a transistor. 7s it /oltage
amplification or current amplificationL 2i/e an e<ample of a de/ice capable of gi/ing
an5 other t5pe 1/oltage3current- of amplification. Ahat is the origin of the name
CtransistorDL
#- 2i/e the ph5sical arrangements of a 0&0 junction transistor and discuss how it pro/ides
current amplification.
$- SNetch the characteristics of a (M. in CommonEmitter Configuration. Ah5 is it called
CommonEmitter configurationL
%- =or amplification: wh5 is the CE mode of (M. preferred o/er other modes of operationL
+- 7s CE Configuration of (M. a current amplifier or a /oltage amplifierL Does an
impedance transformation also taNe placeL
,- Ah5 do we obser/e a phaseshift of the output with respect to the input in a common
emitter stageL
?- Ahat is a EloadlineFL Ahat is its significanceL Differentiate between a.c. load line and
d.c. load line.
!6- E<plain the output characteristics of (M. in Common Emitter Configuration with respect
to dc load line.
!!- Ahat are hparametersL Ahat are the5 used forL Ah5 are these hparameters preferred
o/er other parametersL
!2- Arite the t5pical /alues of hparameters at 7E > !."m).
!"- 2raphicall5 obtain the hparameters for (C!6+ (M. at 7C > $m) and 8CE > 28.
!#- 2i/e the /alues of 8CE Sat: 8CE Cutoff and 8CE )cti/e for the transistor (C!6+.
!$- Ahat are the other applications of the common emitter configuration 1other than as an
amplifier-L
2%
;8SR E&27&EER7&2 CBLLE2E:
J*DER)()D.
EBperiment 4: Date!
C7%#%C(E#'$('C$ O) B3( (#%N$'$(O# -CB1
1, %'M! a- .o obtain input and output characteristics of a commonbase transistor.
2, %++%#%(=$!
Sl.&o.
&ame of the de/ice
Range 3&o 4t5.
!. )mmeters 6 9!6 m) 62
2. Resistor 2.2K 6!
". .ransistor (C !6+ 6!
#. ;ulti meter38oltmeter 6!
4,C'#C='( D'%.#%M!
5,(7EO#&!
.he circuit shown in the figure abo/e: is referred to as Common (ase or C( configuration:
since the base is common to both input and output circuits. =or an &0& .ransistor: the
largest current components are due to the electrons. .he emitterbase junction is alwa5s
forward biased 1the /oltage being 8E(-and the collectorbase junction is re/erse biased 1the
/oltage being 8C(-.
.he /arious currents are related b5 the eIuation 7E>7(@7C
2+
J*DER)()D.
=rom the eIuation: we see that output current 7C is completel5 determined b5 input current 7E and
the output /oltage 8C(>8C. .he output relation ma5 be written in implicit form as
7C>f18C(:7E-
Similarl5: in implicit form: the input characteristic is gi/en b5
8E(>f18C(:7E-
.he output characteristic is a plot of 7C /ersus 8C( with emitter current 7E as a parameter.
.he input characteristic is a plot of 7E /ersus 8E( with 8C( as a parameter.
EBplanation of caracteristics!
7n commonbase configuration: the emitterbase junction acts liNe a forward biased junction.
.herefore: the input characteristics are nothing but the /oltampere characteristics of this junction
diode. )s in a semiconductor diode: these characteristics also ha/e a cutin /oltage. )n increase
in the magnitude of 8C( causes the magnitude of 7E to increase with 8E( held constant. .his
increase is attributed to a phenomenon called basewidthmodulation or Earl5 Effect. .herefore:
the cur/es shift leftwards with increasing 8C(.
7n: the output characteristics: we can identif5 three regions. .he5 are )cti/e Region: Saturation
Region and Cutoff Region.
7n the acti/e region: the collector junction is re/erse biased and the emitter junction is forward
biased. 7n the saturation region: both emitter and collector junctions are forward biased. )nd in
the cutoff region: both emitter and collector junctions are re/erse biased.
.he characteristics are shown in the e<pected graphs.
6. +#OCED=#E!
730 Characteristics'
!. ;aNe the connections as per the circuit diagram.
2. Choose a /alue for 8C(: sa5: 68.
". (5 maintaining 8C( at the chosen /alue: /ar5 the suppl5 /oltage 8EE in small con/enient
steps. Each time: note the /alue of 8E( and the corresponding /alue of 7E.
$. .abulate all readings.
%. Choose another /alue of 8C( and repeat the abo/e procedure.
+. 0lot 7E /ersus 8E(.
B30 Characteristics'

!. Connect the circuit as per the circuit diagram.
2. Choose a /alue for 7E: sa5: ! m). 8ar5 the power suppl5 8EE till the ammeter reads this /alue
of 7E.
". &ow: /ar5 the powersuppl5 8CC in small steps. Each time: note down the /alue of 8C( and
the corresponding /alue of 7C.
#. .abulate all obser/ations.
$. Choose another /alue for 7E and repeat the abo/e steps.
2,
J*DER)()D.
%. 0lot 7C /ersus 8C(.
9,OB$E#C%('ON$!
7&0T. CJ)R)C.ER7S.7CS'
S. &o 8C( > 28 8C( > #8
8E(18- 7E1m)- 8E(18- 7E1m)-
2?
J*DER)()D.
BT.0T. CJ)R)C.ER7S.7CS'
;, E*+EC(ED
.#%+7$!
BT. 0T. CJ)R)C.ER7S.7CS
7C 1m)-
7E > %m)
S.&o 7E > 2m) 7E > #m)
8C(18- 7C1m)- 8C(18- 7C1m)-
"6
J*DER)()D.
7E > # m)
7E > 2m)
8C( 18olts-
7&0T. CJ)R)C.ER7S.7CS
8C( > #8
7E 1m)-
8C( > 2 8C( >%8
8E( 18olts-
<, #E$=L(!
>, C'C% COCE!
!- Ahat do 5ou understand b5 the term (ipolar Munction .ransistorL
2- Ahat are the /arious t5pes of .ransistors a/ailable. )re there an5 preferred t5pes if so wh5L
"- Ahat do 5ou understand b5 input and output characteristicsL
"!
J*DER)()D.
#- Distinguish between acti/e: saturation: cutoff regions and internal operations of a (M.L
$- Discuss the /arious doping le/els in the emitter: base and collector regionsL
%- E<plain the ph5sical structure of a (M.L
+- Discuss the current components in a (M. in C( configurationL
,- E<plain wh5 the base width is Nept e<tremel5 smallL
?- ) 0&0 .ransistor operating in the acti/e region: e<tremel5 small no. of holes injected into the
base recombine with electrons in the narrow base region but the hole densit5 at Mc becomes
Hero. E<plain howL
!6- E<plain Earl5 EffectL
!!- Ah5 does the emitter current increase with increase in re/erse bias at
the collector junctionL
!2- Ahat is meant b5 collector re/erse saturation currentL
!"- Arite the collector current e<pression for (M. in C( configuration in
!. Cutoff region 2. )cti/e region ".saturationL
!#- Discuss the shapes of C( static input and out put characteristicsL
!$- E<plain wh5 static o3p characteristics of a C( .ransistor ha/e slight
upward slopeL
!%- Ahat is bottoming effectL
!+- Ahat are the /alues of 8(E cutoff 8(E sat: 8(E acti/e: 8C( off:
8C( acti/e :8C( satL
EBperiment 5: Date!
C7%#%C(E#'$('C$ O) 3)E(
1,%'M!
.o obtain the static characteristics 1drain and transfer characteristics- of a Munction
=ield Effect .ransistor in the Common Source Configuration.
"2
J*DER)()D.
2,%++%#%(=$!
! nchannel M=E. (=A!6 !
2 DC )mmeter 6!6 m) !
" DC 8oltmeter 626 8 2
# Resistor #.+ N Jalf Aatt !
$ Dual Channel Regulated 0ower
Suppl5
6"6 8 !
4, C'#C='( D'%.#%M!
5, (7EO#&!
.he common source drain characteristics for a t5pical nchannel =E. are obtained b5
plotting the drain current against 8DS 1the drain to source /oltage- with 82S 1the gate to source
/oltage- as a parameter. .he gate forms a 0& junction with the channel. Ahen a re/erse bias is
applied to this junction: a spacecharge region is formed. Since the gate is relati/el5 hea/il5
doped: the spacecharge region e<tends more into the channel than into the gate. Jence the
channel width is reduced as the re/erse bias /oltage 82S increases. .herefore: the /alue of the
drain current decreases
=irstl5 let us consider the condition for 82S > 68. &ow with 82S>6/ there is no re/erse bias at the
gate and hence the channel between the gate junction is completel5 open. Tnder this condition
when 8DS>68 there is no electric field applied across the drain and source. .herefore majorit5
carriers 1i.e. electrons in the case of an nchannel =E.- do not conduct and the drain current 7D>6
with the application of a small /oltage 8DS at drain. .he nt5pe semiconductor beha/es liNe a
single resistor following BhmDs law and definite drain current flows. .his drain current 7D /aries
linearl5 with 8DS. .herefore: ohmic /oltage drop taNes place across the bar. .his /oltage drop
1which is nonuniforml5 distributed within the length of the bar- re/erse biases the gate junction
resulting in narrowing of the channel. .he depletion region is not uniforml5 distributed. 7t is more
towards the drain end rather than at the source end. )s the magnitude of the drain /oltage 8DS is
increased progressi/el5: a critical /alue of 8DS is reached at which the channel gets almost
constricted i.e.: more or less blocNed. Ahen 8DS is further increased the drain current 7D becomes
constant. .he /alue of 8DS for which the drain current reaches almost a constant /alue is called
the pinch off /oltage 8p: .he region of the characteristic cur/e for which 8DSG8p is called the
constant current region or the pinchoff region. Ahen a regulati/e /oltage is applied at the gate:
""
J*DER)()D.
the re/erse bias at the pn junction is greater and pinch off occurs for smaller /alues of 8DS. )lso
the ma<imum drain current 7ds is lower when compared to the /alue of the saturation drain current
7dss at 82S>68.
6, +#OCED=#E!
DR)7& CJ)R)C.ER7S.7CS'
!- Connect the circuit as per the circuit diagram.
2- 7nitiall5: choose 82S>6. ;aNe 822>6 so that 82S becomes 6.
"- 8ar5 the drain suppl5 8DD starting from 68. &ote the /oltage 8DS and the corresponding
drain current 7d.
#- .abulate all readings.
$- Repeat steps " and # b5 taNing different /ales of 82S 1sa5 82S>!8: "8 etc-.
%- 0lot 7d /ersus 8DS in each case.
.R)&S=ER CJ)REC.ER7S.7CS'
!- Connect the circuit as per the circuit diagram.
2- Choose a /alue for 8DS: sa5: #8.
"- 8ar5 the drain power suppl5 8DD to get 8D as the chosen /oltage. .his is Nept unaltered
through the rest of the steps.
#- &ow: /ar5 82S from 68 onwards in small con/enient steps. &ote the corresponding /alue of
7D.
$- Bbser/e that 7D is ma<imum when 82S>6 and 7D becomes Hero for some /alue of 82S.
%- .abulate all readings.
+- Chose another /alue of 8DS and repeat the abo/e procedure.
0lot 7D /ersus 82S in each case
9, EBpected .rap!

"#
J*DER)()D.

DR)7& CJ)R)C.ER7S.7CS
;, (%B=L%# COL=MN$!
DR)7& CJ)R)C.ER7S.7CS'
82S> 6.$ 8olts 82S> 6.! 8olts
8DS 18- 7D 1m)- 8DS 18- 7D 1m)-
"$
J*DER)()D.
.R)&S=ER CJ)R)C.ER7S.7CS'
8DS > 2 8olts 8DS > % 8olts
82S 18- 7D 1m)- 82S 18- 7D 1m)-
<,#E$=L(!
"%
J*DER)()D.
>, C'C% COCE!
!- Ahat are the differences between a (M. and a M=E.L
2- Ahat is meant b5 a unipolar de/iceL Ah5 is a M=E. Nnown as a Tnipolar De/iceL
"- Ahat are the t5pical applications of a M=E.L
#- Ahat are the parameters of a =E.L Ahat are the relations between themL
$- Ahat are nchannel and pchannel M=E.sL Jow are the5 different from one anotherL
%- 2i/e the names3numbers of a few commerciall5 a/ailable M=E. de/ices.
+- Ahat are the /arious possible configurations in which a M=E. can be connectedL Ahat
are the t5pical applications of eachL
,- Ahat is a ;BS=E.L Ahat are the possible t5pes in a ;BS=E. L
"+
J*DER)()D.
EBperiment 6: Date!
",
J*DER)()D.
#EC(')'E#$ E'(7O=( )'L(E#$
1, %'M! .o obtain ripple factor and regulation of a half wa/e and full wa/e rectifier without
filters.
2, %++%#%(=$'
S.&o. &ame of the de/ice Range3&o 4uantit5
!. Diodes !& #66+ 2 &o.
2. ;illi ammeter 6 2$m )mp. ! &o.
". CRB 26 ;hH ! &o.
#. Center taped .ransformer %6% 8 ! &o.
$. 0atch cords
%. 8oltmeter 626 8 ! &o.
+. Decade Resistance (o< !Q 9 !6 ; Q ! &o.
4, (7EO#&!
Rectifiers perform the tasN of con/erting ).C. to D.C. Commonl5 used rectifiers are Jalf
Aa/e Rectifier and =ullwa/e Rectifier.
7alf 8ave rectifier!
.he basic rectif5ing element is a diode. .his de/ice has essentiall5 an infinite resistance1when it
is re/erse biased- to current flow in one direction and a /er5 small resistance 1when it is forward
biased- for the current flow in the opposite direction.Ahen the diode is forward biased: current
flows through the load resistance: leading to the de/elopment of a uni directional output across it.
Ahen it is re/erse biased: current is appro<imatel5 Hero: therefore /oltage de/eloped across the
load is Hero.
)ull-Eave #ectifier!
)s shown in the figure in a fullwa/e rectifier the transformer secondar5 has a centertap and
each half gi/e a peaN /oltage of 8m. 7n each half there is one diode D! and D2. .he load resistance
RL is common to both hal/es. Jence a fullwa/e circuit comprises of two halfwa/e circuits. Bn
the positi/e half c5cle when the point ) is @/e w.r.t (: the diode D! conducts and current i! flows
through RL. During the negati/e half c5cle the point C is @/e w.r.t to ( and hence the diode D2
conducts and current i2 flows through RL.

5, C'#C='( D'%.#%M!

7%L) E%CE
#EC(')'E#

"?
J*DER)()D.

)=LL E%CE #EC(')'E#
6, +#OCED=#E !-
11 Connect the circuit as per the circuit diagram.
21 Choose an appropriate /alue for the load resistor: sa5: !6 N Q.
41 Bbser/e the input and output wa/eforms on the CRB and /erif5 whether the5 are as can be
e<pected.
51 ;easure the peaN /oltage 8m on the CRB screen. Tsing this /alue of 8m: the /alues of 7rms
and 7dc can be calculated.
61 ;easure the DC current and the DC /oltage in the ammeter and the /oltmeter respecti/el5.
91 ;easure the peaN /oltage 8m 1or the dc /oltage 8dc: using the /oltmeter- at the no load
condition.
;1 ;aNe calculations according to formulae.
9, E*+EC(ED .#%+7$
#6
J*DER)()D.
;, )O#M=L%E!
J)L= A)8E REC.7=7ER'
7m > 8m 3 1Rf @ RL @ R-
7dc > 7m32
7rms > 7m3U
V > W17dc37rms-
2
9 !X
!32
Regulation > 18no load 9 8full load-38full load
=TLL A)8E REC.7=7ER'
7m > 8m 3 1Rf @ RL @ R-
7dc > 7m3!.#!#
7rms > 27m3U
V > W17dc37rms-
2
9 !X
!32
<, #E$=L(!
>, C'C% COCE!
!- Ahat is the ad/antage of using a full wa/e rectifier o/er a half wa/e rectifierL
2- Ahat is a bridge rectifierL Ahat is the ad/antage of using it o/er a full wa/e rectifierL
"- Ahat is the 0eaN 7n/erse 8oltage in the case of full wa/e and half wa/e rectifiersL
#- Define regulation and ripple factor. Ahat are the ideal /alues for these IuantitiesL Ahat are
the practical /aluesL
$- Jow do we remo/e ripple from a rectifier outputL
%- Ahat is a filterL Ahat is its useL
#!
J*DER)()D.
+- Ahat is a regulatorL Ah5 is it reIuiredL
#2
J*DER)()D.
EBperiment 9: Date!
#EC(')'E#$ E'(7 )'L(E#$
!. %'M! .o obtain ripple factor of a full wa/e rectifier with filters.
2. %++%#%(=$!
S.&o. &ame of the
de/ice
Range3 &o 4t5
! Si diode 7&#66+ 2
2 D ; ; 2
" ).C power
suppl5
2"68:$6JH !
# Connecting
wires
$ Resistor !K !
% C R B !
". (7EO#&!
) full wa/e rectifier con/erts a Hero a/erage /alue signal into a signal which is
unidirectional with some a/erage /alue. .he two diodes in the circuit are connected in such
a wa5 that the conduction for one half c5cle 1@/e- taNes place through one diode 1sa5 D-
and the diode D2 is not conducting. 7n the ne<t half c5cle diode D! is not conducting and D2
is conducting. .he current flowing through the load is alwa5s in the same direction. .he
current flowing through the load is the sum of the load currents.
5,C'#C='( D'%.#%M$!
A7.J 7&DTC.BR =7L.ER'

A7.J C)0)C7.BR =7L.ER'
#"
J*DER)()D.

A7.J LSEC.7B& =7L.ER'

A7.J 07SEC.7B& =7L.ER'

##
J*DER)()D.
#. +#OCED=#E!
0)R. 9 ) 1Tsing an inductor filter-
!- Connect the full wa/e rectifier circuit with an inductor filter
of /alue L > !6J and RL > !6K.
.he step down /oltage output of the transformer is applied as
input to the =AR circuit.
2- ;easure the dc current flowing the circuit
"- Bbser/e the output wa/eforms on the CRB.
#- ;easure the peaN /alue of the input and output /oltage using a CRB. )lso measure the
ripple /oltage.
$- Calculate the regulation and ripple factor using the appropriate relations.
%- 8erif5 the results using theoretical calculations.
0)R. 9 ( 1Tsing a capacitor filter-
!- Connect a capacitor filter to the full wa/e rectifier circuit.
2- Bbser/e the input and the output wa/eforms on the oscilloscope.
"- ;easure the DC current through the load.
#- ;easure the ripple /oltage and the peaN /oltage of the output wa/eform from the
oscilloscope.
$- Calculate the ripple and regulation using the appropriate relations
%- 8erif5 the results using theoretical calculations.
0)R. 9 C 1Tsing L 9 Section =ilter-
!- ;aNe the connections as per the circuit diagram.
2- Connect an LSection filter as shown.
"- Bbser/e the input and the output wa/eforms on the Bscilloscope
#- ;easure the dc current flowing the circuit using the DC )mmeter.
$- ;easure the peaN /oltage and the ripple /oltage of the output wa/eform.
%- ;easure the series resistance of the choNe: 1Rc- resistance of the
transformer winding 1Rs- and the diode forward resistance 1Rf-
+- Calculate regulation and ripple factor using appropriate relations
,- 8erif5 the results using theoretical calculations.
0)R. 9 D 1Tsing a Section filter-
!- ;aNe the connections b5 connecting all the capacitors and
inductors in the circuit.
2- Bbser/e the output wa/e form on the Bscilloscope.
"- ;easure the dc current 17dc- flowing through the circuit.
#- ;easure the peaN /oltage and the ripple /oltage on the oscilloscope.
$- E/aluate the ripple factor and regulation using the appropriate relations.
%- E/aluate the results theoreticall5 and /erif5.
#$
J*DER)()D.
6, )O#M=L%E!
'ND=C(O# )'L(E#!
#ipple )actor!
V > W2 3 1" Y2- XW! 3 Y1! @ #Z
2
L
2
3 RL
2
-X
7f #Z
2
L
2
3 RL
2
GG !
V > RL3W"Y2. ZLX
#egulation !
8dc &o Load > 28m 3
8dc =ull Load > 28m 3 7dc R 1"-
R 9 is the total resistance of the circuit e<clusi/e of the load
i.e. R>Rf@RC@RS where Rf is the forward resistance of diode: RC is the choNe resistance and RS is
the resistance of the secondar5 winding.
C%+%C'(O# )'L(E#!
8dc no load > 8m
8dc full load > 8m 9 18r 3 2- Ahere 8r is the total capacitor discharge /oltage or the ripple /oltatge.
#ipple )actor!
V > 8rms 3 8dc > ! 3 1# Y" fcRL -
V > 18r32-318m 98r32-
L F $EC('ON )'L(E#'
#egulation!
8 dc no load > 28m 3
8dc full load > 2 8m 3 7dc.1Rf@RC@RS-
L-section filter!
#ipple )actor!
r > 8rms 3 8dc > 2 < c 3 " < L
> 1Y2- 3 1!2Z
2
LC-
- $EC('ON )'L(E#!
#egulation!
8dc no load > 8m
8dc full load > 8m 9 8r 3 2
#ipple )actor!
R.=> !31% Y2 Z
2
LC

-
9, OB$E#C%('ON$!
7DC 7)C 8DC 8)C Ripple
factor
7nductor
filter
Capacitor
filter
L Section
=ilter
[ filter
#%
J*DER)()D.
;, #E$=L(!
C'C% - COCE
!. Ah5 is the ripple freIuenc5 double the /alue of the suppl5
=reIuenc5 in the case of a full wa/e rectifier.
2. E<plain the importance of ripple and regulation in the case of a rectifier.
". ) capacitor filter pro/ides nearl5 8m /olts at light load: but the
/oltage regulation is poor. E<plain the reason for a poor regulation in the case of a =AR with
capacitor ! filter.
#. E<plain wh5 onl5 the inductor or the capacitor alone is not used as filters to a =AR circuit. 7n
other words discuss the Disad/antages of onl5 C or onl5 L filter.
$. Ahich filter circuit do 5ou prefer in con/erting the rectified output 8oltage to a pure dc
/oltage. 2i/e reasons. Consider the cases of a light load and large loads.
#+
J*DER)()D.
EBperiment ;: Date!
$(%('C C7%#%C(E#'$('C$ O) $C#
#,
J*DER)()D.
1, %'M! .o obtain the /oltampere characteristics of SCR
2, %++%#%(=$!
a- SCR e<perimental trainer Nit with user manual and 0atch chords.
b- 6 2$8 DC /oltmeter.
c- 6 !66m) DC ammeter.
d- Digital multimeter
4, (7EO#&!
.he Silicon Controlled Rectifier 1SCR- is a semi conductor de/ice that is a member of a famil5 of
control de/ices called the th5ristors.
.he three terminals ha/e been named as )node1)-: Cathode 1K- and 2ate 12-.
Ahen 2ate is open'
Ahen no /oltage is applied across 2ate: M2 is re/erse biased while M! and M" are forward biased.
&o current flows and the SCR is Bff. 7f the applied is graduall5 increased: a stage is reached
when M2: breaNs down. &ow: it is in B& state. .he applied /oltage at which SCR conducts
hea/il5 without 2ate /oltage is called breaN o/er /oltage.
Ahen 2ate is positi/e w.r.t cathode'
.he SCR can be made to conduct hea/il5 at smaller applied /oltage b5 appl5ing a small potential
to the gate. M" is now =.(. M2 is R.(. )s soon as the 2ate current flows: anode current increases.
.he increased anode current maNes more electrons a/ailable at M2..his process continues and in a
small time: M2 breaNs down and SCR conducts hea/il5. Bnce SCR starts conducting: the 2ate
losses all control. E/en if gate /oltage is remo/ed: the anode current does not decrease at all. .he
onl5 wa5 to stop conduction is to reduce the applied /oltage to Hero.
COL(-%M+E#E C7%#%C(E#'$('C$!
5, C'#C='( D'%.#%M$!
(asic characteristics of SCR'
2ate characteristics of SCR
#?
J*DER)()D.
6, +#OCED=#E!
(asic Characteristics of SCR'
a- Connect the circuit as shown. )djust some DC /alue and connect an )mmeter and
8oltmeter.
b- &ow short the gate terminal to the anode terminal.
c- .hen SCR fires and is indicated b5 the flowing of anode current. 8oltage across anode to
cathode falls.
d- &ow: open the gate terminal and obser/e whether the SCR is B& or B==.
e- 7f the SCR is in the B& state: then the anode current is enough to Neep the SCR in the B&
position. 7f SCR is B==: the increase the DC /oltage to some more /alue and repeat the
abo/e procedure.
f- =ind out the appro<imate /alue of the holding current.
2ate Characteristics of SCR'
a- Connect the circuit as shown in the fig.
b- Connect the ammeter and the /oltmeter in the circuit.
c- )djust the )node to cathode /oltage of SCR to its full /alue.
d- ;aNe sure that the 2ate /oltage is in its min position. 8oltmeter across SCR full /oltage
applied and current meter shows no reading. .his means that the SCR is in the B== state.
e- &ow: /ar5 the gate current of the SCR with /oltage adjustment pot and current
adjustment pot until the SCR fires: which is indicated b5 the falling of the /oltage across
SCR and current flowing through the SCR.
9, (%B=L%# COL=MN!
7g > %.$m)
S.&o 8)K 18olts- 7)K 1m)-
28
#8
%8
$6
J*DER)()D.
;, E*+EC(ED .#%+7!

<, #E$=L( !
>, C'C% D=E$('ON$!
a- E<plain the worNing of SCR.
b- Define holding current.
c- Ahat are the specifications of the SCR used in the trainerL
$!
J*DER)()D.
EBperiment <: Date!
$2
J*DER)()D.
$(%('C C7%#%C(E#'$('C$ O) =3(
!. %'M! .o obtain the /oltampere characteristics of TM.
2, %++%#%(=$!
e- TM. e<perimental trainer Nit with user manual and 0atch chords.
f- 6 !$8 DC /oltmeter.
g- 6 !6m) DC ammeter.
h- Digital multimeter
4, (7EO#&!
.he Tni Munction .ransistor is a three terminal semiconductor de/ice with negati/e resistance
characteristics. 7t consists of a bar of nt5pe silicon with a small pt5pe insert 1emitter- near to one
of the ends. .he two ohmic contacts at the ends of the nt5pe bar constitute two terminals (ase!
and (ase2.
.he rectif5ing contact is called the Emitter. .he de/ice shows negati/e resistance characteristics
between its Emitter and (ase ! terminals.
) fi<ed interbase potential 8(( is applied between (ase! and (ase2.
.he most important characteristic of TM. is that of the input diode between E and (ase !.7f base
2 is open circuited: then: 7(2>6:input 87 char is same as that of the normal pn junction diode.
=or the fi<ed /alue of 8((: a negati/e resistance char is obtained.
.he principle application of TM. is that of a switch which allows rapid discharge of a capacitor
connected between emitter and (ase!. this is the principle of operation of a Rela<ation Bscillator
using TM..
E?uivalent circuit of =3(!
=igure shows the eIui/alent circuit of TM.. R(! and R(2 represent the resistance of
the silicon bar from the junction to bases ( ! and ( 2 respecti/el5.
R (! is shown as a /ariable resistance: since its /alue depends on bias /oltage 8 D . .he diode
represents the pn junction formed between the emitter and the base.
COL(-%M+E#E C7%#%C(E#'$('C$!
$"
J*DER)()D.
5, C'#C='( D'%.#%M$!
6, +#OCED=#E!
!. Connect the circuit diagram as shown in the =igure.
2. ;aNe sure that the potentiometer is in its minimum position 1anti clocN wise direction- ..
". )djust the potentiometer in clocN wise direction and noted down the /alues of the
/oltmeter and milli ammeter.
#. .abulate these /alues and draw graph between emitter /oltage 8E and current 7E.
9, (%B=L%# COL=MN!
S.&o Emitter 8oltage 18- Emitter current1m)-
$#
J*DER)()D.
;, E*+EC(ED .#%+7!

<, #E$=L( !
>, C'C% D=E$('ON$!
d- E<plain the worNing of TM..
e- Define peaN /oltage.
f- Define /alle5 /oltage.
g- E<plain the concept of &egati/e resistance
$$
J*DER)()D.
EBperiment >: Date!
$%
J*DER)()D.
$(=D& O) C#O %++L'C%('ON$
!. %'M! .o use a CRB 1Cathode Ra5 Bscilloscope- for freIuenc5 and phase
measurement.
2, %++%#%(=$!

Sl.&o &ame of the de/ice Range 3&o 4t5.
!. .eneral purpose C#O $;hH 6! &o
2. %,), generators 62 &o
". #) signal generators 6! &o
#. 7ig pass circuit 6! &o
)s scopes we ha/e operate at !6;hH and some up to "6 ;hH we should include
measurement of freIuencies of the order of $ to !$ ;hH also.1=or )= onl5 Lissojoes figure-.
CRO APPLICATIONS
4, (7EO#&!-
(5 appl5ing suitable alternating /oltage to the two sets of deflection plates:
/arious figures is the form of straight line or one or more closed loops ma5 be obtained on the
screen.
Let 8< and 85 be the instantaneous /alues of /oltages applied to the < and 5 plates
T< > 8< sin A<t
T5 > 85 sin 1A5t @ -
Ahere 8< & 85 are the amplitudes of the /oltages: A< & A5 are the angular freIuencies of the
/oltages and is the phase angle of /oltage T5.
CB&D7.7B& !. =or A< > A5P > 6
T5 > 85 3 T< P T< Straight line
CB&D7.7B&S 2. A< > A5: > 32 radians
T<
2
3 8<
2
@ T5
2
3 85
2
> !
Ellipse.
CB&D7.7B& ". A< > A5P > 32 radians: 8< > 85 > 8
T<2 @ T52 > T2 circle
CB&D7.7B& #. 7f A< and A5 are related b5 simple integers then
$+
J*DER)()D.
Ae obtain closed figures with multiple loops.
a- A< > 2A5
b- 2A< > A5
c- A< > "A5
d- "A< > A5
7n general n< w< > n5 w5 gi/e closed loop figures where n< and n5 are integers.. n< and n5 are the
point of tangencies of the figure with horiHontal and /ertical a<is respecti/el5 drawn at the edge
1either top or bottom-
=< 3 f5 > points of .angenc5 to a /ertical line 3 points of tangenc5 to a horiHontal line > A< 3 A5.
.o measure the freIuenc5 of an alternating /oltage of sinusoidal wa/e shape: it is applied to one
set of deflection plates to the other set of deflection plates is applied the sinusoidal /oltages from
a /ariable freIuenc5 standard oscillator. .he freIuenc5 of this oscillator is /aried until. Single
loop stationar5 pattern is obtained. 7n this: the freIuenc5 of the sinusoidal /oltage is the same as
the freIuenc5 of the oscillator /oltage. Bscillator freIuenc5 ma5 be found from the calibrated dial
of the oscillator.
Br
) looped Lissajous figure ma5 be used and freIuenc5 of alternating /oltage ma5 be calculated
using the relation gi/en in abo/e eIuation.
0J)SE ;E)STRE;E&.' .he phase difference between two sinusoidal /oltages of the same
freIuenc5 can be measured using a CRB. .he two /oltages are applied to the two deflection
plates of the CRB simultaneousl5. .he resulting Lissujous figures is an ellipse as shown in fig.
.he ma<imum displacement is the * direction & the intercept of the ellipse with the * 9 a<is are
measured. 7f the phase difference between the two /oltages is then it can be shown that
sin > (3)
.he phase difference can also be calculated from the ma<imum horiHontal displacement \! and
the intercept on the <a<is <2. .hus
Sin > \2 3 \!
#. 0RBCEDTRE =BR =RE4TE&C* ;E)STRE;E&.'
0)R.)
!. ;aNe the connections as per the figure. =eed a ! NhH signal from the )= generator. )djust
sensiti/it5 switch to con/enient position so that one c5cle can be measured from the screen.
=reIuenc5 is gi/en b5 !3. 12=-. Repeat for another $ to % /alues: the abo/e procedure. .aNe $
to % readings.
0RBCEDTRE 0)R.(
=RE4TE&C* ;E)STRE;E&. B= )& T&K&BA& S7&TSB7D)L S72&)L'
!. .o one set of deflection plates 1sa5 <- appl5 the Nnown alternating signal. 1Nnown in the sense
that its freIuenc5 can be measured-.
$,
J*DER)()D.
2. .o the other set of deflection plates 15- appl5 the unNnown alternating signal.
". &ow adjust the freIuenc5 of the signal to such a /alue such that the figure obser/ed on the
screen is a single loop.
#. &ow read the freIuenc5 of the signal gi/en to the < plates from the oscillation. .he freIuenc5
of the unNnown signal is eIual to the Nnown signal freIuenc5.
$. ) looped Lissajo5Ds figure ma5 be obtained when the freIuenc5 of the unNnown signal bears
some relation to the freIuenc5 of the Nnown signal.
%. .he freIuenc5 of the unNnown signal ma5 be found from the eIuation gi/en below.
=<3f5 > points of tangencies to a /ertical line 3 points of
tangencies to a horiHontal line.
i.e. n< f< > n5 f5
+. =or two figures measure the freIuenc5 of the signal and tabulate
the reading as per tabular columns.
0)R. C 0RBCEDTRE =BR ;E)STR7&2 .JE 0J)SE B= ) 278E& S7&TSB7D)L
S72&)L.
!. )ppl5 the sinusoidal signal from ).= generator to the plates
1channel !- and sinusoidal signal with some phase shift is feel to
channel 2 1\ plates-.
2. .he necessar5 phase shift is obtained using a high pass 1R.C- circuit.
". &ow obser/e an ellipse on the screen.
#. ;easure the ma<imum displacement in the * 9 direction and term it as C)D. also measure the
distance between the intercpets of the ellipse with the /ertical a<is. .erm this distance as C(D.
$. E/aluate sin
9!
(3) >
%. 8erif5 the /alue of theoreticall5. 1.he theoretical & practical /alues should tall5-
> tan 9! \C 3 R
\C > ! 3 2 fc

$?
J*DER)()D.
$. .)(TL)R CBLT;&
S.&o .ime period =reIuenc5
9, #esult!
;, C'C% CO'CE !-
!. List the structured details of a CRB.
2. Ahat is the function of accelerating anode in a CR.L
". Ahat is the amount of potential to be applied at the final anode and state the reasons for
appl5ing that /oltageL
#. Ahat is the nature of the signal applied to the horiHontal and /ertical deflection plates.
$. Ahat are the /arious screen colours a/ailable. Ahat is the chemical used for each of the
colour.
%. List the /arious applications of a CRB.
+. Ahat are Lissajous figures. Jow are the5 formedL
,. Jow can 5ou obtain an ellipse on a CRB screenL
%6
J*DER)()D.
EBperiment 1A: Date!
B3( - B'%$'N.
1, %'M! a- .o design a selfbias circuit for a (ipolar Munction .ransistor and to /erif5 its
worNing.
2, %++%#%(=$!
! &pn transistor (C!6+ !
2 Resistors #.+ N: ".2N: !6K & !N ! each
" D.C. )mmeter or multimeter 6 to 26m) !
# D.C. 8oltmeter or multimeter 6 to 268 !
$ Dual Channel Regulated power
suppl5
6"68 !
4, (7EO#&!
(iasing is used to obtain a stable operating point against de/ice /ariation. .he operating
point depends upon transistor parameters and the5 in turn depend on temperature.
.he transistor parameters liNe change from one transistor to another: although the5 are of
similar t5pe. i.e. the /alue of the parameters might be different for different de/ices
belonging to the same t5pe.
E/en with the state of the art in Semiconductor De/ice .echnolog5: transistors of a particular
t5pe still come with a wide spread /ariation in the /alues of some parameters..hermal
instabilit5 causes great changes in re/erse current 7C6. 7t doubles for e/er5 !6C rise in
temperature. 7t in turn causes the collector junction temperature to rise: which in turn
increases the /alue of 7C6 further. )s a result: the /alue of 7C6 increases and there occurs a
shift in the 4point of the transistor,
.he Emitter biased or the Selfbiased circuit worNs in the following manner. 7f there is an
increase in the collector current 7C: then: the /oltage drop across the resistor Re increases.
(ecause of this increase: the base current actuall5 decreases. (ecause of this: the effect of the
increase in the collector current is decreased.
Jowe/er: there is bound to be loss of )C signal gain due to the same reason.
.o a/oid the loss of )C signal gain because of this: a capacitor is used to b5pass the emitter
resistor Re.
%!
J*DER)()D.
5, C'#C='( D'%.#%M!
6, +#OCED=#E!
!. Design the reIuired circuit as per the reIuirements.
2. )fter connecting the circuit as per the design: measure 8CE: 8(E: 8e: 7C: 7( and 8C
using multimeters. Calculate the stabilit5 factor and the operation point. 8erif5
theoreticall5.
9, OB$E#C%('ON$ %ND C%LC=L%('ON$!
8CC >
8C >
8E >
RC >
8( >
8CE >
7C >
$ G
>
8CC > 7C RC @ 8CE which implies
7C > 18CC 8CE-3RC
R(3RE > 1!@-1S!-3 !@ 9 S
8 > 7(R( @ 8E @ 8(E
Ahere 8 is the /oltage of the .he/eninDs eIui/alent /oltage source.
8 > 17C3-R( @ 8E @ 8(E
.hen:
%2
J*DER)()D.
R! > R( 18CC 38-
R2 > R!8 318CC8-
=rom the circuit: the current through R! is gi/en b5'
7!>8CC31R! @ R2-
.herefore: the 8oltage 82 de/eloped across R2 is gi/en b5 8oltage Di/ision 82>8CC R231R!
@ R2-
B@ appl@ing HCL to te base circuit
82 > 8(E @ 8E
> 8(E @ 7E RE.
>G 7E > 182 9 8(E- 3 RE.
&ow: appl5ing K8L to the collector side circuit: we get
8CC > 7CRC @ 8CE @ 7E RE
> 7C 1RC @ RE- @ 8CE 1since 7E 7C-
>G 8CE > 8CC 7C 1RC @ RE-
;, #E$=L(!
<, C'C% COCE!
!- Ahich transistor parameters /ar5 with temperatureL
2- Ahat is meant b5 Cload lineDL
"- Ahat is meant b5 the Eoperating pointF of a transistorL
#- Ah5 is a capacitor used to shunt the emitter resistor of selfbiased transistorL
$- Ahat is meant b5 thermal runawa5L
%- Ahat are the other biasing arrangements possible 1other than selfbias-L
+- Ah5 is the selfbias circuit preferred o/er other possible biasing circuitsL
,- Define Stabilit5 factor and e<plain its significance.
?- Ahat is the stabilit5 factor of a Commonbase transistor circuitL
%"
J*DER)()D.
%#
J*DER)()D.
)E( B'%$'N.!
1,%'M! .o design a source selfbias circuit and /erif5 its operation.
2,%++%#%(=$!
S.&o. 'tem Specification 3 range &o.
! nM=E. (=A!6 !
2 Resistors #.+N: 22N: #+6 !
" D.C. ammeter 16!66 ma- !
# D.C. /oltmeter 1626 8- !
$ Connecting wires

4,(7EO#&!
)s in all amplifiers consideration must be gi/en to biasing the =E. to place its operating
point within the linear portion of its acti/e region. .he factors go/erning selection of operating
point for a =E. are similar to that for (M..
TnliNe a (M. a re/erse bias /oltage is to be applied across the gate to source junction in a
=E.. =or a specified drain current: the corresponding 8gs can be obtained. Since the gate current
is negligible: the reIuired source resistance can be determined as ratio of 8gs to 7d.
) capacitor Cs ha/ing /er5 large /alue is used to b5pass the resistor RS so as to a/oid the
degenerati/e feedbacN for a.c. signals. .he problem of biasing further is simplified b5 the fact
that there e<ists a /alue 8gs for which the drain current does not change with temperature.
Jence it is possible to bias a =E. for Hero drain current drift.
5,+#OCED=#E!
!- ;aNe the connections as per the circuit diagram.
2- )ppl5 a /oltage of sa5 !$8 to the circuit.
"- ;easure drain current: 8ds: 8gs.
#- Determine the operating point.
$- Design the /alues of biasing resistors.
%- 8erif5 the operation of circuit.
%$
J*DER)()D.
6,C'#C='( D'%.#%M!
9,#E$=L(!
;, C'C% COCE!
!- Ahat is the ad/antage of a =E. biasing circuit abo/e (M. biasingL
2- Ahat is the need for the capacitor CSL
"- Ah5 are the coupling capacitors reIuiredL
#- Ahat is meant b5 thermal stabiliHationL
$- 2i/e e<amples of stabiliHation circuits
%%
J*DER)()D.
EBperiment 11: Date!
COMMON EM'((E# B3( %M+L')'E#
!. )7;' .o determine the freIuenc5 response of a CommonEmitter (M. amplifier.
2. )00)R).TS'
! &0& (M. (C!6+ !
2 Resistors $2K:!$K:#.+K:!66 BJ; ! each
" Capacitors 6.6!Rf:6.66!Rf
# Regulated 0ower
Suppl5
6"68 !
$ Cathode Ra5
Bscilloscope
Dual .race 1626 ;JH- !
% )= Signal 2enerator 6!666 NJH !
+ Connecting
wires3probes
". .JEBR*'
7n a single stage CE amplifier: the weaN time/ar5ing signal is applied to the base of the
transistor. Due to this: a small base current 1which itself is time /ar5ing- starts flowing. Due to
the action of the transistor: a much larger current flows through the collector load. .his current is
actuall5 about S times the base current. .herefore: a weaN signal applied at the base appears in an
amplified form at the output of the transistor circuit. 7t is in this fashion that the Common Emitter
amplifier acts as an amplifier.
Jowe/er: for the transistor to act as a good amplifier: there are certain reIuirements that must
be met. 0articularl5: we need to stud5 the circuitr5 that is associated with a practical amplifier.
.he following are the /arious circuit elements that are reIuired.
i- .he biasing circuit' .he resistors R!: R2 and Re form the biasing circuit for the
transistor. .his arrangement is necessar5 to establish a proper operating point. 7f the transistor is
not properl5 biased: it ma5 go into saturation for the positi/e half c5cle or it ma5 go into cutoff in
the negati/e half c5cle.
ii- 7nput Capacitor Cin' )ll practical signal sources ha/e some output resistance. 7f
necessar5 steps are not taNen: this resistance comes in parallel with R2 of the biasing circuit:
disturbing the operating point. 7f a capacitor Cin is used in series with the source as shown: it
allows onl5 the ac component to pass through but isolates the signal source from R2. 2enerall5:
an electrol5tic capacitor or appropriate capacit5 is used as Cin.
iii- Emitter (5pass Capacitor Ce' .he presence of the emitter resistor Re in the biasing
circuit has the effect of reducing the gain of the amplifier. .his happens because the current
flowing through the Re causes the emitter /oltage to rise. .o impro/e the gain of the amplifier:
the resistor Re is b5passed b5 a capacitor Ce. .his capacitor pro/ides a lowimpedance path for
the ac component: thereb5 impro/ing gain.
i/- Coupling Capacitor Cc' .he coupling capacitor is connected between the output of one
stage to the input of the second. 7n its absence: the Rc of the first stage comes in parallel to R! of
the second stage: disturbing the operating point of the second stage. )lso: the capacitor ser/es to
isolate the dc between the two stages.
%+
J*DER)()D.
2ain' .he ratio of the output electrical Iuantit5 to the input of the amplifier is called its gain. 7f
the output and the input Iuantities are /oltages: the gain is called the 8oltage 2ain of the
amplifier.
=reIuenc5 Response' .he /oltage gain of an amplifier /aries with signal freIuenc5. .his
happens because the reactance of the capacitors in the circuit changes with signal freIuenc5. )
plot between the /oltage gain and the signal freIuenc5 of an amplifier is called the freIuenc5
response of the amplifier.
(andwidth' .he range of freIuenc5 o/er which the gain is eIual to or greater than about
+6.+K 1!3Y2 times- of the ma<imum gain: is Nnown as the bandwidth of the amplifier.
Decibel 2ain' .he /oltage gain of an amplifier in decibel notation is gi/en b5 26 log!6 )/ where
)/ is the /oltage gain.
"db (andwidth' Ahen the /oltage gain attains a /alue of !3Y2 times the ma<imum gain: the
Decibel /oltage gain attains a /alue that is "db less than the ma<imum decibel gain. .herefore:
the bandwidth of an amplifier can also be defined as the range of freIuenc5 o/er which the
decibel gain is not less than the ma<imum decibel gain minus "d(.
#. C7RCT7. D7)2R);'

$. 0RBCEDTRE'
!- Connect the circuit as per the circuit diagram. Keep the signal generator in the sinusoidal
mode.
2- Choose a /alue for the amplitude of the input signal: sa5: $6 m8 0eaNto0eaN.
"- )ppl5 a signal of freIuenc5 26 JH to the circuit. Bbser/e the output wa/eform on the
CRB. &ote the amplitude of the output sinusoid.
#- 7ncrement the freIuenc5 of the applied signal in small con/enient steps. Each time:
adjust the input amplitude to the chosen /alue 1$6m8-. &ote the output amplitude.
Repeat this step till a freIuenc5 of 266 NJH.
%,
J*DER)()D.
$- .abulate all readings. )t each input freIuenc5: calculate the gain as )/ > 8o 3 8i. )lso
find the /alue of the gain in decibel as 26 log )/.
%- 0lot a graph between the input freIuenc5 1f- and the gain1in decibel- on a semilog graph
paper.
+- Bn the graph: identif5 the "d( points. .he freIuenc5 range between the "d( points is
nothing but the bandwidth of the gi/en amplifier.
%. .)(TL)R CBLT;&'
'nput Coltage -Cin G 6AmC1
$,No, 'nput )re?uenc@ Output Coltage
-Cout1
Coltage .ain
%vG CoutICin1
Coltage .ain in
db G2Alog-%v1
%?
J*DER)()D.
+. E\0EC.ED 2R)0J'
,. RESTL.'
878) 8BCE'
!- Ahat is the significance of the
emitterb5pass capacitor and the
coupling capacitor in the CE amplifier circuitL
2- E<plain wh5 re/ersal of phase occurs in a (M. CE )mplifier.
"- Ahat is the significance of the operating point in the worNing of an amplifierL
#- Ahat happens if an amplifier is biased at cutoff or at saturationL
$- Ahat is a load lineL Jow is the ac load line different from the dc load lineL
%- Ahat is the significance of the bandwidth of an amplifierL
+- Ahat is meant b5 2ain(andwidth 0roductL Ahat is its significanceL
EBperiment 12: Date!
COMMON $O=#CE )E( %M+L')'E#
1, %'M! .o stud5 and obtain the freIuenc5 response of a commonsource M=E. )mplifier.
2, %++%#%(=$!
+6
J*DER)()D.
S.No. Name Range/Specification Qty
1 n-channel JFET BFW10 1
2 Reito! "#$ %&#$ '.(#$ 2.2# 1 each
) *apacito! 0.01 +F )
' Reg,late- .o/e!
S,pply
0-)00 1
% *atho-e Ray
1cillocope
2,al T!ace 30-20 4567 1
& 8F Signal
9ene!ato!
0-1000 :56 1
( *onnecting
/i!e/p!o;e
4, (7EO#&!
.he weaN signal is applied between the gate and the source of the =E.. .he output is
obtained between the drain and the source terminals. =or proper operation: the gate must
be negati/e with respect to the source: ie.: the input circuit should alwa5s be re/erse
biased. .his is achie/ed b5 the biasing arrangement.
) small change in the re/erse bias on the gate produces a large change in drain current. .his
fact maNes =E. capable of raising the strength of a weaN signal. During the positi/e half of
the signal: the re/erse bias on the gate decreases. .his increases the channel width and
hence the drain current. During the negati/e halfc5cle of the signal: the re/erse /oltage on
the gate increases. ConseIuentl5: the drain current decreases. .he result is the small
change in /oltage at the gate produces a large change in drain current. .hese large
/ariations in drain current produce large output across the load RL. .herefore: a =E. acts
as an amplifier.
amplifier.
Decibel 2ain' .he /oltage gain of an amplifier in decibel notation is gi/en b5 26 log!6 )/ where
)/ is the /oltage gain.
"db (andwidth' Ahen the /oltage gain attains a /alue of !3Y2 times the ma<imum gain:
the Decibel /oltage gain attains a /alue that is "db less than the ma<imum decibel gain.
.herefore: the bandwidth of an amplifier can also be defined as the range of freIuenc5 o/er
which the decibel gain is not less than the ma<imum decibel gain minus "d(.
5, C'#C='( D'%.#%M!
2.2 N
+!
J*DER)()D.
6, +#OCED=#E!
mode.
2- choose a /alue for the amplitude of the input signal: sa5: $6 m8 0eaNto0eaN.
"- )ppl5 a signal of freIuenc5 26 JH to the circuit. Bbser/e the output wa/eform on the
CRB. &ote the amplitude of the output sinusoid.
#- 7ncrement the freIuenc5 of the applied signal in small con/enient steps. Each time:
adjust the input amplitude to the chosen /alue 1$6m8-. &ote the output amplitude.
Repeat this step till a freIuenc5 of !;JH.
$- .abulate all readings. )t each input freIuenc5: calculate the gain as )/ > 8o 3 8i. )lso
find the /alue of the gain in decibel as 26 log )/.
%- 0lot a graph between the input freIuenc5 1f- and the gain1in decibel- on a semilog graph
paper.
+- Bn the graph: identif5 the "d( points. .he freIuenc5 range between the "d( points is
9, .)(TL)R CBLT;&'
7nput 8oltage 18in > $6m8-
? N
$% N
#.+ N
+2
J*DER)()D.
S.&o. =reIuenc5 Butput 8oltage
18out-
8oltage 2ain
18out38in-
8oltage 2ain
1d(-
E*+EC(ED .#%+7!

;, #E$=L(!
+"
J*DER)()D.
<, C'C% COCE!
!- Compare the operation and freIuenc5 response of a Common Source =E. amplifier with
those of a Common Emitter (M. amplifier.
2- Ahat are the ad/antages of using a =E. instead of a (M.L
"- Ahat is the t5pical range of bandwidth for the =E. Common Source amplifierL
#- Ah5 is a source b5pass capacitor used in a =E. Common Source amplifierL
$- Can we interchange the source and drain terminals in a =E. circuitL Can we do the same
with the emitter and collector terminals of a (M. circuitL
%- Ahat is a ;BS=E.L Jow is it different from a M=E.L Ahat are its t5pical applicationsL
+#
J*DER)()D.
EBperiment! 14 Date!
EM'((E# )OLLOEE#
!.)7;' .o determine the freIuenc5 response: input impedance and output impedance of a
CommonCollector (M. amplifier 1Emitter =ollower-.
2. )00)R).TS'
! &0& (M. (C!6+ !
2 Resistors $2K:!$K:#.+K:!66 BJ; ! each
" Capacitors 6.6!Rf:6.66!Rf
# Regulated 0ower
Suppl5
6"68 !
$ Cathode Ra5
Bscilloscope
Dual .race 1626 ;JH- !
% )= Signal 2enerator 6!666 NJH !
+ Connecting
wires3probes
". .JEBR*'
.he common collector transistor )mplifier is also called as Emitter =ollower because its
/oltage gain is close to unit5 and hence a change in base /oltage appears as an eIual change
across load at the emitter. .he emitter follows the input signal. .he input resistance is /er5 high
and the output resistance is /er5 low . Jence the most common use of the CC circuit is as a buffer
stage which performs the function of resistance transformation o/er a wide range of freIuencies.
.he Emitter =ollower increases the power le/el of the signal
i- .he biasing circuit'.he resistors R!: R2 form the biasing circuit for the transistor. .his
arrangement is necessar5 to establish a proper operating point. 7f the transistor is not properl5
biased: it ma5 go into saturation for the positi/e half c5cle or it ma5 go into cutoff in the negati/e
half c5cle.
ii- 7nput Capacitor Cin' )ll practical signal sources ha/e some output resistance. 7f
necessar5 steps are not taNen: this resistance comes in parallel with R2 of the biasing circuit:
disturbing the operating point. 7f a capacitor Cin is used in series with the source as shown: it
allows onl5 the ac component to pass through but isolates the signal source from R2. 2enerall5:
an electrol5tic capacitor or appropriate capacit5 is used as Cin.
iii- Coupling Capacitor Cc' .he coupling capacitor is connected between the output of one
stage to the input of the second. 7n its absence: the Rc of the first stage comes in parallel to R! of
the second stage: disturbing the operating point of the second stage. )lso: the capacitor ser/es to
isolate the dc between the two stages.
amplifier.
+$
J*DER)()D.
#. C7RCT7. D7)2R);'

$. 0RBCEDTRE'
mode.
2- Choose a /alue for the amplitude of the input signal: sa5: $6 m8 0eaNto0eaN.
"- )ppl5 a signal of freIuenc5 26 JH to the circuit. Bbser/e the output wa/eform on the CRB.
&ote the amplitude of the output sinusoid.
#- 7ncrement the freIuenc5 of the applied signal in small con/enient steps. Each time: adjust
the input amplitude to the chosen /alue 1$6m8-. &ote the output amplitude. Repeat this step
till a freIuenc5 of 266 NJH.
$- &otice that there is no phase difference between the input and the output signal of the
)mplifier.
%- .abulate all readings. )t each input freIuenc5: calculate the gain as )/ > 8o 3 8i. )lso find
the /alue of the gain in decibel as 26 log )/.
+- 0lot a graph between the input freIuenc5 1f- and the gain1in decibel- on a semilog graph
paper.
,- Bn the graph: identif5 the "d( points. .he freIuenc5 range between the "d( points is
?- Calculation of 7nput impedance' !K resistor is present between 8s and 8i.
.he current flowing through this resistor is the current flowing through the
networN. 7i > 18s8i- 3 !K P input resistance Ri > 8i37i.
+%
J*DER)()D.
!6- Calculation of Butput impedance' )ppl5 ! KJH: $6m8 signal at the input node. Connect a
DR( with all switches at min position. )cross the output terminals and increase the
resistance such that 8o > 8i32.
.he /alue of resistance in the DR( is eIual to the output resistance of the )mplifier.
%. .)(TL)R CBLT;&'
7nput 8oltage 18in > $6m8-
S.&o. 7nput =reIuenc5 Butput 8oltage
18out-
8oltage 2ain
)/> 8out38in-
8oltage 2ain in
db >26log1)/-
++
J*DER)()D.
+. E\0EC.ED 2R)0J'
,. RESTL.'
878) 8BCE'
!- Ahat is the significance of the
coupling capacitor in the CC
amplifier circuitL
2- E<plain wh5 re/ersal of phase
does not occur in a (M. CC )mplifier.
"- Ahat is the significance of the operating point in the worNing of an amplifierL
#- Ahat happens if an amplifier is biased at cutoff or at saturationL
$- Ahat is a load lineL Jow is the ac load line different from the dc load lineL
%- Ahat is the significance of the bandwidth of an amplifierL
+- Ahat is meant b5 2ain(andwidth 0roductL Ahat is its significanceL
,- Ah5 is the Common Collector )mplifier called as Emitter =ollowerL
+,

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