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=
Deterministic J itter (DJ )
Bounded with a peak-to-peak value that can be predicted
Caused by transmission-line losses, duty-cycle distortion, spread-
spectrum clocking, crosstalk
Categories
Sinusoidal J itter (SJ or PJ )
Data Dependent J itter (DDJ )
Intersymbol Interference (ISI)
Duty Cycle Distortion (DCD)
Bounded Uncoirrelated J itter (BUJ )
10
Sinusoidal or Periodic J itter (SJ or PJ )
Repeats at a fixed frequency due to modulating effects
Spread spectrum clocking
PLL reference clock feedthrough
Can be decomposed into a Fourier series of sinusoids
11
( ) ( )
+ =
i
i i i
t A t SJ cos
The jitter produced by an individual sinusoid is
( )
>
=
t A
t A
t A
t PDF
SJ
0
1
2 2
|
.
|
\
|
+ +
|
.
|
\
|
=
2 2 2
1
DCD DCD
DCD
t t t PDF
=
( )
( ) ( )
2
2 /
2
2 /
DJ t DJ t
t DJ
+
+
=
( ) ( ) ( )
(
(
+ = =
+
2 2
2
2 /
2
2 /
2 2
1
*
RJ RJ
DJ t DJ t
RJ
e e t DJ t RJ t JT
Dual Dirac J itter Model
J itter at a given BER is computed considering
both leading and trailing edges
19
( ) ( )
( )
=
(
(
|
|
.
|
\
|
+
+
|
|
.
|
\
|
=
(
(
|
|
.
|
\
|
+
+
|
|
.
|
\
|
=
t
x
RJ RJ
trail
RJ RJ
lead
dx e t erfc
DJ t UI
erfc
DJ t UI
erfc t BER
DJ t
erfc
DJ t
erfc t BER
2 2
2
2 /
2
2 /
5 . 0
2
2 /
2
2 /
5 . 0
where
,
Dominant Terms
t
Dual Dirac J itter Model Example
20
Plot measured jitter
PDF vs Q-scale
( )
0.5 typically density, transition the is where
T
|
|
.
|
\
|
=
T
BER
BER
erf BER Q 1 2
1
Tails are used to
extract
RJ
Extrapolate to Q(0) to
extract separation of
dual-Dirac delta
functions
peak value - to - peak jitter tic determinis Actual
functions delta Dirac - dual of seperation Extracted
=
=
pp
DJ
DJ
+ ==
+
2 2
2
2 /
2
2 /
2 2
1
PDF Dirac - Dual
RJ RJ
DJ t DJ t
RJ
e e
System J itter Budget
For a system to achieve a minimum BER performance
22
( ) ( ) sys Q sys DJ UI
RMS BER
+
The convolution of the individual deterministic jitter
components is approximated by linear addition of the terms
( ) ( )
=
i
i DJ sys DJ
The convolution of the individual random jitter components
results in a root-sum-of-squares system rms value
( ) ( )
=
i
RMS RMS
i sys
2
J itter Budget Example PCI Express System
23
Architecture
J itter Model
[Hall]
J itter Budget Example PCI Express System
24
( ) ( ) ( ) ( ) ( ) clock DJ RX DJ channel DJ TX DJ sys DJ
+ + + =
( ) ( ) ( ) ( ) ( ) clock RX channel TX sys
RMS RMS RMS RMS RMS
2 2 2 2
+ + + =
6.15 * 14.069 =
[Hall]
160
Next Time
Clocking Architectures
25