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(c) | / |
(b) | / |
(d) | / |
[GATE 1989: 2 Marks]
Ans. (a)
=( )
or
3. The value of the resistance, R, connected across the terminals, A and B, (ref. Fig.) which
will absorb the maximum power, is
3K
4K
A
AC
R
6K
4K
(a) 4.00k
(b) 4.11k
(c) 8.00k
(d) 9.00k
[GATE 1995: 1 Mark]
Ans. (a)
For maximum power transfer = finding Thevenins equivalent between
point A, B replace voltage source by its internal impedance
= +
= + =
4. The Thevenin equivalent voltage VTH appearing between the terminals A and B of the
network shown in the figure is given by
100 00V
j2
AC
-j6
j4
VTH
B
(a) j 16(3-j4)
(b) j 16(3+j4)
(c) 16(3+j4)
(d) 16(3-j4)
[GATE 1999: 2 Marks]
Ans.
(a)
The voltage at the node a is 10000
( )
=
+
= ( )
5. Use the data of the figure (a). The current I in the circuits of the figure (b)
R2
R2
R1
A
R3
R1
R4
10V
2A
R3
B
R4
i=?
20V
(a) -2 A
(b) 2 A
(c) -4 A
(d) +4 A
[GATE 2000: 2 Marks]
Ans.
(c)
6. In the network of the figure, the maximum power is delivered to RL if its value is
i1
40
0.5 i1
20
RL
50V
(a) 16
(b) 40/3
(c) 60
(d) 20
[GATE 2002: 2 Marks]
Ans.
(a)
For maximum power delivered, RL must be equal to Rth.
I1
40
0.5 I1
20
50V
()
()
=
,
= . +
= . () + . = .
I1
40
0.5 I1
20
50V
=
=
.
7. For the circuit shown in the figure, Thevenins voltage and Thevenins equivalent resistance
at terminals a-b is
1A
i1
0.5 i1
10V
RL
(a) 5 V and 2
(b) 7.5 V and 2.5
Ans.
(c) 4 V and 2
(d) 3 V and 2.5
[GATE 2005: 2 Marks]
(b)
=
KCL at node a
+
=
2 Vab = 7.5
For Rth deactivate independent sources (10V, voltage source by zero
impedance and 1A current source by open circuit)
= = .
VX
+
Vt
- VX +
+ 100V
-
(a) 2.4
(b) 8/3
4
RL
(c) 4
(d) 6
[GATE 2009: 2 Marks]
Ans.
(c)
For maximum power delivered to RL, RL = Rth of the network. (deactivate
independent source Vi)
Removing RL and connecting Vtest = 1 volt supplying current I. then Rth =
impedance looking into the network
=
VX
- +
I1
I
- +
VX
(I - I1 )
DC
1V
Rth
=
=
9. In the circuit shown below, if the source voltage VS = 100 53.130 V then the Theveninss
equivalent voltage in Volts as seen by load resistance RL is
j4
j6
+
VL1
VS
i1
AC
j40 i2
(a) 100900
(b) 80000
10 VL1
i2
RL = 10
(c) 800900
(d) 100600
[GATE 2013: 2 Marks]
Ans.
(c)
= +
= =
. =