DSP Architectures

CS/CE/EE -6398 Spring 2007

Time and Location Fridays 7:00 p.m – 9:45pm ECSS2.311
Office hours MW 3:30pm – 5:00pm
Professor Dr. Yuke Wang
Office ECSS 3.224
E-mail: yuke@utdallas.edu
Class Home webct
Pre-requisites CS 5330 Computer Science II /CS 6351 Computer Systems Design
CE 6304 (EE 6304, CS 6304) Computer Architecture
Textbook VLSI digital signal processing systems,
Authors: K.Parhi, ISBN: 0471241865 Wiley Interscience, 1999.
Supplement Reading
Computer Architecture: A Quantitative Approach - Second Edition
Authors: David A. Patterson and John L. Hennessy
ISBN: 1-55860-329-8, Publisher: Morgan Kaufman Publishers, Inc.
DSP Processor Fundamentals: Architectures and Features
Author: Phil Laspsley, Jeff Bier, Amit Shoham, Edward A. Lee
ISBN: 0-7803-3405-1, Publisher: IEEE Press
Digital Signal Processing Implementation Using the TMS320C6000 DSP Platform
Author: Naim Dahnoun, ISBN: 0-201-61916-4, Publisher: Prentice Hall PTR

[1] Texas Instruments, "TMS320 DSP Product Overview," 1998.

[2] Texas Instruments, "TMS320C6000 CPU and Instruction set Reference Guide,"
SPRU189F, Oct. 2000.
[3] Texas Instruments, "Code Composer Studio White Paper," SPRA520, May1999.
[4] Texas Instruments, "Code Composer Studio User's Guide," SPRU328B, Feb. 2000.
[5] Texas Instruments, "TMS320C6000 Programmer's Guide," SPRU198F, Feb.2001.
[6] Texas Instruments, "TMS320C6000 Assembly Language Tools User's Guide", SPRU186G, Jan. 2000.
Course Description
We will cover both hardware part and software part related to DSP processor
architecture. The content includes the instruction sets, the pipeline structure, techniques for
efficient implementation on such architectures, DSP applications including wireless
communication and multimedia.
Tentative Course Topics:
1. Introduction and general context.
2. DSP processor overview and performance evaluation.
3. DSP software development.
4. Typical DSP algorithms – Filters, FFT, Convolution etc..
5. Applications – communication, multimedia, low power design.
Work Required
Midterm exam 30% Feb. 23rd
Assignments/projects 30%
Final exam 40%

1
 Class Policies
• No Makeup exam. If you miss midterm exam, your final will be counted as 70%
instead of 40%. If you miss the final exam, you fail the course. Incomplete grades
will not be issued.
• All homework and project report should be submitted online on webct. Late
homework or project reports can not be accepted.
• Instructor/TA would not tell students how to do the assignment/project questions
before the due date. Instructor/TA would not be able to help students to debug their
program either.
• Regular class attendance and participation are expected. Students are responsible for
lectures and announcements if she/he misses the class.
• Lecture slides will be posted online.
• You are expected to do your own assignments and take tests without outside
assistance. All work must be your own. If cheating is detected by the TA or the
instructor, all parties involved will be denied any points, and the work may be sent to
university authorities for review, the student may fail the course as well.

Course Topics Sequence and Events

January 10, 2005 – April 25, 2005
Week Date Topics Assignments
Week1 1/12 Class syllabus, policies,
Introduction
Week2-4 1/19, 1/26, 2/2 Computer Architecture DLX, Assignment 1
VLIW
Week5-6 2/9, 2/16 DSP Architectures (TI, Assignment 2
Analog Device, ARM),
software optimization
Week7 2/23, Midterm Exam
Week8-10 3/2, 3/16, 3/23 DSP Introduction and DSP
algorithms
Week11-13 3/30, 4/6, 4/13 Various FFT algorithms and Assignment 3
implementations
4/20 Final Exam 4/25
4/27 Final project due Assignment 4

Schedule is subject to change and additional material may be added/removed in class as time
permits.