Prof Ram Meghe College of Engineering & Management,

Badnera-Amravati
Department of Electrical & Electronics Engineering
Subject:-Digital Electronics (5EX02)
UNIT-1
Que1. a) What are universal gates? Give truth table and realize AND gate using
universal Gates.
b). Explain digital signal representation using positive and negative logic.
Que2.a) Compare Analog and Digital signal.
b) Explain operation of following circuit using truth table.
A

OR
GATE

B
Que3. a) Explain OR gate with truth table and circuit diagram.
b) Explain NOR & NAND gate with truth table.
Que4. a) Compare Analog and Digital signal with an example.
b) Prove the Following:i.

A positive logic AND operation is equivalent to a negative logic OR

operation and vice versa.

ii.

A positive logic NAND operation is equivalent to a negative logic NOR

operation and vice versa.

Que5. a) What are universal gates? Give truth table and realize AND gate using
universal Gates.
b). Explain digital signal representation using positive and negative logic.
Que6. a) Explain OR gate with truth table and circuit diagram.
b) Explain NOR & NAND gate with truth table.

UNIT-2
Que1. a) State and Prove DeMorgans Theorem.
b) Minimize four variable logic function using K-Map
F(A,B,C,D)=m(0,1,2,3,5,7,8,9,11,14)

Que2. a) Minimize the logical function using K-Map and realize with basic gates.
F(A,B,C,D)=m (0,1,3,7,8,9,11,15)+ d(2,4,10,12,14)
b) Simply the following Boolean Function by using Quine McCluskey Method.
Y(A,B,C,D)= m (0,2,3,6,7,8,10,12,13)
Que3. a) What is Quad and Octet? How many Elements are eliminated using Quad and
Octet?
b) Minimize the logical function using K-Map and realize with basic gates.
F(A,B,C,D)=m (0,1,3,7,8,9,11,15)
Que4. a) Maximize the logical function using K-Map and realize with basic gates.
F(A,B,C,D)= m (2,4,5,6,8,10,12,13,14)
b) Simply the following Boolean Function by using Quine McCluskey Method.
Y(A,B,C,D)= m (0,2,3,6,7,8,10,12,13)
Que5. a) State and Prove DeMorgans Theorem.
b) Simply the following Boolean Function by using Quine McCluskey Method.
Y(A,B,C,D)= m (0,2,3,6,7,8,10,12,13)
Que6. a) Maximize the logical function using K-Map and realize with basic gates.
F(A,B,C,D)= m (2,4,5,6,8,10,12,13,14)
b) Minimize four variable logic function using K-Map
F(A,B,C,D)=m(0,1,2,3,5,7,8,9,11,14)

UNIT-3
Que1. a) Explain how two 1:16 de-multiplexer can be connected to get a 1:32 demultiplexers
b) Design an 8bit comparator using only two 7485 IC.
Que2. a) Implement the following Boolean Function using 8:1 Mux
i.

F(A,B,C,D)= m(0,1,3,4,8,9,15)

ii.

F(A,B,C) = m(1,3,5,6)

iii.

F(A,B,C,D)= m(0,2,6,10,11,12,13)+ d (3,8,4)

b) What is Multiplexer? What does bubble on signal lines indicate?

Que3. a) Implement the following Boolean Function using 4:1 Mux

F(A,B,C,D)= m(0,1,2,4,6,9,11,14)
b) Design 32:1 multiplexer using four 8:1 multiplexer and 2:4 decoder.
Que4. a) Draw and Explain 7 Segment Decoder
b) Design 9 bit Comparator IC to ODD parity checker.
Que5. a) Implement the following Boolean Function using 8:1 Mux
i.

F(A,B,C,D)= m(0,1,3,4,8,9,15)

ii.

F(A,B,C) = m(1,3,5,6)

iii.

F(A,B,C,D)= m(0,2,6,10,11,12,13)+ d (3,8,4)

b) What is Multiplexer? What does bubble on signal lines indicate?

Que6. a) Design 16 bit even parity bit checker circuit.
b) Explain how two 1:16 de-multiplexer can be connected to get a 1:32 demultiplexers.

UNIT-4
Que1. a) What is octal number? Convert 23 decimal to octal to binary.
b) Explain an Excess-3 code express decimal 5280 in Excess-3 code.
Que2.a) Convert the given binary numbers into hexadecimal.
a. 10001100
b. 00110111
c. 111101010110
b) Convert decimal 65, 535 to its hexadecimal and binary equivalents.
Que3. a) Explain decimal to octal conversion and vice-versa with an example.
b) Explain an Excess-3 code express decimal 5280 in Excess-3 code.
Que4. a) What is ASCII Code?
b) Represent the decimal numbers a) 396 and b) 4096 in binary form in

i.Binary code ii. Excess-3 Code

iii. Octal Code

iv. Hex Code

Que5. a) What is octal number? Convert 23 decimal to octal to binary.

b) Subtract the following 01001111 000 00101.
c) What is Excess-3 code?
Que6. a) Explain double dabble method for Decimal to binary conversion and convert
following numbers to binary: i. 13

ii. 23.6

iii. 12.5

b) Convert decimal 65, 535 to its hexadecimal and binary equivalents.

UNIT-5
Que1. a) Explain Half adder with the help of truth table.
b) What is 2s complement? Find 2s compliment of:
i.

0000 1111

ii.

0101 1010

Que2. a) Obtain the sum in following cases

i.

38 + 78

ii.

416 +C16.

b) Show this Subtraction in binary 47(10) 23(10).

Que3. a) Perform the following operation using 2s compliment method.
i.

48-23

ii.

23-48

iii.

48-(-23)

b) Perform the following operation.

i.

Add binary numbers

01101010
00001000
10000001
11111111

ii.

Multiply

1001 by 1101

iii.

Divide

1110101 by 1001

Que4.a) Explain Arithmetic Logic Unit with Block Diagram.

iv.-48-23.

b) Represent the following numbers in 2s compliment form

a. +7 and -7

b. +8 and -8

c. +15 and -15.

Que5. a) Explain Half adder with the help of truth table.

b) Show this subtraction in binary:

47(10) 23(10)

c) Perform Binary multiplication.

1001
1101
------Que6. a)What is 2s complement? Find 2s compliment of:
iii. 0000 1111
iv. 0101 1010
b) Obtain the sum in following cases
iii. 38 + 78
iv. 416 +C16.

UNIT-6
Que1. a) Explain the operation of J-K flip flop.
b) Explain operation of clocked RS flip- flops.
Que2. a) Explain Schmitt Trigger with the help of transfer characteristics
b) Explain the analysis of sequential circuits.
Que3. a) Explain the operation of J-K flip flop.
b) What is D flip-flop? Explain difference between positive edge and negative
edge triggered flip-flop.
Que4. a) Draw and Explain NAND gate Realization of a clocked SR flip- flop.
b) Explain the analysis of sequential circuits
Que5. a) Explain operation of clocked RS flip- flops.
b) What is D flip-flop? Explain difference between positive edge and negative
edge triggered flip-flop.

Que6. a) Draw and Explain NAND gate Realization of a clocked SR flip- flop.
b) Explain the Master Slave J-K flip- flop.