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Physics and Transport Modeling in

Nanoscale MOS Devices


Jean-Pierre Leburton
Department of Electrical and Computer
Engineering and Beckman Institute
University of Illinois at Urbana-Champaign
Urbana, IL 61801, USA

J.P. Leburton, IWSG-2009, IITB, India

eEC
EV
J.P. Leburton, IWSG-2009, IITB, India

EF

Threshold Voltage: Channel Formation


M

Flat band conditions

VG-VFB
qVFB

Vox

tox
After Y.Taur and T.H. Ning, FMVD, Cambridge, 2d ed.

VB
Channel potential
(non-equilibrium)
Ec

e e
e
e

qp

2qp

Ei
Efs
Ev

Efm

Depletion

Inversion potential

VT = VFB + VC + 2! p +
!!!!!!!!!!!!!

1
2" 0" s qN a (2! p + VC # VB )
Cox
Depletion charge

J.P. Leburton, IWSG-2009, IITB, India

MOSFET Operation Principles*


Charge control operation

I-V Characteristic

IDS

a)!VG > VT ,!VD ! 0

(b)

b)!VG > VT ,!VD < VGT !

(a)

(c)

IDSAT

ON

Pinch-off

OFF
c)!VG > VT ,!VD > VGT
After R.S. Muller and T.I Kamins, DEIC, Wiley, 2d ed.

J.P. Leburton, IWSG-2009, IITB, India

VDS

Gradual Channel Approximation (VGT ! VDS )


VS

VG

VD

Qn(y)

VC

I DS =

VD

F(y)=-dVC/dy

W
2
Cox "#(VG ! VT )VDS ! VDS
/ 2 $%
L

IDS

VC(y)
y

VG
COX

VS+VT

COX

COX

VC(y)+VT

COX

VD+VT

VGT

Qn (y) = !Cox [VG ! VT ! VC (y)]

Conditions:

!"
!"
<<
!!!or!! # y << # x
!y
!x

J.P. Leburton, IWSG-2009, IITB, India

SCALING!!

(x,y): electrostatic potential

VDS

Pinch-Off and Saturation (VGT<VDS)


VS

VG

qFX

VD

qFX

I DSAT =

W
Cox (VG ! VT )2
2L

IDS
IDSAT

Gate control:
many carriers
-low field

Gate control
lost: Few
carriers-high
field

IDS=qWn(y)v(y): constant

J.P. Leburton, IWSG-2009, IITB, India

VGT

VDS

Sub-Threshold Conduction*
e

ns ! exp("

q# B
)
kT

Normal conduction

Sub-threshold
conduction
(Diffusion)

*After R.S. Muller and T.I Kamins, DEIC, Wiley, 3d ed

MOSFET Scaling (Constant field)*


Device and circuit
parameters
Scaling assumptions Device dimensions (L, W, tOX,)
Doping concentration (Na, Nd)
Voltage (except VT)
Derived scaling:
Device parameters

Derived scaling:
Circuit parameters

Electric fields
Carrier velocity
Depletion layer width (Wd)
Capacitance (C=A/t)
Inversion layer charge density
Current, drift
Channel resistance
Circuit delay time (CV/I)
Power dissipation (P~VI)
Power-delay product (P)
Circuit density (~1/A)
Power density (P/A)

*After Y. Taur and T.H. Ning, Fundamentals of Modern VLSI Devices,


Cambridge, 2d edition

J.P. Leburton, IWSG-2009, IITB, India

Multiplicative
factor (K>1)
1/K
K
1/K
1
1
1/K
1/K
1
1/K
1
1/K
1/K2
1/K3
K2
1

Wd =

2! 0! s"depl
qN a

Down scaling of
circuit parameters

Not scalable: Materials (EG, , etc)


Temperature

Modern CMOS

CMOS Inverter circuit*

J.P. Leburton, IWSG-2009, IITB, India

Transfer characteristics*

*After R.S. Muller and T.I Kamins, DEIC, Wiley, 3d ed.

Short Channel Effects


Beyond
pinch-off

Channel-length modulation
VG
IDS

Pinch-off

Beyond
pinch-off

Pinch-off

I DSAT =

VGT

J.P. Leburton, IWSG-2009, IITB, India

VDS

'
I DSAT
=

W
Cox (VG ! VT )2
2L

W
Cox (VG ! VT )2 !> I DSAT
2(L ! "L(VG ))

Velocity Saturation (Si-Devices)


f(v)

1 Carrier drift

Consequence for MOS Devices

I DS =

Carrier heating:
collisions

I DS =

kBTc

0 vd1 vd2 vd3=vd4

vd

Sub-linear
Linear

(2)

W
2
Cox "#(VG ! VT )VDS ! VDS
/ 2 $%
L

W
2
Cox "#(VG ! VT )VDS ! VDS
/ 2 $%
L + (VDS / Fc )

Velocity saturation
induced current reduction

Saturation

(3)

(4)
vsat ! 10 7 cm / s

vsat F
!!!
F + Fc
= vsat / Fc

vd =

(1)

Fc
J.P. Leburton, IWSG-2009, IITB, India

F
*After R.S. Muller and T.I Kamins, DEIC, Wiley 3d ed.

Gate-Induced Mobility Degradation


VS

VG

VD

n+

n+
p-Si
Interface
roughness

Interface
charge

Feff

eFX

1
Q
(Qd + n )
" 0" s
2
R.S. Muller and T.I Kamins, DEIC, Wiley, 3d ed.
0
eff =
!!!with! 0 ,!F0 !and!# ! fitting parameters
1 + (Feff / F0 )#
Feff = !

eff =
J.P. Leburton, IWSG-2009, IITB, India

0
!
1 + ! (VG " VT )

For simulation purpose

Drain-Induced Barrier Lowering (DIBL)*

VT-shift with VD

Thermionic emission
Tunneling

J.P. Leburton, IWSG-2009, IITB, India

*After Y.Taur and T.H. Ning, FMVD, Cambridge, 2d ed.

Source-Drain Charge Sharing Effect:


VT (Gate coupling)-Reduction*

tox

*After R.S. Muller and T.I Kamins, DEIC, Wiley, 3d ed.

J.P. Leburton, IWSG-2009, IITB, India

Deep Nanoscale Devices


Oxide leakage

Dopant granularity

Velocity Overshoot

vdr

vsat

x or t

J.P. Leburton, IWSG-2009, IITB, India

Quantum Charge

Velocity Overshoot (Transient)


Fx

K. Hess, ATSD, Wiley, 2000

2
t(or x)

vsat

tmax / xmax

Fx

In III-V Compnds : tmax~1ps =>xmax~100nm


vmax~ 4-5x107cm/s
vx

In Si: tmax~0.1ps=>xmax~10-20nm
vmax~ 2x107cm/s
n+

n+
Increasing scattering rates
with carrier energy
J.P. Leburton, IWSG-2009, IITB, India

t or x

L= xmax

High speed-high current!!

Depletion and Quantum Capacitance:


Gate Coupling Reduction
Poly-Si gate*
(All-Si&self-alignment)

Quantized inversion
layer
CPoly
Cox
Cinv

C-V curve*

1
1
1
1
=
+
+
Cg C poly Cox Cinv
!!!Cg < Cox

*After Y.Taur and T.H. Ning, FMVD, Cambridge, 2d ed.


J.P. Leburton, IWSG-2009, IITB, India

Dopant Granularity: VT-Fluctuations*

J.P. Leburton, IWSG-2009, IITB, India

*U. Kovac et al., Microelectronic Reliability 48, 1572 (2008)

tox-Scaling => High-K Dielectrics*


Tunneling-induced dissipation
tox

But
Cox =

! 0! ox
t ox

High-K dielectrics Cox =

! 0! SiO2
t SiO2

! 0! high " K
t high " K

*P. Zeitzoff and H.


Huff, 2005 ICCMUT,
Dallas, TX

t high ! K = (" high ! K / " SiO2 )t SiO2 >> t SiO2


J.P. Leburton, IWSG-2009, IITB, India

Reduces Tunneling

High-K Dielectric Phonons


!
P
High-K: Large => large polarization

! !
!
P = Pionic + Pelectronic
Me/Si-O bond

! EG" n (direct)
negligible in
insulators
(large EG)

Si-O bond: strong--> hard phonons

Polar Optic Phonons

U(t): ion displacement

Electron-phonon interaction
High energy
Low 0

Low energy
Me-O bond: weaker-->soft phonons Large
0

+ + ++
+
+ e +
++ +
Interaction strength (Frohlich)

' 1
1 *
! " !# SO ) % & 0 , " P 2
( $ ox $ ox +
Electronic
contribution (fast)
M. Fischetti et al., JAP 90, 4587 (2001)
J.P. Leburton, IWSG-2009, IITB, India

Ionic contribution
(slow)

High-K Dielectric Remote Phonons


Remote Interface Phonons

Plasmon-RIP coupling*
Metal gate

(High-K)
(Si)
K. Hess, ATSD, Wiley, 2000

Interaction between electron in Si and


remote phonons in High-K dielectric !!!!

tox

+
+
+

_ +
_ +
_ +

_ +
_
+
_ +

Si-substrate

_
_
_
n-channel

*M. Fischetti et al., JAP 90, 4587 (2001)

Interaction strength
(image charge)
' 1
*
1
! " !# SO ) %
&
%
0
0 ,
( $ ox + $ Si $ ox + $ Sio +
Q. Wang &G.D. Mahan, PRB 6, 4517 (1972)

J.P. Leburton, IWSG-2009, IITB, India

weak

strong

High-K Dielectric Remote Phonon Scattering

Strong RIP
scattering
(ZrO2&HfO2)

J.P. Leburton, IWSG-2009, IITB, India

Weak (bare or
plasmon screened)
RIP scattering

RIP-Limited Channel Mobility:SiO2 vs. HfO2*

T-dependence

Ns-dependence

Simulated

J.P. Leburton, IWSG-2009, IITB, India

Theory vs Experiment

coulomb
scattering
neglected in
the model

Weaker Tdependence
for Hf-based
insulators

Good
agreement
at high Ns

Alternative (Future) MOSFET Structures*

* After K. Imai, Proc. Of SPICE vol. 7028

Depleted devices for - Reduction of VT-fluctuations


- Ballistic transport
+ III-V on Si for high mobility
J.P. Leburton, IWSG-2009, IITB, India

Confined Phonons in Quantum Wires*


Confined/bulk phonon scatt. ratio

Carrier confinement, but also


phonon confinement <2d

Forward/backward scattering ratio

&

1
Bulk : # ( ! q %dq %
$
0
N
1
n!
Confined : # ' ! " q % =
, R = Na0
$
2
R
n =1

J.P. Leburton, IWSG-2009, IITB, India

*M. Nawaz and J.P. Leburton, APL 90, 183505 (2007)

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