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A.

Memory

1. Introduction
Generally speaking, memory elements can be divided into two categories. One is called
Random Access Memory (RAM), and the other is called Read Only Memory (ROM).
RAM circuits on the market have different configurations depending upon how the memory
cell array is organized. A memory cell array organized with N by M cells can store N words
with each word being M bits long. For example, the IC type 7489 is a 16 by 4 RAM chip. It
can store up to 16 different words, and each word is 4 bits long. Apart from memory cell
array, RAM circuits also need address decoding logic and read/write control logic. The
address decoding logic translates the data address (usually in binary format) into the
physical location of a particular word in the memory cell array. Therefore, the memory cells
in the specified memory word are activated and ready to either put the data on to the data
output pins (read process), or to receive data from the data input pins (write process).
Whether the process is read or write depends upon the read/write control logic. Read and
write processes are also referred to as data fetch and data load respectively.
ROM circuits are similar to RAM circuits except that data are already stored permanently in
the memory cell array. Only the read process is allowed. Therefore ROMs do not have the
read/write control logic. The PROM, programmable ROM, holds semi-permanent data; data
can be modified, but slowly. One important measure for a memory element is its access
time. In order to read data, an appropriate address must be applied to the address inputs,
and perhaps an enable signal asserted. After a short period of time, the data are valid on
the output pins. The short time period is called the access time of the memory. Access time
of a memory reflects how fast the memory can respond to the request for data. Fig. 1
illustrates how access time is measured assuming all enable signals are asserted true.

Fig.1: Access time of memory chip.

The IC chip you are going to use in this experiment is 7489. 7489 is a 16 by 4 random
access memory. Its pin assignment to the inputs and outputs is shown in Fig. 2. The four
address inputs select one of the 16 words in the memory. The least significant bit of the

address is A, and the most significant bit is D. The read/write control logic has two control
inputs. The memory enable ( ME ) input must be equal to low to enable the memory. If ME
is high, the memory is disabled and all four outputs are at high impedance level. The
write enable ( WE ) input determines the type of operation as indicated in the function
table. The write operation is performed when WE is low. This is a transfer of the binary
data from the data inputs lines into the selected word in memory. The read operation is
performed when WE is high. This transfers the value stored in the selected word into the
output data lines (complemented). The inverted outputs are open-collector to allow external
wired logic for memory expansion.

M
E

W
E

Operat
ion

Data Outputs

Write

Complement of data
inputs

Read

Complement of
selected word

Disable

High impedance

Fig. 2. 7489 16x4 RAM

2. Objectives
Through the lab experiments students are expected to become familiar with the structure
and the working mechanisms of memory elements. Students will learn the concept of data
load and data fetch, and how to measure memory access time.

3. Experiments
3.1. Testing the RAM
An open-collector gate requires an external resistor for proper operation. However, an
open-collector gate can be operated without an external resistor if its output is connected to
the input of another gate. Since the outputs of the 7489 produce complemented values, we
might as well insert four inverters to change the outputs to their normal values and, at the
same time, avoid the need for external resistors.
Now connect the address inputs to a binary counter using IC type 7493 as shown in Fig. 3.
Connect the four data inputs to toggle switches and the data outputs to four 7404 inverters.

Provide four LEDs for the address and four more for the outputs of the inverters. Connect
ME to ground and WE to a pulser that provides a negative pulse. Store a few words into
the memory and then read them to verify that the write and read operations function
properly. Leave the WE in the read mode (high), unless you want to write into memory. The
proper way to write is first set the address using the counter and the inputs with the four
toggle switches. To store the word in memory, pulse the WE switch to the write position. Be
careful not to change the address or the inputs when WE is asserted.

Fig. 3. Setup for testing the 7489

3.2. Measuring the Access Time


First store the value 0000 and 0001 at address 0000 and 0001 respectively. Disconnect
the counter from the memory. Now connect the address bits B, C, and D to
ground. Connect the address bit A (the least significant bit) to a square wave of 1
MHz. Make sure the square wave oscillates between 0V and 5V. Connect both the square
wave and the least significant bit of the data outputs (S1) to the scope to compare their
rising and falling edges. What is the access time for your chip?

3.3.

Memory Expansion

Expand the memory unit to a 32 by 4 RAM using two 7489 ICs. Use the ME inputs to select
between the two ICs. Note that since the data outputs are open-collector, you can tie pairs
of terminals together to obtain a logic wired-OR operation in conjunction with the output
inverter.

4. Equipment and parts required

Protoboard
Oscilloscope
Signal generator
Two TTL 32x4 RAM (7489)
One TTL binary counter (7493)
One TTL inverter (7404)
Four LEDs and limiting resistors

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