A Systematic System Level Design Methodology

for Dual Band CMOS RF Receivers

Mohamed El-Nozahi, Kamran Entesari, and Edgar Sanchez-Sinencio
Electrical and Computer Engineering Department
Texas A&M University
College Station, Tx, USA
Email: elnozahi@ece.edu

Abstract A systematic system-level design methodology for

dual-band RF CMOS receiver is proposed. The methodology
helps the designer to find the optimum set of specifications of the
receivers building blocks for minimizing the power consumption.
Our analysis is based on analytical expressions for the input
referred noise, input referred third order intercept point and
gain as a function of the frequency for the various blocks. This
methodology is applied to a dual-band receiver for the GSM (900
MHz) and PCS (1900 MHz) standards. Simulations show that
having an LNA with a constant gain behavior reduces the power
consumption by 75% compared to an LNA with a decreasing
gain versus frequency.

Band1

BPF
Band2

BPF

LO1

ADC

To DSP

LO2

Fig. 1.

Dual-band radio frequency transceivers have played a critical role in wireless communications in the 900 MHz-10.3 GHz
range. With cellular and cordless phone standards operating at
900 MHz and 1.8 GHz, the Global Positioning system (GPS)
at 1.2 and 1.5 GHz, Bluetooth at 2.4 GHz, wireless local area
network (WLAN) at 2.4, 5.2 and 5.8 GHz bands, and ultra
wideband (UWB) at 3.1-10.3 GHz, it is desirable to combine
one or more bands in one mobile unit.
Several dual band architectures, which are based on either direct conversion or heterodyne architectures, have been
proposed in the literature [1][3]. The main focus during
the design of these systems is to achieve the highest level
of integration by the reuse of the building blocks for the
two bands. Receiver budget distribution along the various
building blocks, such as low noise amplifier (LNA) and RF
mixer, is a challenging problem for the system designer.
Recently, a system-level design methodology for a singleband receiver to minimize the power consumption has been
proposed [4]. In the case of dual-band receivers, the budget
distribution for minimum power consumption still depends on
the experience of the designer. The main challenge in the
dual-band receiver system-level design is the change of the
performance specifications of the RF bandpass filter, LNA and
RF mixer (in terms of noise figure (N F ) and input referred
intercept point (IIP 3) and gain) at the two different frequency
bands. After the RF mixer, the two bands share the same
spectrum, and therefore both of them are treated equally. This
is demonstrated in Fig. 1 for the direct conversion receiver.
In this paper, a system-level design methodology for a dual
band receiver is presented. This methodology minimizes the
power consumptions by providing the optimum values of the

BPF

LNA

Two bands are propagating at different frequencies

I. I NTRODUCTION

1-4244-1176-9/07/$25.00 2007 IEEE.

LNA

Two bands are propagating at the same frequency

A dual-band direct conversion receiver

performance specifications. To the best of our knowledge,

this is the first paper which provides a systematic design
methodology for dual-band RF CMOS receivers. The paper
is organized as follows. In section II, analytical expressions
for the various performance specifications of the RF receiver
system level and circuits are presented. The optimum design
methodology for low power consumption is presented in
section III, and the simulation results are shown in section
IV. Finally, section V concludes the results.
II. RF RECEIVER SYSTEM AND CIRCUIT
SPECIFICATIONS
The first step towards achieving the optimum system level
design methodology is to find closed form expressions for the
performance parameters (Gain, N F , and IIP 3) of the various
building blocks and the overall RF receiver.
A. System level specifications
Overall system level specifications are usually calculated
from the bit error rate (BER) requirements specified in the
standard. The BER is then translated to the signal to noise
ratio (SN R), from which the N F and IIP 3 are calculated.
Depending on the channel conditions, modulation scheme,
error correction, and channel coding the SN R at the output,
SN Ro , of the receiver is determined from:
Eb R
SN Ro =
,
(1)
No N EB
where Eb is the energy per information bit, No is the noise
power spectral density, R is the bit rate in bps and N EB is

1014

Vdd

Vdd
RL

Cd1
Ld2

Ld1

Cd2

Ld

Vout
Lg1
Rs

Vb1

Rs

Lg2

Vin
Cg1

Cg2

Vout
Vb1

M2
M1

Lg1

Cg1

M2

Lg3

Vin

M1
Cg3
Lg2

Cg2
Ls

Ls
Vb2

(a)

Fig. 2.

(b)

(a) Common Source Concurrent LNA (b) wide band LNA

the noise-equivalent bandwidth. The SN Ro in (1) represents

a lower limit for the receiver design, and usually an additional
margin that accounts for additional non-idealities such as
process variations, and phase noise of the synthesizer is added.
The overall noise figure, N Fov , and third order input intercept
point, V 2IIP 3,ov , of the receiver are found from [4], [5]:
= Pmds 10log(KT B) SN Ro ,
(2)
3Pmds N Fov 10log(KT B)
, (3)
V 2IIP 3,ov =
2
where Pmds is the minimum detectable signal, K is the
Boltzmann constant, T is the temperature in Kelvin, and B
is the channel bandwidth.
N Fov

B. Building Blocks Performance Specifications

In this part of the section, analytical expressions of the
performance parameters for the various blocks are obtained.
Low Noise amplifier: Common source LNAs with inductive source generation have been used for narrow band RF
front-ends frequently [5]. For the dual band systems, parallel
LNAs, a concurrent LNA or a wide band LNA, as shown in
Fig. 2, can be used [6]. Assuming perfect matching at the two
different bands, the input referred noise, input referred third
order intercept point, and gain of the LNA are [4]:
o
(4)
V 2ni = 4KT gm1 R2s ( )2 ,
T
16 I
o
V 2IIP 3 =
gm1 R2s ( )2 ,
(5)
3
T
RL T
A =
,
(6)
2Rs o
where is a noise factor, o is the operating frequency, T
is the cut-off frequency of the transistor, I is the DC current,
is a parameter to account for mobility degradation, and Rs
and RL are the source and load resistances, respectively.
Two important observations are concluded from the analytical expressions in equations (4) to (6). The first one is
the proportionality of the dynamic range, DR, to the biasing
current and hence the power consumption, P [4]:
V2 3
4
P
DR = IIP
=
I=
,
3KT
Pc,LN A
V 2ni

(7)

where Pc,LN A is a proportionality coefficient that relates the

DR to the power consumption and is technology dependent.

It is important to mention that the DR is independent of the

operating frequency.
The second observation is the dependency of the LNAs
performance parameters on the operating frequency. For single
band receiver, this dependency is not a problem because the
receiver is designed at a specific frequency. However, for the
dual-band system, the gain of the LNA decreases and the N F
and IIP 3 increase with the operating frequency. This is the
main challenge for minimizing the power consumption.
RF Mixer: A single or double balanced mixer is commonly
used in RF receivers. For a double balanced Gilbert cell
mixer, the total input referred noise, input referred third order
intercept point, and gain are calculated from [7], [8]:

,
(8)
V 2ni 2 2 KT
gm1
vsat L
16 I
16
V 2IIP 3 =
Vod
,
(9)
3 (o + 2vsat L)
3 gm1
2
gm1 RL .
(10)
A =

where vsat is the saturation voltage, o is the mobility, and

Vod is the overdrive voltage.
Similar to the LNA, the dynamic range of the mixer depends
on the biasing current but with a different mixer power
coefficient, PC,mixer . As depicted in the set of equations
from (8) to (10), none of the parameters depends on the
frequency. However, internal nodes parasitic capacitances can
change this dependency when the operating frequency is very
high such as in millimeter wave applications. In this paper,
we neglect this dependency as we consider low giga-hertz
receivers. Howevever, similar analysis could be conducted if
the internal node parasitic capacitances are effective.
Second mixing and baseband stages: The remaining
blocks of the RF receiver could be a second mixing stage
followed by baseband processing. Sheng et al. proved that
baseband circuits also have a dynamic range that is proportional to the power consumption [4], and the same postulate
is used through the rest of this paper.
C. Overall System level specifications
For a cascaded receiver, either it is a homodyne or heterodyne, the overall performance specifications are:
(N Fov () 1)KT =

n
X

ai () ,

i=1

ai () =

8
<V 2ni,i

2
V
ni,i
: Qi1
2
j=1 Aj

1
V

2
IIP 3,ov ()

if i = 1
if i > 1

, bi () =

n
X

bi (),

i=1

8 1
<V2

if i = 1

if i > 1.

3,i
QIIP
i1
2
j=1 Aj

V2
IIP 3,i

(11)

where i is the block index and n is the total number of blocks.

III. BUDGET DISTRIBUTION OF DUAL BAND
RECEIVER
In this section, the system level design methodology is
demonstrated. Two different cases are considered. In the first
one, the gain of the LNA is assumed to decrease with the
operating frequency as demonstrated by (6). In the second
one, an LNA with constant gain is assumed.

1015

A. Conditions for Minimum Power Consumption

The overall power consumption, Pov ,of the dual band RF
receiver is obtained by the summation of the power consumption of each building block, hence:
Pov =

n
X

Pc,i DRi = constant.

(12)

i=1

As indicated by equation (12), the power consumption independent on the operating frequency and therefore the overall
power consumption for the two bands is the same.
Similar analysis to [4] has been conducted to find the
optimum conditions for minimum power consumption. A
constraint optimization problem is solved using Lagrange
Multipliers, where the power consumption, defined in (12),
is the dependent variable to be minimized, the overall N Fov
and V 2IIP 3,ov are the constraints, and the input referred noise
voltage and input referred third order intercept point of each
building block are the independent variables. As a result, the
input referred noise voltage and IIP 3 of each block are:

V 2ni,i

V 2IIP 3,i

8
(N Fov ()1)KT 50
>

<
Pn
3
Pc,j

j=1

Pc,i

(N Fov ()1)KT 50 Pc,i Qi1

>
2
:

Pn
3
j=1 Aj
Pc,j
j=1

8
Pn
3
Pc,j
>

<V 2IIP 3,ov () j=1

3
Pc,i

Pn
3
Pc,j Qi1
>
2
:V 2IIP 3,ov () j=1

3
j=1 Aj
Pc,i

if i = 1
(13)
if i > 1
if i = 1
(14)
if i > 1

Equations (13) and (14) show the conditions for the input
referred noise voltage and IIP 3 of each building block for
minimum power consumption. However, these equations do
not provide sufficient information about the values of the gain
of the blocks for minimum power consumption. For a singleband receiver, gain is considered a degree of freedom [4]. This
is not the case for a dual-band system, as shown below. To
emphasize the importance of gain, two cases are considered.
The first one considers an LNA with decreasing gain versus
frequency, and with a constant gain frequency response.

band have better overall noise figure on the cost of worse

linearity when compared to the higher band. Hence, during the
budget distribution, the required noise figure, defined in (4),
should be monitored for the upper frequency band, while
the non-linearity, defined in (5), should be considered for
the lower frequency band. The results show that the LNA
will be overdesigned with respect to the noise figure for
the lower frequency band, and with respect to the linearity
requirements for the upper frequency band. Hence, the overall
power consumption increases. The overall nosie figure, IIP3
and power consumption at the two bands are:
1 2
) ,
2
N Fov (2 ) = Pmds 10log(KT B) SN Ro ,
3Pmds N Fov 10log(KT B)
2
,
V IIP 3,ov (1 ) =
2

2
V 2IIP 3,ov (2 ) = V 2IIP 3,ov (1 )( )2 ,
1
n
X
p
V 2IIP 3,ov (1 )
2
3
Pc,j )3 ( )2 .
Pov =
(
(N Fov (2 ) 1)KT 50 j=1
1
N Fov (1 ) = 1 + (N Fov (2 ) 1)(

(N Fov () 1)KT 50

= (V 2ni,LN A (1 ) +
V 2ni,F ilter
2
LN A (1 )Amixer

+ A2
1
V

2
IIP 3,ov ()

= (V 2

IIP 3,LN A (1 )

A2LN A (1 )A2M ixer

V 2IIP 3,F ilter

+ )( 1 )2 (, 15)

A2LN A (1 )
V 2IIP 3,M ixer

+ )( 1 )2 ,

(16)

where A(1 ) is the gain of the LNA at the first frequency

band. Equations (15) and (16) indicate that the lower frequency

(19)
(20)
(21)

C. Case 2: Constant Gain Response of the LNA

In this case, a constant gain of the LNA for the two bands
is considered. Constant gain can be achieved by adjusting the
value of RL , which does not change the blocks N F and
IIP 3. Under the assumption of constant gain response of the
LNA, equations (15) and (16) are modified to:
= (V 2ni,LN A (1 )( 1 )2 +

(N Fov () 1)KT 50

+ A2

2
V
ni,F ilter

LN A

1
V 2IIP 3,ov ()

= (V2

IIP 3,LN A

V 2ni,M ixer
A2LN A (1 )

(18)

The above result points out that the dynamic range of the
blocks is required to increase as the two frequency bands
are further apart. As a result, the total power consumption
increases. In the following part, it is shown that power
consumption may be decreased if the gain versus frequency
behavior of the LNA is kept constant.

B. Case 1: Gain of LNA is decreasing with the frequency

This case assumes that the load resistance and power
consumption for the two bands are the same for the LNA. As
a result, the N F , IIP 3 and gain of the LNA are frequency
dependent as shown earlier in (4) to (6). Substituting these
equations in (11), the N Fov and V 2IIP 3,ov are reduced to:

(17)

(1 )

(1 )A2
mixer

( 1 )2 +

2
A2
LN A (1 )AM ixer
V2
IIP 3,F ilter

2
V
ni,M ixer
A2
(1 )
LN A

+ ),

(22)

A2
LN A (1 )
V2
IIP 3,M ixer

+ ),

(23)

For this case, the contribution of N F and IIP 3 of the

blocks that follow the LNA remains the same, and is frequency
independent. The constant gain case is the commonly used
case for the system-level design of the dual-band RF CMOS
receivers because it reduces the power consumption. For this
case, equations (17), (20), and (21) are changed to:
Pn p
3
Pc,j
j=1
N Fov (1 ) = 1 + (N Fov (2 ) 1) p
, (24)
Pn p
2 2
3
Pc,1 ( ) + j=2 3 Pc,j
1
Pn p
3
Pc,j
j=1
V 2IIP 3,ov (2 ) = V 2IIP 3,ov (1 ) p
, (25)
Pn p
1 2
3
Pc,1 ( ) + j=2 3 Pc,j
2
p
P
3
V 2IIP 3,ov (1 )
( n
Pc,j )4
j=1
p
Pov =
. (26)
Pn p
1 2
(N Fov (2 ) 1)KT 50 3 Pc,1 (
) + j=2 3 Pc,j

1016

TABLE I

TABLE II

P OWER COEFFICIENTS OF THE VARIOUS BLOCKS OF THE RECEIVER

Pc,LN A

Pc,M ixer

Pc,F ilter

5.6 1020 [W/Hz]

7.3 1018 [W/Hz]

11.4 1018 [W/Hz]

B LOCK LEVEL SPECIFICATIONS FOR DUAL - BAND GSM/PCS

LNA
NF
[dB]

IIP3
[dBm]

RECEIVER

Mixer

Filter

A
[dB]

NF
[dB]

IIP3
[dBm]

NF
[dB]

IIP3
[dBm]

Case 1 (1 )

0.2

-3.4

16

20

19.3

D. Design Methodology:

Case 1 (2 )

0.82

9.6

20

19.3

The systematic system level design methodology for a dual

band receiver is summarized as follows:
Obtain the BER specifications from the wireless standard.
Determine the necessary SN Ro from system level simulations using equation (1).
2
Determine the minimum N Fov and V IIP 3,ov that satisfies the SN Ro using (2) and (3).
Depending on the gain versus frequency behavior, find the
required N Fov and V 2IIP 3,ov for the two bands. Lower
power consumption is achieved if an LNA with constant
gain response is used.
Find the budget of each building block to satisfy the BER
of the standard using (13) and(14).

Case 2 (1 )

0.6

-3.4

16

12.3

24.7

19.3

Case 2 (2 )

2.12

16

12.3

24.7

19.3

IV. V ERIFICATION OF THE D ESIGN M ETHODOLOGY

Our system-level design methodology for dual-band receivers is investigated for the homodyne receiver, shown in
Fig. 1, for mobile communication standards. The first band is
considered as the GSM band at 900 MHz, while the higher
band is considered as PCS at 1900 MHz. In our analysis,
recent published receiver specifications with an N Fov lower
than 4 dB, and an V 2IIP 3,ov higher than -12 dBm using 0.25m
CMOS technology is assumed. The sensitivity of the receiver
is -102 dBm, which means an overall gain of 100 to 107 dB
is required.
Typical values for the power coefficient, for a 2.8 V supply,
of the receiver are assumed. These values are obtained by
making a search over the available designs using the 0.25m
technology node, and they are tabulated in Table I.
The proposed design methodology, defined in section III.D,
is applied for the two gain cases of the LNA to find the block
specification. Table II shows the block specifications of the
optimized dual-band receiver. As depicted, for the first case
(LNA with decreasing gain), the lower band has the worst
non-linearity, while the upper band has the worst noise figure.
For this case, the N Fov is 1.26 dB for the lower frequency
band, while it is 4 dB for the upper band. For the V 2IIP 3,ov ,
it is -12 dBm and -5 dBm for the lower and upper bands,
respectively.
For the second case with constant gain, the N Fov is 3
dB and 4 dB for the lower and upper bands, respectively.
The V 2IIP 3,ov , it is -12 dBm and -11.5 dBm for the lower
and upper bands, respectively. These results indicate that the
overall performance specifications for the receiver at the two
different bands is almost similar. It should be mentioned that
the first case is hard to realize, while it is possible to realize
the second case. Finaly, the ratio of the power consumption

between the two cases is:

p
Pn p
3
3
2
Pov,case1
2 2 Pc,1 ( 12 ) + j=2 Pc,j
= 3.98. (27)
=( )
Pn p
3
Pov,case2
1
Pc,j
j=1
The above expression indicates that more power is wasted
2
if the ratio (
) is increased. Hence, having an LNA with
1
constant gain helps in reducing the overall power consumption
of the receiver, which is 75% in this case.
V. C ONCLUSION
In this paper, a systematic system level design methodology for a dual-band RF CMOS receiver was proposed.
The methodology considers the frequency dependency of the
performance specifications of the building blocks. Expressions
for the optimum values for the noise figure and input referred
third order intercept point and gain for each individual block
are obtained. Our analysis showed that the gain response of the
LNA affects the overall power consumption. This methodology
was applied to a dual-band receiver for the GSM and PCS
standards at 900MHz and 1900MHz, respectively. The results
showed that having an LNA with constant gain response
reduces the power consumption by 75% compared to an LNA
with a decreasing gain versus frequency.
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[1] S. Wu and B. Razavi, A 900-MHz/1.8-GHz CMOS receiver for dualband applications, In IEEE Journal of Solid-State Circuits,vol. 33,
pp. 2178-2185, December 1998.
[2] J. Ryynanen, K. Kivekas, J. Jussila, A. Parssinen, and K. A. I. Halonen,
A dual-band RF front-end for WCDMA and GSM applications, In IEEE
Journal of Solid-State Circuits,vol. 36, pp. 1198-1204, August 2001.
[3] E. Song, Y. Koo, Y.-J. Jung, D.-H. Lee, S. Chu, and S.-I. Chae, A
0.25-m CMOS quad-band GSM RF transceiver using an efficient LO
frequency plan, In IEEE Journal of Solid-State Circuits,vol. 40, pp. 10941106, May 2005.
[4] W. Sheng, A. Emira, and E. Sanchez-Sinencio, CMOS RF receiver
system design: A systematic approach, In IEEE Transactions on Circuits
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[6] A. Bevilacqua and A.M. Niknejad, An ultra-wideband CMOS LNA for
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[7] H. Darabi and A.A. Abidi, Noise in RF-CMOS mixers: a simple
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