Ordering number: EN 2668A

Thick Film Hybrid IC

STK4132II

No. 2668A

2 c h A F Power Amplifier (Split P o w e r S u p p l y )

20W + 20W,THD = 1%

Features

Package Dimensions

Pin compatible with the STK4102II and STK4101V

series (high-grade type) over the output range 6 to 50W
for easy interchangability
Small-sized package with the same pin assignment as
the STK4101II series
Built-in muting circuit to cut off spurious shock noise
125C guaranteed high temperature operation allows
greatly reduced heat sink size
Excellent low-cost performance

unit: mm
4083
[STK4132II]

Specifications
M a x i m u m R a t i n g s atTa = 25c
Parameter
Maximum supply voltage

Symbol

Conditions

Unit

Ratings
34.5

V c c max

c/w

6j-c

3.0

Junction temperature

Tj

150

Operating substrate temperature

Tc

125

- 3 0 to+125

Thermal resistance

Tstg

Storage temperature
Available time for load short-circuit

t.

V c c = 23V,RL = fiQI
f - 50Hz, Pq = 20W

Recommended Operating Conditions atTa = 25c

Parameter
Supply vollage

Symbol

Conditions

Unit

Ratings

Vcc

Load Impedance

Rl

ft

SANYO Electric Co., Ltd. Semiconductor Business Headquarters

T O K Y O O F F I C E Tokyo Bldg., 1 - 1 0 , 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN

71696HA (ID) / 0138YT / 9058MQ, TS No. 26681/8

STK413211

O p e r a t i n g C h a r a c t e r i s t i c s at Ta = 25C, V c c = +23V, R l = 8ft (noninductive load), Rg = 600Q, VG = 40dB

Parameter
Quiescent current

Symbol

Frequency response

max

Unit

100

mA

20

40

PoO)

THD = 0.4%,
f t= 20Hz to 20kHz

20

P 0 (2)

V c c = tfOV, THD = 1.0%,

RL = 4Q, f = 1kHz

20

THD

P o = 1.0W,f=1kHz

0.3

fL-<H

Po=1.0W,^dB

20 to 50k

Hz

P o = 1,0W,f=1kHz

55

k CI

Neutral voltage

vN

V CC = 50.5V

Vno

V c c = i28V,Rg = 10kQ

Muting voltage

typ

V CC = 28V

Input impedance

Output noise voltage

min

'cco

Outpul power

Total harmonic distortion

Conditions

-70
-

-2

Vm

0
-

-5

+70

mV

1.2

mVrms

-10

Notes.
All tests are measured using a constant-voltage supply unless otherwise specified.
Available time for load short-circuit and output noise voltage are measured using the transformer supply specified below.
The output noise voltage is.tlie peak value of an average-reading meter with an rms value scale (VTVM). A regulated AC supply (50Hz) should be used to eliminate the
effects of AC primary line flicker noise.

Specified Transformer Supply (RP-25 or Equivalent)

4700jF

777T

o+vcc

o -vcc

E q u i v a l e n t Circuit

No. 26682/8

STK4132II

S a m p l e A p p l i c a t i o n Circuit ( 2 0 W min, 2 - C h a n n e l , A F Power Amplifier)

Input

4 mul infl
-V C C

Unit (resistance: n , capacitance: F)

S a m p l e A p p l i c a t i o n Circuit P C B L a y o u t ( C o p p e r Foil S u r f a c e )

Unit (resistance: ft; capacitance: F)

No. 26683/8

STK4132II
P n - V

THD P

1C0

1 0 * '

Input voltage, V | N V

"

10

Output power, P Q W

THD P

P o - f

32

TTT

30
28
5
1
o 26
[i.
V* 24

tT = 4 f l . V

= 20 V . T H D = 1%

r r

R l = 8 0 , V C c = 2 3 V , T H D 0.4%
T1

a.
22
D.
o 20

16
16
5

1.0

Output power, P 0 W

10

10

VG f

100

5
Ik 2 3 5
Frequency, f Hz

cc0 V N

100

o 40
c

-3 V C C = 2 3 V
PO = 1W
Rl=80
V G = 40dB
-4
10 r r t 100 2 3 5 Ik

>

I
1

0>z

-20

e
<u
Z

Icco
-40

& 20

235

10k

2 3 5 100k

' c c 0 > V N V CC

20

60

30
i
eP y
Vtf -

a
3

e
-io 1
z

-30
32

60

BO

100

(20

-<0
36

-60

140

P n V ,c c
f=lkH

1
:

50

>

0|

-20

20
24
23
Supply voltage, Vcc v

40

IC operating substrate temperature, T q "C

<0

V G = 40dB
Rg=10kfi

16

20

<D

Frequency, f Hz

12

AO

1
I

860

i -2

100k

-1

11

V C C = 28V
V G = 40dB
00 R t r = l O k f l

i I

10k

:
I

40

I
i

tffi O ^ y

a.

30
' / y

| 20

'

<"

If S

'

y/<

10

12

16

20
24
28
Supply voltage, Vcc v

32

36
No. 26684/8

STK4132II

40
5 40

Pd P,
'

Rl='8J'
f 1 k H z
ur>

An JO

RL=4fl

c 32

I o

fxj 32

U ;

1
i

5
I 46 V G = 4 0 d B
o
z-cn simultaneous drive
Q.

i
s^ !
i
^ j

Q.

T3 24
I
a 16
a>
I

Pd P,

56 f = 1 k H z

2-chs mult Etneous drive

"O

64

16

.1

I
I

'

1
!

>
/
Jc

f
1 /TVVl

O)
|

1 1
i i

1 i

i
i

2iv

I I

c/>

w 8
01

10

2 3
' f.o
10
Output power, Pq W

01

5 7 1.0

Output power, P q W

10

VG f

T]

VCC=23V
RL=8fi
0 Rg=600n

84.5dB

i
-10

-20
>
i
; -30
-40
-50
10

2 3 5 100 2 3 5

1k

2 3 5 10k 2 3

100k

Frequency, 1 Hz

No. 26685/8

STK4132II

External Component Description

C1.C2

Input filler capacitors.

These, together with R3 arid R4, form filters to reduce high-band noise.

C3, C4

Input coupling capacitors,

For DC blocking. Since capacitor reactance becomes larger at lower frequencies, the output noise can be adversely affected by signal source
resistance-dependent 1/f noise. In this case, a lower reactance value should be chosen. In order to remove pop noise at power-on, larger
values of capacitance should be chosen for C3 and 04, which determine the input time constant, and smaller values for C5 and C6 in the NF
circuit.
NF capacitors.
These determine the low-side cut-off frequency.

C5, C6

C15

[Hz]

27t X C5 x R5
A large value should be chosen for C5 to maintain voltage gain at low frequencies. However, because this would tend to increase the shock
noise at power-on, a value larger than absolutely necessary should be avoided.
L

Decoupling capacitors.
This removes shock noise and ripple voltage from the supply.

C11.C12

Bootstrap capacitors.
If these capacitors are made small, then the total harmonic distortion at low frequencies increases significantly.

C9.C10

Oscillation prevention capacitors.

These should be inserted as close as possible to the 1C supply pins to reduce supply impedance and hence provide stable IC operation.
Electrolytic capacitors are recommended.

C14

Ripple filter capacitor.

This forms a ripple filter in combination with internal transistor TR10.

C7

Oscillation prevention capacitor.

Mylar capacitors are recommended for their excellent thermal and frequency characteristics.

R3, R4

Input filler resistors.

R1, R2

Input bias resistors.

These are used to bias the input pins at zero potential. The input impedance is largely determined by this resistance.

R5, R9
(R6, R10)

Voltage-gain VG selling resistors.

VG = 40dB is recommended using R5, R6 = 560Q, and R9, R10 = 56kQ. Gain adjustments are best made using R5 or R6. If gain
adjustments are made using R5 or R6, then set R1, R2 = R9, RIO to maintain V N balance stability.

R11.R13
(R12.R14)

Bootstrap resistors.
These resistors determine the quiescenl current. Values of 2.2kfi and 2.2kfi are recommended.

R21

Ripple filter resistor.

This resistor performs as predriver transistor limiting resistor during load short circuits.

R18

Clipping plus/minus balance resistor.

R19, R20

Ripple filter resistors.

When muting transistorTR11 is on, current flows from ground through TR11 to - V c c . Values of 1kQ (0.5W) and 1kfi (0.5W) are
recommended.

R15.R16

Oscillation prevention resistors.

No. 26686/8

STK4132II

S a m p l e A p p l i c a t i o n Circuit ( P r o t e c t i o n a n d M u t i n g Circuit)

INPl/T,

INPUT

J 10k 66te:DSW2 120k

i

!
I

r * H
Tn _ j w

o/2W,

DS135E

. ZT_ _

Muting

-Vcc

Unit {resistance: fl. capacitance- F)

Heatsink Design
The total STK4132II device power dissipation for a continuous sine wave signal is shown in figures 1 and 2. The
maximum dissipation is 29.2W for R L = 8H, and 42.8W
for R l = 42 (2-channel simultaneous drive).
Pd-Pp
R L = 8f2'
f = 1kHz

Pd P ,
R

f=

VG=40DB

= 4J2

1kHz

1
'

VG=40dB
z-cn simultaneous drive
I
i

i
i
i

/fa

1 1
I i

i
^

y
/

1
i

Jr.o^

jdK/^it
<4<

10
Output power, P q W

Figure 1. Pd P 0 (R L = 8fl)

0-1

5 7

2
3
5
7
1.0
10
Output power, P q W

Figure 2. Pd P 0 (R L = 4Q)

No. 26687/8

STK4132II

When estimating the power dissipation for an actual audio

signal input, the rule of thumb is to select Pd corresponding to (1/10) x P 0 max (within safe limits) for a continuous sine wave input. For example,
o

Pd = 18.6W for 82, and Pd = 23W for 4H

The heatsink thermal resistance, 9c-a, required to dissipate
the STK4132II device total power dissipation, Pd, is determined as follows:

<0

Condition 1: IC substrate temperature not to exceed

125C.

T c = Pd x 0c-a + Ta < 125C

(1)

where Ta is the guaranteed maximum ambient temperature.

Condition 2: Power transistor junction temperature, Tj, not
to exceed 150C.
Tj = Pd x 9c-a + Pd/4 x Gj-c + Ta < 150C

(2)

The STK4132II has 4 power transistors (2 per channel),

and the thermal resistance per transistor, Gj-c, is 3.0C/W.
Therefore, equation 2 becomes:
Pd x (9c-a + 3.0/4) + Ta < 150C

9c-a Pd

12

(3)

The required heatsink must have a thermal resistance that

satisfies both expressions 1 and 3. Figure 3 shows the
ambient temperature parameter against Pd and 9c-a calculated from equations 1 and 3.

10

20

30

40

50

Substrate power dissipation, P d W

60

70

Figure 3. 0c-a Pd
For example, a stereo amplifier with ambient temperature
of Ta = 50C needs a heatsink with thermal resistance
given by the following:
F o r V c c = +23V,R L = 8ft:
1/10 P 0 max corresponds to Pdl = 18.6W
From figure 3, the STK4132II thermal resistance is
9c-al = 4.04C/W
From equation 3, this results in a junction temperature
Tj = 139.1C.
F o r V c c = 2 0 V , R L = 4Q:
1/10 P 0 max corresponds to Pd2 = 23W
From figure 3, the STK4132II thermal resistance is
9c-a2 = 3.26C/W
From equation 3, this results in a junction temperature
Tj = 142.3C.

No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear
power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury,
death or property loss.

Anyone purchasing any products described or oontained herein for an above-mentioned use shall:
<D Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their
officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated
with such use:
Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO.,
LTD., its affiliates, subsidiaries and distributors or any of their officers and employees, jointly or severally.

Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO
believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of
intellectual property rights or other rights of third parties.

This catalog provides information as of July, 1996. Specifications and information herein are subject to change without notice.
No. 26688/8