COURSE OBJECTIVES:

To provide fundamental concepts in VLSI systems design. To provide a basic understanding of some
computer-aided techniques used in the design verification, synthesis, optimization, and
implementation of VLSI systems using CMOS technology.

INTENDED LEARNING OUTCOMES:

After successful Completion of this course the students should be able to Understand MOS transistor
operation, design equations, parasitic etc, Understand static & dynamic CMOS Combinational logic,
Understand static & dynamic CMOS Sequential logic, Understand layout design rules. Design and
analyze layouts for simple digital MOS circuits.

COURSE OUTLINE:
Presentation of Concepts and techniques used in the fabrication of VLSI circuits. Topics include basic
semiconductor and MOSFET theory, Integrated Circuit Fabrication, Integrated Circuit Layout, NMOS
and CMOS logic design. Simulation of circuitry. Analogue circuit design, memory and processor
design, testing of VLSI system architecture.

PREREQUISITE(S):

Circuit Analysis, Digital Logic Design

RECOMMENDED TEXT BOOKS:

S.No.

Title

Author(s)

Digital Integrated Circuits - A Design

Perspective

Ref

CMOS Digital Integrated Circuits

Text Sung Mo Kang, Yusuf

Leblebici

Principles of CMOS VLSI Design, 2nd

Edition, Addison Wesley

Assigned
Code

J. M. Rabaey

RAB

Sun

Text
Neil H. E. Weste and K.
Eshraghian

NEI

TOPICS:

DESCRIPTION

WEEK
NO.
1.

BOOKS

Motivation and Introduction to VLSI, Trends in VLSI design.

Sun

Sun
MOS Transistor Structure,Fabrication steps of CMOS Transistors,Wafer
Fabrication,CMOS
Fabrication
Steps,Water
Fabrication,Oxidation,Photoresist,Lithography,Etch,Strip
Photoresist,Etch,Strip Photoresist,n-well,Strip Oxide,
Sun

3.

Polysilicon,Polysilicon Patterning,Self-Aligned Process,N+ diffusion,P+

diffusion,Contacts,P+ Diffusion,Contacts,Metallization,Overglassing,Layout.

4.

MOS

Transistors,The

Fluid

Model.The

MOS

Capacitor.The

MOS

Sun

Transistor.Characteristics of a MOS Transistor.Modes of .peration.Regions of

Operation.Drain current dependence.
5.

Sun
Structural View of a MOS Transistor,Electrical Characteristics,Threshold
Voltage,Body effect,Channel-length Modulation,Transistor Trans-conductance
gm,

6.

Sun
Current.Resistance.Driving
Capacitive Load

7.

Large

Capacitive

Load..Resistance.Small

MOS
Invertors,
Introduction,,MOS
Inverters,Transfer
Characteristics,Disadvantages of the Passive resistor,Inverter with Active Pullup Device,

8.

Sun

Sun
Inverter
with
Active
Pull-up
Device,CMOS
Inverter,Inversion
Voltage,Inverter
Threshold
voltage,CMOS
Inverter,Transfer
Characteristics,Noise Margin,Supply Voltage Scaling,Supply ,voltage lower
than the Limit.

9.
10.

MID TERM EXAM

Sun
Resistance Estimation,,Sheet Resistance,Capacitance Estimation,Gate
Capacitance,Parasitic
Capacitances,Simplified
Model,Delay-time
Estimation,How Delay can be Reduced?,How Delay can be measured?

11.

Static CMOS Circuits , CMOS NAND Gate,CMOS NOR Gate,Switching Sun

characteristics,Comparison,

12.

Sun
Combinational Circuits,General CMOS Logic Circuit Structure,AOI and OAI
topologies,CMOS EX-OR gate,Example: Full Adder,Pseudo-nMOS Logic

13.

NEI
MOS Dynamic Circuits,Single Phase Dynamic Circuits,Two-phase dynamic
circuits,Dynamic CMOS circuits,Advantages of Dynamic CMOS
Circuit,Dynamic CMOS Circuits,Disadvantages of Dynamic CMOS Circuits
Disadvantages
of
Dynamic
CMOS
Circuits,Charge
Leakage Sun
Problem,Disadvantages ef Dynamic CMOS circuits,Charge Sharing
Problem,How to Overcome Charge Sharing Problem?21:04,Disadvantages of
dynamic CMOS Circuits,Clock Skew Problem

14.

Domino CMOS Circuits,NORA Logic,Example: Full Adder ,sing static NEI

CMOS,Example:Full
Adder,Example:
Full
Adder
using
static

CMOS,Example:Full
Adder,Example:
CMOS,Example:Full
Adder,Example:
,MOS,Example:Full Adder.

Full
Full

Adder
Adder

using
using

Static
static

15.

Sun
Pass Transistor Logic Circuits ,nMOS Transistor as a Switch,pMOS Transistor
as a Switch,Transmission gate,Introduction,Advantages of Pass Transistor
Logic,Disadvantages of Pass Transistor Logic,Sneak Path,Disadvantages of
Pass Transistor Logic.

16.

Sun
Pass Transistor Logic Family,CPL Examples,,Pass Transistor Logic
Family,Comparison of the Pass transistor Logic Families,Pass Transistor
Logic Family,Comparison of the Pass Transistor Logic Families,Pass
Transistor
Logic
Synthesis,ROBDD
Construction,BDD
Construction,ROBDD - construction,BDD Construction,Pass Transistor Logic
Synthesis,Pass Transistor Logic synthesis ,MOS Memories

17.
Revision
18 & 19.

FINAL TERM EXAM

RECOMMENDED PRACTICAL TOPICS:

PRACTICAL
NO

DESCRIPTION

1.

To perform the Basic Digital Logic (AND Gate, OR Gate, NOT Gate, NAND Gate,
and NOR Gate) operation using VHDL Language with the help of CPLD
Development Platform.
To design the multiplexer (4 to 1 and 8 to 1) in Verilog HDL Language using
CPLD Development Platform.
To design the Demultiplexer (1 to 4 and 1 to 8) in Verilog HDL Language using
CPLD Development Platform.
To design a Full Adder and Half Adder in VHDL Language using FPGA Circuit
board.
To design a Full Subtractor and Half Subtractor in VHDL Language using FPGA
Circuit board.
To design the following types of Flip Flop in VHDL Language using FPGA circuit
board or CPLD Development Platform.
a. RS Flip Flop b. JK Flip Flop c. D Flip Flop d. T Flip Flop
To design the user constraints files of Binary to Grey converter code using EXOR
Gate in VHDL Language on FPGA circuit board.
To design and implement the user constraints files of Grey to Binary code in
VHDL Language on FPGA circuit board
To design a BCD to Seven Segment Decoder using Verilog HDL Language on
CPLD Development Platform and Output showed on Seven Segment Display.
To design a Octal to Binary number system and output of the number system to be
displayed on Seven Segment
To Design and Implement the Bank Token Display in Verilog HDL Language
using the FPGA Circuit Board.
To Design and Implement the User Constraints File of LED Flasher and output
showed on the LEDs.
To design and simulate the characteristics of CMOS Inverter using
MICROWIND/LTSPICE.
To design and simulate the characteristics of Ring Oscillator using
MICROWIND/LTSPICE.
To design and simulate the Layout of CMOS Inverter using L-EDIT.

2.
3.
4.
5.
6.

7.
8.
9.
10.
11.
12.
13.
14.
15.

Laboratory: VLSI Lab