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2013
Q. 1
ONE MARK
In the circuit shown below what is the output voltage ^Vouth if a silicon transistor
Q and an ideal op-amp are used?
(A) - 15 V
(C) + 0.7 V
Q. 2
in
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(B) - 0.7 V
(D) + 15 V
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a
(A) 8
(B) 32
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(C) 50
Q. 4
(D) 200
o
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In the circuit shown below, the knee current of the ideal Zener dioide is 10 mA
. To maintain 5 V across RL , the minimum value of RL in W and the minimum
power rating of the Zener diode in mW, respectively, are
in
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In the circuit shown below the op-amps are ideal. Then, Vout in Volts is
(A) 4
(C) 8
Q. 6
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(B) 6
(D) 10
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(A) XY
(C) XY
Q. 7
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A voltage 1000 sin wt Volts is applied across YZ . Assuming ideal diodes, the
voltage measured across WX in Volts, is
(A) sin wt
(C) ^sin wt - sin wt h /2
Q. 8
(B) XY
(D) XY
.
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In the circuit shown below, the silicon npn transistor Q has a very high value of
b . The required value of R2 in kW to produce IC = 1 mA is
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(A) 20
(C) 40
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(B) 30
(D) 50
2012
Q. 9
ONE MARK
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(C) 6.67 mA
(D) 6.2 mA
Q. 10
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The current ib through the base of a silicon npn transistor is 1 + 0.1 cos (10000pt) mA
At 300 K, the rp in the small signal model of the transistor is
(A) 250 W
(C) 25 W
Q. 11
(B) 27.5 W
(D) 22.5 W
.
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The diodes and capacitors in the circuit shown are ideal. The voltage v (t) across
the diode D1 is
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(A) 50 W
(C) 5 kW
(B) 100 W
(D) 10.1 kW
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2012
Q. 13
TWO MARKS
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1
rad/s
(R1 + R2) C
(B) high pass filter with f3dB = 1 rad/s
R1 C
(C) low pass filter with f3dB = 1 rad/s
R1 C
1
(D) high pass filter with f3dB =
rad/s
(R1 + R2) C
(A) low pass filter with f3dB =
Q. 14
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(A) Av . 200
(C) Av . 20
2011
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Q. 15
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(B) Av . 100
(D) Av . 10
ONE MARK
In the circuit shown below, capacitors C1 and C2 are very large and are shorts at
the input frequency. vi is a small signal input. The gain magnitude vo at 10 M
vi
rad/s is
(A) maximum
(C) unity
(B) minimum
(D) zero
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Q. 16
ANALOG ELECTRONICS
The circuit below implements a filter between the input current ii and the output
voltage vo . Assume that the op-amp is ideal. The filter implemented is a
.
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In the circuit shown below, for the MOS transistors, mn Cox = 100 mA/V 2 and the
threshold voltage VT = 1 V . The voltage Vx at the source of the upper transistor is
(A) 1 V
(C) 3 V
in
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(B) 2 V
(D) 3.67 V
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Q. 18
For a BJT, the common base current gain a = 0.98 and the collector base
junction reverse bias saturation current ICO = 0.6 mA . This BJT is connected in
the common emitter mode and operated in the active region with a base drive
current IB = 20 mA . The collector current IC for this mode of operation is
(A) 0.98 mA
(B) 0.99 mA
(C) 1.0 mA
(D) 1.01 mA
Q. 19
For the BJT, Q1 in the circuit shown below, b = 3, VBEon = 0.7 V, VCEsat = 0.7 V
. The switch is initially closed. At time t = 0 , the switch is opened. The time t at
which Q1 leaves the active region is
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(A) 10 ms
(B) 25 ms
(C) 50 ms
(D) 100 ms
in
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In the circuit shown below, assume that the voltage drop across a forward biased
diode is 0.7 V. The thermal voltage Vt = kT/q = 25 mV . The small signal input
vi = Vp cos ^wt h where Vp = 100 mV.
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Q. 20
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(C) 1.5 mA
Q. 21
(D) 2 mA
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ONE MARK
The amplifier circuit shown below uses a silicon transistor. The capacitors CC
and CE can be assumed to be short at signal frequency and effect of output
resistance r0 can be ignored. If CE is disconnected from the circuit, which one of
the following statements is true
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(D) Both input resistance Ri and the magnitude of voltage gain AV increases
Q. 23
In the silicon BJT circuit shown below, assume that the emitter area of transistor
Q1 is half that of transistor Q2
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(D) 15 mA
Assuming the OP-AMP to be ideal, the voltage gain of the amplifier shown below
is
in
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(B) - R 3
R1
(A) - R2
R1
R || R 3
(C) - 2
R1
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2010
(D) -b R2 + R 3 l
R1
TWO MARKS
Consider the common emitter amplifier shown below with the following circuit
parameters:
b = 100, gm = 0.3861 A/V, r0 = 259 W, RS = 1 kW, RB = 93 kW,
RC = 250 kW, RL = 1 kW, C1 = 3 and C2 = 4.7 mF
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Q. 25
ANALOG ELECTRONICS
(B) 1258 W
(D) 3
(C) 93 kW
Q. 26
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(B) 27.1 Hz
(C) 13.6 Hz
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(D) 16.9 Hz
Q. 27
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The transfer characteristic for the precision rectifier circuit shown below is
(assume ideal OP-AMP and practical diodes)
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Q. 28
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Q. 29
ANALOG ELECTRONICS
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Consider for CMOS circuit shown, where the gate voltage v0 of the n-MOSFET is
increased from zero, while the gate voltage of the p -MOSFET is kept constant
at 3 V. Assume, that, for both transistors, the magnitude of the threshold voltage
is 1 V and the product of the trans-conductance parameter is 1mA. V - 2
.
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Q. 30
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For small increase in VG beyond 1V, which of the following gives the correct
description of the region of operation of each MOSFET
(A) Both the MOSFETs are in saturation region
(B) Both the MOSFETs are in triode region
(C) n-MOSFETs is in triode and p -MOSFET is in saturation region
(D) n- MOSFET is in saturation and p -MOSFET is in triode region
Q. 31
Estimate the output voltage V0 for VG = 1.5 V. [Hints : Use the appropriate
current-voltage equation for each MOSFET, based on the answer to Q.4.16]
(A) 4 - 1
(B) 4 + 1
2
2
(C) 4 - 3
(D) 4 + 3
2
2
Q. 32
In the circuit shown below, the op-amp is ideal, the transistor has VBE = 0.6 V
and b = 150 . Decide whether the feedback in the circuit is positive or negative
and determine the voltage V at the output of the op-amp.
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A small signal source Vi (t) = A cos 20t + B sin 106 t is applied to a transistor
amplifier as shown below. The transistor has b = 150 and hie = 3W . Which
expression best approximate V0 (t)
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ONE MARK
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2008
Q. 35
TWO MARSK
For the circuit shown in the following figure, transistor M1 and M2 are identical
NMOS transistors. Assume the M2 is in saturation and the output is unloaded.
in
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Q. 36
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(B) 0.1 V
(C) 0.7 V
Q. 37
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(A) 0 V
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(D) 1.1 V
Two identical NMOS transistors M1 and M2 are connected as shown below. Vbias
is chosen so that both transistors are in saturation. The equivalent gm of the pair
is defied to be 2Iout at constant Vout
2Vi
The equivalent gm of the pair is
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Q. 39
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In the following transistor circuit, VBE = 0.7 V, r3 = 25 mV/IE , and b and all the
capacitances are very large
Q. 40
Q. 41
(B) 2 mA
(D) 10 mA
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2007
Q. 42
ONE MARK
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Q. 43
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(A) -2 V
(C) -0.5 V
Q. 45
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(B) -1 V
(D) 0.5 V
For the BJT circuit shown, assume that the b of the transistor is very large and
VBE = 0.7 V. The mode of operation of the BJT is
(A) cut-off
(C) normal active
Q. 46
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TWO MARKS
(B) saturation
(D) reverse active
In the Op-Amp circuit shown, assume that the diode current follows the equation
I = Is exp (V/VT ). For Vi = 2V, V0 = V01, and for Vi = 4V, V0 = V02 .
The relationship between V01 and V02 is
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(A) V02 =
2 Vo1
(C) Vo2 = Vo1 1n2
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a
In the CMOS inverter circuit shown, if the trans conductance parameters of the
NMOS and PMOS transistors are
W
kn = kp = mn Cox Wn = mCox p = 40mA/V2
Ln
Lp
and their threshold voltages ae VTHn = VTHp = 1 V the current I is
Q. 47
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(B) 25 mA
(D) 90 mA
(A) 0 A
(C) 45 mA
in
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For the Zener diode shown in the figure, the Zener voltage at knee is 7 V, the knee
current is negligible and the Zener dynamic resistance is 10 W. If the input voltage
(Vi) range is from 10 to 16 V, the output voltage (V0) ranges from
Q. 48
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Q. 49
(B) 1 + sRC
1 - sRC
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(C)
Q. 50
ANALOG ELECTRONICS
1
1 - sRC
(D)
1
1 + sRC
If Vi = V1 sin (wt) and V0 = V2 sin (wt + f), then the minimum and maximum values
of f (in radians) are respectively
(B) 0 and p
(A) - p and p
2
2
2
p
(C) - p and 0
(D) - and 0
2
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ONE MARK
Q. 51
The input impedance (Zi) and the output impedance (Z0) of an ideal transconductance (voltage controlled current source) amplifier are
(A) Zi = 0, Z0 = 0
(B) Zi = 0, Z0 = 3
(C) Zi = 3, Z0 = 0
(D) Zi = 3, Z0 = 3
Q. 52
An n-channel depletion MOSFET has following two points on its ID - VGs curve:
(i) VGS = 0 at ID = 12 mA and
(ii) VGS =- 6 Volts at ID = 0 mA
Which of the following Q point will given the highest trans conductance gain for
small signals?
(A) VGS =- 6 Volts
(B) VGS =- 3 Volts
(D) VGS = 3 Volts
(C) VGS = 0 Volts
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Q. 53
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TWO MARKS
For the circuit shown in the following figure, the capacitor C is initially uncharged.
At t = 0 the switch S is closed. The Vc across the capacitor at t = 1 millisecond is
In the figure shown above, the OP-AMP is supplied with !15V .
Q. 54
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(A) 0 Volt
(D) 10 Volts
For the circuit shown below, assume that the zener diode is ideal with a breakdown
voltage of 6 volts. The waveform observed across R is
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In the transistor amplifier circuit shown in the figure below, the transistor has
the following parameters:
.
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Q. 55
Q. 56
Q. 57
(C) 5.3
(D) 10
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Q. 58
ANALOG ELECTRONICS
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2005
(C) 40 kW
Q. 62
(A) 30 kW
4
Q. 61
If the unregulated voltage increases by 20%, the power dissipation across the
transistor Q1
(A) increases by 20%
(B) increases by 50%
(C) remains unchanged
Q. 60
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Q. 59
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(B) 10 kW
(D) infinite
Q. 63
TWO MARKS
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Q. 64
ANALOG ELECTRONICS
For an npn transistor connected as shown in figure VBE = 0.7 volts. Given that
reverse saturation current of the junction at room temperature 300 K is 10 - 13 A,
the emitter current is
.
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(A) 30 mA
(B) 39 mA
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(C) 49 mA
Q. 65
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(D) 20 mA
The voltage e0 is indicated in the figure has been measured by an ideal voltmeter.
Which of the following can be calculated ?
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Q. 67
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The Op-amp circuit shown in the figure is filter. The type of filter and its cut. Off
frequency are respectively
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The circuit using a BJT with b = 50 and VBE = 0.7V is shown in the figure. The
base current IB and collector voltage by VC and respectively
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The Zener diode in the regulator circuit shown in the figure has a Zener voltage
of 5.8 volts and a zener knee current of 0.5 mA. The maximum load current
drawn from this current ensuring proper functioning over the input voltage range
between 20 and 30 volts, is
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(B) 14.2 mA
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(C) 13.7 mA
in
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(A) 23.7 mA
Q. 69
(D) 24.2 mA
Both transistors T1 and T2 show in the figure, have a b = 100 , threshold voltage of
1 Volts. The device parameters K1 and K2 of T1 and T2 are, respectively, 36 mA/V2
and 9 mA/V 2 . The output voltage Vo i s
(A) 1 V
(C) 3 V
in
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(B) 2 V
(D) 4 V
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Q. 70
Q. 71
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Q. 72
ANALOG ELECTRONICS
in
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Given the ideal operational amplifier circuit shown in the figure indicate the
correct transfer characteristics assuming ideal diodes with zero cut-in voltage.
.
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2004
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ONE MARK
Q. 74
Q. 75
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Q. 76
ANALOG ELECTRONICS
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Q. 77
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TWO MARKS
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(A) 1 mF
2p
1
(C)
mF
2p 6
Q. 79
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(B) 2p mF
(D) 2p 6 mF
(A) - Vs
R2
(B) Vs
R2
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(C) - Vs
RL
Q. 80
(D) Vs
R1
In the voltage regulator shown in the figure, the load current can vary from 100
mA to 500 mA. Assuming that the Zener diode is ideal (i.e., the Zener knee
current is negligibly small and Zener resistance is zero in the breakdown region),
the value of R is
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Q. 81
Q. 82
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(A) 7 W
(B) 70 W
(C) 70 W
(D) 14 W
3
In a full-wave rectifier using two ideal diodes, Vdc and Vm are the dc and peak
values of the voltage respectively across a resistive load. If PIV is the peak inverse
voltage of the diode, then the appropriate relationships for this rectifier are
(A) Vdc = Vm , PIV = 2Vm
(B) Idc = 2 Vm , PIV = 2Vm
p
p
(C) Vdc = 2 Vm , PIV = Vm
(D) Vdc Vm , PIV = Vm
p
p
Assume that the b of transistor is extremely large and VBE = 0.7V, IC and VCE in
the circuit shown in the figure
.
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Q. 83
in
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Choose the correct match for input resistance of various amplifier configurations
shown below :
Configuration
Input resistance
CB : Common Base
LO : Low
CC : Common Collector
MO : Moderate
CE : Common Emitter
HI : High
(A) CB - LO, CC - MO, CE - HI
(B) CB - LO, CC - HI, CE - MO
(C) CB - MO, CC - HI, CE - LO
(D) CB - HI, CC - LO, CE - MO
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Q. 84
Q. 85
ANALOG ELECTRONICS
in
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If the input to the ideal comparators shown in the figure is a sinusoidal signal of 8
V (peak to peak) without any DC component, then the output of the comparators
has a duty cycle of
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(A) 1/2
(C) 1/6
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(B) 1/3
(D) 1/2
Q. 86
If the differential voltage gain and the common mode voltage gain of a differential
amplifier are 48 dB and 2 dB respectively, then common mode rejection ratio is
(A) 23 dB
(B) 25 dB
(C) 46 dB
(D) 50 dB
Q. 87
Generally, the gain of a transistor amplifier falls at high frequencies due to the
(A) internal capacitances of the device
(B) coupling capacitor at the input
Q. 88
TWO MARKS
(C) 5 kW
Q. 89
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(D) 11 kW
In the amplifier circuit shown in the figure, the values of R1 and R2 are such that
the transistor is operating at VCE = 3 V and IC = 1.5 mA when its b is 150. For
a transistor with b of 200, the operating point (VCE , IC ) is
*Maximum Discount*
Q. 90
(A) (2 V, 2 mA)
(B) (3 V, 2 mA)
(C) (4 V, 2 mA)
(D) (4 V, 1 mA)
The oscillator circuit shown in the figure has an ideal inverting amplifier. Its
frequency of oscillation (in Hz) is
.
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1
(2pRC)
(D)
6
(2pRC)
(C) 9 V
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(A) 3 V
(B) 6 V
(D) 12 V
If the op-amp in the figure is ideal, the output voltage Vout will be equal to
Q. 93
(B)
The output voltage of the regulated power supply shown in the figure is
Q. 92
in
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1
(2p 6 RC)
1
(C)
( 6 RC)
(A)
Q. 91
ANALOG ELECTRONICS
(A) 1 V
(B) 6 V
(C) 14 V
(D) 17 V
Three identical amplifiers with each one having a voltage gain of 50, input
resistance of 1 kW and output resistance of 250 W are cascaded. The opened
circuit voltages gain of the combined amplifier is
(A) 49 dB
(B) 51 dB
(C) 98 dB
(D) 102 dB
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Q. 94
ANALOG ELECTRONICS
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Q. 95
Q. 96
Q. 97
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ONE MARK
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2002
Q. 98
TWO MARKS
The circuit in the figure employs positive feedback and is intended to generate
V (f) 1
sinusoidal oscillation. If at a frequency f0, B (f) = 3 f
= +0c, then to sustain
V0 (f)
6
oscillation at this frequency
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(B) R2 = 6R1
(D) R2 = R1
5
Q. 100
.
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(A) R2 = 5R1
(C) R2 = R1
6
Q. 99
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(A) R # 1800W
(C) 3700W # R # 4000W
Q. 101
in
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The voltage gain Av = v0 of the JFET amplifier shown in the figure is IDSS = 10
vt
mA Vp =- 5 V(Assume C1, C2 and Cs to be very large
(A) +16
(C) +8
(B) -16
(D) -6
*Maximum Discount*
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2001
Q. 102
ONE MARK
gm
r
g
(D) m
rp
(A) gm r0
(B)
(C) gm rp
Q. 103
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(D) Ri = 0, A = 3, R0 = 3
Q. 104
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Q. 105
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Q. 106
TWO MARKS
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The transistor shunt regulator shown in the figure has a regulated output voltage
of 10 V, when the input varies from 20 V to 30 V. The relevant parameters for
the zener diode and the transistor are : Vz = 9.5 , VBE = 0.3 V, b = 99 , Neglect the
current through RB . Then the maximum power dissipated in the zener diode (Pz )
and the transistor (PT ) are
*Maximum Discount*
Q. 107
ANALOG ELECTRONICS
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The inverting OP-AMP shown in the figure has an open-loop gain of 100.
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(B) - 9
(D) - 11
In the figure assume the OP-AMPs to be ideal. The output v0 of the circuit is
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#0 cos (100t) dt
(B) 10
#0 cos (100t) dt
2000
Q. 110
Q. 111
ONE MARK
In the differential amplifier of the figure, if the source resistance of the current
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(A) zero
(C) indeterminate
Q. 112
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(B) infinite
(D) Vin1 + Vin2
2VT
(A) -1 V
(C) +1 V
(B) 2 V
(D) +15 V
in
.
co
Q. 113
Q. 114
i
d
o
n
.
w
(A) zero
(C) - (V1 + V2) sin wt
Q. 115
.
a
*Maximum Discount*
Q. 116
ANALOG ELECTRONICS
Assume that the op-amp of the figure is ideal. If vi is a triangular wave, then v0
will be
in
.
co
.
a
i
d
no
.
w
2000
Q. 118
in
.
co
TWO MARKS
In the circuit of figure, assume that the transistor is in the active region. It has a
large b and its base-emitter voltage is 0.7 V. The value of Ic is
i
d
.
a
o
n
.
w
If the op-amp in the figure has an input offset voltage of 5 mV and an open-loop
voltage gain of 10000, then v0 will be
(A) 0 V
(B) 5 mV
(C) + 15 V or -15 V
*Maximum Discount*
ANALOG ELECTRONICS
1999
ONE MARK
Q. 120
Q. 121
in
.
co
.
a
i
d
o
n
.
w
(A) gm1
g
(C) m1
2
Q. 123
1999
Q. 125
.
a
i
d
Q. 124
in
.
co
(B) gm2
g
(D) m2
2
.
w
no
Q. 126
TWO MARK
ONE MARK
*Maximum Discount*
ANALOG ELECTRONICS
in
.
co
.
a
i
d
o
n
.
w
From a measurement of the rise time of the output pulse of an amplifier whose is
a small amplitude square wave, one can estimate the following parameter of the
amplifier
(A) gain-bandwidth product
(B) slow rate
The emitter coupled pair of BJTs given a linear transfer relation between the
differential output voltage and the differential output voltage and the differential
input voltage Vid is less a times the thermal voltage, where a is
(A) 4
(B) 3
in
.
co
(C) 2
Q. 130
(D) 1
.
a
i
d
o
n
.
w
1998
Q. 131
(D) B =
One input terminal of high gain comparator circuit is connected to ground and a
sinusoidal voltage is applied to the other input. The output of comparator will be
(A) a sinusoid
(B) a full rectified sinusoid
(C) a half rectified sinusoid
Q. 133
TWO MARKS
In a series regulated power supply circuit, the voltage gain Av of the pass
transistor satisfies the condition
(A) Av " 3
(B) 1 << Av < 3
(C) Av . 1
(D) Av << 1
*Maximum Discount*
Q. 134
ANALOG ELECTRONICS
For full wave rectification, a four diode bridge rectifier is claimed to have the
following advantages over a two diode circuit :
(A) less expensive transformer,
(B) smaller size transformer, and
in
.
co
Q. 135
Of these,
(A) only (1) and (2) are true
i
d
Q. 136
o
n
.
w
(A) V1 = V2
2
(B) V1 =-V2
2
(C) V1 = 2V2
(D) V1 =- 2V2
in
.
co
For small signal ac operation, a practical forward biased diode can be modelled as
(A) a resistance and a capacitance in series
(B) an ideal diode and resistance in parallel
(C) a resistance and an ideal diode in series
.
a
i
d
(D) a resistance
o
n
.
w
1997
Q. 137
.
a
In the MOSFET amplifier of the figure is the signal output V1 and V2 obey the
relationship
ONE MARK
In the BJT amplifier shown in the figure is the transistor is based in the forward
active region. Putting a capacitor across RE will
(A) decrease the voltage gain and decrease the input impedance
(B) increase the voltage gain and decrease the input impedance
(C) decrease the voltage gain and increase the input impedance
*Maximum Discount*
ANALOG ELECTRONICS
(D) increase the voltage gain and increase the input impedance
Q. 138
in
.
co
.
a
i
d
o
n
.
w
TWO MARKS
In the circuit of in the figure is the current iD through the ideal diode (zero cut
in voltage and forward resistance) equals
(A) 0 A
(C) 1 A
Q. 141
(B) 4 A
(D) None of the above
o
n
.
w
(A) - 4 V
(C) 5 V
Q. 142
i
d
.
a
in
.
co
(B) 6 V
(D) - 5.5 V
A half wave rectifier uses a diode with a forward resistance Rf . The voltage is
Vm sin wt and the load resistance is RL . The DC current is given by
Vm
(B)
(A) Vm
p (R f + RL)
2 RL
(C) 2Vm
(D) Vm
RL
p
*Maximum Discount*
ANALOG ELECTRONICS
1996
Q. 143
ONE MARK
In the circuit of the given figure, assume that the diodes are ideal and the meter
is an average indicating ammeter. The ammeter will read
.
a
i
d
(A) 0.4 2 A
(C) 0.8 A
p
Q. 144
in
.
co
o
n
.
w
(B) 0.4 A
(D) 0.4 mamp
p
1996
Q. 145
.
a
TWO MARKS
In the circuit shown in the given figure N is a finite gain amplifier with a gain
of k , a very large input impedance, and a very low output impedance. The input
impedance of the feedback amplifier with the feedback impedance Z connected
as shown will be
i
d
(A) Z b1 - 1 l
k
Z
(C)
(k - 1)
Q. 146
in
.
co
o
n
.
w
(B) Z (1 - k)
(D) Z
(1 - k)
*Maximum Discount*
ANALOG ELECTRONICS
(A) gm1
(C) gm2
Q. 147
Value of R in the oscillator circuit shown in the given figure, so chosen that it just
oscillates at an angular frequency of w. The value of w and the required value of
R will respectively be
in
.
co
.
a
i
d
o
n
.
w
A zener diode in the circuit shown in the figure is has a knee current of 5 mA,
and a maximum allowed power dissipation of 300 mW. What are the minimum
and maximum load currents that can be drawn safely from the circuit, keeping
the output voltage V0 constant at 6 V?
.
w
.
a
i
d
no
in
.
co
***********
*Maximum Discount*
ANALOG ELECTRONICS
SOLUTIONS
Sol. 1
in
.
co
.
a
i
d
i.e.,
VC = 0 volt
The current in 1 kW resistor is given by
I = 5 - 0 = 5 mA
1 kW
o
n
.
w
This current will flow completely through the BJT since, no current will flow
into the ideal op-amp ( I/P resistance of ideal op-amp is infinity). So, for BJT
we have
VC = 0
VB = 0
IC = 5 mA
i.e.,the base collector junction is reverse biased (zero voltage) therefore, the
in
.
co
collector current (IC ) can have a value only if base-emitter is forward biased.
Hence,
VBE = 0.7 volts
&
VB - VE = 0.7
&
0 - Vout = 0.7
or,
Vout =- 0.7 volt
Sol. 2
i
d
.
a
o
n
.
w
Vin
= A 0 Vin
^1 + k A 0h
^1 + k A 0h
Since, Vin is independent of k when seen from output mode, the output voltage
decreases with increase in k that leads to the decrease of output impedance.
Thus, input impedance increases and output impedance decreases.
Sol. 3
Vout = A 0 V1 = A 0
*Maximum Discount*
ANALOG ELECTRONICS
in
.
co
- gm Vi
1 +
1
RD R + 1
L
sC
Therefore, the output voltage V0 is obtained as
- gm Vi
N
RL J
V0 = V1 RL =
K 1
O
1
1
1
RL +
RL +
+
sC
sC KK RD R + 1 OO
L
sC P
L
so, the transfer function is
V0 = - RD RL sCgm
Vi
1 + sC ^RD + RL h
1
Then, we have the pole at w =
C ^RD + RL h
It gives the lower cutoff frequency of transfer function.
1
i.e.,
w0 =
C ^RD + RL h
1
1
or,
f0 =
=
2pC ^RD + RL h
2p # 10-6 # 20 # 103
= 7.97 . 8 Hz
V1 =
&
.
a
i
d
Sol. 4
o
n
.
w
in
.
co
i
d
.
a
o
n
.
w
Is = I Z + I L
or,
(1)
I Z = Is - I L
Since, voltage across zener diode is 5 V so, current through 100 W resistor is
obtained as
Is = 10 - 5 = 0.05 A
100
Therefore, the load current is given by
IL = 5
RL
Since, for proper operation, we must have
IZ $ Iknes
So, from Eq. (1), we write
0.05 A - 5 $ 10 mA
RL
50 mA - 5 $ 10 mA
RL
*Maximum Discount*
ANALOG ELECTRONICS
40 mA $ 5
RL
-3
40 # 10 $ 5
RL
1
# RL
5
40 # 10-3
5
# RL
40 # 10-3
or,
125 W # RL
Therefore, minimum value of RL = 125 W
Now, we know that power rating of Zener diode is given by
PR = VZ IZ^maxh
IZ^maxh is maximum current through zener diode in reverse bias. Maximum
currrent through zener diode flows when load current is zero. i.e.,
IZ^maxh = Is = 10 - 5 = 0.05
100
Therefore,
PR = 5 # 0.05 W = 250 mW
in
.
co
.
a
i
d
Sol. 5
o
n
.
w
.
a
i
d
o
n
.
w
in
.
co
Sol. 6
*Maximum Discount*
X
0
0
1
1
ANALOG ELECTRONICS
Y
0
1
0
1
Z
0
1
0
0
in
.
co
.
a
i
d
Sol. 7
o
n
.
w
.
a
i
d
o
n
.
w
in
.
co
Sol. 8
*Maximum Discount*
ANALOG ELECTRONICS
in
.
co
R2
= 3R2
R1 + R 2
R1 + R 2
R
2 R1
and
RTh =
R 2 + R1
Since, IC = bIB has b . 3 (very high) so, IB is negative in comparison to IC .
Therefore, we can write the base voltage
VTh = VCC
.
w
VB = VTh
VTh - 0.7 - IC RE = 0
or,
or,
or,
i
d
no
So,
or,
.
a
Sol. 9
.
a
i
d
o
n
.
w
10 - (v - 0.7) # 2 - v = 0
So,
Sol. 10
10 - 3v + 1.4 = 0
v = 11.4 = 3.8 V > 0.7
3
i = v - 0.7 = 3.8 - 0.7 = 6.2 mA
500
500
(Assumption is true)
Sol. 11
in
.
co
R2 = 60 # 1.2 = 40 kW
1.8
Hence,
*Maximum Discount*
ANALOG ELECTRONICS
in
.
co
.
a
i
d
o
n
.
w
The peak rectifier adds + 1 V to peak voltage, so overall peak voltage lowers down
by - 1 volt.
So,
vo = cos wt - 1
Sol. 12
.
a
i
d
o
n
.
w
in
.
co
ZTh = Vtest
Itest
Sol. 13
...(i)
*Maximum Discount*
ANALOG ELECTRONICS
in
.
co
0 - Vi (jw) 0 - Vo (jw)
=0
+
1 +R
R2
1
jw C
Vo (jw)
- Vi (jw)
=
1 +R
R2
1
jw C
.
a
i
d
o
n
.
w
Vi (jw) R2
R1 - j 1
wC
1 " 3, so V = 0
o
wC
Vo (jw) =-
.
a
i
d
So,
o
n
.
w
2R 12 = R 12 +
Sol. 14
in
.
co
1
w02 C 2
1
w 2C 2
w0 = 1
R1 C
R 12 =
*Maximum Discount*
ANALOG ELECTRONICS
VC - 100IB - 0.7 = 0
VC = 100IB + 0.7
IC - IE = 13.7 - VC = (b + 1) IB
12k
13.7 - VC = 100I
B
12 # 103
Solving equation (i) and (ii),
in
.
co
...(i)
...(ii)
IB = 0.01 mA
Small Signal Analysis :
Transforming given input voltage source into equivalent current source.
.
a
i
d
o
n
.
w
.
a
i
d
o
n
.
w
in
.
co
-5
v 0 (9.33 # 10 ) + v p (0.04) = 0
v 0 =- 428.72Vp
Writing KCL at input node
vi = v p + v p + v p - vo
Rs
Rs rp
RF
vi = v 1 + 1 + 1 - v 0
p:
Rs
Rs rp RF D RF
vi = v (5.1 10-4) - v 0
#
p
Rs
RF
Substituting Vp from equation (i)
...(i)
vi = - 5.1 # 10-4 v - v 0
0
428.72
Rs
RF
vi
Rs = 10 kW (source resistance)
=- 1.16 # 10-6 v 0 - 1 # 10-5 v 0
10 # 103
vi
=- 1.116 # 10-5
10 # 103
1
Av = v 0 =
- 8.96
vi
10 # 103 # 1.116 # 10-5
Sol. 15
*Maximum Discount*
ANALOG ELECTRONICS
in
.
co
.
a
i
d
Sol. 16
o
n
.
w
or
At w = 0
At w = 3
Sol. 17
.
a
i
d
Transfer function
o
n
.
w
in
.
co
H (jw) = 0
H (jw) = R1 = constant .
Hence HPF.
For transistor M2 ,
VGS = VG - VS = Vx - 0 = Vx
VDS = VD - VS = Vx - 0 = Vx
*Maximum Discount*
ANALOG ELECTRONICS
in
.
co
4 (4 - Vx ) 2 = (Vx - 1) 2
or
2 (4 - Vx ) = ! (Vx - 1)
Taking positive root,
8 - 2Vx = Vx - 1
Vx = 3 V
At Vx = 3 V for M1,VGS = 5 - 3 = 2 V < VDS . Thus our assumption is true and
Vx = 3 V .
Sol. 18
.
a
i
d
o
n
.
w
a = 0.98
Now
b = a = 4.9
1-a
In active region, for common emitter amplifier,
We have
Substituting ICO
IC = bIB + (1 + b) ICO
= 0.6 mA and IB = 20 mA in above eq we have,
IC = 1.01 mA
Sol. 19
...(1)
in
.
co
.
a
i
d
Now
IC . IE = 1 mA
Applying KCL at collector
o
n
.
w
Since
or
i1 = 0.5 mA
i1 = C dVC
dt
VC = 1 # i1 dt = i1 t
C
C
...(1)
with time, the capacitor charges and voltage across collector changes from 0
towards negative.
When saturation starts,
*Maximum Discount*
ANALOG ELECTRONICS
+ 5 = 0.5 mA T
5 mA
-6
= 50 m sec
T = 5 # 5 # 10
-3
0.5 # 10
or
Sol. 20
Sol. 21
in
.
co
.
a
i
d
o
n
.
w
= 1 cos (wt) mV
Sol. 22
in
.
co
.
a
i
d
Input impedance
Ri = RB || r p
Voltage gain
AV = gm RC
Now, if CE is disconnected, resistance RE appears in the circuit
o
n
.
w
Input impedance
R in = RB || [rp + (b + 1)] RE
Input impedance increases
gm RC
Voltage gain
AV =
1 + gm R E
Sol. 23
*Maximum Discount*
Collector current
ANALOG ELECTRONICS
in
.
co
.
a
i
d
VB =- 10 - (- 0.7) =- 9.3 V
0 - (- 9.3)
I1 =
= 1 mA
(9.3 kW)
.
w
no
b 1 = 700 (high), So IC . IE
Applying KCL at base we have
1 - IE = IB + IB
1 - (b 1 + 1) IB = IB + IB
1 = (700 + 1 + 1)
I 0 = IC = b 2 : IB = 715 # 2 . 2 mA
702
Option (A) is correct.
The circuit is as shown below :
.
a
o
n
.
w
So,
or
in
.
co
i
d
Sol. 25
IB . 2
702
2
Sol. 24
IB
+ IB
2
0 - Vi + 0 - Vo = 0
R1
R2
Vo =- R2
Vi
R1
*Maximum Discount*
Sol. 26
ANALOG ELECTRONICS
Sol. 27
in
.
co
.
a
i
d
o
n
.
w
I = 20 - 0 + Vi - 0 = 5 + Vi
4R
R
R
If I > 0, diode D2 conducts
So, for 5 + VI > 0 & VI > - 5, D2 conducts
2
Equivalent circuit is shown below
Current
.
a
i
d
o
n
.
w
in
.
co
0 - Vi + 0 - 20 + 0 - Vo = 0
R
4R
R
or
Vo =- Vi - 5
At Vi =- 5 V,
At Vi =- 10 V,
Vo = 0
Vo = 5 V
*Maximum Discount*
Sol. 28
ANALOG ELECTRONICS
in
.
co
.
a
i
d
Sol. 29
Sol. 30
Sol. 31
Sol. 32
o
n
.
w
.
a
i
d
o
n
.
w
in
.
co
VE = IE RE = 1m # 1.4k = 1.4V
= 0.6 + 1.4 = 2V
Thus the feedback is negative and output voltage is V = 2V .
Sol. 33
IE = IC
hfe RC
Vi
hie
V0 . - 150 # 3k Vi
3k
*Maximum Discount*
ANALOG ELECTRONICS
in
.
co
.
a
i
d
o
n
.
w
^Lh
Ix = W 2 Ibias
^ L h1
Since MOSFETs are identical,
W
W
Thus
b L l =b L l
2
2
W
Hence
Sol. 36
Ix = Ibias
in
.
co
.
a
i
d
Thus current will flow from -ive terminal (0 Volt) to -1 Volt source. Thus the
current I is
0 - (- 1)
= 1
I =
100k
100k
o
n
.
w
I = I 0 _eV - 1i
Now VT = 25 mV and I0 = 1 mA
Thus
or
Now
Sol. 37
V
I = 10-6 8e 25 # 10 - 1B = 1 5
10
V = 0.06 V
V0 = I # 4k + V = 1 # 4k + 0.06 = 0.1 V
100k
-3
or
v0 =R2
vi
(R1 + sL)( sR2 C2 + 1)
*Maximum Discount*
ANALOG ELECTRONICS
and from this equation it may be easily seen that this is the standard form of
T.F. of low pass filter
H (s) =
K
(R1 + sL)( sR2 C2 + 1)
in
.
co
and form this equation it may be easily seen that this is the standard form of
T.F. of low pass filter
H (s) =
K
as2 + bs + b
.
a
i
d
o
n
.
w
Sol. 38
Option (C ) is correct.
The current in both transistor are equal. Thus gm is decide by M1.
Sol. 39
in
.
co
i
d
.
a
o
n
.
w
*Maximum Discount*
ANALOG ELECTRONICS
in
.
co
IC
= 1m = 1 A/V
gm =
VT
25
25m
.
a
Vo =- gm Vp # (3k 3k )
=- 1 Vin (1.5k)
25
i
d
o
n
.
w
=- 60Vin
Am = Vo =- 60
Vin
or
Sol. 42
IC . IE
Vp = Vin
in
.
co
Sol. 43
Sol. 44
i
d
.
a
o
n
.
w
v+ = 0.5 V
v+ = vv- = 0.5 V
i = 1 - 0.5 = 0.5 mA
1k
i = 0.5 - v0 = 0.5 mA
2k
v0 = 0.5 - 1 =- 0.5 V
*Maximum Discount*
ANALOG ELECTRONICS
in
.
co
10 - 10IC - VCE - IC = 0
VCE =- 4.3 V
.
a
i
d
o
n
.
w
or
IR = ID
Vi = I eV /V
s
R
VD = VT 1n Vi
Is R
D
in
.
co
VD = 0 - Vo1 = VT 1n 2
Is R
For the first condition
VD = 0 - Vo1 = VT 1n 4
Is R
Vo1 - Vo2 = VT 1n 4 - VT 1n 2
Is R
Is R
Vo1 - Vo2 = VT 1n 4 = VT 1n2
2
or
Sol. 47
.
a
i
d
o
n
.
w
We have
and
Vthp = Vthp = 1 V
W
WP
= N = 40mA/V2
LN
LP
From figure it may be easily seen that Vas for each NMOS and PMOS is 2.5 V
mA
Thus
ID = K (Vas - VT ) 2 = 40 2 (2.5 - 1) 2 = 90 m A
V
Sol. 48
*Maximum Discount*
ANALOG ELECTRONICS
in
.
co
.
a
i
d
o
n
.
w
1
sC
1
V+ =
Vi =
V
1 + sCR i
R + sC1
1
V
V- = V+ =
1 + sCR i
Now
Sol. 50
in
.
co
i
d
.
a
o
n
.
w
fmin
fmax
=- 2 tan - 2 wRC
= - p (at w " 3)
= 0( at w = 0)
Sol. 51
Sol. 52
Sol. 53
V- = V+ = 10 V
Here note that current through the capacitor is constant and that is
I = V- = 10 = 10 mA
1k 1k
Thus the voltage across capacitor at t = 1 msec is
1m
1m
VC = 1 # Idt = 1 # 10mdt = 10 4
C 0
1m 0
Im
#0 dt = 10 V
*Maximum Discount*
Sol. 54
ANALOG ELECTRONICS
in
.
co
.
a
VR = Vin - 6
Only option (B) satisfy this condition.
Sol. 55
i
d
o
n
.
w
in
.
co
...(1)
...(2)
.
a
i
d
Sol. 56
o
n
.
w
...(3)
...(4)
b' = 110 # 60 = 66
100
Sol. 57
Sol. 58
*Maximum Discount*
ANALOG ELECTRONICS
Rf
R1 m
= Vo = 6`1 + 12k j = 9 V
24k
Vo = Vin c1 +
We know that
or
Vout
in
.
co
Now
VCE = 15 - 9 = 6 V
The power dissipated in transistor is
.
a
i
d
o
n
.
w
IC = 0.9 A
Power dissipation
P = VCE IC = 9 # 0.9 = 8.1 W
Thus % increase in power is
8.1 - 5.4 # 100 = 50%
5.4
Sol. 60
Sol. 61
in
.
co
i
d
.
a
o
n
.
w
Rof = R0 (1 + Ab)
Ri " Input resistance without feedback
Rif " Input resistance with feedback.
Sol. 62
Sol. 63
*Maximum Discount*
ANALOG ELECTRONICS
ADM =- gm RC
Thus only common mode gain depends on RE and for large value of RE it
decreases.
Sol. 64
in
.
co
IE = Is `e nV - 1j = 10 - 13 c
VBE
Sol. 65
0.7
1 # 26 # 10- 3
- 1m = 49 mA
.
a
i
d
o
n
.
w
or
e0 = I- (1M) + VWriting equation for I+ we have
0 - V+
= I+
1M
...(1)
in
.
co
...(2)
V+ = - I+ (1M)
Since for ideal OPAMP V+ = V- , from (1) and (2) we have
e0 = I- (1M) - I + (1M)
= (I- - I+) (1M) = IOS (1M)
Thus if e0 has been measured, we can calculate input offset current IOS only.
or
Sol. 66
Sol. 67
i
d
.
a
o
n
.
w
*Maximum Discount*
ANALOG ELECTRONICS
VCC - RB IB - VBE - RE IE = 0
VCC - RB IB - VBE - RE (b + 1) IB = 0
IB = VCC - VBE
RB + (b + 1) RE
20 - 0.7
=
= 40m A
430k + (50 + 1)1 k
.
a
i
d
o
n
.
w
Sol. 69
Sol. 70
Zin = 2 MW
and
in
.
co
.
a
i
d
o
n
.
w
Sol. 71
in
.
co
IC = bIB = 50 # 40m = 2 mA
VC = VCC - RC IC = 20 - 2m # 2k = 16 V
Now
Sol. 68
Since IE = IB + bIB
Z0 = rd RD = 20k 2k = 20 kW
11
Since the FET has high input resistance, gate current can be neglect and we get
VGS =- 2 V
Since VP < VGS < 0 , FET is operating in active region
*Maximum Discount*
ANALOG ELECTRONICS
2
(- 2) 2
= 5.625 mA
ID = IDSS c1 - VGS m = 10 c1 (- 8) m
VP
Now
Now
Sol. 72
.
a
or,
i
d
A =- gm (rd RD)
= 1.875ms # 20 K =- 3.41
11
The gain is
o
n
.
w
So,
Sol. 73
in
.
co
2
ID IDSS
VP
Sol. 74
Sol. 75
in
.
co
.
a
Rif = Ri (1 + Ab)
Ro
Rof =
(1 + Ab)
Sol. 76
Sol. 77
Sol. 78
i
d
o
n
.
w
IC
= 1mA = 0.04 = 40 mA/V
VT
25mV
b
rp =
= 100 - 3 = 2.5 kW
gm
40 # 10
gm =
*Maximum Discount*
Sol. 79
ANALOG ELECTRONICS
in
.
co
.
a
i
d
o
n
.
w
V- = V+
Applying KCL at inverting terminal
V- - Vs + V- - V0 = 0
R1
R1
or
2V- - Vo = Vs
Applying KCL at non-inverting terminal
V+
V - Vo
=0
+ IL + +
R2
R2
...(1)
or
2V+ - Vo + IL R2 = 0
Since V- = V+ , from (1) and (2) we have
...(2)
in
.
co
Vs + IL R2 = 0
IL =- Vs
R2
or
Sol. 80
i
d
o
n
.
w
.
a
100 mA # 12 - VZ # 500 mA
R
12
5
At IL = 100 mA
= 100 mA
R
or
VZ = 5 V
R = 70W
At IL = 500 mA 12 - 5 = 500 mA
R
VZ = 5 V
or
R = 14 W
Thus taking minimum we get
R = 14 W
Sol. 81
Sol. 82
*Maximum Discount*
ANALOG ELECTRONICS
VT =
in
.
co
.
a
R1 V = 1
#5 = 1 V
R1 + R2 C
4+1
i
d
o
n
.
w
Now
Sol. 83
w
CE
CE
CC
CB
Ai
High
High
Unity
Av
High
Unity
High
Ri
Medium
High
Ro
Medium
in
.
co
Low
Low
High
Sol. 84
Sol. 85
i
d
.
a
o
n
.
w
Vi = 4 sin wt
The output of comparator will be high when input is higher than Vref = 2 V and
will be low when input is lower than Vref = 2 V. Thus the waveform for input is
shown below
From fig, first crossover is at wt1 and second crossover is at wt2 where
4 sin wt1 = 2V
*Maximum Discount*
wt1 = sin - 1 1 = p
2
6
p
5
wt2 = p - = p
6
6
5p
p
-6
Duty Cycle = 6
=1
2p
3
Thus
Sol. 86
ANALOG ELECTRONICS
in
.
co
.
a
i
d
or
20 log CMMR = 20 log Ad - 20 log Ac = 48 - 2 = 46 dB
Where Ad "Differential Voltage Gain
and AC " Common Mode Voltage Gain
Sol. 87
o
n
.
w
Ai =
- gm
gb + jwC
Thus the gain of a transistor amplifier falls at high frequencies due to the
internal capacitance that are diffusion capacitance and transition capacitance.
Sol. 88
Sol. 89
in
.
co
i
d
.
a
In first case
or
or
o
n
.
w
6 - 1.5mR2 - 3 = 0
R2 = 2kW
I
IB1 = C1 = 1.5m = 0.01 mA
b1
150
will we equal to IB1 as there is no in R1.
IC2 = b2 IB2 = 200 # 0.01 = 2 mA
VCE2 = VCC - IC2 R2 = 6 - 2m # 2 kW = 2 V
Sol. 90
*Maximum Discount*
Sol. 91
in
.
co
V0 = 9 V
or
Sol. 92
ANALOG ELECTRONICS
.
a
i
d
o
n
.
w
8 (3) = 8 kW
1+8
3
8
V+ = V- = V
3
V+ =
Sol. 93
i
d
.
a
or
or
or
o
n
.
w
Similarly
Sol. 94
in
.
co
Vo = 6V- - 10
= 6 # 8 - 10 = 6 V
3
or
1k
50V1 = 40V1
1k + 0.25k
1k
50V2 = 40V2
V3 =
1k + 0.25k
V2 =
V3 = 40 # 40V1
Vo = 50V3 = 50 # 40 # 40V1
AV = Vo = 50 # 40 # 40 = 8000
V1
20 log AV = 20 log 8000 = 98 dB
*Maximum Discount*
ANALOG ELECTRONICS
t
VC = 1 # idt
C 0
The time period of wave form is
T = 1 = 1 = 2 m sec
f
500
in
.
co
20 # 10
1
idt
6 #
2 # 10 0
i (2 # 10 - 3 - 0) = 6 # 10 - 6
i = 3 mA
-3
Thus
or
or
3=
.
a
i
d
Sol. 96
o
n
.
w
Rif = Ri (1 + Ab)
Ro
Rof =
(1 + Ab)
20 log x = 20
or
x = 10
Since Gain band width product is 106 Hz, thus
So, bandwidth is
in
.
co
6
6
BW = 10 = 10 = 105 Hz = 100 kHz
10
Gain
Sol. 97
.
a
i
d
o
n
.
w
Ln
2n - 1
23 - 1
Sol. 98
fHn = fH
2 2 - 1 = 0.5 kHz
R2 = 5R1
*Maximum Discount*
Sol. 99
ANALOG ELECTRONICS
i
d
or
o
n
.
w
or
I
For satisfactory operations
Vin - V0
R
When Vin = 30 V,
30 - 10
R
20
or
R
when Vin = 50 V
or
in
.
co
= IZ + IL
> IZ + IL
.
a
i
d
[IZ + IL = I]
$ (10 + 1) mA
o
n
.
w
or
Sol. 101
.
a
dVO
= AV Vm w = AV Vm 2pf
c dt m
max
1
= -6
Vm = SR
AV V2pf
10 # 100 # 2p # 20 # 103
VM = 79.5 mV
Slew Rate
Sol. 100
in
.
co
VO = VV Vi = Vm sin wt
dVO = A V w cos wt
V m
dt
$ 11 mA
R # 1818 W
50 - 10 $ (10 + 1) mA
R
40 $ 11 # 10 - 3
R
R # 3636W
Thus R # 1818W
So,
IDSS = 10 mA and VP =- 5 V
VG = 0
VS = ID RS = 1 # 2.5W = 2.5 V
VGS = VG - VS = 0 - 2.5 =- 2.5 V
gm = 2IDSS 81 - ` - 2.5 jB = 2 mS
VP
-5
AV = V0 =- gm RD
Vi
=- 2ms # 3k =- 6
*Maximum Discount*
Sol. 102
ANALOG ELECTRONICS
Sol. 103
and
Sol. 104
Sol. 105
.
a
i
d
o
n
.
w
Sol. 106
in
.
co
in
.
co
i
d
.
a
o
n
.
w
Maximum power will dissipate in Zener diode when current through it is maximum
and it will occur at Vin = 30 V
I = Vin - Vo = 30 - 10 = 1 A
20
20
or
I IC + IZ = bIB + IZ
= bIZ + IZ = (b + 1) IZ
IZ = I = 1 = 0.01 A
b+1
99 + 1
Since IC = bIB
since IB = IZ
*Maximum Discount*
Sol. 107
Sol. 108
ANALOG ELECTRONICS
in
.
co
.
a
i
d
o
n
.
w
...(2)
.
a
i
d
Sol. 109
in
.
co
...(1)
o
n
.
w
*Maximum Discount*
ANALOG ELECTRONICS
Sol. 111
in
.
co
.
a
i
d
o
n
.
w
AC = aRC
REE
Since source resistance of the current source is infinite REE = 3 , common mode
gain AC = 0
Sol. 112
Sol. 113
gm
'
gbc
+ jw (C)
1
Ai \
Capacitance
1
Ai a
frequency
.
a
Ai =-
i
d
or,
o
n
.
w
and
in
.
co
Sol. 115
Sol. 116
Sol. 117
*Maximum Discount*
Sol. 118
ANALOG ELECTRONICS
in
.
co
.
a
i
d
R1 V = 5
# 15 = 5 V
10 + 5
R1 + R2 C
Since b is large is large, IC . IE , IB . 0 and
IE = VT - VBE
RE
5
0.7 =
4.3
=
= 10 mA
0.430kW
0.430KW
VT =
Sol. 119
o
n
.
w
in
.
co
V0 = ! Vset = ! 15V
So,
.
a
Sol. 120
Sol. 121
Sol. 122
i
d
o
n
.
w
by applying KCL at E2
gm1 Vp 1
Vp
= gm2 Vp
rp
2
at C2
from eq (1) and (2)
gm1 Vp +
1
i 0 =- gm2 Vp
i 0 =- i
0
gm2 rp
2
gm1 Vp =- i 0 :1 + 1 D
gm2 rp
1
*Maximum Discount*
ANALOG ELECTRONICS
= b >> 1
=- i 0
gm2 rp
so
gm1 Vp
i0
Vp
i0
Vi
Option (B) is correct.
=- gm1
Sol. 123
in
.
co
= gm1
Vp = Vi
1
.
a
are operated one for amplifying +ve going portion and other for -ve going
i
d
portion.
Sol. 124
o
n
.
w
R in = Ri (1 + bv Av)
bv = feedback factor ,
Av = openloop gain
where
and
Ri = Input impedance
So,
R in = 1 # 103 (1 + 0.99 # 100) = 100 kW
Similarly output impedance is given by
R0
ROUT =
R 0 = output impedance
(1 + bv Av)
100
Thus
ROUT =
= 1W
(1 + 0.99 # 100)
Sol. 125
in
.
co
i
d
.
a
o
n
.
w
Sol. 126
Sol. 127
Sol. 128
Sol. 129
*Maximum Discount*
Sol. 130
ANALOG ELECTRONICS
in
.
co
So, R in < Ri
Similarly
.
a
i
d
o
n
.
w
ROUT =
R0
(1 + bA)
ROUT < R 0
Thus input & output impedances decreases.
Sol. 131
Sol. 132
Sol. 133
in
.
co
Sol. 135
.
a
i
d
o
n
.
w
V2 = IS # RD
2
and
V1 = IS # RD
V2 = 1
2
V1
V1 = 2V2
Sol. 136
Sol. 137
Input impedance
Voltage gain
Ri = RB || r p
AV = gm RC
*Maximum Discount*
ANALOG ELECTRONICS
in
.
co
.
a
i
d
R in = RB || [rp + (b + 1)] RE
Input impedance increases
gm RC
Voltage gain
AV =
1 + gm R E
Input impedance
o
n
.
w
Sol. 138
Sol. 139
in
.
co
.
a
i
d
o
n
.
w
If we assume consider the diode in reverse bias then Vn should be greater than VP .
VP < Vn
by calculating
VP = 10 # 4 = 5 Volt
4+4
Vn = 2 # 1 = 2 Volt
here VP > Vn (so diode cannot be in reverse bias mode).
*Maximum Discount*
Ib = 0 - 3 + 10 - 3
4
4
Ib = 10 - 6 = 1 amp
4
so current
Sol. 141
ANALOG ELECTRONICS
in
.
co
.
a
i
d
o
n
.
w
Va - Q Va - V0
=0
+
5
10
2Va - 4 + Va - V0 = 0
V0 = 3Va - 4
Va - V0 + Va - 0 = 0
100
10
Va - V0 + 10Va = 0
11Va = V0
Va = V0
11
V0 = 3V0 - 4
11
8V0 =- 4
11
So
.
a
i
d
o
n
.
w
in
.
co
V0 =- 5.5 Volts
Sol. 142
Vm
p (R f + RL)
*Maximum Discount*
ANALOG ELECTRONICS
in
.
co
.
a
i
d
Sol. 144
Sol. 145
o
n
.
w
V0 = kVi
after connecting feedback impedance Z
in
.
co
.
a
i
d
o
n
.
w
V0 = kVi
Sol. 146
Sol. 147
R = 20 kW = 2 # 10 4 W
Sol. 148
V0 = 6 volt
so current in 50 W resistor
I = 9-6
50 W
I = 60 m amp
*Maximum Discount*
ANALOG ELECTRONICS
.
a
i
d
In given circuit
I L = I - IZ
(IL) min = I - (IZ ) max
= (60 - 50) m amp = 10 m amp
(IL) max = I - (IZ ) min
= (60 - 5) = 55 m amp
o
n
.
w
***********
o
n
.
w
in
.
co
.
a
i
d
in
.
co
*Maximum Discount*