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The Online Journal on Electronics and Electrical Engineering (OJEEE)

Vol. (3) No. (3)

A Developed Passive Anti-Islanding Hybrid


Method for Distributed PV Systems
Yousry Atia, Mohamed Zahran and Mahmoud Salem

1 Electronics Research Institute, PV Dept., NRC Building, El-Tahrir St., Dokki, 12311-Giza, Egypt,
yousry_atia@yahoo.com, mbazahran_2007@yahoo.com, masalem32@yahoo.com
Abstract: This paper, proposes an improved hybrid
method for detecting and isolating the islanding events
considering power quality and anti-islanding capacity of
grid-connected three-phase PVPCS in IEEE Standard
1547. This method relies on the variations of active and
reactive power and currents-voltages phase shifts. The
results shows that, at the occurrence of islanding event,
the phase shift between the PV inverter voltage and
current begins to changes as well as the grid current
changes also, the proposed system isolates this event in
one cycle (0.02s). A MatLab simulation program
supported with Simulink power system tool boxes is used
in the implementation of this paper.
Key Words: Photovoltaic, Distributed Generators, Antiislanding, Phase Locked Loop (PLL),
I.

INTRODUCTION

An important requirement for the connection of the


Distributed Power Generation photovoltaic (PV) system to
the distribution networks is the capability of islanding
detection. Islanding occurs when a portion of the distribution
system becomes electrically isolated from the remainder of
the power system, yet continues to be energized by the gridconnected PV system [1].
Many papers have been presented in literature regarding
the sizing, placement, reliability, and expansion planning of
distributed generation system [2-7]. The main merits of
distributed generation system can be listed as follows:
reduction of power loss, voltage profile improvement, power
quality improvement, possibility to exploit combined heat and
power generation, simple structure, high efficiency, and
minimal environmental impact. An essential requirement of
the grid-interconnected distributed generation system is the
capability of islanding detection [8]. Islanding occurs when a
part of the distribution system is electrically isolated from the
main source of supply, yet continues to be energized by
distributed generation system. The islanding operation of
distributed generation system may cause potential hazards to
line-maintenance personnel, and risk the distributed
generation system in being damaged by out-of phase
reconnection to the grid [9].
II.

Survey of Islanding Concept and Anti_Islanding


Methods
As the interest in distributed generation system grows, the
urge for reliable protection schemes used in distributed
generation system also increases. An essential requirement of

Reference Number: W11-0053

the grid-interconnected distributed generation system is the


capability of islanding detection. Islanding occurs when a part
of the distribution system is electrically isolated from the
main source of supply, yet continues to be energized by
distributed generation system [9].
Islanding is a condition in which a portion of the utility
system, which contains both load and generation, is isolated
from the remainder of the utility system and continues to
operate. The isolation point is generally on the low-voltage
distribution line when an islanding condition exists, but
islanding may also occur on the higher voltage distribution or
transmission lines when large numbers of PV and other
distributed generation sources are present. In photovoltaic
distributed resource islanding, one or more non-utility
generation sources (more specifically, sources over which the
utility has no direct control) and a portion of the utility system
operate while isolated from the remainder of the utility
system [10]. The islanding operation of distributed generation
system may cause potential hazards to line-maintenance
personnel, and risk the distributed generation system in being
damaged by out-of phase reconnection to the grid. It also
causes power quality and the power system reliability
problems. The majority of utilities require that distributed
generation system should be disconnected from the grid as
soon as the islanding occurs. IEEE standard 1547 stipulates a
maximum delay of 2 seconds for detection of an islanding [11
- 13].
WEN-YEAU CHANG has reported in [3] and [10] that, the
islanding detection methods can be generally categorized into
two groups, passive methods and active methods. Passive
methods detect the islanding operation of distributed
generation system by monitoring selected power system
parameters, such as voltage magnitude, the change rate of
frequency, phase displacement, and power output. Active
methods detect the islanding by directly interacting with the
system under consideration.
III.

Proposed anti-islanding System

The proposed anti-islanding system is shown in Figure 1. It


is composed of load, photovoltaic system and inverter, power
transformer, and two circuit breakers one at the PV end and
the other at the grid side. It also indicates the point of contact
(PCC), which is the PV system contact point to the utility
grid. The power delivered to the load from the grid is the
difference between the generated PV power and the
consumed power by the load.

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The Online Journal on Electronics and Electrical Engineering (OJEEE)

P + j Q = Ppv + jQ pv ( PL + jQL )

(1)

It should be noted that the PV inverter is designed to out


only active power to get the maximum benefits from the solar
array. The load and PV inverter filter (inductor) will sink their
reactive power from the grid, by means j Q is usually
negative. So, the system modes of operation can be classified
in three modes:
Mode 1:
P is positive, the PV array powers the
load and send energy to the grid,
Mode 2:
P is negative, the PV and the grid shares
to power the load,
Mode 3:
P is zero, when load active power equal
to the PV array output power.

Active & Reactive Power

The Active & Reactive Power- blocks measures the active


power P and reactive power Q associated with a periodic
voltage-current pair that can contain harmonics. P and Q are
calculated by averaging the V I product with a running
average window over one cycle of the fundamental
frequency, so that the powers are evaluated at fundamental
frequency.

1
P=
T
1
Q=
T

(V (t ) x I (t ) ) dt

(2)

( t T )

1
T

( t T )

V ( t )

(4)

abc_to_dq0 Transformation

The
abc_to_dq0
transformation
section
(Park
transformation) computes the direct axis, quadratic axis, and
zero sequence quantities in a two-axis rotating reference
frame for a three-phase sinusoidal voltages or currents. The
following transformation is used:
2
2
4

Vd = Va sin (t ) +Vb sin t


+ Vc sin t

3
3
3

2
2
4

Vq = Va cos (t ) + Vb cos t
+ Vc cos t

1
V0 = (Va + Vb + Vc
3

(5)

Where = rotation speed (rad/s) of the rotating frame.


Park transformation allows you to eliminate time-varying
inductances by referring the stator and rotor quantities to a
fixed or rotating reference frame. This section requires three
variables xa, xb, and xc as a time varying values of the input
signals. It also needs the sine and cosine values of the rotating
vector from a phase locked loop (PLL). Its outputs are direct,
quadrature and zero values of the input signal as xd, xq and
x0.
You can compute the modulus and angle of V1 as:

V1 =

(Vd2 + Vq2 ) ,

Vq
V1 = a tan 2
Vd

(6)

Synchronization, Modulation and Control

(3)

Where: T = 1/(fundamental frequency).


A current flowing into an RL branch, for example,
produces positive active and reactive powers. As this block
uses a running window, one cycle of simulation has to be
completed before the output gives the correct active and
reactive powers.

Reference Number: W11-0053

VII.

VIII.

V (t ) x I t 2 dt
( t T )

V (t ) RMS =

System Description

The system composes many sub block diagrams to for the


complete system for detection and isolating of the islanding
occurrence. In the following each sub-block diagram is
described and its mathematical model is given.
V.

Measure root mean square (RMS) value of signal

This block measures the root mean square value of an


instantaneous current or voltage signal connected to the input
of the block. The RMS value of the input signal is calculated
over a running average window of one cycle of the specified
fundamental frequency. As this block uses a running average
window, one cycle of simulation has to be completed before
the output gives the correct value. The discrete version of this
block allows you to specify the initial magnitude of inputs.
For the first cycle of simulation the output is held to the RMS
value of the specified initial input.

Figure (1): Proposed PV Anti_Islanding System.

IV.

VI.

Vol. (3) No. (3)

Pulse-width-modulated static power converters that operate


directly connected to an ac grid need to be synchronized with
it. In other words, the gating pattern needs to be applied in
synchronism with the periodic ac-supply voltages. This issue
could become a tedious practical problem if the frequency of
the ac grid changes even very little and slowly [16]. This is
the case of most ac networks, where static-power converters
are controlled by means of digital-based systems such as

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The Online Journal on Electronics and Electrical Engineering (OJEEE)

Vol. (3) No. (3)

digital-signal processors. The control block diagram gets the


grid values voltages and currents Vabc, and Iabc and reference
direct and quadrature system currents, then it outs the gates
pulses to the three phase 2-level inverter switches.
IX.

Phase Locked Loop


Figure (3): Current Regulator Block Diagram

m = sqrt Vd2 + Vq2 , Phi = a tan 2 Vq / Vd


XII.

(7)

PWM Modulator Block Diagram

The magnitude and the angel of the voltage vector that


calculated in the above section are the input the PWM
modulator. Also the reference synchronizing values of the
grid voltage Vabc_Sync are also input to the modulator. A 3phase discreet phase locked loop is used to find the ramp
angle (t). A three phase reference sinusoidal signals are
calculated using (t), (m) and synchronizing voltage. These
reference voltages are input to discreet three phase PWM
generator to generate the six pulse pattern for the three phase
inverter bridge.
XIII.

Hybrid Islanding Block Diagram

The block diagram is shown in Figure (4):


-K-

Vabc

Discrete,
Ts = 5e-007 s.

abc

Gain

dq0
Iabc

Idref

Vag, Iai

sin_cos

sincos

PWM 15 kHz

Pulses

From3

dq0

abc_to_dq0
Transformation

1500

Iabc_I

Idref
Iqref

Control System

magnitude
signal
angle

Iqref

I_Fundamental

magnitude
signal
angle

+
- v
ipv,ig,iload

I_Fundamental1

Iabc

???
B

Lc_PV

V2

Segma
Currents

v +
-

Vabc

PCC

com

Iabc

Trans_G
i
+ -

i
- +

iapv

iag

Grid_CB

Va

Vb

Vc

Three-Phase
V-I Measurement

PV C B
C ontrol
V

iaL

RMS2
B

PV Active &
Reactive Power

Ip

Iabc

Close Inverter

fcn
Control_signal

Three-Phase
V-I Measurement2

Vabc

N/S
none

Grid1

signal rm s

PQ
PV_PQ

Grid C B
C ontrol

220/380V
200 kVA

+ -i

IBGT Inverter

+
- v

V4

Inverter
Va, Ia

Lb_PV

V1

+
v -

Vabc
A

V3
+
- v

La_PV
A

PV w MPPT

Vag, Iai1

Add

The operation of this circuit is typical of all phase locked


loops. It is basically a feedback control system that controls
the phase of VCO. The input signal is applied to one input of
a phase detector. The other input is connected to the output of
a divide by N counter. Normally the frequencies of both
signals will be nearly the same. The output of the phase is
applied to the loop filter. The filtered signal controls the
VCO. Note that the output of the VCO is at a frequency that
is N times the input supplied to the frequency reference input.
This output signal is sent back to the phase detector via the
divide by N counter. Normally the loop filter is designed to
match the characteristics required by the application of the
PLL. In our system, a second order low pass filter is used, the
input signal is the Vector containing the normalized threephase signals [Va Vb Vc], and the output signal is a vector
containing [sin(wt) cos(wt)] of the input signals.

d-q to m-phi Block Diagram

From the calculated direct and quadrature voltage values,


the magnitude (m) and angle (Phi) of the voltage vector can
be calculated as:

Figure (2): PLL Block Diagram

XI.

The main task of the phase-locked loop (PLL) control


system is to generate an output signal whose phase is related
to the phase of the input signal. It is an electronic circuit
consisting of a variable frequency oscillator (VCO) and a
phase detector that compares the phase of the signal derived
from the oscillator to an input signal. The signal from the
phase detector is used to control the oscillator in a feedback
loop. The circuit compares the phase of the input signal with
the phase of a signal derived from its output oscillator and
adjusts the frequency of its oscillator to keep the phases
matched. Figure (2): shows a block diagram of a basic PLL
circuit.

Ir

SVM

PQ
LOAD
PQ

X.

Current Regulators Block Diagram

The current has two PID regulators, one for direct and the
other for quadrature component. Figure 3 shows the block
diagram of the current regulators. The input for the block are
the direct and quadrature real and reference current values,
whereas the output is the direct and quadrature voltage values.

Reference Number: W11-0053

PV

Grid

Load

Filter

Three-Phase
Parallel RLC Load

PV, LOAD
and Grid1
N/S
on

Load Active &


Reactive Power

PQ
GRID
PQ2

Grid Active &


Reactive Power1

Figure (4): Simulink Model of Hybrid Grid RMS Current and


PV Voltage Current Phase Shifting Detection,
It consists of three main modules; energy sources modules
Grid and PV, load module that is three phase R_L load and
the control module. The grid is followed with a circuit
breaker, then step down transformer 380/220V. The PV array
has a 480V dc followed by a three phase inverter controlled
by a PWM signal with 15 kHz signals. An inductive filter is

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The Online Journal on Electronics and Electrical Engineering (OJEEE)

used at the output terminal of the PV inverter. The load is a


three phase R_L load has 300kW and 300kVAR values.
XIV.

Simulation Results

The anti-islanding simulation is implemented under Hybrid


Grid RMS Current and PV Voltage Current Phase Shifting
Detection. The results are shown in the following diagrams
and curves. The X axes of all diagrams represents the time
in second while Y axes represent the value of the signals
names written on title area of the curve. In Figure (5):, the
phase a of inverter current, grid current and load current are
shown before and after the islanding occurrence. When the
islanding event is happened in the grid, the load current is
disturbances because the PV inverter capability is not enough
to power the load. At this moment the anti-islanding
protection system detects the islanding event through the
hybrid signal from the grid current RMS value and difference
in PV inverter output voltage and current phase shifting. The
system tolerates the islanding within not more than 0.02s as
clearly shown in given figure. The PV output current and
hence the load current goes zero synchronously. Figure (6):
present the inverter current voltage waves. The zero phase
shifts in the steady state is clear. The phase shift during the
transient switching on and after islanding could be seen also.
The control circuit, diagram in the right down, detects the
phase shifting and acts to isolate islanding state and activate
the anti-islanding protection circuits in a time less than 0.02s.

Vol. (3) No. (3)

Figure (7): shows the implemented under Hybrid Grid


RMS Current and PV Voltage Current Phase Shifting
Detection. The upper curve shows the grid RMS current
before and after the islanding event. The curve in the middle
shows the PV Inverter voltage current phase shifting. It could
be depicts that phase shift has a sensible change at the
moment of islanding event occurrence. The down diagram
shows the PV inverter operation signal, it is deactivated goes
zero after detection of the islanding event.
When the islanding event occurrence the PV power goes to
zero because of overloading while the reactive power rises to
compensate the disturbance on the load terminals. At this
moment the phase shift of the inverter output voltage and
currents has a sensible change which is monitored by the
implemented protection circuits that acts to isolate the
islanding events.
Figure (8): shows the PV inverter output power and
reactive power. After transient period of the system switching
on operation, the values goes to steady state condition since
the PV support the system with ~11kW for load and ~1kVAR
for the PV filter while the load reactive power is supplied
from the grid.

Figure (7): Monitoring of Islanding and Anti-Islanding Event


Occurrence
Figure (5): PV Inverter, Grid and Load Phase a Currents
before and after Islanding.

Figure (8): PV Inverter Active and Reactive Power.


Figure (6): PV Inverter Voltage Current Phase a Curves
before and after Islanding.

Reference Number: W11-0053

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The Online Journal on Electronics and Electrical Engineering (OJEEE)

Vol. (3) No. (3)

Figure (9): Grid Active and Reactive Power.


Figure (10): shows the load active and reactive powers. The
main thing that you depict in this diagram is the signs of both
active and reactive powers, they are a negative, of course it is
in the opposite direction of both PV inverter and grid output
powers.
In Figure (11):, the PV, Grid and Load active and reactive
powers are shown. From this scope, it could be depicted that
the power sign of both PV and Grid is positive while load is
negative, which mean that energy is balanced, the same
phenomena for reactive power. This fact is clear presented in
the phase a currents in the down left diagram of PV, grid
and load. PV and grid are in phase while load is shifted with
1800. A small difference is present due the consumed P&Q in
the filter and transformer windings. It could be depicts by
monitoring the P and Q on the curve.

Figure (10): Load Active and Reactive Power.

Reference Number: W11-0053

Figure (11): PV, Grid and Load Active and


Reactive Power.

In the following two figures, the two modes of


operation are examined at different level of PV array
size. A minor modification is made in the system model
that the PV filter is moved to be before the
measurements module of PV inverter. It is done to avoid
the difference in reactive power measurements, this
modification acts to make P and Q on the following
three operation modes are exactly zero.
Figure 1 presents the operation mode 1. The PV power is
increased to reach 11kW. In mode one the load required
power is 9.2 kW. Then a positive energy is delivered to the
grid, negative sign in the Grid P_Q diagram, by means that
grid sinks energy. As mentioned before, the PV array is
designed to source an active power only, so the load reactive
power is taken from the grid. This fact is clear presented in in
the diagram labeled Grid P_Q. When the islanding event
occurred, the system detects and isolates it within 0.02s also,
one cycle of PV current. Figure (13): represent the mode 2 of
operation since the load active power is increased to reach
15kW, in this mode the capability of PV array is not enough
to power the load and the grid must share it to cover the load
requirements. So, the grid shares the PV array with
approximately 4 kW as seen in the Grid P_Q diagram, since
the grid active and reactive power were positive by means
that is act as source of energy (opposite to mode 1).

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The Online Journal on Electronics and Electrical Engineering (OJEEE)

Vol. (3) No. (3)

Figure 1, Mode 1 of operation results diagrams, PV power the load and source power for the grid.

Figure (13): Mode 2 of operation results diagrams, PV and Grid powers the load; refer to same legends in Figure 1.

Reference Number: W11-0053

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The Online Journal on Electronics and Electrical Engineering (OJEEE)

XV.

Conclusions

An intelligent hybrid anti-islanding protection method


of the distributed generation system is proposed. The
proposed hybrid method considers many aspects of the gridconnected system, such as the ac voltage and currents phase
shifts, active and reactive powers. In this paper, the summary
of anti-islanding of Islanding Concept and anti-islanding
methods were discussed. The proposed method is developed
as a combination between active and passive technique since
it depends on the monitoring of the currents-voltage RMS
variation and phase shifts between them. A complete block
diagram of the proposed method is included and a
mathematical model of each subsystem is presented. The
control technique is implemented using PWM based on the
phase-locked-loop. The PV inverter current controller has
two PID regulators The results show that the developed
method acts to isolate the islanding events in less than one
cycle (~o.02 s). The system is examined at different modes
of operation and the results confirm the rigidity of the
proposed method, since it is able to detect and isolate the
islanding event with in a proper period.

[8]

[9]

[10]

[11]

[12]

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Reference Number: W11-0053

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Biography:
Dr. Yousry Abdel-Gawad Atia, was born in Egypt in
1964, received his B.Sc from Menufia Univ. Faculty of
Engineering, Shebin-El-Kom in 1987. He was awarded the
M.Sc and Ph.D. in 1995 and 2000 respectively from Cairo
University, Faculty of Engineering, Electrical Power and
Machines Dept. Currently he is an Associate Professor
Researcher at the Electronics Research Institute,
Photovoltaic Cells Dept. His experience is in the fields of
renewable energy, power electronics, drives, electrical
machines, system design and control.
Dr. Mohamed Bayoumy A. Zahran, was born in
Egypt, 1963 received his B.Sc at 1987 with excellent grade,
M.Sc in 1993 and Ph.D. in 1999 from Cairo University,
Faculty of Engineering, Electrical Power and Machines
Dept. He is an Associate Professor Researcher at the
Electronics Research Institute, Photovoltaic Cells Dept. His
experience is mainly in the field of renewable energy
sources, systems design, management and control. He has
been employed full time by the National Authority for
Remote Sensing and Space Science (NARSS), Space
Division, since 2002, power subsystem designer for
EgyptSat 1 and System Engineer of MisrSat-2 Project and

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The Online Journal on Electronics and Electrical Engineering (OJEEE)

Vol. (3) No. (3)

Satellite Power Subsystem Designer. Currently, he is an


Associate Professor, Head of Electrical Engineering
Department, Faculty of Engineering, Jazan University,
Kingdom of Saudi Arabia, since 1st Oct., 2008.
Dr. Mahmoud Mohamed A. M. Salem, received the
B.Sc. degree in electrical engineering in 1988 from Minofia
University, Egypt. He received the M.Sc. and the Ph.D
degrees in electrical engineering from Cairo University,
Egypt in 1994 and 2000 respectively. Now, he is working as
an Associate Professor Researcher at the Electronics
Research Institute , Cairo, Egypt, His research interests
include artificial intelligence, neural network, control
systems, electrical drives, and digital controller hardware.

Reference Number: W11-0053

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