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Relay Types

LFZP 111/2/3/4
Optimho Distance Protection

Service Manual
R5911-D

OPTIMHO DISTANCE PROTECTION


Relay Types: LFZP111
LFZP112
LFZP113
LFZP114

The relays described have the following features:


Revised directional line polarising for the mho characteristic.
Revised guard zone reach and polarising for relays fitted with quadrilateral characteristics.
Metering can now be provided on the latest version (LFZP113).
Improvements to the Loss of Load feature.
Improvements to the blocking scheme when used with duplex communication channels.
Improved phases selector performance for the fault locator.
Publication R4056 Optimho forms part of this service manual:

SERVICE MANUAL
R5911D

AREVA T&D, St Leonards Works, Stafford ST17 4LX, England


Tel: +44 (0) 1785 223251 Fax: +44 (0) 1785 212232
Our policy is one of continuos product development and the right is reserved to supply equipment which may vary from that described.
1997 AREVA T&D

Service Manual
LFZP11x

R5911D
Issue
Page 1 of 1

Issue control
Issue
A-C
D

Date
to 1996
1996/97

Author
Support Engineers
Publicity/Support Engineers

Changes
Origination
Formatting and changes to
all chapters

Service Manual
LFZP11x

R5911D
Contents
Page 1 of 1

CHAPTER 1

APPLICATIONS NOTES
(R4056K included)

CHAPTER 2

DESCRIPTION TECHNICAL DATA

CHAPTER 3

INSTALLATION AND HANDLING

CHAPTER 4

COMMISSIONING

CHAPTER 5

CUSTOMER VARIANTS

CHAPTER 1
APPLICATION NOTES
(PUBLICATION R4056 INCLUDED)

OPTIMHO
Static Distance Protection Relays

OPTIMHO
Static Distance Protection Relays

Figure 1: Optimho (Type LFZP) relays

Features
Full scheme distance relays with
18, 12, 9 or 6 measuring units.
Phase and ground distance or
phase distance protection.
Single or multiple zones.
Optional directional earth fault
protection.

A second blocking scheme is


available on selected models for
use with signalling equipment.
Integral user interface for easy
access to relay setting and fault
records.
Provision for remote
communications via modems.

Typical operating time: one cycle


for three phase faults.

Benefits
Wide model range for accurate
matching to applications.
Remote interrogation reduces
need for site visits.
Precise fault location, even on
double-circuit lines together with
fault information reduces outage
time.
Accurate fault information
provides for in-depth fault
analysis.

Optional fault location includes


mutual compensation on selected
models.

Changes to alternative groups of


settings can be accomplished
with a single command.

Optional data recording for post


fault analysis and instrumentation
functions.

Self diagnosis reduces


maintenance costs.

Eight independent groups of


settings can be stored in the
relay.

Vertical case option eases retrofit


problems.
Will interface with existing
scheme logic.
Fulfils basic SCADA role at no
extra cost.
2

Summary Chart
Transmission and
sub transmission
main protection

Sub-transmission
and distribution
main protection

Back
up
only

LFZP Model

111

112

113

114

121

122

123

131

132

151

Phase distance

Ground distance
DEF
Fault location
Fault location with mutual compensation
Overhead lines

Underground cables

Open delta/3 limb VTs


No. of distance elements

18

18

18

12

12

12

12

Independent zones Z1

Z1

Z1

Z1

Z1

Z1

Z1

Z1

Z1

Z1

Z1

Z2

Z2

Z2

Z2

Z2

Z2

Z3

Z3

Z3

Z3

Z3

Z3

Z3

Z1X

Z1X

Z1X

Z1X

Z1X

Z1X

Z1X

Z1X

Z1X

Z1Y

Z1Y

Z1Y

Z1Y

Z1Y

Z1Y

Z1Y

Z1Y

Z1Y

Z2

Z2

Z2

Reach stepped zones

Z3

Loss of load trip feature

No. of output contacts

24

24

24

24

16

16

16

16

16

Blocking 2

Z1, Z1X, Z1Y, Z2 Phase

q/m

q/m

D/N

Reversible zones
Single pole tripping
VT supervision
3 phase fuse blow supervision
Power swing blocking

Basic
Z1 Extension
Acceleration
PUR
PUR Unblock
Schemes

POR1
POR1 Unblock
POR2
POR2 WI Trip
POR2 Unblock
POR2 WI Trip Unblock
Blocking

Distance

Z1, Z1X, Z1Y, Z2 Ground

Characteristic

Z3 Phase
Z3 Ground
Negative sequence volts

DEF

Zero seq current

polarising

Zero seq volts


Zero seq volts+current

Q/L

= standard, = optional, m = shaped mho, f = fully crossed polarised mho, q = quadrilateral,


c = shaped mho for cables, D = offset quadrilateral, N = offset lenticular, Q = D/rev q, L = N/rev m, P = N/rev f.
For further information see Page 6.
3

Applications of Optimho

Principles of Operation

Hardware Structure

Optimho is produced in several


models, each suitable for a specific
range of applications. The more
sophisticated models have features
and functional abilities which can
fulfil the most exacting duties.
These can include ehv applications
depending on the fault clearance
time required. The more basic
models have reduced hardware and
software to suit the simpler
requirements of sub-transmission
and distribution systems.

All models of Optimho are full


scheme distance relays which have
a full set of measuring elements for
each main zone of protection.
Compared with the switched type of
scheme, the full scheme system
improves reliability by avoiding the
need to rely on phase selection
hardware or software and by
removing dependence on a single
measuring unit. Full scheme distance
relays are better able to cope with
inter-circuit faults on double circuit
lines and evolving faults.

All models are built up from a small


range of standard printed circuit
boards used as modular building
blocks.

Optimho complements the well


established Micromho and
Quadramho, enhancing the already
outstanding family of distance
protection available from AREVA
T&D.
The range of applications includes:
main and back-up protection of
overhead lines and underground
cables including transformer
feeders.
back-up protection of
transformers, auto-transformers
and shunt reactors (LFZP 151)
protection of solid or resistance
earthed systems.
Three-pole or single-and-threepole tripping, with or without the
aid of a signalling channel.
single zone relays used in
multiple zone schemes to provide
ultra-high reliability by additional
redundancy of protection
(LFZP 121, 122 or 132 with one
zone enabled).
on-site replacement of
obsolescent electro-mechanical or
switched static distance relays.
protection of systems with opendelta line voltage transformers or
3 phase 3 limb line voltage
transformers (LFZP 131 or 132).
phase selection to allow, for
example, a power line carrier
phase comparison scheme (such
as P10) to carry out single phase
tripping (LFZP 114).

The measuring element uses a microcontroller to produce a direct


software equivalent of the hardware
phase comparator used in
Optimhos forerunners, Micromho
and Quadramho. This phase
comparator design is well tried,
having accumulated nearly ten
thousand relay years of successful
operating experience over the last
decade at locations throughout the
world.
Many of the other hardware and
software features of Quadramho
have been retained and further
enhanced in Optimho, ensuring the
highest standards of reliability.

Optimised Performance
with Distorted Signals
The phase comparators and level
detectors use logic processing to
achieve immunity from maloperation
due to noise, such as harmonic
distortion, travelling wave effects,
high and low frequency capacitor
voltage transformer transients and
current transformer saturation.
Operation of the phase comparators
and level detectors can only occur if
the input signals are dominated by
power frequency components.
Filters are used to insure this
dominance and to optimise
operating times.

All models use the same relay case,


power supply unit, and front panel.
The relay hardware is bus-structured
to allow printed circuit boards to be
plugged into the case in different
combinations. (See Figure 2).
The hardware uses multiple
microcontrollers to perform as
comparators, level detectors, etc.
A main microcontroller uses the
digital bus to read outputs from the
subsidiary microcontrollers, read
signals from the outside world via
optically coupled isolators,
communicate with the user interface
and perform scheme logic, serial
communications, monitoring and
output contact functions. Settings,
indications, and fault records are
stored in a type of memory which is
unaffected by loss of dc supply.
The layout of the relay case follows
the quiet region arrangement
introduced in Micromho and
Quadramho, with measurement and
control boards located in a
screened compartment and fed with
signals from the outside world via
screened isolation devices and
filters. See Figure 3.
A vertical aspect, panel mounted
version can be used for replacing
obsolescent electromechanical
distance relays in narrow panels,
with the minimum of panel
disturbance.

Integral User Interface


All relay settings and records are
accessible from the integral user
interface shown in Figure 4.
The liquid crystal display (LCD)
indicates how the relay initiated the
latest trip. The faulty phase and
zone are indicated for trips initiated
by the distance elements. The latest
alarm condition is also indicated.
If indications are present when the
supply is lost, they are automatically
reinstated when the supply is
restored.

Level detector board


+ AC supply supervision

Optional boards shown in


broken outline

Zone 1 and 2 board


(Alternatively zones 1, 2 and3)
+ Additional reach stepped zones

AC inputs
VA VB VC
VN

Analogue
input
module

A B C
N
p

User interface
7 Optical isolators

Zone 3 board
+ Power swing blocking

Status
inputs

Digital bus

Analogue bus

Settings from
digital bus

Quadrilateral
ground fault board

8 Output relays

DEF board

Fault location board


+ Fault data and instrumentation

8 Output relays

Main controller board


+ Schemes, settings,
comms, monitoring diagnostics

8 Output relays

Trips.
alarms,
etc.

RS232C serial link to remote terminal

Figure 2: Electrical structure of LFZP

The date and time of the fault,


location (if available), and more,
are displayed by pressing READ.
After the indications have been
read, they can be cleared by
pressing RESET, and the READ key
can then be used to step through all
the relay settings displayed in
sequence.
The cursor and SET keys, and the
two test sockets, are only accessible
after removing the transparent front
cover. The keys are used to select
from a menu of options displayed
on the LCD in English, and to enter
new settings into temporary
memory. The menu has a simple
structure, allowing rapid
familiarisation.
The SET key is used to transfer
temporary entries to the permanent
memory which determines relay
action. Accidental changes are
prevented by allowing SET to be
operative only at certain points in
the menu after appropriate
warnings have been displayed.

Fully screened
power supply
unit enclosure

Terminal blocks

Terminal block

Analogue
input module

Measurement
and control
boards in fully
screened
compartment

Output auxiliary
relays and
status input
optical isolators

User interface
on hinged front
panel

Figure 3: Mechanical layout of LFZP

2 x 16 character
liquid crystal display

Light emitting diodes


TRIP

DISTANCE
PROTECTION

ALARM

RELAY AVAILABLE

SET
PARALLEL

RESET

ACCEPT/READ

7 Keys only RESET and ACCEPT/READ


accessible with front cover in place

Figure 4: User interface on front panel


5

SERIAL

Test sockets

Menu Options

Schemes Available

The menu holds an extensive range


of options, including:

The scheme selection varies with the


model of Optimho. Most models
have basic distance with up to 3
independent zones available,
designated Z1, Z2 and Z3.
Additional zones 1X and 1Y are
obtained, if required, by stepping
the reach of the Zone 1 elements
after time delays started by the
Zone 2 and/or Zone 3 elements.
On some models Zone 2 is obtained
by stepping the reach of Zone 1,
while on some other models, Zone 3
is omitted.

viewing records of the LCD


indications from the last four
faults.
printing records or settings on a
portable printer plugged into the
parallel test socket
entering a relay identification
code for use on printouts.
comprehensive test options such
as: monitoring test points on the
parallel socket; blocking output
contacts (the relay inoperative
alarm contact closes when the
output contacts are blocked);
simplified on-load directional
testing; and closing selected
output contacts (for instance to
carry out a circuit breaker test)
setting up the baud rate and
protocol for the serial
communications.

Settings
The setting options allow the user to
select functions to suit each
application. The available options
depend upon the model of
Optimho, but usually include:

Models offering selectable,


permissive overreach and
unblocking schemes are complete
with current reversal guard logic
and open breaker echo logic.
Models having independent Zone 1,
Zone 2 and Zone 3 have additional
permissive overreach and
unblocking schemes with weak
infeed logic, also the blocking
scheme. These schemes require
Zone 3 to be set reverse looking.
Single phase tripping logic is
available in some models.
Loss of load accelerated tripping
feature is available on some models
for use with 3 pole tripping.

scheme type
which distance zones are
enabled (up to 5 zones)
whether ground fault time
delayed zones (if fitted) are
enabled
direction of reach-stepped zones
or of Zone 3 (if fitted)
whether start indications are
required for remote faults which
do not result in a trip.
eight independent groups of
settings which are stored in the
relay memory and are selectable
from the menu.
The menu is adaptive; for example,
if Zone 2 is not required and has
been disabled, its time setting is
automatically removed from the
menu.

Distance Characteristics
The phase comparator is arranged to produce several types of distance
characteristics for the different models of Optimho. For further information see
Summary, Page 3.
Characteristic
type

Description

Partially cross polarised shaped mho with partial


synchronous polarising for 3-phase faults. Expansion
under fault conditions is more than adequate to cover arc
and tower footing resistance for most systems, with
excellent phase selection. See Figure 5.

Fully cross polarised (or quadrature polarised) mho with


partial synchronous polarising for 3-phase faults.
Similar to type m above but used where only phase fault
protection is required.

Self polarised mho, with a small proportion of cross


polarising: used for ground fault protection of
underground cables at high and medium voltages.

Quadrilateral with adaptive reactance measurement to


avoid overreach or underreach for resistive faults with
prefault load. The directional measurement is partially
cross polarised. The resistive reach setting is variable up
to 150 (1A relay) or 30 (5A relay). The quadrilateral
is used instead of type m above to cover ground fault
resistance on overhead lines shorter than 15km, on
resistance neutral systems, or on systems with high ground
resistivity. See Figure 6.

Offset quadrilateral: as type q but with reverse reach for


busbar back-up protection in Zone 3 time.

Offset lenticular with a variable aspect ratio set to avoid


load encroachment on long lines. A circular offset setting
for shorter lines is included. The reverse reach is used for
bus back-up protection in Zone 3 time. Reach stepped
zones whose timers are started by Zone 3 automatically
avoid load encroachment if Zone 3 is shaped to avoid the
load impedance. See Figure 7.

Selectable between type D and reverse type q.

Selectable between type N and reverse type m.

Selectable between type N and reverse type f.

X
Numbers are source impedance/relay setting ratios

12
24

60
R

Figure 5: Resistive expansion of partially cross-polarized mho under fault conditions for solidly grounded systems
7

Remote Communications

The facility to bulk transfer settings,


event records and metering
information (providing a fault
locator is fitted) is available using
AREVA T&D based software
Opticom.
By using KITZ 103 interface unit, the
Optimho can be interconnected to
relays in the AREVA K range.
The interconnection is via a
shielded, twisted wire pair known
as K-Bus. Up to 32 relays may be
connected in parallel across the bus.
The K-Bus is connected through a
second KITZ protocol convertor
either directly or via a modem to the
RS232 port of the pc. The K-Bus is
RS485 based and runs at
64 kbits/s.

Zone 1
Direction

al line
Zones 1

Zone 3 reverse

R8521

KITZ 103
K-Bus to Optimho Interface

R8532

OptiCom 100/140
Settings Database
and File Transfer

R5928

R
&2

Figure 6: Quadrilateral ground fault characteristics

X
Zone 3

Aspect ratios a/b


1.00

a
0.41

0.67

Load
area
R

The KITZ 103 and the LFZP act as a


single slave device over K-Bus, see
Figure 8.

KITZ 101/102
Interface Unit

RH Resist

Zone 2

From the same pc, Opticom 100


(version 5.0 and higher) and any
Courier based Access Software
packages can be used to
communicate with the Optimho.

For more detailed information on the


application of Optimho over K-Bus,
including modem connections, baud
rates, bit framing and the use of
Courier features, reference should
be made to the following service
manuals:

ive reach

ive reach

Zone 3

LH Resist

All the options available on the


menu are also available from a
local or remote terminal via an
RS232C serial communication port.
Sockets are provided on both the
front and the rear of the relay for
temporary or permanent connection
respectively. The socket on the rear
can also interface with a modem for
communication over a suitable link,
for instance a telephone line.

Zone 3
reverse

Figure 7: Lenticular Zone 3

Auxiliary
supply
voltage

+
_

KITZ101/102
KBUS/IEC 60870 Interface

Typical K
series relay

150R
2 TX
3 RX
7 Signal GND
1 Protective GND

When Fitted

Typical K
series relay

Terminals
54

Terminals
54

56

56

Screen

Screen Link
All

points are internally connected

LFZP 100 (Optimho) Relay


(Rear Port)

Auxiliary
supply
voltage

KITZ103 KBUS
LFZP 100 (Optimho)
Interface *

+
_

150R

2 TX
3 RX
7 Signal GND
1 Protective GND

All

IBM or compatible P.C.


(For pin assignment
numbers see table)

KITZ 103

Table showing connections between KITZ 103 serial


port and LFZP 100 (OPTIMHO) rear serial port.
(For reference only. Please refer to PC user manual
where available).

2
3
7
1

Screen

points are internally connected

LFZP 100 (OPTIMHO) rear serial port type

25 pin D male connector (DTE) KITZ 103

25 pin D male connector (DTE)

1 Protective ground

1 Protective ground

2 Transmitted data

2 Received data

3 Received data

2 Transmitted data

7 Signal ground

7 Signal ground

Connector shell to cable screen

Connector shell to cable screen

Figure 8: Typical application diagram: KBUS/LFZP 100 (Optimho) Interface Type KITZ 103

Polarising
The partial cross polarising signal
used in various distance
characteristics is a square wave
derived from a healthy phase
reference and 16% of the amplitude
of the prefault voltage. This wave is
added to the faulty phase voltage,
and dominates it for close-up
unbalanced fault conditions.
This provides a clear directional
reference even in the presence of
capacitor voltage transformer
transients.
The partial synchronous polarising is
similar to partial cross polarising but
is effective for 3-phase faults.
Synchronous polarising is derived
from prefault voltage and is
available for 16 cycles after fault
incidence to cover breaker failure
protection time.
Several cycles must elapse from
system energisation before
synchronous polarising is available,
so switch-on-to-fault logic is
arranged to provide protection for
close-up 3-phase faults during this
initial period.

Directional Earth Fault


Protection
(not available in all models)
The directional earth fault protection
(DEF) has these features selectable
via the user interface:
time delayed tripping, either
definite time or inverse definite
minimum time using a selection of
built-in IEC or American curves.
See Figure 9.
instantaneous high-set tripping,
available if the model of Optimho
has no Zone 1 instantaneous
ground fault elements fitted.
aided tripping via permissive
overreach, unblocking, or
blocking schemes (depending on
the model), which work in
conjunction with the distance
scheme, sharing the same
signalling channel.
choice of polarising for the
directional element:
negative sequence voltage
derived from internal filters
(compared against negative
sequence current).
zero sequence current from a
separate current input
9

zero sequence voltage (in some


models) derived internally from
VA, VB and VC.
dual zero sequence current and
voltage (some models only).
The overcurrent elements use zero
sequence current as the operating
quantity irrespective of the type of
polarising used for the directional
element.
The negative sequence filters are
self-adaptive to system frequency,
allowing greater sensitivity than is
possible with fixed filters tuned to
the nominal system frequency.
A magnetising inrush current
detector is provided to prevent
maloperation when energising inzone transformers. The circuit uses
the principle of detecting
zeros in the current lasting for a
quarter-cycle or more. This method
is inherently unaffected by current
transformer saturation, unlike
second harmonic restraint.

Fault Location, Fault


Data Recording and
Instrumentation
(not available in all models)
The fault location algorithm includes
compensation for infeed into a
resistive fault from remote source
with prefault load flow. Readout of
the fault location can be selected to
be in kilometres, miles or percent of
line length.

100

100

50

50

10

10

As the fault location hardware is


largely separate from that of the
distance measuring elements,
protection accuracy can be crosschecked with fault location accuracy
during secondary injection tests.
All voltages and currents are given
with phase angle relative to prefault
VA, and rms amplitudes in primary
or secondary terms.

At any time under healthy live line


conditions, the line voltages,
currents, watts and vars can be
calculated on demand. These values
can be compared with other
instrumentation for accuracy.

Operating Time t (seconds)

Operating Time t (seconds)

Some versions of the fault locator


can be mutually compensated if
required. This feature can not be
used if zero sequence current
polarising is required for the DEF.

The fault location board also


computes prefault and fault voltages
and currents phase-by-phase.
These values, together with negative
and zero sequence current and
voltage can be read out to allow
analysis of the power system
network as it was at the time of
fault. The duration of the fault is also
determined.

Curve 4

Curve 1

Curve 5
Curve 6
Curve 7

1
0.5

0.5

Curve 2

Curve 8
Curve 3

0.1

0.1
1

5
10
Current (Multipule of s)
IEC curves

Curve 1 Standard inverse:

t = 0.14
0.02 1

Curve 2 Very inverse:

t = 13.5
1

Curve 3 Extremely inverse:

t = 80
21

50

100

Curve 4 Longtime earth fault: t = 120


1

Figure 9: DEF Protection time delay trip times


10

5
10
Current (Multipule of s)
American curves

Curve 5

US moderate inverse

Curve 6

US standard inverse

Curve 7

US very inverse

Curve 8

US extremely inverse

50

100

0.04
Operating
Time
(s) 0.03

0.04
Operating
Time
(s) 0.03

Source impedence
Relay setting = 30

Source impedence
=1
Relay setting

Maximum

Mean

Maxim

um

0.02

0.01

0.00

0.02

Mean
Minimum

Minimum

0.01

20
40
60
80
Fault location (% of relay setting)

0.00

100

20
40
60
80
Fault location (% of relay setting)

100

Figure 10: 50Hz operating times (MHO characteristic)

0.04
Operating
Time
(s) 0.03

0.04
Operating
Time
(s) 0.03

Source impedence
= 30
Relay setting

Maximum
Mean
Minimum

0.02

Maximum

0.02

0.01

0.00

Source impedence
=1
Relay setting

Mean
Minimum

0.01

20
40
60
80
Fault location (% of relay setting)

0.00

100

20
40
60
80
Fault location (% of relay setting)

100

Figure 11: 60Hz operating times (MHO characteristic)

0.04
Operating
Time
(s) 0.03

0.04
Source impedence
Relay setting

Operating
Time
(s) 0.03

= 30

Maximum

Mean

0.02

=1

imum
Max
Mean

0.02

Minimum

Minimum

0.01

0.01

0.00

Source impedence
Relay setting

20
40
60
80
Fault location (% of relay setting)

0.00

100

Figure 12: 50Hz operating times (quadrilateral characteristic)

11

20
40
60
80
Fault location (% of relay setting)

100

0.04
Operating
Time
(s) 0.03

0.04
Operating
Time
(s) 0.03

Source impedence
= 30
Relay setting

Maximum
Mean

0.02

Maximum

Mean

0.02

Minimum

Minimum

0.01

0.00

Source impedence
=1
Relay setting

0.01

20
40
60
80
Fault location (% of relay setting)

0.00

100

Figure 13: 60Hz operating times (quadrilateral characteristic)

Self-Monitoring and
Voltage Transformer
Fuse/MCB Supervision

In addition, an optional external


device for monitoring 3 phase fuse
blow via the RELAY BLOCKED optoisolator is available.

Optimho has comprehensive


continuous self-monitoring. If a
failure occurs, an alarm is issued by
closing the relay inoperative alarm
contact and extinguishing the relay
available LED. Diagnostic
information is automatically
displayed if the failure is such that it
does not disable the main processor
and LCD.

Monitoring of the digital circuits


includes (i) bus communications
(ii) checking of RAM and EEPROM
and (iii) watchdog circuits for every
microcontroller. In the event of
failure, trip signals originating from
the affected part of the relay are
blocked.

Monitoring of the analogue circuits


includes (i) the dc supply and all
internal dc power supply rails, and
(ii) the ac supplies and internal
analogue voltage and current
circuits (the latter only if the model
of Optimho has voltage transformer
supervision).
The VT supervision logic can be set
to block relay operation in the event
of failure of a VT fuse. The VT
supervision logic can be selected
via the menu to self reset, or to
remain sealed in until the reset
button is pressed. All models have
an optically coupled isolator to
monitor the auxiliary contact of a
miniature circuit breaker if the VT
supplies are protected by an MCB
instead of fuses. Energising the
optical isolator blocks relay
operation.

In models with quadrilateral ground


fault characteristics, remedial action
is performed if the quadrilateral
measuring circuits fail.
The alternative shaped mho ground
fault measuring elements, located on
a different board, are automatically
brought into action to restore the
ground fault protection. On power
systems where most faults are
ground faults, this capability
considerably increases the overall
availability of the relay.

12

20
40
60
80
Fault location (% of relay setting)

100

Contact Arrangements
Most models are pre-programed to
give a choice of at least two output
contact arrangements. One of these
is arranged to give direct access to
the relays measuring units via the
output relay contacts, so that a
customers existing protection
scheme can be operated in
conjunction with Optimho if
required. The other arrangements
take advantage of the Optimhos
own integral scheme logic.

Other Options

START
Ground Fault Distance?

No

Yes

Underground
cables?

Either of the following:


*voltage transformer supervision?
*power swing blocking?

Yes

Yes
No

No

To be specified with order.


A facility to control the setting group
selected via five optical isolators is
available on all models.
A facility to control the setting group
selected via three optical isolators is
available on all models. Full scheme
options are provided and three
setting groups are available.

Go to
chart 2

DEF Scheme?

Any of the following:


*week infeed POR unblocking scheme?
*blocking scheme?
*back-up for reverse faults?

Yes

No

Yes

No

LFZP 131
With DEF
OK for open-delta
Or 3limb VTs
Optional fault locaton

LFZP 132
With DEF
OK for open-delta
Or 3limb VTs
Optional fault locaton

Any of the following:


*single pole tripping?
*permissive undereach scheme (PUR)?
*permisssive overreach Scheme (POR)?
*unblocking scheme?
*power swing blocking?

Yes

No

Quadrilateral ground
fault elements?
Yes

Quadrilateral ground
fault elements?
Yes

No

LFZP 121
Optional fault
location

LFZP 122
Optional fault
location

No

LFZP 111
Optional DEF.
Optional fault location

Any of the following?


*weak infeed POR/unblocking scheme?
*blocking scheme?
*backup for reverse faults?
*power swing blocking?
Yes

No

LFZP 112
Optional DEF.
Optional fault locator

LFZP 114
Optional DEF.
Optional fault locator

In some models specified above, it will be necessary to disable unwanted zones


and facilities with settings on the menu.

Selection Chart 1
13

START
Underground cables?
No

Yes
Any of the following?
*single pole tripping?
*PUR scheme?
*POR scheme?
*unblocking scheme?

Go to chart 1

* blocking scheme?
* power swing blocking?
* capacitor voltage
transformers?
Yes

No

LFZP 113
Optional fault location
Optional DEF

LFZP 123
Optional fault location
No DEF

In some models specified above, it will be necessary to disable unwanted zones


and facilities with settings on the menu.

Selection Chart 2

START
Single Zone Distance?

No

Yes

Go to chart 1

Any of the following:


*ground fault distance?
*voltage transformer supervision?
*power swing blocking?

No

Yes
Any of the following:
*single pole tripping?
*power swing blocking?
*DEF?

Offset characteristic?

No

Yes
Either of the following:
*offset characteristic?
*power swing blocking?

Yes

No

LFZP 112
Optional DEF.
Optional fault
location

LFZP 114
Optional DEF.
Optional fault
location

LFZP 131
with DEF.
Optional fault
location

Offset characteristic
Yes

No

LFZP 151
No fault
location

LFZP 122
Optional fault
location

In some models specified above, it will be necessary to disable unwanted zones


and facilities with settings on the menu.

Selection Chart 3
14

LFZP 132
with DEF.
Optional fault
location

Direction of power flow for operation


P2

A
B

P1

S2
C

B
Phase rotation

A B

MMLG
Test block or
Equivalent

2A1

2A2

2A3

2A4

2A5

2A6

2A7

2A8

LFZP 111
19
20
21
22

2A9 2A10

23

2A11 2A12

a b

24

2A21 2A22

25

2A23 2A24

26

Fuses
or MCB

2B21 2B22

15

2B23 2B24

16

2B25 2B26

17

2B27 2B28

18

2A25 2A26

S1

S2
P2

27

2A27 2A28

28

P1
DEF current polarisation when required

+
2A13 2A14 A13

2B13 2B14

CRX

2B9 2B10 17

19 74

COX

2B7

2B8

13

15 70

RZ1X

2B1

2B2

CB AUX 2B5 2B6

11 66

MCB
IPD

2B11 2B12
2B3

2B4

R1

58

78

21

62

23 82

External resistor box


required for 220/250V
supply only
2A17

2A 18

49

2B17

2B18

77

14

DC supply

2A16 2A15

2B16 2B15

76

Signal receive
Channel out of service

72
60

Rest zone 1 extension

68

Breaker open

80

Relay blocked

64

Inhibit PSB, DEF, WI.

84

Reset indications

Signal send

51

2A 20

2A 19

79

2B20

2B 19

Any Trip

Optoisolator inputs when required:

a
b
c

Fuses
or MCB

Alternative voltage
transformer connection
for LFZP 131 & 132
15
16
17
18

Test block

CRX

Open contact from signalling channel

COX

Close contact from signalling channel

RZIX

Open contact from autoreclose relay

CBAUX

Closed circuit breaker contacts connected


in series to indicate all poles open. Required
with busbar VT or if the weak infeed or echo
feature of POR scheme are required

MCB

Closed contact from minature circuit breaker


required when no VT fuses are used

RI

Open contact to reset visual indications

IPD

Open contact from autoreclose relay


required with single phase tripping if PSB
or DEF options are used. Opto must be
energised during single pole dead times

For the unblocking mode of operation use CRX for


the unblock frequency (trip frequency) and RZIX
for the block frequency (guard frequency)

LFZP

Figure 14: Case connection diagram for relay inputs


15

Technical Data
Ratings

AC voltage Vn:

100 to 120V rms phase-phase

AC current

1A or 5A rms per phase

In:

Frequency fn:

50Hz or 60Hz

Operating frequency range:

47 to 51Hz or 56.4 to 61.2 Hz

DC Supply Vx(1):

For switched mode dc/ac/dc power


supply unit, available in three versions:
Nominal
range

Operative
withstand

Maximum

48/54V

37.5 to 60V

64.8V

110/125V

87.5 to 137.5V

150V

220/250V

175 to 275V

300V

There is negligible change of accuracy with change of


voltage within the operative range of the relay.
DC supply Vx(2):

For optically coupled isolators.


Supply options are the same as Vx(1).
External resistor box provided for 220/250V version
(see Figure 16).

Maximum overload ratings

AC voltage:

1.2Vn for measuring accuracy


1.5Vn continuous withstand
2.5Vn withstand for 10s.

AC current:

2.4In continuous withstand


100In withstand for 1s (In = 1A)
80In withstand for 1s (In = 5A)

Burdens

AC voltage circuits:

0.1 VA per phase at Vn

AC current circuits:

0.08 VA per phase (In = 1A)


0.5 VA per phase (In = 5A)

DC supply (1):

18W under healthy live line


conditions at Vx(1) 28W maximum

DC supply (2):

10mA per energised optically


coupled isolator at Vx(2).

Distance elements

Range of positive sequence settings referred to line VT and CT secondaries:


All employed zones except reverse Zone 3:
Overhead line models

0.2
0.04

to 250 (In = 1A)


to 50 (In = 5A)

Underground cable models

0.1
0.02

to 125 (In = 1A)


to 25 (In = 5A)

Reverse Zone 3
Overhead line models

0.04 to 250 (In = 1A)


0.008 to 50 (In = 5A)

Underground cable models


and LFZP 151

0.02 to 125 (In = 1A)


0.004 to 25 (In = 5A)

16

Reach setting method is by digitally controlled analogue attenuators.


Attenuation factors KZPh and KZN operate on current signals and are
common to all zones.
Attenuation factors KZ1, KZ1X, KZ1Y, KZ2, KZ3 and KZ3 operate on
voltage signals and are specific to Zone 1, Zone 1X, Zone 1Y, Zone 2,
Zone 3 forward and Zone 3 reverse respectively. The positive sequence
reach for Zone 1 is given by:
Zone 1 = KZ1. KZPh.5/In for overhead line models.
Zone 1 = KZ1. KZPh. 5/2In for underground cable models.
Either KZ1 or KZPh is set to 1.000. To obtain the formula for each of the
other zones employed, replace KZ1 by the appropriate attenuation factor for
the zone.
Extra settings for ground fault distance:
Residual compensation factor:

KZN
Z ZL1
= L0
KZPh
3ZL1
Where ZL0 and ZL1 are the phasor values of zero and positive sequence
impedance of the protected line.
Quadrilateral resistive reach settings:
Right hand reach = KR.5/In

Range of factors:

Left-hand reach

= KR.6/In (LFZP 111)

Left-hand reach

= KR.5/In (LFZP 121)

KZPh

0.040 to 1.000 in steps of 0.001

KZN

0.000 to 1.360 in steps of 0.001

KZ1
KZ1X
KZ1Y
KZ2
KZ3

1.00 to 49.98 steps of 0.02

KZ3

0.2 to 49.9 in steps of 0.1

KR

1 to 30 in steps of 1

Range of setting of Zone 3 lenticular aspect ratio:


a/b = 1.00, 0.67 or 0.41
Characteristic angle settings:
Ph = arg ZL1 to nearest available setting.
Ph = 50 to 85 in 5 steps (overhead line models)
Ph = 45 to 80 in 5 steps (LFZP 113 only)
Ph = 20, 25, 30, 35, 40, 50, 60 or 70
(LFZP 123 only)
Vectorial residual compensation for ground fault distance:
N = arg (ZL0 ZL1) to nearest available setting
N = 50 to 85 in 5 steps (overhead line models)
N = 45, 35 and 25 to 80 in 5 steps
(LFZP 113 and 123 only)
Note: LFZP 113 is not designed to be used with a ground fault loop setting
(2ZL1 + ZL0) /3 with an argument less than 30.

17

Minimum operating values of the distance measuring elements for


all types of fault:
Voltage: zero
Current: 0.05In/KZPh.
Accuracy:

Reach:

5% at 2In and 20C

Dynamic range: up to 25In for fault


locator and instrumentation up to
56In for distance protection
Characteristic angle: 2
Resetting ratio:

105%

Timer ranges:

Zone
Zone
Zone
Zone

1X timer
1Y timer
2 timer
3 timer

each timer 0.10s to 9.98s


in steps of 0.02s

Scheme co-ordination timers used in permissive


overreach, unblocking and blocking schemes:
TP
TD
TDW

0 to 98ms in steps of 2ms

Timer accuracy:

1% of setting and 3ms.

Operating time:

Typical relay operating times for Zone 1 are shown in


Figures 10 to 13.
Mho characteristic (type m, f or c)

50Hz minimum: 14ms


typical: 18ms
60Hz minimum: 12ms
typical: 16ms

Quadrilateral characteristic (type q) 50Hz minimum: 16ms


typical: 23ms
60Hz minimum: 15ms
typical: 20ms
Reset time:

The trip contacts are sealed in for 60ms following the


initial contact closure. Thereafter, the maximum reset
time is 35ms.

Power swing blocking

Power swing detected by transit time of impedance between Zone 6 and


either Zone 2 or Zone 3 as selected. Zone 6 is offset mho or offset lenticular,
with the same range of forward and reverse reach settings and aspect ratios
as Zone 3.
Zone 6 timer range: 20ms to 90ms in steps of 5ms
Power swing detection regimes:
(i) detection disabled.
(ii) detection indicated only.
(iii) indication plus blocking of any one or more
selected zones.
Blocking disabled if a ground fault or (if DEF fitted) a phase fault occurs
during a power swing.

18

Directional earth fault

Directional measuring elements: one forward-looking, one reverse-looking:


Current sensitivity determined by current level detector:
0.05In to 0.80In in steps of 0.05In
Sensitivity of polarising quantity is 1V residual voltage of
1.5% polarising current, as appropriate, depending upon
the type of polarising selected.
Characteristic angle G = 10 to 80 in 10 steps.
Instantaneous trip (available only if no Zone 1 ground fault distance
elements fit):
Setting range: 0.2In to 30In in steps of 0.05In
Accuracy: 5% at fn, 20C
Aided tripping
scheme:

Scheme co-ordination timers:


TPG
TDG

0 to 98ms in steps of 2ms

High set current level detector 0.05In


to 0.80In in steps of 0.05In
Time delay trip:

Setting Is = 0.05In to 1.20In in steps of 0.05In


Time curves: eight curves and three definite time ranges
shown in Figure 9.
Time multiplier: *t = 0.025 to 1.000 in steps of 0.025
Accuracy at fn, 20C, *t = 1,

Is = 0.05In to 0.80In:

Current: +10% 0%
Operating time: definite time 3% over 1.3Is to 31Is
curves 1, 2, 4, 5, 6, 7, 8

5% over 2Is to 31Is

curve 3

7.5% over 2Is to 20Is

Fault location and instrumentation

Fault location positive sequence settings referred to line VT and CT


secondaries:
Range:

0.2 to 200 (In = 1A)


0.1 to 100 (In = 1A) (113/123)
0.04 to 40 (In = 5A)
0.02 to 20 (In = 5A) (113/123)

Setting:

Zone F = KZF. KZPh.5/In for overhead line models.


Zone F = KZF. KZPh.5/2In for underground cable models.

KZPh and residual compensation are common to the distance measuring


elements.
KZF range:

1.00 to 40.00 in steps of 0.01.

Line length setting (in miles or km or %)


0.00 to 99.99 in steps of 0.01
100.0 to 999.9 in steps of 0.1
KZM and M are provided for mutually compensating the fault locator if
required:
KZM range:

0.0 to 1.36 in steps of 0.001

M range:

50 to 85 in steps of 5

Accuracy

2% at 2In, fn, 20C.

Settings to allow for transformer ratios for instrumentation functions:


CT ratio: 1:1 or 10 to 5000: 1 in 10:1 steps
VT ratio: 1:1 or 10 to 9990: 1 in 10:1 steps
19

Block or enable reclose logic

A normally-open or normally-closed contact is supplied on most models to


block or enable reclose respectively.
The menu allows the following choices of logic:
Reclose blocked or enabled on:
Zone 1 or aided trip caused by 2 or 3 phase fault
Zone 1 or aided trip cased by 3 phase fault
Zone 1X and/or Zone 1Y and/or Zone 2 time
delayed trip
Channel out of service
DEF instantaneous and/or aided trip and/or delayed trip.
Voltage transformer (fuse fail) supervision

The voltage transformer supervision (VTS) operates when zero sequence


voltage is detected without the presence of zero sequence current, by means
of the low set neutral level detector. The VTS does not limit the distance relay
current sensitivity or operating times for line faults even when the VTS is set to
block relay tripping.
Nominal Vo detector setting 9.5V
The blocking action of the VTS on distance comparators can be removed by
menu selection via the user interface.
Switch-on to fault logic

Menu choices allow instantaneous trip and alarm and indication for faults
occurring on line energisation, whether bus or line voltage transformers are
used:
SOTF enabled either 0.2s or 110s after line de-energised
(110s prevents SOTF action on auto-reclosure).
SOTF trip via measuring elements.
SOTF trip via current and voltage level detectors.
Output contacts

Some of the available arrangements are shown in Table 1.


Ratings:
Make and carry 0.2s

7500VA subject to a maxima


of 30A, 300V, ac or dc.

Carry continuously

5A ac or dc.

Break

ac: 1250VA
dc: 50W resistive
25W L/R = 0.04s
Subject to a maxima of 5A
and 300V

Durability

Loaded contact

10,000 operations minimum

Unloaded contact

100,000 operations minimum

20

High voltage withstand

Dielectric withstand
IEC 60255-5:1977
ANSI C37.90:1978

2kV rms for 1 minute between all


terminals and case earth.
2kV rms for 1 minute between
terminals of independent circuits,
with terminals on each independent
circuit connected together.
1.5kV rms for 1 minute across
normally open contacts

High voltage impulse


IEC 60255-5:1977

Insulation resistance
IEC 60255-5:1977

Three positive and three negative


impulses of 5kV peak, 1.2/50s,
0.5J between all terminals and all
terminals and case earth.
>100M when measured at
500V dc

Electrical environment

DC supply interruption
IEC 60255-11:1979

High frequency disturbance


IEC 60255-22-1:1988 Class III

10ms interruption in the auxiliary


supply under normal operating
conditions, without de-energising.
2.5kV peak between independent
circuits and between independent
circuits and case earth.
1.0kV peak across terminals of the
same circuit.

Electrostatic discharge
IEC 60255-22-2:1996 Class 3

8.0kV discharge in air with cover


in place
6.0kV contact discharge with
cover removed.

Fast transient disturbance


IEC 60255-22-4:1992 Class IV

4.0kV, 2.5kHz applied directly to


auxiliary supply
4.0kV, 2.5kHz applied directly to
all inputs

Radio frequency interference


EMC compliances
89/336/EEC
EN50081-2:1994
EN50082-2:1995

21

Compliance to the European


Commission Directive on EMC is
claimed via the Technical
Construction File route.
Generic Standards were used to
establish conformity.

Atmospheric environment

Temperature
IEC 60255-6:1988

Storage and transit 25C to +70C


Operating 25C to +55C

IEC 60068-2-1:1990

Cold

IEC 60068-2-2:1974

Dry Heat

Humidity
IEC 60068-2-3:1969

56 days at 93% RH and 40C

Enclosure protection
IEC 60529:1989

IP50 (dust protected)

Mechanical environment

Vibration
IEC 60255-21-1:1988

Response Class 1

Seismic
IEC 60255-21-3:1993

Class 1

22

Table 1. Standard output contact case terminal connections


Terminal

LFZP 111, 112, 113, 114(Note 1)

29-31

RIA

97Y

RIA

97Y

RIA

97Y

RIA

97Y

29-33

VTS

97X

VTS

97X

Def Trip

67N

VTS

97X

29-35

Dist Trip

21

Z1

Dist Trip

21

Trip

94T

37-39

Trip A

94A

Trip

94T

Trip

94T

Trip

94T

41-43

Trip B

94B

Trip

94T

Trip

94T

Trip

94T

45-47

Trip C

94C

Trip

94T

Trip

94T

Trip

94T

49-51

Signal Send

85X

Signal Send

85X

Signal Send

85X

Any Trip 94

53-55

SOTF

98

SOTF

98

SOTF

98

Start

30-32

Time delayed

21/67N(T)

Z1X + Z1Y(T)

Z1X/Z1Y(T)

Z1X + Z1Y + Z2(T)

Z1X/Z1Y/Z2(T) (Note 2)

30-34

DEF Trip

67N

Z2(T)

Z2(T)

Z3(T)

Z3(T) (Note 3)

30-36

Aided Trip

94Y

Z3(T)

Z3(T)

Def(T)

67N(T)

38-40

Trip A

94A

Aided Trip

94Y

Aided Trip

94Y

42-44

Trip B

94B

Trip

94T

Any Trip

94

46-48

Trip C

94C

Any Trip

94

Signal Stop

85Y (Note 4)

50-52

Bar

96

Bar

96

Bar

96

54-56

Start

99

Start

99

Start

99

57-59

Trip A

94A

57-61

Trip B

94B

57-63

Trip C

94C

65-67

Trip A

94A

69-71

Trip B

94B

73-75

Trip C

94C

77-79

Any Trip

94

81-83

PSB

95

LFZP 121, 122, 123

LFZP 131,132

LFZP 151

99

Notes:
1. When 3 phase tripping scheme is used,
94A, 94B, 94C and 94 all respond as 94T.
2. Z1X/Z1Y(T) in LFZP 132.
3. Z2(T) in LFZP 132.
4. Trip 94T in LFZP 132.
Key to contact functions.
97Y

Relay inoperative alarm.

94Y

Aided trip.

97X

Voltage transformer supervision

94

Any trip

95

Power swing blocking.

94A

Trip pole A of breaker.

21

Distance trip.

94B

Trip pole B of breaker.

67N

DEF trip.

94C

Trip pole C of breaker.

98

Switch on to fault trip.

94T

Trip all poles of breaker.

Z1

Zone 1 trip.

96

Block autoreclose.

Z1X(T)

Zone 1X time delay trip.

85X

Signal send.

Z1Y(T)

Zone 1Y time delay trip.

85Y

Signal stop.

Z2(T)

Zone 2 time delay trip.

99

DEF element operated (forward or reverse)


or any Zone 1, 2 or 3 element.

21/67N(T) Any time delay trip.

23

177.00

Ribbon cable
1
2
3
4

Input/
Output

Hinged
panel

11 9 7 5
10 8 6

Processing

57

T.B.

29

T.B.

84
56

25 way 'D'
connector

414.00

AC
input

13

Power supply
M4 earth
connections

12

T.B.

Front view

Front view

10.00

168.00
159.00

4 Holes
4,4

Rear view
32.00

Board
Ref
1
2
3
4
5
6
7
8
9
10
11
12
13
7
or
or

312.00
411.00 362.60

157.00
24.20

14

25

13

25 way 'D' connector detail

Description

Board No.

Opto isolator
Output relay
Output relay
Output relay
Assy fault locator module
3 Zone gnd fault quad
See below
Level detector
Directional earth fault
1 Zone offset lenticular
Processor
AC input 2
AC input 1
2 Zone mho ph & gnd
1 Zone mho reversible
Zone 3 ph (2 channel)

ZJ0133
ZJ0140 003
ZJ0140 001
ZJ0140 002
GJ0277 000
ZJ0132

28

27

Terminal block detail

Bottom view

Panel cut-out detail

ZJ0136
ZJ0139
ZJ0131
ZJ0138
ZJ0135
ZJ0134
ZJ0130
ZJ0146
ZJ0129

28 way max
Each way accepting:2M4 Ring terminals
or
24,8 x 0,8
Snap-on terminals
or
1 Ring+
1 Snap-on terminal

Figure 15a: Arrangement and outline: Optimho panel mounting vertical

Board
Ref
1
2
3
4
5
6
7
8
9
10
11
12
13
7
or
or

Hinged panel
414.00

32.00

312.00

177.00
(4U)

157.00

10.00

Front view

Side view

M4 earth connection

1 2

Ribbon
cable

3 4

5
6
7
8
9
10
11

12
13

Input/
Processing
AC
Output
Input
Front view (panel removed)

24.20

T.B.

Power supply
Rear view

29

57

T.B.

T.B.

56

84

Board No.

Opto isolator
Output relay
Output relay
Output relay
Assy fault locator module
3 Zone gnd fault quad
See below
Level detector
Directional earth fault
1 Zone offset lenticular
Processor
AC input 2
AC input 1
2 Zone mho ph & gnd
1 Zone mho reversible
Zone 3 ph (2 channel)

ZJ0133
ZJ0140 003
ZJ0140 001
ZJ0140 002
GJ0277 000
ZJ0132
ZJ0136
ZJ0139
ZJ0131
ZJ0138
ZJ0135
ZJ0134
ZJ0130
ZJ0146
ZJ0129

25 way 'D'
connector

411.00
362.60

4 Holes 4,4

Description

159.00 168.00

14

13

25

25 way 'D' connector detail

Panel cut-out detail

Figure 15b: Arrangement and outline: Optimho panel mounting horizontal


24

27

28

Terminal block detail

28 way max
Each way accepting:2M4 Ring terminals
or
24,8 x 0,8
Snap-on terminals
or
1 Ring+
1 Snap-on terminal

Board
Ref
1
2
3
4
5
6
7
8
9
10
11
12
13
7
or
or

483.00
34.00

465.10
177.00
(4U)

312.00

157.00

101.60

Hinged panel

37.70

Front view

Fixing slot
10,6 long x 7 wide
1 2

3 4

5
6
7
8
9
10
11

Input/
Output

12
13

Processing

10.00

Side view

M4 earth connection

Power supply

T.B.

T.B.

AC
input

Front view (panel removed)

Rear view

T.B.

25 way 'D'
connector

14

13

25

25 way 'D' connector detail

Description

Board No.

Opto isolator
Output relay
Output relay
Output relay
Assy fault locator module
3 Zone gnd fault quad
See below
Level detector
Directional earth fault
1 Zone offset lenticular
Processor
AC input 2
AC input 1
2 Zone mho ph & gnd
1 Zone mho reversible
Zone 3 ph (2 channel)

ZJ0133
ZJ0140 003
ZJ0140 001
ZJ0140 002
GJ0277 000
ZJ0132

27

28

ZJ0136
ZJ0139
ZJ0165
ZJ0138
ZJ0135
ZJ0134
ZJ0130
ZJ0146
ZJ0129

28 way max
Each way accepting:2M4 Ring terminals
or
24,8 x 0,8
Snap-on terminals
or
1 Ring+
1 Snap-on terminal

Terminal block detail

Figure 15c: Arrangement and outline: Optimho rack mounting

Channel used when


mounted in Midos
scheme. (See note)
M4 tapped panel fixing holes
screws not provided

10

28 way max
Each way accepting:
2 - M4 ring terminals
or
2 - 4,8 x 0,8 Snap-on terminals
or
1 - Ring + 1 - Snap-on terminal
M4 earth connection

120
2

155
121

27
15
36.3

28

Perforated cover
Note: Where the box is to be fitted into a
Midos scheme it should be positioned
between relays, not at a tier end.
Rack mounting schemes require the
addition of joining strips and spacers.

Terminal screws: M4 x 8 brass cheese head


with lockwashers are provided

Figure 16: Outline - external component box


25

Cases
The relay is housed in a multimodule Midos case suitable for rack
or panel mounting, as shown in
Figure 15.
Weight: 15kg.

Other Information
An LFZP accessory kit is available to
facilitate commissioning and test.

26

Information Required
with Order
LFZP model required (see Summary
Chart page 3)
Whether DEF required (if optional
for model selected)
Whether fault location required
(if optional for model selected)
Nominal current rating In: 1A or 5A
Frequency fn: 50Hz or 60Hz
Voltage of dc supply Vx(1):
48/54V, 110/125V or 220/250V
Voltage of dc supply Vx(2):
48/54V, 110/125V or 220/250V
Mounting arrangements: rack, panel
horizontal, panel vertical, semi
projection
Whether the block auto-reclose
contact 961 is to be a normallyopen or normally-closed contact
Whether the signal send contact
85X-1 is to be a normally-open or
normally-closed contact
Advice is available when the
information requested above is
difficult to specify
Requests for advice should include:
current and voltage transformer
ratios
positive and zero sequence
impedances of the protected
feeder or full details of the feeder
lengths and construction
source impedances or fault levels
for both minimum and maximum
plant conditions

27

Service Manual
LFZP 11x

Section 1.

R5911D
Chapter 1
Page 1 of 89

GENERAL INTRODUCTION

For the protection of high voltage transmission lines and underground cables, a
selection of four Optimho distance models are available in order to provide a wide
range of relay characteristics and options. Three models are for the protection of
overhead transmission lines, two with 18 comparators and up to five zones of
protection and one with 12 comparators and up to four zones of protection. The fourth
model is for the protection of underground cables, with 18 comparators and up to five
zones of protection. All models are provided with single and three phase tripping.

Section 2.

RELAY CHARACTERISTIC

The correct relay model selection for the preferred relay characteristics and options is
shown on the Selection Chart in the form of a flow-chart, which clearly identifies the
relay type reference and the optional facilities that are available. All models are
provided with Power Swing Blocking and Voltage Transformer Supervision, except
model LFZP114, which is provided with Voltage Transformer Supervision only.

Section 3.

LFZP111 MODEL (18 COMPARATORS)

It is a general purpose relay, normally recommended for the protection of any length
transmission line, where the values of arc-resistance and tower footing resistance
required to be measured are outside the reach of the mho characteristic.
As shown in Figure 1, this relay has partially cross-polarised shaped mho
characteristics for the Zone 1 and Zone 2 phase units. This type of characteristic has a
'shield' shape when plotted on the impedance plane, exhibiting a strong resistive
expansion under fault conditions for tolerance of arc-resistance. A digitally generated
synchronous memory system is used for partial polarisation on three phase faults, to
provide similar strong resistive expansion and to ensure directional response for
close-up faults.
The Zone 1 and Zone 2 earth fault units have quadrilateral characteristics, with
independent settings for reach at the relay characteristic angle and resistive coverage.
The quadrilateral characteristic gives extra tolerance to the measurement of high
resistance faults, where the expansion of the mho shielded characteristic may be found
inadequate.

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LFZP 11x

R5911D
Chapter 1
Page 2 of 89

X
X

Z3
Z3
Z2

Z2

Z1Y

Z1Y
Z1X

Z1X
Z1

Z1

R
Z3'
Z3'

PHASE FAULTS

GROUND FAULTS

(a) WITH OFFSET ZONE 3


X
X

Z2

Z2

Z1Y

Z1Y

Z1X

Z1X
Z1

Z1

Z3'

Z3'

PHASE FAULTS

GROUND FAULTS

(b) WITH REVERSE ZONE 3

Figure 1 LFZP 111 Relay characteristics

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 3 of 89

To avoid any problem of overreach or underreach on resistive earth faults when there
is an infeed to the fault from a remote source, the reactance line of the Zone 1
quadrilateral automatically tilts to compensate for the pre-fault power flow. The Zone 1
quadrilaterals are inhibited for double phase to earth faults to eliminate overreach,
tripping being performed via the phase fault units which measure accurately under
these conditions.
The Zone 3 units for phase faults have offset lenticular characteristics which permit the
relay to be applied to long heavily loaded transmission lines without encroachment
into the load impedance. It has a variable aspect ratio, including an offset circular
setting.
For earth faults, the Zone 3 units are offset quadrilaterals similar in design to the
quadrilaterals used for Zone 1 and Zone 2. In the scheme, the facility is provided for
the Zone 3 units to be set directionally in the reverse direction for use in the Blocking
schemes or in the Permissive Overreach scheme with Weak Infeed.
As an alternative, the earth fault units are provided with mho comparators for Zone 1
and Zone 2 and offset lenticular for Zone 3. The choice of relay characteristics being
performed in the relay menu.
Selection of the quadrilateral characteristic automatically disables the mho/lenticular
ground comparators, which are only automatically enabled if a failure occurs in the
quadrilateral comparators. Thus, the quadrilateral comparators are backed up by the
mho/lenticular comparators. This back-up feature is not available when the selection is
made of mho/lenticular for earth faults.

Section 4.

LFZP112 MODEL (18 C0MPARATORS)

This relay is recommended for the protection of medium and long, transmission lines
including heavily loaded lines, where load encroachment is to be avoided, as shown
in Figure 2, this relay has partially cross-polarised shaped mho characteristics for the
Zone 1 and Zone 2 units. This type of characteristics has a 'shield' shape when plotted
on the impedance plane, exhibiting a strong resistive expansion under fault conditions
for tolerance of arc-resistance.
A digitally generated synchronous memory system is used for partial polarisation on
three phase faults, to provide similar strong resistive expansion and to ensure correct
directional response for close-up faults.
The Zone 3 units have offset lenticular characteristics, which permit the relay to be
applied to long transmission lines. The lenticular shape has a variable aspect ratio,
including an offset circular setting. The Zone 3 may also be set as a reverse looking
shield characteristic for use in the Blocking schemes or for use in the Permissive
Overreach Scheme with Weak Infeed.

Service Manual
LFZP 11x

Section 5.

R5911D
Chapter 1
Page 4 of 89

LFZP114 MODEL ( 12 COMPARATOR)

It is a cost effective relay recommended for use when the application does not require
a response to faults in the reverse direction. The application of this relay does not
extend to busbar back-up and it has no facilities for use in schemes requiring Weak
Infeed, Blocking or Power Swing Blocking features.
As shown in Figure 3, this relay has partially cross-polarised shaped mho
characteristics for Zone 1 and Zone 2 units, which have a 'shield' shape when plotted
on the impedance plane, exhibiting strong resistive expansion under fault conditions
for tolerance of arc-resistance. A digitally generated synchronous memory system is
used for partial polarisation on three phase faults, to provide similar strong resistive
expansion and ensure correct directional response for close-up faults.
Application possibilities without the optional Directional Earth Fault protection includes
the use of phase selector for the Phase comparison scheme P10 to allow single pole
tripping. Also, with Zone 1 disabled, the relay can be used for back-up protection of
shunt reactors, or with the two zones enabled for the protection of power transformers
and transformer feeders.

Section 6.

LFZP113 MODEL (18 COMPARATORS)

This relay is intended for protection of underground cables feeders and, as shown in
Figure 4, has partially cross-polarised shaped mho characteristics for Zone 1 and
Zone 2. The relay has a lower minimum impedance setting to cater for the generally
lower impedance of cables per unit length and an extended range of residual
compensation setting angles. The Zone 3 has an offset lenticular characteristic with an
alternative setting for a reverse 'shield' mho characteristic. Directional Earth Fault
protection is available for this model for hybrid systems where the characterisitcs of the
overhead sections dominate. The Fault Locator option is available for this version,
primarily for metering purposes (see section 4.5.8 in chapter 2), as its accuracy for
power systems containing cable sections can not be guaranteed.

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 5 of 89

X
Z3
Z2
Z1Y
Z1X
Z1
R

Z3'

PHASE AND GROUND FAULTS

(a) WITH OFFSET ZONE 3


X
Z2
Z1Y
Z1X
Z1
R

Z3'

PHASE AND GROUND FAULTS

(b) WITH REVERSE ZONE 3


Figure 2 LFZP 112 Relay characteristics

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 6 of 89

Z2
Z1Y
Z1X
Z1

PHASE AND GROUND FAULTS


Figure 3 LFZP 114 Relay characteristics

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LFZP 11x

R5911D
Chapter 1
Page 7 of 89

X
Z3
Z2
Z1Y
Z1X
Z1
R

Z3'

PHASE AND GROUND FAULTS

(a) WITH OFFSET ZONE 3


X
Z2
Z1Y
Z1X
Z1
R

Z3'

PHASE AND GROUND FAULTS

(b) WITH REVERSE ZONE 3


Figure 4 LFZP 113 Relay characteristics

Service Manual
LFZP 11x

Section 7.

R5911D
Chapter 1
Page 8 of 89

DIRECTIONAL EARTH FAULTS

Available as an option on LFZP111, 112, 113 and 114, this additional feature as
shown in Figure 5 offers instantaneous and time delayed tripping at selectable current
levels. A choice of an aided tripping scheme, either permissive overreach or blocking
is also provided, sharing the same signalling channel as the distance scheme.
When required to co-ordinate with the earth fault distance time delayed zones, the
Directional Earth Fault protection should be set to definite time delayed tripping.
However, if co-ordination with the earth fault distance is not required, for example, the
earth fault distance time delayed zones are disabled, a choice may be made between
8 inverse overcurrent curves.
With the directional earth fault protection fitted and the distance time delayed earth
fault elements disabled, the relay can be used for phase fault distance plus directional
earth fault protection, an arrangement common in many parts of the world. The Zone
1 earth fault protection is retained to give independent earth fault protection for faults
within the protected section. To prevent any possibility of overreach caused by mutual
inductance with a parallel line earthed at both ends, the residual compensation may
be set to zero.
The directional element has an in-built choice of polarising signals, which can be
negative sequence voltage, zero sequence current, zero sequence voltage and dual
zero sequence current and voltage. The negative sequence voltage polarising is
particularly valuable, because it is unaffected by mutual induction from parallel
transmission circuits. Zero sequence voltage polarising is included for compatibility
with other protection relays. The operating quantity of the directional element can
either be zero sequence current or negative sequence current depending on the
method of polarising the directional element. Thus, with negative sequence voltage
polarisation, the operating quantity is negative sequence current, whereas for zero
sequence voltage and/or zero sequence current polarisation, the operating quantity is
zero sequence current.
In the scheme, the non-directional earth fault element operates on zero sequence
current, irrespective of the method of polarising the directional element. When
negative sequence voltage polarising is selected, an automatic check is made for the
presence of negative sequence fault current, since zero sequence current can be
induced by a fault in a parallel line.
The sensitivity of the forward looking directional element used in the aided schemes is
based on DEF.F and CRX only. The DEF Forward comparator can be enabled by
either low set or high set (LDLSID or LDHSID) level detectors. DEF reverse sensitivity is
based on the DEF LOWEST (LDLSID).
To guard against incorrect tripping caused by magnetizing inrush currents when
in-zone power transformers are present, a selectable magnetizing inrush guard feature
is fitted.

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 9 of 89

DEF T BU
DEF R
DEF F

B
DEF F
DEF R
DEF T BU

PERMISSIVE OVERREACH SCHEME

DEF T BU
DEF R
DEF F

B
DEF F
DEF R
DEF T BU

BLOCKING SCHEME

Figure 5 Simplified representation of scheme

Service Manual
LFZP 11x
7.1

R5911D
Chapter 1
Page 10 of 89

Negative sequence voltage polarisation


It is customary for directional earth fault relays to be operated by zero sequence
quantities. However, in multiple earthed systems, where the transmission lines are
operated in parallel, strung on the same tower or on adjacent towers, the circuits are
exposed to electromagnetic induction under earth fault conditions.
In power systems, the zero sequence mutual impedance between parallel circuits is
high, whereas the positive and negative mutual impedance is low. Consequently, zero
sequence current and voltage may be induced in a closed loop of a network by zero
sequence currents in an adjacent faulted line, even a line of different voltage, and
cause maloperation of directional earth fault relays.
Both zero sequence and negative sequence components are produced by the earth
fault, and it is possible therefore to use negative sequence components instead of the
customary zero sequence components to operate the directional element of an earth
fault relay, even though the overcurrent element is still operated by zero sequence
current.
The directional units of the DEF scheme are provided with this option and the use of
negative sequence voltage polarisation is recommended for the following applications:

Section 8.

a)

Parallel lines with galvanic isolation but with high mutual coupling, where
maloperation of directional earth fault relays supplied with zero sequence
components has been experienced.

b)

Parallel lines where the combination of source and line impedance for a
double phase to earth fault on one line, causes the positive and negative
sequence currents in the healthy line to flow in one direction and the zero
sequence current in the opposite direction. Thus, resulting in maloperation
of zero sequence polarised DEF schemes operating in the Permissive
Overreach mode and sharing with the distance scheme, a common
signalling channel.

SCHEMES AVAILABLE

With the compliment of a signalling channel, models LFZP111, LFZP112 and LFZP113
have a selection of twelve schemes, whereas model LFZP114 has a choice of six. Each
being suitable for either three phase or single/three phase tripping. The schemes
available are:
MODELS LFZP111, LFZP112 AND LFZP113
BASIC DISTANCE

Basic Distance

Z1 EXTENSION

Zone 1 Extension

PUR

Permissive Underreach

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R5911D
Chapter 1
Page 11 of 89

PUR UNBLOCK

Unblocking Permissive Underreach

POR 1

Permissive Overreach

POR 1 UNBLOCK

Unblocking Permissive Overreach

POR 2

Permissive Overreach with Zone 3


Reversed Reach and Weak Infeed
Echo

POR 2 UNBLOCK

POR 2 WI TRIP

Unblocking Permissive Overreach


with Zone 3 Reversed Reach and
Weak Infeed Echo
Permissive Overreach with Zone 3
Reversed Reach and Weak Infeed
Echo and trip

POR 2 WI TRIP UNBLOCK

Unblocking Permissive Overreach


with Zone 3 Reversed Reach and
Weak Infeed Echo and trip

BLOCKING
BLOCKING 2
MODEL LFZP114
BASIC

Basic Distance

Z1 EXTENSION

PUR

Zone 1 extension

PUR UNBLOCK

Unblocking Permissive Underreach

POR 1

Permissive Overreach

POR 1 UNBLOCK

Unblocking Permissive Overreach

Permissive Underreach

Service Manual
LFZP 11x
SECTION 9.
9.1

R5911D
Chapter 1
Page 12 of 89
TRANSMISSION LINES

Short transmission lines


The coverage of high values of arc-resistance and tower footing resistance will usually
be a problem for the mho characteristic, but one that can often be solved by the use of
the quadrilateral characteristic. There is, however, a limitation to the amount of
coverage that a quadrilateral characteristic can achieve, in terms of the length of line
to be protected and where those values fall short of the desired values, as in the case
of extreme high resistive earth faults, the quadrilateral characteristic can be
complemented with the Directional Earth Fault Scheme.
With short transmission lines, load encroachment problems are not common and the
mho characteristic will generally be found satisfactory for phase faults. For lines shorter
than 10km, overreaching schemes, with independent Zone 1 are invariably more
suitable than underreaching schemes. Also, parallel lines are frequent and the
possibility of current reversals, when the overreaching Zone 2 units are set to more
than 150% of the protected line length, needs to be considered for selection of the
appropriate distance scheme.

9.2

Long transmission lines


Load impedance encroachment into the operating characteristic of the distance relays
is usually the main consideration. This is a three phase balanced condition, which
invariably affects the Zone 3 reach of the distance relay and can be solved by the use
of the lenticular characteristic with a variable aspect ratio.
With long transmission lines, the diameter of the mho circle is sufficiently large to
cover high values of arc resistance along the R axis of the impedance diagram. Thus,
the mho characteristic, which is faster and simpler to produce, is invariably
recommended for the protection of phase and earth faults.
When the transmission lines are not provided with earth wires and extreme high
values of tower footing and arc resistance, well outside the reach of the mho
characteristic, need to be covered, the distance relays can be complemented with the
Directional Earth Fault Scheme.

Section 10.

UNDERGROUND CABLES

Underground cables differ from overhead lines in that their zero sequence impedance
angle can be vastly different from the positive sequence impedance angle. This angle
difference between the cable impedances can cause large errors in the measurement
of the earth fault units if the relay residual compensation is based on scalar
impedances only. To ensure correct measurement under earth fault conditions, the
relay needs to be compensated with both residual and a angular compensation, so
that the measurement is made along the earth loop impedance and not the positive
sequence impedance of the cable. These two methods of compensation are provided
in the Optimho relay.

Service Manual
LFZP 11x
Section 11.

R5911D
Chapter 1
Page 13 of 89

CHOICE OF ZONE 1 IMPEDANCE REACH

Although in most applications the reach accuracy of the relay distance comparators is
5%, greater errors can occur as a result of voltage and current transformer errors
and inaccuracies in line data from which the relay settings are calculated. To prevent
the possibility of relays tripping instantaneously for faults in the next line, it is usual
practice to set the Zone 1 reach of the relay to 80% of the protected line section and
rely on Zone 2 to cover the remaining 20% of the line. With a signal aided distance
scheme arrangement, the Zone 2 distance comparators could provide fast tripping at
both ends of the line for end zone faults.
Note Z2 must be set greater than or equal to Z1 when the Quadrilateral characteristic
is required.

Section 12.

ZONE 1 EXTENSION

When no signalling channel is available and high speed auto-reclose needs to be


used, the relay can be set in the Zone 1 extension mode and ensure that the circuit
breakers at the two ends of the line open instantaneously. If the Zone 1 extension
mode is used, it is usual practice to set the Zone 1 extension to 120% of the protected
line length. In Optimho, this is done via the Z1X settings.
Note Z2 must be set greater than or equal to Z1X when the Quadrilateral
characteristic is required.

Section 13.

REACH-STEPPED ZONES Z1X AND Z1Y

To cater for the possibility that more than three zones of protection may be required,
the relay is provided with the option of one or two additional reach-stepped zones,
which are obtained via the Zone 1 comparators by extending their reach from Zone 1
to Z1X and/or Z1Y after suitable time delays. The two timers are started by Zone 2
and Zone 3 comparators.

Section 14.

CHOICE OF ZONE 2 IMPEDANCE REACH

As a general rule, the Zone 2 impedance reach is set to cover the protected line plus
50% of the shortest adjacent line. The reasoning behind the value of 50% is that Zone
2 should be able to cover at least 20% of the adjacent line, even in the presence of
typical additional infeed at the remote terminal of the protected line.
One case of additional infeed at the remote terminal occurs when the protected line is
paralleled by another line. When a fault occurs in the adjacent line, approximately
equal currents will flow in each of the parallel lines. The relay on the protected line
looking towards the fault will see an impedance which will be the sum of the protected
line impedance, plus twice the impedance of the adjacent line to the fault. If the Zone
2 reach is set to cover 50% of the adjacent line impedance, then in this parallel infeed
case, Zone 2 will effectively cover 25% of the adjacent line.

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LFZP 11x

R5911D
Chapter 1
Page 14 of 89

In most situations, if the relay reaches 20% into the adjacent line, then faults at the
remote terminal of the protected line will be well within Zone 2 reach and so fast
operation of the Zone 2 comparators will be achieved. This is important if signal aided
tripping schemes are used.
In some situations where the protected line is long and the adjacent line is short, then
a 50% reach into the adjacent line will only be a very small overreach of the protected
line. If the protected line is paralleled by another line, then it may be that the zero
sequence mutual coupling between the two lines will be sufficient to prevent the Zone
2 comparators from seeing an earth fault at the remote terminal of the line until the
remote circuit breaker trips, preventing earth fault current flowing in the healthy
parallel circuit. In such a case, the Zone 2 setting may need to be increased slightly, to
avoid sequential or time delayed clearance of the fault at the terminal remote from the
fault.
In a parallel line situation, a fault on one line which is cleared sequentially can cause
a fault current reversal in the healthy line. If the Zone 2 settings are greater than 150%
of the protected line impedance and the Permissive Overreach, Unblocking or
Blocking scheme is used, then a fault current reversal in the healthy circuit could cause
that circuit to be incorrectly tripped unless special steps are taken. The Permissive
Overreach, the Unblocking and the Blocking schemes have been designed with
current reversal guards to prevent such maloperations. The operation of these current
reversal guards is explained in detail later, when considering some logic timer
settings. It is also recommended that Z2 reach is set such that it cannot see through a
star-delta transformer located at the remote end of the line.

Section 15.

CHOICE OF ZONE 3 IMPEDANCE REACH

The Zone 3 forward reach should normally be set to 1.2 times the sum of the protected
line impedance and the impedance of the longest adjacent line in order to provide an
overall time delayed back-up protection. The reverse Zone 3 offset provides back-up
protection for the busbars behind the relay and would typically be set to 25% of the
Zone 1 setting for short transmission lines (up to 30km) and 10% for long transmission
lines.
When the Blocking or Permissive Overreach with Weak Infeed scheme is being used,
Zone 3 is required to provide a blocking function when it operates without Zone 2 to
prevent the protection scheme operating for external faults. The reverse Zone 3 reach
in this case must be set to reach further than Zone 2 of the relay at the opposite end of
the line. It must also ensure that any resistive faults behind the relay that are seen by
Zone 2 of the remote end relay are also seen by the Zone 3 of the local relay, to
prevent tripping of the healthy line for external faults. As a general guide for the above
applications, it is recommended that the reverse Zone 3 reach be set directionally in
the reverse direction to the same value as the Zone 2 setting of the remote end relay.
However, if preferred, the blocking scheme Zone 3 reach can also be set
non-directionally with an offset.

Service Manual
LFZP 11x

Section 16.

R5911D
Chapter 1
Page 15 of 89

POWER SWING BLOCKING (PSB)

The Power Swing Blocking feature can be selected by means of the relay menu
displayed on the LCD indicator to any of the following conditions:
a)
b)
c)

Power Swing Blocking feature disabled


Power Swing Blocking feature set to indication only
Power Swing Blocking feature set to indication plus blocking of any
one or more selected zones.

The inner Power Swing Blocking impedance characteristic is formed by the A-B Zone 3
or Zone 2 phase fault characteristic. The additional Power Swing Blocking starter
characteristic Zone 6 is set concentric with the Zone 3 characteristic, as shown in
Figure 6a, when it is set in the forward direction as an offset lenticular/mho, but it is
set concentric with the Zone 2 mho characteristic, as shown in Figure 6b when the
Zone 3 is set reverse looking as a directional mho.
If the power system A-B phase impedance locus enters the operating area of the starter
characteristic, which has an adjustable timer setting of 20-90 milliseconds but
normally set at 50 milliseconds, and takes longer than this value to pass into the fault
characteristic, then the Power Swing Blocking unit will block the selected zones if the
A-B phase impedance does eventually pass into the fault characteristic area.
It is important to note that when the Zone 3 is set forward looking, the PSB unit is
controlled by the Zone 3 characteristic, but when the Zone 3 is set reverse looking, the
PSB unit is controlled by the Zone 2 characteristic. The purpose of the reverse looking
Zone 3 in the blocking scheme being simply to control the signal transmission and in
the Permissive Overreach scheme the Weak Infeed and current reversal guard logic.
The reversed looking Zone 3 can be selected to provide time delayed back-up if
required.
When the Power Swing Blocking feature is used, it is necessary to ensure that the
phase fault characteristic will not allow the starting characteristic to encroach into the
minimum load impedance. A minimum of 10% safety margin should be maintained
between the Power Swing Blocking starter characteristic and the minimum load
impedance.
The Power Swing Blocking feature is overridden under the following power system
conditions:
a)
b)

In the presence of an earth fault or a phase to phase fault when the


DEF option is fitted
In the presence of an earth fault when the DEF option is not fitted.

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R5911D
Chapter 1
Page 16 of 89

Z6R

Z3R

Z1

Z2 Z3F

(a) WITH ZONE 3 FORWARD LOOKING

Z3R

Z6R

Z1

Z2 Z6F

(b) WITH ZONE 3 REVERSE LOOKING

Figure 6 Power swing blocking relay

Z6F

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R5911D
Chapter 1
Page 17 of 89

It is important to note that when Power Swing Blocking and DEF are provided with the
distance scheme, but the DEF is not used, it is essential to set the 3Io (low set) current
level detector, which is ganged to the I2 current level detector required to override the
Power Swing Blocking unit under fault conditions.
The recommended settings for the Power Swing Blocking characteristic Zone 6 forward
and reverse reach can be obtained from the following expressions:
With Zone 3 set looking in forward direction:
Zone 6 forward reach = 1.3 x Zone 3 forward reach
Zone 6 reverse reach = 0.3 x Zone 3 forward reach + Zone 3
reverse reach
With Zone 3 set looking in the reverse direction:
Zone 6 forward reach = 1.3 x Zone 2 forward reach
Zone 6 reverse reach = 0.3 x Zone 2 forward reach
With these impedance settings, the recommended timer setting TZ6 is 50ms.
When a zone is blocked during a power swing the blocking is performed at the input
to the scheme logic, i.e. the scheme logic effectively does not register operation of the
blocked zone. As a consequence, all functions derived from the blocked zones, e.g.
signal send, start contacts etc. will also be inhabited during the swing condition.

Section 17.

RESISTIVE REACH OF QUADRILATERAL CHARACTERISITC

The resistive reach should be set to cover the desired level of earth fault resistance,
which would comprise arc-resistance and tower footing resistance. A 10% impedance
margin should be observed between the resistive reach and the minimum load
impedance.
In addition, to ensure Zone 1 reach accuracy the resistive reach should not be greater
than 15 times the Zone 1 ground loop reach, for single-point grounded radial
distribution systems. A maximum of 4 times the Zone 1 ground loop reach is
recommended for multiple grounded systems.
17.1

Automatic compensation of quadrilateral reach line angle


For the quadrilateral earth fault characteristic, the phase current is in phase with the
resistive axis of the R-X diagram. The reach line for the Zone 1 characteristic is in
phase with the residual or neutral current measured (with a -3 droop). Thus, if there is
a difference in angle between the measured phase current and neutral current, then
the Zone 1 reach line will be at a corresponding angle to the resistive axis. This
feature ensures that resistive earth faults on a double-end fed loaded system will not
result in underreach or overreach of the relay.
The Zone 2 and Zone 3 reach lines and the Zone 3 offset lines are in phase with the
resultant angle of the measured neutral current, plus the relevant phase current.

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R5911D
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Page 18 of 89

A qualitative analysis of the purpose of reach line compensation for Zone1 is given in
Figure 7.

Section 18.

CHOICE OF ASPECT RATIO

The Zone 3 aspect ratio of the lenticular characteristic will need to be adjusted when it
is envisaged that there will be load encroachment problems on the Zone 3 or Power
Swing Blocking starter characteristic for a long line application. The Zone 3 aspect
ratio a/b should be set so that with the required Zone 3 forward and reverse reach
settings, the Zone 3 characteristic or, if used, the Power Swing Blocking starter has a
10% safety margin separating it from the load impedance region.

Section 19.

CHOICE OF RELAY CHARACTERISTIC ANGLES

Maximum accuracy and sensitivity is obtained by setting the relay angle THETA Ph
equal to or to the nearest setting of the line positive sequence angle /ZL1 and THETA
N equal to or to the nearest value of /KN.ZL1 where KN is the residual compensation
factor.

Section 20.

ZONE TIME DELAY SETTING

The time settings TZ2 and TZ3 determine the time delay from detection of a fault by the
relevant zone to the operation of the trip output unit.
The relay operates for the majority of Zone 1 faults within 16-30 milliseconds. The
Zone 2 time delay should be set to allow for the longest Zone 1 operating time, or if
applicable the longest aided trip time and the circuit breaker operating times.
Generally, a Zone 2 time delay setting of 0.2-0.3 seconds is satisfactory, but longer
times may be required if the Zone 2 overlaps slower forms of protection.
Zone 3 is generally intended to provide back-up protection, even if it is being used as
a reverse 'looking' blocking element. It may be overlapping other forms of protection
such as Inverse Definite Minimum Time overcurrent relays. The Zone 3 time delay will
depend on the system to which the relay is applied, but in any case it will be longer
than the Zone 2 time delay and will typically have a setting of one second.

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PRE-FAULT
POWER FLOW
A

R
jX

RF
B

KRF
x

(a) PREVENTING ZONE - 1 OVERREACH


PRE-FAULT
POWER FLOW
B

R
RF

jX
B
x
KRF

(b) PREVENTING ZONE - 1 UNDERREACH


Figure 7

Principle of Zone 1 reach line angular compensation

Service Manual
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Section 21.

R5911D
Chapter 1
Page 20 of 89

SWITCH ON TO FAULT TRIPPING FEATURE (SOFT)

This feature is enabled by the scheme logic when the line circuit breaker has been
open for a certain time. To determine whether the line circuit breaker is open, the relay
"looks" for an "All Poles Dead" condition (voltage and level detectors have reset on
each phase). For the case where a busbar VT is used "pole dead" signals will not be
produced, but a normally closed circuit breaker auxiliary contact can be used via an
opto-isolator input, to inform the relay that the circuit breaker is open.
For single pole tripping applications, the circuit breaker auxiliary contacts of each
breaker pole should be wired in series and connected to the relay, so that the relay is
made aware that all three poles of the breaker are open.
The SOTF feature becomes enabled 200 milliseconds or 110 seconds after the relay
detects the local circuit breaker has opened, depending on the setting of an option in
the relay menu display.
In the majority of applications, the SOTF enable timer will be set to 200 milliseconds,
so that the feature will be available as soon as possible after the line becomes dead.
With this short time setting, the SOTF feature will be enabled during auto-reclose dead
time, so that upon reclosure a SOTF trip is possible. This is usually advantageous for
most distance schemes, since a persistent fault at the remote end of a protected line
section can be cleared instantaneously after reclosure of the local breaker, rather than
after Zone 2 time delay.
When it is desired that a SOTF trip indication is not given after auto-reclosure, or two
shot auto-reclose is used, then the 110 seconds SOTF enable timer option should be
used. This will ensure that the SOTF feature could not be enabled during the
auto-reclose dead time. If a SOTF trip was allowed to occur on auto-reclosure, the
distance relay would also give a 'block auto-reclose' signal to the auto-reclose relay
and any second auto-reclose shot would be prevented.
SOTF tripping is only possible for the initial 250 milliseconds after the circuit breaker
closure. During this time, an instantaneous trip can occur in line with the selection
made in the relay menu. The three options available are:
a)

Tripping via the operation of any distance comparator.

b)

Tripping via the operation of any current level detector provided that its
corresponding voltage level detector has not picked up within 20ms.

c)

Tripping via the operation of any distance comparator or any current level
detector provided that its corresponding voltage level detector has not
picked up within 20ms.

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With the relay set to give a SOTF trip for any distance comparator operation, then any
fault existing on the protected line, including a close-up three phase bolted fault would
be cleared. For the latter fault, where line voltage transformers are used, there would
be no memory voltage to allow Zone 1 or Zone 2 distance comparator operation, but
Zone 3 will operate if set forward looking as it has an offset to cover the busbars.
When the Zone 3 is set reverse looking, as a directional mho, the SOTF should be set
to give a trip via any current level detector as the Zone 3 comparators would not
operate for a close-up three phase fault on the protected line. Faults at the remote end
of the line will also be cleared instantaneously by a SOTF trip when the local circuit
breaker is closed.
In some situations, it may be possible for the magnetizing inrush current of banked
transformers at the end of a line or particularly of teed-off transformers, to cause
transient operation of the Zone 3 comparators on line energisation, resulting in an
incorrect SOTF trip. In such a situation, the SOTF trip option should be chosen, so that
SOTF tripping will only occur when a current level detector picks up without the
corresponding voltage level detector picking up.

Section 22.

SELECTION OF SCHEME LOGIC PROGRAMS

With the relay cover off, the distance scheme logic programs are selected by using the
keypad and liquid crystal display on the front of the relay case. Operation of the
horizontal and vertical keys on either side of the centre SET key will gain access into
the relay menu structure and enable the user to set the relay scheme logic and settings.
With the relay cover on, access to the keypad is prevented, but it is possible to read
the relay settings and reset the relay via the two through cover push buttons labelled
'ACCEPT/READ' and 'RESET'.

Section 23.
23.1

SCHEME LOGIC APPLICATION GUIDE

Basic distance
(See Figure 8)
Generally applied when no auto-reclose is used
The scheme can be used without a signalling channel
The scheme is suitable for single circuit and double circuit lines fed from either one
or both ends
A major disadvantage is that not all faults within a protected section can be cleared
instantaneously
It can be provided with up to five zones by the use of three independent zones and
two optional reach-stepped zones

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R5911D
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Page 22 of 89

Zone 1 extension
(See Figure 9)
Generally applied when no signalling channel is available and high speed
auto-reclose is used
Normally the Zone 1 comparators reach is extended to overreach the remote end
of the protected line by the action of the Z1X reach-stepped zone which is set to
cover 120% of the protected line length
After a fault clearance, the auto-reclose relay gives a reset signal to the zone
extension logic so that the Zone 1 comparators fall back to normal Zone 1 reach
setting of 80% of the protected line
On the basis that most overhead line faults are transient in duration, the scheme will
allow fast clearance of most faults along the protected line and also those just outside
the line. Lack of discrimination is generally accepted as reclosure of the circuit
breakers will take place and the power system network restored if the fault was
transient. In the event of a permanent fault, upon reclosure the faulted line will be
taken out of service by the distance protection as in the BASIC scheme.
The scheme would not normally be used for cable circuits, although its use might be
considered for hybrid circuits
It can be provided with up to five zones by the use of three independent zones and
two reach-stepped zones

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ZONE 3
ZONE 2
ZONE 1Y
ZONE 1X
ZONE 1

Z
ZONE 1
ZONE 1X
ZONE 1Y
ZONE 2
ZONE 3

RELAY A
Z1,(Z1X),(Z1Y)

RELAY B

TRIP A

TRIP B

Z1,(Z1X),(Z1Y)

Z2

Z3

Z2
TZ2

TZ2

TZ3

TZ3

TZ1X

Z1

Z1X

Z1X

Z1

TZ1X

TZ1Y

Z1

Z1Y

Z1Y

Z1

TZ1Y

Figure 8 Basic simplified distance scheme logic

Z3

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ZONE 3
ZONE 2
ZONE 1Y
ZONE 1X

Z1 EXT

ZONE 1

Z
ZONE 1

Z1 EXT
ZONE 1X
ZONE 1Y
ZONE 2
ZONE 3

Z1,(Z1X),(Z1Y)

TRIP A

TRIP B

Z1,(Z1X),(Z1Y)

Z2

Z3

Z2
TZ2

TZ2

TZ3

TZ3
RESET Z1 EXT.

TZ1X

TZ1Y

Z1

Z1

Z1 EXT,Z1X

Z1Y
RESET Z1 EXT.

Z1X,EXT Z1

Z1

Z1Y

Figure 9 Zone 1 Ext. simplified distance scheme logic

TZ1X

Z1

TZ1Y

Z3

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Permissive underreach scheme PUR


(See Figure 10)
This scheme requires one signalling channel for both relays as channel is keyed by
the underreaching Zone 1 comparators within their Zone 1 reach only
Provided the underreaching Zone 1 comparators reach 'overlap', fast clearance of
faults along the whole of the protected line will be effected
If a line terminal is open, then fast tripping will only occur for faults within the Zone
1 reach of the closed end relay
If the signalling channel fails, the line relays will still provide BASIC protection
Fast clearance will not occur for all faults along the protected line if there is little or
no infeed at one terminal
The aided trip logic is performed via the Zone 2 comparators and the signal
receive input
Send logic Z1
Permissive trip logic Z2 + CRX

23.4

Permissive schemes unblocking logic


The permissive tripping schemes (both underreach and overreach) used with Power
Line Carrier may be required to transmit the permissive trip signal via a fault in the
protected line. The signal will, therefore, be attenuated or shorted out by the fault. This
problem can be alleviated by using a frequency shift communication channel to enable
the permissive tripping scheme to operate in the unblocking mode.
In the normal state, the communication equipment transmits a continuous guard (block)
frequency which is automatically changed to the trip (unblock) frequency under fault
conditions when the associated distance scheme comparator operates.
The Permissive tripping schemes are converted from the standard to the Unblocking
mode by the addition of the Communication receive logic shown in Figure 11. This
logic requires a permissive trip signal input CRX and a loss of guard signal input LGS
from the communication equipment.
When a fault occurs on the protected line and the distance scheme comparator that
controls the action of the transmitter operates, it causes the Communication equipment
to change the transmitted signal from the guard to the trip frequency, which when
received at the remote end produces a CRX1 output in the unblocking

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ZONE 3
ZONE 2
ZONE 1Y
ZONE 1X
ZONE 1

Z
ZONE 1
ZONE 1X
ZONE 1Y
ZONE 2
ZONE 3

CRX
Z1

SIGNALLING

CRX
Z1

CHANNEL
CTX

CTX

&

&

Z1,(Z1X),(Z1Y)

TRIP A

TRIP B

Z1,(Z1X),(Z1Y)

Z2

Z2
TZ2

Z3

TZ2

RELAY A

TZ3

RELAY B

TZ3

TZ1X

Z1

Z1X

Z1X

Z1

TZ1X

TZ1Y

Z1

Z1Y

Z1Y

Z1

TZ1Y

Figure 10 PUR Simplified distance scheme logic

Z3

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Figure 11 Unblocking communication receive logic for permissive schemes

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communication receive logic. This signal when passed to the distance scheme logic
provides an immediate trip if the associated Zone 2 comparator had operated.
In the Permissive Overreach scheme, this condition will also produce output CRX2 to
permit tripping via the DEF scheme, if used to complement the distance scheme for
high resistance faults.
In the event of the permissive trip signal being shorted out by an internal fault, both the
guard and the trip signals would be lost. Under this condition, the communication
receive logic will give a permissive trip output via CRX1 for a short period, lasting from
the time setting of TDW (0-98 milliseconds) to the time setting of T2 (150 milliseconds)
after which the PSD line goes high and the permissive distance scheme is disabled.
The time delay of TDW is necessary in order to prevent the possibility of spurious
tripping during transient loss of guard signal (set typically to 10 milliseconds). To
activate the scheme, the guard signal must be present for the time of T1 (200ms).

23.5

Permissive Overreach Scheme POR 1


(Forward Looking Zone 3 Figure 12)
This scheme requires a duplex signalling channel, using one frequency for each
line end as the channel transmission is controlled by the overreaching Zone 2
comparators.
This scheme may be more advantageous than the permissive underreach scheme
for the protection of short transmission lines, as the resistive coverage of the Zone 2
comparators would be greater than that of the Zone 1 comparators which would
be set to a lower ohmic reach.
To provide high speed tripping when a line terminal is open, a 'signal echo
feature' is included in the scheme logic, which is initiated when a line terminal
circuit breaker is open (circuit breaker auxiliary contact initiation). By this means,
the permissive overreach scheme is able to provide fast tripping for any fault along
the whole length of the line.
To cater for the protection of parallel lines where the Zone 2 comparators are set to
reach longer than 150% of the protected line, current reversal guards TP and TD
are used in order to prevent the possibility of maloperation on current reversals
produced by sequential opening of circuit breakers.
If the signalling channel fails, the permissive overreach scheme will operate in the
conventional basic mode.
Send logic Z2
Permissive trip logic Z2 + CRX
Open terminal echo : CB open + CRX

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ZONE 3
ZONE 2
ZONE 1Y
ZONE 1X
ZONE 1

Z
ZONE 1
ZONE 1X
ZONE 1Y
ZONE 2
ZONE 3

CRX

CRX
CB
OPEN

&

CTX

SIGNALLING
CHANNEL

CTX

&

&

&

Z1,(Z1X),(Z1Y)

TRIP A

TRIP B

Z1,(Z1X),(Z1Y)

Z2

Z2
TZ2

Z3

TZ2

RELAY A

TZ3

Figure 12

CB
OPEN

RELAY B

TZ3

TZ1X

Z1

Z1X

Z1X

Z1

TZ1X

TZ1Y

Z1

Z1Y

Z1Y

Z1

TZ1Y

POR 1 Simplified distance logic scheme

Z3

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Page 30 of 89

Permissive overreach scheme POR 2


(Reverse Looking Zone 3 Figure 13)
This scheme requires a duplex signalling channel using one frequency for each line
end as the channel transmission is controlled by the overreaching Zone 2
comparators
This scheme may be more advantageous than the permissive underreach scheme
for the protection of short transmission lines, as the resistive coverage of the Zone 2
comparators would be greater than that of the Zone 1 comparators which would be
set to a lower ohmic reach
To provide high speed tripping when a line terminal is open, a 'signal echo' feature
is included in the scheme logic, which is initiated when a line terminal circuit
breaker is open (circuit breaker auxiliary contact initiation). By this means, the
permissive overreach scheme is able to provide fast tripping for any fault along the
whole of the line
To cater for high speed current reversals in double circuit lines, when both the
protective relays and the circuit breakers are exceptionally fast, the possibility of
maloperation, due to the sequential opening of circuit breakers is prevented by the
use of a reversed looking Zone 3
To allow fast tripping at the sending end, in the event of a weak infeed at the
remote end, a weak infeed logic is used to echo the received signal back if the
reversed Zone 3 has not operated.
If the signalling channel fails, the permissive overreach scheme will operate in the
conventional basic mode, except that the Zone 3 is reversed
Send logic Z2
Permissive trip logic Z2 + CRX
Open terminal echo : CB Open + CRX
Weak infeed echo : No comparator operation + CRX

23.7

Permissive overreach scheme POR 2 WI Trip


(Reverse Looking Zone 3 And Weak Infeed Trip Figure 14)
This scheme requires a duplex signalling channel using one frequency for each line
end as the channel transmission is controlled by the overreaching Zone 2
comparators
This scheme may be more advantageous than the permissive underreach scheme
for the protection of short transmission lines, as the resistive coverage of the Zone 2
comparators which would be greater than that of the Zone 1 comparators which
would be set to a lower ohmic reach

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ZONE 3

ZONE 2
ZONE 1Y
ZONE 1X
ZONE 1

Z
ZONE 1
ZONE 1X
ZONE 1Y
ZONE 2
ZONE 3

Z3

Z3

&
CB
OPEN

&

CRX

CRX

CTX

CTX

SIGNALLING
CHANNEL

&
1

&
&

&
Z1,(Z1X),(Z1Y)

Z1,(Z1X),(Z1Y)

TRIP A

TRIP B

Z2

Z2
TZ2

Z3

Figure 13

CB
OPEN

TZ2

RELAY A

TZ3

RELAY B

TZ3

TZ1X

Z1

Z1X

Z1X

Z1

TZ1X

TZ1Y

Z1

Z1Y

Z1

Z1Y

TZ1Y

Z3

POR 2 Simplified distance scheme logic with Zone 3 reversed reach and
weak infeed echo

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ZONE 3

ZONE 2
ZONE 1Y
ZONE 1X
ZONE 1

Z
ZONE 1
ZONE 1X
ZONE 1Y
ZONE 2
ZONE 3

&

CB
OPEN

&

CTX

&

CRX

CRX

SIGNALLING
CHANNEL

CTX

CB
OPEN

&

Z3

Z3

LDOV

&

&

&

&

Z1,(Z1X),(Z1Y)

TRIP A

TRIP B

Z1,(Z1X),(Z1Y)
Z2

Z2
TZ2

Z3

Figure 14

LDOV

TZ2

RELAY A

TZ3

RELAY B

TZ3

TZ1X

Z1

Z1X

Z1X

Z1

TZ1X

TZ1Y

Z1

Z1Y

Z1Y

Z1

TZ1Y

Z3

POR 2 WI TRIP Simplified distance scheme logic with Zone 3 reversed


reach and weak infeed echo and trip

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To provide a high speed tripping when a line terminal open, a 'signal echo feature' is
included in the scheme logic which is initiated when a line terminal circuit breaker is open
(circuit breaker auxiliary contact initiation). By this means, the permissive overreach
scheme is able to provide fast tripping for any fault along the whole length of the protected
line.
To cater for high speed current reversals in double circuit lines when both the
protective relays and the circuit breakers are exceptionally fast, the possibility of
maloperation, due to the sequential opening of circuit breakers, is prevented by the
use of a reverse looking Zone 3.
To allow fast tripping at the sending end, in the event of a weak infeed at the
remote end, a weak infeed logic is used to echo the received signal back, if the
reversed Zone 3 has not operated.
An additional check that a voltage level detector (LDOV) has reset is necessary to
allow tripping at the weak infeed terminal after a short time delay.
If signalling channel fails, the Permissive Overreach Scheme will operate in the
conventional basic mode, except that the Zone 3 is reversed.
Send logic Z2
Permissive trip logic Z2 + CRX
Open terminal echo : CB open + CRX
Weak infeed echo : No comparator operation + CRX
Weak infeed trip : No comparator operation + LDOV reset + CRX

23.8

Blocking scheme
(See Figure 15)
This scheme requires only one signalling channel for both relays.
It uses a reverse looking Zone 3 to send the carrier signal to the remote end to
block the operation of the overreaching Zone 2.
The advantage of this scheme is that only one carrier frequency is required to
initiate blocking at both line terminals regardless of which terminal detected the
fault to be in the reverse direction and that the blocking signal is transmitted over a
healthy line.
This scheme will provide similar resistive coverage as the permissive overreach
scheme.
If a line terminal is open, fast tripping will still occur for faults along the whole of the
protected line length.

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ZONE 3
ZONE 2
ZONE 1Y
ZONE 1X
ZONE 1

Z
ZONE 1
ZONE 1X
ZONE 1Y
ZONE 2
ZONE 3

CRX

&

SIGNALLING

CRX

CHANNEL
CTX

CTX

&

&

&

Z1,(Z1X),(Z1Y)

TRIP A

TRIP B

Z1,(Z1X),(Z1Y)

Z2

Z2
TZ2

Z3

Figure 15

TZ2

RELAY A

TZ3

RELAY B

TZ3

TZ1X

Z1

Z1X

Z1X

Z1

TZ1X

TZ1Y

Z1

Z1Y

Z1Y

Z1

TZ1Y

Blocking simplified distance scheme logic

Z3

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If the signalling channel fails, fast tripping will occur for faults along the whole of
the protected line, but also for some faults within the next line section.
If the signalling channel is taken out of service, the blocking scheme will operate in
the conventional basic mode, except that Zone 3 is reversed.
Fast tripping will still occur at a strong source line end, for faults along the protected
line section, if there is a weak or no infeed at the other end of the protected line.
Send logic : Reverse Z3 + not Z2
Trip logic : Z2 + not CRX

23.9

Blocking 2 scheme
(See Figure 15B)
This scheme requires only one signalling channel for both relays. The use of a
duplex channel requires a larger setting on scheme timer TD.
It uses a reverse looking Zone 3 to send the carrier signal to the remote end to
block the operation of the overreaching Zone 2.
The advantage of this scheme is that only one carrier frequency is required to
initiate blocking at both line terminals regardless of which terminal detected the
fault to be in the reverse direction and that the blocking signal is transmitted over a
healthy line.
This scheme will provide similar resistive coverage as the permissive overreach
scheme.
If a line terminal is open, fast tripping will still occur for faults along the whole of the
protected line length.
If the signalling channel fails, fast tripping will occur for faults along the whole of
the protected line, but also for some faults within the next line section.
If the signalling channel is taken out of service, the blocking 2 scheme will operate
in the conventional basic mode, except that Zone 3 is reversed.
Fast tripping will still occur at a strong source line end, for faults along the protected
line section, if there is a weak or no infeed at the other end of the protected line.
Dual contact arrangement for start/stop control of the signalling channel. Both
contacts are normally open.

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ZONE 3
ZONE 2
ZONE 1Y
ZONE 1X
ZONE 1

Z
ZONE 1
ZONE 1X
ZONE 1Y
ZONE 2
ZONE 3

CRX

CRX

START

STOP

CTX

SIGNALLING
CHANNEL

START

STOP

CTX

&

&

Z1,(Z1X),(Z1Y)

Z2

Z3

Figure 15B

TRIP A

TRIP B

Z1,(Z1X),(Z1Y)

TZ2

TZ2

RELAY A

TZ3

RELAY B

TZ3

TZ1X

Z1

Z1X

Z1X

Z1

TZ1X

TZ1Y

Z1

Z1Y

Z1Y

Z1

TZ1Y

Blocking 2 simplified distance scheme logic

Z2

Z3

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Signal transmission is maintained at the sending end to ensure security against


maloperation durring current reversal conditions.
May be suitable for use with some electro-mechanical relays but some care is
required in determining compatibility and the settings.
Carrier Send logic : Reverse Z3 + not Z2
Carrier Stop logic : Z2 + not TD
Trip logic : Z2 + not CRX

Section 24.

HIGH RESISTANCE EARTH FAULTS

There is a limit to the amount of arc resistance and tower footing resistance that can be
adequately covered by distance relays, since the coverage is limited by the ohmic
reach of the distance relay. If extremely high values of ground fault resistance are
expected, then an optional directional comparison earth fault scheme (DEF) with time
delay back-up features can be added to complement the distance scheme.
24.1

DEF permissive overreach scheme


(See Figure 16)
The DEF and the distance scheme share a common signalling channel, both
operating in the same mode.
Separate frequencies are needed for each line end, as the signal transmission is
initiated by the forward looking directional earth fault comparator.
Time delayed back-up protection provided to cover uncleared earth faults, which
can be set to provide nine different characteristics for co-ordination with other earth
fault relays.
The DEF scheme provides three phase tripping only, but if the distance scheme has
been selected for single and three phase tripping, any single phase to earth fault
seen by both the DEF and the distance scheme will result in a single phase trip via
the distance scheme.
Send logic DEF F
Trip logic DEF F + CRX

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DEF T BU
DEF F

B
DEF F
DEF T BU

CRX

CRX

CTX

SIGNALLING
CHANNEL

RELAY A

DEF F

&

RELAY B
AIDED
TRIP

AIDED
TRIP

1
T

Figure 16

CTX

TRIP A

TRIP B

DEF
BU TRIP

DEF permissive overreach scheme

&

1
DEF
BU TRIP

DEF F

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DEF Blocking Scheme


(See Figure 17)
The DEF and the distance scheme share a common signalling channel, both
operating in the same mode.
A common single frequency only is needed, as the signal transmission is initiated
by the reverse looking directional earth fault comparator.
Time delayed back-up protection is provided to cover uncleared ground faults,
which can be set to provide nine different characteristics for co-ordination with
other ground relays.
The DEF scheme provides three phase tripping only, but if the distance scheme has
been selected for single and three phase tripping, any single phase to earth fault
'seen' by both the DEF and the distance scheme will result in a single phase trip via
the distance scheme.
Send logic DEF R
Trip logic DEF F + not CRX

24.3

DEF blocking 2 scheme


(See Figure 17B)
The DEF and the distance scheme share a common signalling channel, both
operating in the same mode.
A common single frequency only is needed, as the signal transmission is initiated
by the non directional level detector (LDLSI0) and/or the reverse looking directional
earth fault comparator (DEF_R) and stopped by the forward looking directional
earth fault comparator (DEF_F). The use of a duplex channel would require larger
settings on scheme timers TPG and TDG.
Time delayed back-up protection is provided to cover uncleared ground faults,
which can be set to provide nine different characteristics for co-ordination with
other ground relays.
The DEF scheme provides three phase tripping only, but if the distance scheme has
been selected for single and three phase tripping, any single phase to earth fault
'seen' by both the DEF and the distance scheme will result in a single phase trip via
the distance scheme.
Dual contact arrangement for start/stop control of the signalling channel. Both
contacts are normally open.

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DEF T BU
DEF R
DEF F

B
DEF F
DEF R
DEF T BU

CRX
DEF R

DEF F

&

CTX

Figure 17

CHANNEL

CRX
DEF R
CTX

AIDED
TRIP

1
AIDED
TRIP

1
T

SIGNALLING

DEF
BU TRIP

DEF blocking scheme

TRIP A

TRIP B

&

1
DEF
BU TRIP

DEF F

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 41 of 89

LDLS1O
DEF T BU
DEF R
DEF F

B
DEF F
DEF R
DEF T BU
LDLS1 O

CRX

CRX
LDLS1 O

START

START
CTX

CTX

1
DEF F

&

STOP

STOP

SIGNALLING
CHANNEL

AIDED
TRIP

DEF
BU TRIP

Figure 17B DEF 2 blocking scheme

AIDED
TRIP

1
T

LDLS1 O

TRIP A

TRIP B

&

1
DEF
BU TRIP

DEF F

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 42 of 89

Signal transmission is maintained at the sending end to ensure security against


maloperation during current reversal conditions
May be suitable for use with some electro-mechanical relays but some care is
required in determining compatibility and the settings.
Carrier Send logic : LDLSI0
Carrier Stop logic : DEF_F + not TDG
Trip logic : DEF_F + not CRX

Section 25.

CURRENT REVERSAL LOGIC

In double circuit lines, the fault current distribution changes when circuit breakers open
sequentially to clear the fault. With one terminal line open, the change in current
distribution can cause the directionally looking distance comparators to see the fault in
the opposite direction to the direction in which the fault was initially detected. This can
cause the Permissive Overreach, the Blocking and the DEF schemes to trip the healthy
line due to the contact race between one set of directional comparators resetting and
the other set operating.
A typical system configuration that could result in current reversals is shown in Figure
18 for a fault on line L1 close to circuit breaker B with all the circuit breakers closed,
which after circuit breaker B has opened, causes the direction of current flow in line L2
to be reversed.
25.1

Permissive overreach scheme POR 1


(See forward looking Zone 3 Figure 19)
The current reversal guard incorporated in the scheme logic is initiated when a healthy
line relay receives a permissive trip signal, but does not have a Zone 2 comparator
operated. A delay on pick up TP in the current reversal guard timer is necessary in
order to allow time for the Zone 2 comparators to operate, if they are going to do so
for an internal fault.
Recommended TP setting = 30ms - minimum signalling channel operating time ms.
Once the current reversal guard timer has operated, the healthy line relay D transfer
tripping is inhibited. The reset of the guard timer is initiated by either the loss of the
permissive trip signal or by the operation of the Zone 2 comparators. A time delay TD
for the reset of the current reversal guard timer is required in case the Zone 2
comparator at end D operate before the permissive trip signal from the relay at end C
has reset, which could cause the relays on the healthy line to maloperate.
Recommended TD setting = maximum signalling channel reset time ms + 35ms.

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 43 of 89

FAULT
A

STRONG
SOURCE

L1

L2

WEAK
SOURCE

FAULT
A

L1

L2

NOTE HOW AFTER CIRCUIT BREAKER B ON LINE L1 OPENS


THE DIRECTION OF CURRENT FLOW IN LINE L2 IS REVERSED.
Figure 18 Current reversal in double circuit lines

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 44 of 89

FAULT

FAULT

CURRENT REVERSAL SYSTEM CONFIGURATION


AIDED
TRIP

&
CRX

&

Z2

TP
TD
CTX

&
CURRENT REVERSAL LOGIC

B
R
E
L
A
Y
L
O
C
A
T
I
O
N

Z1B

CB OPERATING TIME

TP

Z2D

TD
RESET

CTX

Z2C

CTX
RESET

Z2C
RESET

TIME
FAULT
INCEPTION

CURRENT
REVERSAL

RELAY D
ENABLED

RELAY D
DISABLED

CURRENT REVERSAL SEQUENCE DIAGRAM

Figure 19

Permissive overreach transfer trip POR 1 current rev. scheme logic

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 45 of 89

The current reversal sequence diagram shows how the relays in the healthy line are
prevented from maloperation due to the sequential opening of the circuit breakers in
the faulted line and the instance in the cycle at which it takes place. After current
reversal, the Zone 2 comparators of the relay at D will initiate the transmission of the
permissive trip signal from substation D to substation C and the relay at C will be
similarly prevented from maloperation. The relays at both D and C substations being
enabled once again when the faulted line is isolated and the current reversal guard
timer setting TD has expired.
25.2

Permissive overreach schemes POR 2 and POR 2 WI trip


(Reversed looking Zone 3 Figure 20)
The current reversal guard incorporated in the scheme logic is initiated when the
reversed looking Zone 3 comparators operate on a healthy line. No time delay TP is
necessary with this scheme as the Zone 3 comparators will operate well before the
arrival of the permissive trip signal initiated by the Zone 2 comparators at the opposite
end of the line.
Once the reversed looking Zone 3 comparators have operated, the relay D transfer
tripping is inhibited. The reset of the current reversal guard timer is initiated when the
reversed looking Zone 3 resets. A time delay TD is required in case the Zone 2
comparators at end D operate before the permissive trip signal from the relay at end C
has reset, which could cause the relays at D to maloperate.
Recommended TD setting = maximum signalling channel reset time ms + 35ms.
The current reversal sequence diagram shows how the relays in the healthy line are
prevented from maloperation due to the sequential opening of the circuit breakers in
the faulted line and the instance in the cycle at which it takes place. After current
reversal, the reversed looking Zone 3 comparators at substation C will operate to
inhibit the relays at substation C before the permissive trip signal is received from
substation D. The relays at D and C substations being enabled once again, when the
faulted line is isolated and the current reversal guard timer setting TD has expired.

25.3

Blocking scheme
(See Figure 21)
The current reversal guard incorporated in the scheme logic is initiated when the
blocking signal transmission started by the reversed looking Zone 3 comparators is
received on a healthy line to inhibit the aided trip. A time delay TP is needed with the
Zone 2 comparators in order to allow for the blocking signal transmission time to be
received in case the reversed looking Zone 3 comparators had operated for an
external fault.
Recommended TP setting = maximum signalling channel operating time ms + 16ms.

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 46 of 89

FAULT

FAULT

CURRENT REVERSAL SYSTEM CONFIGURATION

CRX
Z2

&

Z3R

&

Z2

AIDED
TRIP

TD

&

CTX

CURRENT REVERSAL LOGIC

B
R
E
L
A
Y
L
O
C
A
T
I
O
N

Z1B

CB OPERATING TIME

Z3RD

Z3RD

TD

RESET

RESET

CTX

Z2C

Z2C RESET

CTX
RESET

TIME
FAULT
INCEPTION

RELAY D
DISABLED

CURRENT
REVERSAL

RELAY D
ENABLED

CURRENT REVERSAL SEQUENCE DIAGRAM

Figure 20

Permissive overreach transfer trip POR 2 current reversal scheme logic


reversed looking Zone 3

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 47 of 89

FAULT

FAULT

CURRENT REVERSAL SYSTEM CONFIGURATION


COS
TP

Z2
0

CRX

&

AIDED
TRIP

Td
Z3R

&

Z2

CTX

CURRENT REVERSAL LOGIC

B
R
E
L
A
Y
L
O
C
A
T
I
O
N

Z1B

CB OPERATING TIME

Z3RD

Z3RD
RESET

CTX
RESET

CTX

Z2C

Tp

Z2C

Td

RESET

RESET

TIME
FAULT
INCEPTION

RELAY C
DISABLED

CURRENT
REVERSAL

CURRENT REVERSAL SEQUENCE DIAGRAM

Figure 21

Blocking scheme current reversal logic

RELAY C
ENABLED

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 48 of 89

When the current reverses and the reversed looking Zone 3 comparators reset, the
blocking signal transmission is stopped and the timer TD is started. After time TD, the
scheme resets and the relay aided trip is enabled once again.
Recommended TD setting = 20ms - minimum signalling channel reset time ms.
The current reversal sequence diagram shows how the relays in the healthy line are
prevented from maloperation due to the sequential opening of the circuit breakers in
the faulted line and the instance in the cycle at which it takes place. After current
reversal, the reversed looking Zone 3 comparators at substation D reset, but those at
substation C operate to send the blocking signal to substation D and inhibit the aided
trip. After the faulty line is isolated, the reversed looking Zone 3 comparators will reset
and the scheme aided trip restored when the timer setting TD has expired.
25.4

Blocking 2 scheme
(See Figure 21B)
The current reversal guard incorporated in the scheme logic is initiated when the
blocking signal transmission, started by the reversed looking Zone 3 comparators, is
received to inhibit the aided trip. A time delay TP is needed with the Zone 2
comparators in order to allow time for the blocking signal transmission to be received
in case the reversed looking Zone 3 comparators had operated for an external fault.
Recommended TP setting = maximum signalling channel operating time ms + 14ms.
When the current reverses and the reversed looking Zone 3 comparators reset, the
blocking signal transmission is maintained by the timer TD.
Recommended TD setting = maximum signalling channel operating time ms + 14ms.
Note:

If a simplex channel is used

TD setting = maximum signalling channel operating time ms


- minimum signalling channel reset time ms + 14ms.
The current reversal sequence diagram shows how the relays in the healthy line are
prevented from maloperation due to the sequential opening of the circuit breakers in
the faulted line and the instance in the cycle at which it takes place. After current
reversal, the reversed looking Zone 3 comparators at substation D reset but the block
is maintained for time TD, in order to allow the relays at substation C to send the
blocking signal to substation D and inhibit the aided trip. After the faulty line is
isolated, the reversed looking Zone 3 comparators at substation C and the forward
looking comparators at substation D will reset.

Service Manual
LFZP 11x
25.5

R5911D
Chapter 1
Page 49 of 89

Directional earth fault scheme POR 1, POR 2


(See Figure 22)
The current reversal guard incorporated in this DEF Permissive Overreach scheme
logic, is similar to the distance scheme with reversed looking Zone 3 comparators POR
2, except that the operation of the scheme is controlled by the reversed

FAULT

FAULT

CURRENT REVERSAL SYSTEM CONFIGURATION


COS
CRX

&

Z2

AIDED
TRIP

TP
0
STOP CTX

&
&

Z3R

START CTX

0
TD
CURRENT REVERSAL LOGIC

B
R
E
L
A
Y
L
O
C
A
T
I
O
N

Z1B

CB OPERATING TIME

Z3RD

Z3RD

TD

RESET

RESET

CTX

Z2C

TP

Z2C RESET

TIME
FAULT
INCEPTION

RELAY C
DISABLED

CURRENT
REVERSAL

CURRENT REVERSAL SEQUENCE DIAGRAM

Figure 21B

CTX
RESET

Blocking 2 scheme current reversal logic

RELAY C
ENABLED

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 50 of 89

FAULT

FAULT

CURRENT REVERSAL SYSTEM CONFIGURATION

CRX

&

DEF F
DEF R

AIDED
TRIP

&

TDG

DEF F

&

CTX

CURRENT REVERSAL LOGIC

B
R
E
L
A
Y
L
O
C
A
T
I
O
N

Z1B

CB OPERATING TIME

DEF RD

DEF RD

TD

RESET

RESET

CTX

DEF FC

CTX
RESET

DEF FC
RESET

TIME
FAULT
INCEPTION

RELAY D
DISABLED

CURRENT
REVERSAL

RELAY D
ENABLED

CURRENT REVERSAL SEQUENCE DIAGRAM

Figure 22 DEF permissive overreach scheme POR 1, POR 2 current rev. scheme logic
looking directional earth fault comparator, instead of the distance reversed
looking Zone 3 comparators. It uses a separate current reversal guard timer
TDG,
but it shares a common signalling channel.
Recommended TDG setting = maximum signalling channel reset time ms + 35ms.

Service Manual
LFZP 11x

25.6

R5911D
Chapter 1
Page 51 of 89

Directional earth fault blocking scheme


(See Figure 23)
The current reversal guard incorporated in this DEF Blocking scheme logic is similar to
the distance blocking scheme, except that the operation of the scheme is controlled by
the reversed looking directional earth fault comparator instead of the distance reversed
looking Zone 3 comparators. It uses a separate current reversal guard timer TPG to
allow for the blocking signal to be received in the event of an external fault, and a
second timer TDG to maintain the aided trip inhibition until the forward looking
directional comparator at the opposite end has reset.
Recommended TPG setting = maximum signalling channel operating time ms + 26ms.
Recommended TDG setting = 20ms - minimum signalling channel reset time ms.

25.7

Directional earth fault blocking 2 scheme


(See Figure 23B)

The current reversal guard incorporated in this DEF Blocking 2 scheme logic is similar
to the distance blocking scheme, except that the operation of the scheme is controlled
by both the low set current zero sequence level detector (LDLSI0) and the reverse
looking directional element (DEF_R) instead of the distance Zone 3 comparators. It
uses a separate current reversal guard timer TPG to allow time for the blocking signal
to be received in the event of an external fault, and a second timer TDG to maintain
the blocking signal until the forward looking directional comparator (DEF_F) at the
opposite end has reset.
Recommended TPG setting = maximum signalling channel operating time ms + 4ms.
Recommended TDG setting = maximum signalling channel operate time ms + 14ms.
Note:

If a simplex channel is used:

TDG setting = maximum signalling channel operating time ms


- minimum signalling channel reset time ms + 14ms.

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 52 of 89

FAULT

FAULT

CURRENT REVERSAL SYSTEM CONFIGURATION


COS
TPG

DEF F

&

CRX

AIDED
TRIP

TDG

DEF R

&

DEF F

CTX

CURRENT REVERSAL LOGIC

B
R
E
L
A
Y
L
O
C
A
T
I
O
N

Z1B

CB OPERATING TIME

DEF RD

DEF RD
RESET

CTX
RESET

CTX

DEF FC

TPG

DEF FC

TDG

RESET

RESET

TIME
FAULT
INCEPTION

RELAY C
DISABLED

CURRENT
REVERSAL

CURRENT REVERSAL SEQUENCE DIAGRAM

Figure 23

DEF blocking scheme current reversal logic

RELAY C
ENABLED

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 53 of 89

FAULT

FAULT

D
DEF RD

CURRENT REVERSAL SYSTEM CONFIGURATION

DEF FD

COS
CRX

&

DEF F

AIDED TRIP

TPG

&
&

DEF R

STOP CTX

START CTX

TDG

LDLSIo
CURRENT REVERSAL LOGIC
B
R
E
L
A
Y
L
O
C
A
T
I
O
N

Z1B

CB OPERATING TIME

DEF RD

LDLSIoD

TDG
TPG

CTX

CTX

DEF FC

TPG

LDLSIoC

DEF RC
DEF FC

TIME
FAULT
INCEPTION

RELAY C
DISABLED

CURRENT
REVERSAL

RELAY D RELAY C
DISABLED ENABLED

CURRENT REVERSAL SEQUENCE DIAGRAM

Figure 23B

CTX
RESET

DEF blocking 2 scheme current reversal logic

Service Manual
LFZP 11x

Section 26.
26.1

R5911D
Chapter 1
Page 54 of 89

230KV POWER SYSTEM WORKED EXAMPLE - POR 1 MODE

Objective
To protect the 100Km double circuit line between Green Valley and Blue River
substations using model LFZP112 in the Permissive Overreach mode with forward
looking Zone 3 comparators as per scheme POR 1 and to set the relay at Green
Valley substation (Figure 24).

26.2

System data
Line length:

100Km

Line impedances:

Z = 0.089 + j0.476 = 0.484 /79.4 /Km


1
Z = 0.426 + j1.576 = 1.632 /74.8 /Km
0
Z /Z1 = 3.372 /-4.6
0

CT ratio:
VT ratio:

26.3

1,200/5
230,000/115

Relay settings
It is assumed that the two optional reach-stepped Zones Z1X and Z1Y are not used
and that only a three zone scheme is required.

26.4

Zone 1 reach settings


Required Zone 1 reach is to be 80% of the line impedance between Green Valley and
Blue River substations.
Ratio of secondary to primary impedance = 1,200/5
230,000/115
Required Zone 1 reach

= 0.8 x 100 x 0.484 /79.4 x 0.12


= 4.64 /79.4 ohms secondary

Relay Zone 1 reach

= 0.12

= KZ1 x KZPh x 5/In

Service Manual
LFZP 11x

Figure 24

R5911D
Chapter 1
Page 55 of 89

230kV power system worked example: LFZP 112, POR 1

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 56 of 89

The relay coarse reach KZPh should be set to the nearest value below the required
Zone 1 reach. It is important to set KZPh as high as possible, since the current setting
of the relay current level detectors is inversely proportional to KZPh and it is best to
have the relay sensitivity as high as possible.
KZPh setting 0.040 to 1.0 in steps of 0.001
Therefore, select KZPh = 1.0
KZ1 settings 1.0 to 49.98 in steps of 0.02

Required zone 1 multiplier setting KZ1

Re quired Zone 1 Re ach


KZPh / I
n

= 4.64
Therefore, select KZ1 = 4.64
Relay Characteristic Angle THETA Ph settings 50 to 85 in 5 steps
Therefore, select THETA Ph = 80
Actual Zone 1 reach settings = 4.64 /80 secondary

26.5

Zone 2 reach settings


Required Zone 2 impedance =
(Green Valley-Blue River) line impedance + 50% (Blue River-Rocky Bay)
line impedance
= (100+30) x 0.484 /79.2 x 0.12
= 7.56 /79.4 secondary
Relay Zone 2 reach = KZ2 x KZPh x 5/In
KZ2 settings 1.0 to 49.98 in steps of 0.02
Required Zone 2 multiplier setting KZ2

Re quired Zone 2 Re ach


KZP 5 / I
n

= 7.56
Therefore, select KZ2 = 7.56
Actual Zone 2 reach setting = 7.56 /80 secondary

Service Manual
LFZP 11x
26.6

R5911D
Chapter 1
Page 57 of 89

Zone 3 reach settings


Required Zone 3 forward impedance =
(Green Valley-Blue River + Blue River-Rocky Bay) x 1.2
= (100+60) x 1.2 x 0.484 /79.4 x 0.12
= 11.15 /79.4 secondary
Relay Zone 3 forward reach = KZ3 x KZPh x 5/In
KZ3 setting 1.0 to 49.98 in steps of 0.02
Required Zone 3 forward reach setting multiplier KZ3
= Required Zone 3 forward reach
KZPh x 5/In
= 11.15
Nearest KZ3 setting 11.14
Actual Zone 3 forward reach setting

= 11.14 x 1 x 5/5 /80


= 11.14 /80 secondary

Required Zone 3 reverse reach impedance

= Typically 10% Zone 1 reach

= 0.1 x 4.64 /79.4


= 0.464 /79.4
Relay Zone 3 reverse reach = KZ3' x KZPh x 5/In
KZ3' settings 0.2 to 49.9 in steps of 0.1
Required Zone 3 reverse reach setting multiplier KZ3'
= Required Zone 3 reverse reach
KZPh x 5/In
= 0.46
Therefore, select KZ3' = 0.5
Actual Zone 3 reverse reach setting = 0.5 /80 secondary

Service Manual
LFZP 11x

26.7

R5911D
Chapter 1
Page 58 of 89

Earth fault residual compensation settings


Residual Compensation factor KN =
Z -Z
L0

L1

Z L0 Z L1
3Z L1

= (0.426 + j1.576) - (0.089 + j0.476)


= 0.337 + j1.1
= 1.15 /72.9

KN =

1.15/72. 9
= 0. 79 / 6. 5
3 0. 484 /79. 4

Residual Compensation setting KZN =

( Z L0 Z L1 )
x KZPh
3Z L1

KZN = 0.79 /-6.5 x 1 /80


= 0.79 /73.5
KZN settings 0 to 1.36 in steps of 0.001
Therefore, select KZN = 0.79 and THETA N = 75

26.8

Power swing blocking


With the Permissive Overreach scheme POR 1, the Power Swing Blocking
characteristic Z6 is set concentric with the Zone 3 characteristic, so that if the
measured impedance locus travels into the Z6 characteristic, but takes longer than
timer TZ6 setting to pass through into the Zone 3 characteristic, the Power Swing
Blocking unit will operate. The Power Swing Blocking unit is arranged to block under
certain system conditions and can be preset to block one or more of the relay zones.
The recommended settings for the Power Swing Blocking characteristic Z6 forward
and reversereachsettings (see Section 16) are:
Z6 forward reach

= 1.3 x Zone 3 forward reach


= 1.3 x 11.14 /80
= 14.48 /80 secondary

Z6 forward reach

= KZ6 x KZPh x 5/In

KZ6 = 14.48
KZ6 settings 1.0 to 49.98 in steps of 0.02
Therefore, select KZ6 = 14.48

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 59 of 89

Actual Z6 forward reach = 14.48 /80 secondary


Z6 reverse reach

= 0.3 Zone 3 forward reach + Zone 3 reverse reach


= (0.3 x 11.14 /80) + 0.46 /80
= (3.34 + 0.46) /80
= 3.8 /80

Z6 reverse reach

= KZ6' x KZPh x 5/In

KZ6' settings 0.2 to 49.9 in steps of 0.1


Therefore, select KZ6' = 3.8
Actual Z6 reverse reach = 3.8 /80 secondary
TZ6 timer settings 20 to 90ms in steps of 5ms
Recommended TZ6 setting 50ms

26.9

Lenticular characteristic
For applications where there are likely to be problems of load encroachment on the
relay Zone 3 characteristic, or even more so if the Power Swing Blocking characteristic
Z6 is used, the lenticular shaped characteristic is available for Zone 3 and Zone 6.
The major axis of the lenticular characteristic (b) would be set in accordance with the
forward and reverse settings required, but the minor axis (a) can be selected to
provide an aspect ratio (a/b) of 1.0, 0.67 or 0.41. The aspect ratio should be chosen
to prevent the load impedance encroachment into the relay characteristic with a
minimum safety margin of 10%.
An impedance diagram showing the relay characteristics for each zone is given in
Figure 24B

26.10

Permissive overreach schemes for POR 2, POR 2 WI trip


When the weak infeed logic is required, the Permissive Overreach scheme POR 2 or
POR 2 WI Trip with reversed looking Zone 3 comparators needs to be selected and
the relay settings for Zone 1, Zone 2 and the Residual compensation would be the
same as for scheme POR 1, but the settings for Zone 3 and the Power Swing Blocking
Unit would be different.

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 60 of 89

Z6
Z3
Z2
Z1

GREEN VALLEY

BLUE RIVER

PSB
14
Z6
12
10
Z3
8
6
Z2
4
2

Z1

10

12

PHASE AND GROUND FAULTS

Figure 24B 230kV power system worked example using model LFZP 112 in the POR
1 mode relay settings

Service Manual
LFZP 11x

26.11

R5911D
Chapter 1
Page 61 of 89

Reversed Zone 3 setting


When set reverse looking, the Zone 3 comparators must be set as directional mho's
and, therefore, only need to be set in the reverse direction (see Section 15.0).
Required reverse Zone 3 setting = 1.2 x Zone 2 relay setting at opposite end, to cover
errors due to relay accuracy's (CT and VT errors).
= (Blue River-Green Valley) line impedance + 50% (Green Valley-Tiger Bay) line
impedance x 1.2
= ((100 + 40) x 0.484 /79.4 x 0.12) 1.2
= 9.76 /79.4
Relay reverse Zone 3 reach = KZ3' x KZPh x 5/In
KZ3' setting 0.2 to 49.9 in steps of 0.1
Required reverse Zone 3 reach setting multiplier KZ3'

Re quired reversed Zone 3 reach


KZPh 5 / I
n

= 9.76

Therefore, select KZ3' = 9.8


Actual reverse Zone 3 reach = 9.8 /80 secondary

26.12 Power swing blocking


When the Power Swing Blocking unit is used with the Permissive Overreach schemes
POR 2 because the Zone 3 comparators are set reverse looking, the Zone 6
characteristic of the Power Swing Blocking unit has to be set concentric with the Zone
2 characteristic. In the example chosen, for the 100 Km line between Green Valley
and Blue River, the required settings would be:
Zone 6 forward reach = 1.3 x Zone 2 reach
= 1.3 x 7.56 /80
= 9.82 /80
Relay Zone 6 forward reach = KZ6 x KZPh x 5/In
KZ6 settings 1.0 to 49.98 in steps of 0.02

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 62 of 89

Required Zone 6 forward reach multiplier setting

Re quired Zone 6 forward Re ach


ZPh 5 / I
n

= 9.82

Therefore, select KZ6 = 9.82


Actual Zone 6 forward reach = 9.82 /80
Zone 6 reverse reach = KZ6' x KZPh x 5/In
KZ6' settings 0.2 to 49.9 in steps of 0.1
Required Zone 6 reverse reach setting multiplier KZ6'

Re quired Zone 6 reverse Re ach


ZPh 5 / I
n

= 2.26

Therefore, select KZ6' = 2.3


Actual Zone 6 reverse reach = 2.3 /80 secondary

26.13

Current reversals
The current reversal logic available with the Permissive Overreach schemes need only
to be used when the setting of the Zone 2 comparators is greater than 1.5 times the
impedance of the protected line. In the chosen worked example, since the setting of
the Zone 2 comparators is only 1.3 times the protected line impedance, the current
reversal logic does not need to be used and the recommended settings for the current
reversal guard timer are:
TP = 98ms and TD = 0

26.14

Check on comparator voltage at Zone 1 reach


Worst condition is with the parallel line out of service and it is assumed that the values
of maximum and minimum fault levels at Green Valley and Blue River substations are
for single infeed conditions.
Maximum source positive sequence impedance :
2302
= 26.45 /80
2,000

= 4.59 + j26.05

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 63 of 89

Protected line positive sequence impedance up to Zone 1 reach =


0.8 x 100 x 0.484 /79.4

= 38.72 /79.4
= 7.12 + j38.06

Overall source to Zone 1 reach positive sequence impedance =


(4.59 + j26.05) + (7.12 + j38.06) = 11.71 + j64.11
= 65.17 /79.6
Relay voltage for a phase fault at the Zone 1 reach =
115 x 38.72 = 68.32V
65.17
Earth Fault At Zone 1 Reach
Maximum source zero sequence impedance assumed to be equal to the positive
sequence impedance
Maximum source earth loop impedance = 4.59 + j26.05
Protected line zero sequence impedance up to Zone 1 reach =
0.8 x 100 x 1.632 /74.8

= 130.56 /74.8
= 34.23 + j125.99

Protected line earth loop impedance up to Zone 1 reach =


2 x (7.12 + j38.08) + (34.23 + j125.99) = 16.15 + j67.38
3
= 69.29 /76.5
Overall source to Zone 1 reach earth loop impedance =
(4.59 + j26.05) + (16.15 + j67.38)

= 20.74 + j93.43
= 95.70 /77.48

Relay voltage for an earth fault at the Zone 1 reach =


66.47 x 69.29 = 48.12V
95.70

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LFZP 11x

R5911D
Chapter 1
Page 64 of 89

For a 5% reach accuracy with the Zone 1 multiplier set to unity Optimho requires at
least 2.05 volts for earth fault measurement or at least 3.55V for phase fault
measurement. For a 10% accuracy, the required voltages are 1.04V and 1.8V
respectively. For Zone 1 multipliers greater than unity, the required relay voltages for
accuracy vary linearly with the multiplier setting.
In this case, the Zone 1 multiplier KZ1 = 4.64
Thus, the required minimum voltages for a 5% reach accuracy are:
4.64 x 2.05 = 9.51V for earth faults
4.64 x 3.55 = 16.47V for phase faults
Both voltage requirements are met in this application

26.15

Current transformer requirements


Class X current transformers are required to meet the following specification:
X
Phase Fault Condition VK IF 1+ ZR + R CT + RL V
R

VK IF 1+

X
ZR + R CT + RL volts
R

I = maximum secondary fault current for a three phase fault at the Zone 1 reach
F
Neglecting the small infeed from the parallel line
Minimum source positive sequence impedance
=

2302
5,000

= 10.58 / 80

Overall minimum source to Zone 1 reach positive sequence impedance =


(1.837 + j10.419) + (7.12 + j38.06) = 8.957 + j48.479
= 49.29 /79.5

IF =

230 10
5

= 11. 238 A
3 49. 29 1, 200
3

X 48. 479
=
= 5. 41
R 8. 957

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R5911D
Chapter 1
Page 65 of 89
0.5
Z = Relay burden for a phase fault =
= 0.02
R
25

R
R

CT
L

= Current transformer secondary winding resistance assumed to be 0.5


= Resistance of one pilot cable lead between the current transformers and
the relay, assumed to be 0.25

Current transformer knee-point voltage requirement for a three phase fault at the Zone
1 reach point
V 11.238 (1 + 5.41)(0.02 + 0.5 + 0.25)
K
80.69V
Earth Fault Condition
X
VK IFE 1+ E ZRE + RCT + 2RL
RE

FE

= maximum secondary fault current for an earth fault at the Zone 1 reach

Assuming that the zero and positive sources impedances are equal
Minimum source earth loop impedance = 1.837 + j10.419
Overall source to Zone 1 reach earth loop impedance =
(1.837 + j10.419) + (16.15 + j67.38) = 17.987 + j77.799

I FE =

230 10
5

= 6. 937 A
3 79. 85 1, 200

= 79.85 /77

X E 77. 799
=
= 4. 32
R E 17. 987
Z

RE

= Relay burden for an earth fault = 0.02

Current transformer knee-point voltage requirement for an earth fault at the Zone 1
reach point
V 6.937 (1 + 4.32)(0.02 + 0.5 + 0.5)
K
37.64V

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LFZP 11x

R5911D
Chapter 1
Page 66 of 89

It is also required that at the current transformer knee-point voltage, which from the
above calculations should not be less than 80.69 volts, the exciting current should be
less than 0.5A.

Service Manual
LFZP 11x

26.16

R5911D
Chapter 1
Page 67 of 89

Optional DEF used in POR schemes


If the optional DEF is used in POR1, CTX is based purely on DEF_F, in POR2 CTX is
based on DEF_F + LDHSZ2. DEF reverse sensitivity is based on the DEF LOWSET
(LDLSI0).

Section 27.
27.1

132KV POWER SYSTEM WORKED EXAMPLE - BLOCK MODE

Objective
To protect the 10Km single circuit line between Ironbridge and Windy Hill substation
using model LFZP111 in the Blocking mode and to set the relay at Ironbridge with the
Quadrilateral characteristic for earth faults. It is required to measure high resistance
faults which may be resistive up to 50 and to complement the distance scheme with
the directional earth fault scheme (see Figure 25).

27.2

System data
Line length:

10Km

Line impedances:

Z = 0.16 + j0.41 = 0.44 /69 /Km


1
Z = 0.34 + j1.03 = 1.09 /72 /Km
0
Z /Z = 2.5 /3
0 1

CT ratio:
VT ratio:

27.3

500/1
132000/110

Relay settings
It is assumed that the two optional reach-stepped zones Z1X and Z1Y are not used
and that only a three zone scheme is required.

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LFZP 11x

R5911D
Chapter 1
Page 68 of 89

Figure 25 132kV power system worked example using model LFZP 111 in the blocking
mode

Service Manual
LFZP 11x

27.4

R5911D
Chapter 1
Page 69 of 89

Zone 1 reach settings


Required Zone 1 reach is to be 80% of the line impedance between Ironbridge and
Windy Hill substations.
Ratio of secondary to primary impedance =

500 / 1
= 0. 416
132 , 000 / 110

Required Zone 1 reach = 0.8 x 10 x 0.44 /69 x 0.416


= 1.46 /69 secondary
Relay Zone 1 reach = KZ1 x KZPh x 5/In
The relay coarse reach KZPh should be set to the nearest value below the required
Zone 1 reach. It is important to set KZPh as high as possible, since the current setting
of the relay current level detectors are inversely proportional to KZPh and it is best to
have the relay sensitivity as high as possible.

KZ1 KZPh =

1. 46 /69
= 0. 292 /69
5

KZPh settings 0.040 to 1.0 in steps of 0.001


KZ1 settings 1.0 to 49.98 in steps of 0.02
Therefore, select KZ1 = 1.0 and KZPh = 0.292
Relay characteristic Angle THETA Ph settings 50 to 85 in 5 steps
Therefore, select THETA Ph = 70
Actual Zone 1 reach setting = 1.0 x 0.292 x 5 x 70
= 1.46 /70 secondary

27.5

Zone 2 reach settings


Required Zone 2 impedance = (Ironbridge-Windy Hill) line impedance + 50% (Windy
Hill-Tagus River) line impedance
= (10 + 15) x 0.44 /69 x 0.416
= 4.576 /69
Relay Zone 2 reach = KZ2 x KZPh x 5/In
KZ2 settings 1.0 to 49.98 in steps of 0.02

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R5911D
Chapter 1
Page 70 of 89

Required Zone 2 multiplier setting

KZ2 =

4. 576
= 3.143
0. 292 5

Therefore, select KZ2 = 3.14


Actual Zone 2 reach setting = 3.14 x 0.292 x 5 /70
= 4.584 /70 secondary

27.6

Zone 3 reach settings


In the Blocking mode the Zone 3 comparators are set looking directionally in the
reverse direction.
Required Zone 3 reverse impedance
= Zone 2 relay setting at opposite end
= (Windy Hill-Ironbridge) line impedance + 50% (Ironbridge- Trent Bridge) line
impeadance = (10 + 10) x 0.44 /69 x 0.416
= 3.66 /69
Relay reverse Zone 3 reach = KZ3' x KZPh x 5/In
KZ3' settings 0.2 to 49.9 in steps of 0.1
Required Zone 3 multiplier setting KZ3' =

3. 66
= 2. 50
0. 292 5

Therefore, select KZ3' = 2.5


Actual reverse Zone 3 reach = 2.5 x 0.292 x 5 /70
= 3.65 /70

27.7

Quadrilateral characteristic
For this example, the quadrilateral characteristic has been chosen for earth faults,
because the line to be protected is short and very high values of arc-resistance need to
be measured.

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LFZP 11x

27.8

R5911D
Chapter 1
Page 71 of 89

Resistive reach of earth fault comparators


Required resistive coverage for earth faults = 50 ohms primary
= 50 x 0.416
= 20.8 secondary
Minimum load impedance =

110
3 1

= 63.58 secondary

There will, therefore, be no problem of encroachment on the earth fault comparators


operating zone, if the comparators are set to see 50 ohms primary fault resistance.
Quadrilateral characteristic right hand reach = KR x 5/In
Quadrilateral characteristic left hand reach = KR x 6/In
KR settings 1 to 30 in steps of 1
Select nearest resistive reach setting above the required value
Required KR setting =

20.8
= 4.16
5

Therefore, select KR = 5
Actual resistive reach = 5 x 5 = 25 ohms secondary
Check on ratio resistive reach /Zone 1 earth loop impedance reach
Zone 1 earth loop impedance reach =

1. 46 + 1. 46 + 3. 65
3

= 2.19 secondary
Ratio resistive reach/Zone 1 earth loop reach =

25
= 11. 41
2.19

The above ratio is within the limit of 15 prescribed in Section 17.0

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LFZP 11x

27.9

R5911D
Chapter 1
Page 72 of 89

Earth fault residual compensation settings


Residual compensation factors KN =
Z -Z
L0

L1

Z L0 Z L1
3Z L1

= (0.34) + j1.03) - (0.16 + j0.41)


= 0.18 + j0.62
= 0.64 /73.8

KN =

0. 64 /73.8
= 0.48/4.8
3 0. 44 /69

Residual compensation setting KZN =


KZN

( Z L0 Z L1 )
x KZPh
3Z L1

= 0.48 /4.8 x 0.292 /70


= 0.14 /74.8

KZN settings 0 to 1.36 in steps of 0.001


Therefore, select KZN = 0.14 and THETA N = 75
An impedance diagram showing the relay phase and earth fault characteristics for
each zone is given in figure 25B.

27.10

Directional earth fault scheme settings


Mode of operation blocking, sharing the same signalling channel as the distance
scheme. It uses one forward looking and one reverse looking directional earth fault
comparator to provide high speed clearance of high resistance faults. Also, it provides
directional time delayed back-up protection with a choice of time curves to assist with
system co-ordination. No instantaneous directional trip is provided because the
distance scheme is fitted with Zone 1 earth fault measuring comparators. In setting the
current level detectors, it is important to note that to allow for relay tolerance and the
capacity current of the protected line, it is essential to maintain a ratio of 1.5 between
the setting of the forward looking current level detector at the local end and the reverse
looking current level detector a the remote end. For this purpose, it is necessary to
consider the source contribution from each end of the protected line.

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R5911D
Chapter 1
Page 73 of 89
Z3
Z2
Z1

IRONBRIDGE

WINDY HILL

5
4
3

Z2

2
1
Z1
2

1
Z3
2

PHASE FAULTS

3
5

4
3
Z2
2
1
30

25

20

15

10

Z1
10

15

20

25

1
2

Z3'

EARTH FAULTS
Figure 25B

132kV Power system worked example using model LFZP 111 in

the
blocking mode relay settings

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 74 of 89

The sensitivity of the forward looking directional element is set by either DEF LOWSET
or DEF HIGHSET (if aided tripping selected). Reverse sensitivity is set by DEF
LOWSET.

(i)

Earth fault at Windy Hill substation busbars fed from Trent Bridge substation

Trent Bridge maximum source impedance =

132
1000

= 17.42

Trent Bridge to Windy Hill line positive sequence impedance =


(20 + 10) x 0.44 /69 = 13.2 /69
Trent bridge to Windy Hill line zero sequence impedance =
(20 + 10) x 1.09 /72 = 32.7 /62
Arc-resistance = 50 ohms
Minimum earth fault current =

3 132 103

3 30.62 + 30.62 + 20012


.

= 875.81A primary
Equivalent CT secondary current =
( ii )

875.81
= 1. 75 A
500

Earth fault at Ironbridge substation busbars fed from Tagus River substation.
Tagus River maximum source impedance =

1322
1500

= 116
.

Tagus River to Ironbridge line positive sequence impedance =


(30 + 10) x 0.44 /69 = 17.6 /69
Tagus River to Ironbridge line zero sequence impedance =
(30 + 10) x 1.09 /72 = 43.6 /72
Arc-resistance = 50 ohms
Minimum earth fault current =

3 132 103

3 29.2 + 29.2 + 2052


. )

= 868.36A primary

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LFZP 11x

R5911D
Chapter 1
Page 75 of 89
Equivalent CT secondary current =

868. 36
= 1. 736 A
500

Directional measuring elements current setting range 0.05In to 0.80In in


steps of 0.05In
( iii )

To set the directional measuring elements at Ironbridge and Windy Hill


relays.
Because the earth fault current is primarily controlled by the arc-resistance,
the minimum current seen by the relays at both ends of the protected line is
practically the same. Therefore, in this application, they can be set with the
same current settings, subject to the following constraints:
a)

The current setting must be above the maximum zero sequence


current unbalance present in the protected line under normal
operating conditions.

b)
That the current setting of the forward looking current level
detector is 1.5 times the reverse looking current level detector.
Therefore, the recommended current settings assuming that the
maximum zero sequence current unbalance is 5% would be:
Reverse looking current level detector (3Io Low set) 0.1A
Forward looking current level detector (3Io High set) 0.15A
c)

To set the current reversal timer TPG/TDG


Recommended TPG setting = maximum signalling channel
operating time ms + 26ms.
Recommended TDG setting = 20ms - minimum signalling channel
reset time ms.

d)

Back-up earth fault protection time delay trip


Current setting range 0.05In to 1.20In in steps of 0.05In
Time multiplier setting range 0.025 to 1.0 in steps of 0.025

definite

Number of co-ordination curves available: 8 inverse and 3


time.
Recommended current setting 0.1A
Operating curve and time multiplier setting to be chosen to
co-ordinate with the time delayed protection on the adjacent lines.

Service Manual
LFZP 11x

e)

27.11

R5911D
Chapter 1
Page 76 of 89

Directional element characteristic angle THETA G 10 to 80 in 10 steps to


be set to the source zero sequence impedance angle which in this example
has been assumed to be 80.

Check on comparator voltage for accuracy of Zone 1 phase fault at


Zone 1 reach
Maximum source positive sequence impedance =
1322 / 80
1000

= 17.424/ 80 = 3.025 + j17159


.

Trent Bridge to Ironbridge line positive sequence impedance =


20 x 0.44 /69 = 8.8 /69 = 3.153 + j8.215
Maximum positive sequence impedance behind relay =
(3.025 + j17.159) + (3.153 + j8.215) = 6.178 + j25.374
= 26.115 /76.3
Protected line positive sequence impedance up to Zone 1 reach =
0.8 x 10 x 0.44 /69 = 3.52 /69

= 1.261 + j3.28

Overall source to Zone 1 reach positive sequence impedance =


(6.178 + j25.374) + (1.261 + j3.28) = 7.439 + j28.654
=29.60 /75.4
Relay voltage for a phase fault at the Zone 1 reach =
110 x 3.52 = 13.08V
29.60
Earth fault at zone 1 reach
Maximum source zero sequence impedance assumed to be equal to the positive
sequence impedance
Trent Bridge to Ironbridge line zero sequence impedance =
20 x 1.09 /72 = 21.8 /72

= 6.736 + j20.733

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R5911D
Chapter 1
Page 78 of 89

Maximum zero sequence impedance behind relay =


(3.025 + j17.159) + (6.736 + j20.733) = 9.761 + j37.892
= 39.129 /75.5

Maximum earth loop impedance behind relay =

) (

) = 7.372 + j29.546

2 617
. 8 + j25.374 + 9.761+ j37.892
3

= 30.45 /76

Protected line zero sequence impedance up to Zone 1 reach =


0.8 x 10 x 1.09 /72 = 8.72 /72 = 2.694 + j8.293

Protected line earth loop impedance up to Zone 1 reach =

) (

2 1261
.
+ j3.28 + 2.694 + j8.293
3

= 1.738 + j3.857
= 4.23 /65.7

Overall source to Zone 1 earth loop impedance =


(7.372 + j29.546) + (1.738 + j3.857) = 9.11 + j33.403
= 34.62 /74.7

Relay voltage for an earth fault at the Zone 1 reach =


63.5

4.23
34.62

= 7.758 V

For a 5% reach accuracy with the Zone 1 multiplier set to unity Optimho requires at
least 2.05V for earth fault measurement or at least 3.55V for phase fault measurement.
For a 10% accuracy, the required voltages are 1.04V and 1.8V respectively. For
Zone 1 multipliers greater than unity, the required relay voltages for accuracy vary
linearly with the multiplier setting.
In this case, the Zone 1 multiplier KZ1 = 1.0
Therefore, both voltage requirements are met in this application

Service Manual
LFZP 11x

27.12

R5911D
Chapter 1
Page 79 of 89

Current transformer requirements


Class X current transformers are required to meet the following specification
Phase Fault Condition

VK IF 1+

X
ZR + R CT + RL V
R

I = Maximum secondary fault current for a three phase fault at the Zone 1 reach.
F
Minimum source positive sequence impedance =

132 2
= 3. 48 /80
5, 000

Overall minimum source to Zone 1 reach positive sequence impedance =


(0.604 + j3.427) + (3.153 + j8.215) + (1.261 + 3.28) =
5.018 + j14.922 = 15.74 /71.4

132 103
1
IF =

= 9.69 A
3 15.74 500

X 14. 922
=
= 2. 97
R 5. 018
Z
R

CT

R
L
the

= Relay burden for a phase fault = 0.08


= Current transformer secondary winding resistance assumed to be 2.5
= Resistance of one pilot cable lead between the current transformers and
relay,assumed to be 0.5

Current transformer knee-point voltage requirement for a three phase fault at the Zone
1 reach point
V 9.69 (1 + 2.97)(0.08 + 2.5 + 0.5)
K
118.48V

Earth Fault Condition


X
VK IFE 1+ E ZRE + R CT + 2RL
RE

Service Manual
LFZP 11x

FE

R5911D
Chapter 1
Page 80 of 89
= Maximum secondary fault current for an earth fault at the Zone 1 reach

Assuming that the zero and positive source impedances are equal
Minimum source earth loop impedance = 0.604 + j3.427
Trent Bridge to Ironbridge earth loop impedance =

) (

) = 4.355 + j12.387

2 3153
.
+ j8215
.
+ 6.76 + j20.733
3

Overall minimum source to Zone 1 reach earth loop impedance =


(0.604 + j3.427) + (4.355 + j12.287) + (1.738 + j3.857) = 6.697 + j19.671
= 20.78 /71.2

I FE =

132 103
1

= 7.34 A
3 20.78 500

X E 19.671
=
= 2.937
R E 6.697
Z

RE

= Relay burden for an earth fault 0.08

Current transformer knee-point voltage requirement for an earth fault at the Zone 1
reach point

V 7.34 (1 + 2.937)(0.08 + 2.5 + 1)


K
103.45V
It is also required that at the current transformer knee-point voltage, which from the
above calculations should not be less than 118.48 volts, the exciting current should be
less than 0.1A.

Section 28.

FAULT LOCATOR

The distance from the relaying point to the fault can be quickly and conveniently
measured and displayed by the fault locator unit, when fitted, in the Optimho relay.
The principle of measurement is based on the computation by means of an algorithm,
which takes into account the pre-fault load current and the infeed from the remote end
and if selected the mutual coupling between parallel circuits.

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 82 of 89

Fault location is computed when the relay does any start or distance trip (selectable by
the menu) but faults outside the protected line are based on the protected line
impedance. Faulted phase information is displayed by the distance relay directly on
the LCD. When fault location computation is completed, (this may take several
seconds), the location is displayed by pressing the ACCEPT/READ key and reviewing
the fault record.
When the fault occurs and before the circuit breaker has opened, the fault locator
stores ten cycles of pre-trip and six cycles of post-trip data. The algorithm finds the
instant of fault by scanning the stored faulted phase current data and determines the
pre-fault and fault values.
By the user interface, the fault locator can be set in Kilometres, miles, or as a
percentage of the protected line length and displayed on the LCD. Likewise, the values
of primary current and voltage can be expressed in primary values and displayed on
the LCD unit.
28.1

Mutual Compensation
Analysis of an earth fault on one circuit of a double circuit line shows that a distance
relay at one end of a faulted line will tend to overreach while that at the other end will
tend to underreach. In most applications the degree of underreach is acceptable, but
in cases of long lines with high mutual coupling or where precise fault location
measurement is required, mutual zero sequence compensation can be used to improve
the distance measurement. In practice, the positive and negative sequence coupling
between parallel lines is insignificant and only the zero sequence mutual coupling
needs to be considered.
To illustrate the principle involved in the application of mutual compensation, consider
the sequence networks shown in Figure 26 for a double circuit line with an earth fault
on line AB and where y is the per unit distance of the fault from end A.
A fault locator at terminal A having zero sequence compensation only will be supplied
with voltage V and current I as given by the expressions:
R
R

) (

) (

) (

VR = y ZL1 Ia1 + y ZL2 Ia2 + y ZL0 Ia0 + y ZM0 Ic0

For a fully transposed transmission line assume ZL1 = ZL2 then

Z

Z

= y ZL1 Ia1 + Ia2 + L0 Ia0 + M0 Ic0


ZL1
ZL1

IR = Ia1 + Ia2 + Ia0 + L0 1Ia0


ZL1

Z

= Ia1 + Ia2 + L0 Ia0
ZL1

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R5911D
Chapter 1
Page 83 of 89

Therefore, the impedance presented to the fault locator is:

Z

y ZL1Ia1 + Ia2 + L0 Ia0 + M0 Ic0
ZL1
ZL1

ZR =
Z

Ia1 + Ia2 + L0 Ia0


ZL1

(
) (

)
) (

ZM0 Ic0
ZR = y ZL11+

Ia1 ZL1 + Ia2 ZL2 + Ia0 ZL0

But I = I
=I
for an earth fault,
a1 a2 a0
Therefore:

Ic0
ZM0


ZR = y ZL1 1+

2ZL1 + ZL0 Ia0

( )

Now, if in addition to the zero sequence compensation, we add to the fault locator the
mutual compensation:
Z

Z
IR = Ia1 + Ia2 + Ia0 + L0
1 Ia0 + M0 Ic0
ZL1
ZL1

Z

y ZL1Ia1 + Ia2 + L0 Ia0 + M0 Ic0
ZL1
ZL1

ZR =

Z

Ia1 + Ia2 + L0 Ia0 + M0 Ic0
ZL1
ZL1

= y ZL1
Which is the correct distance from the fault locator to the fault.

Service Manual
LFZP 11x
28.2

R5911D
Chapter 1
Page 84 of 89

Mutual input polarity


The polarity of the residual current to be added to the fault locator from the parallel
line is shown on the diagram in Figure 27. The star point of the parallel line current
transformers being connected to the relay terminal number 28 and the residual circuit
connection to terminal 27.
Note:

Please note that when Optimho is supplied with both DEF and Fault Locator
the relay can only be connected to one current input and that the user must
make the choice via the relay menu for either DEF current polarisation or
Fault Locator mutual compensation.

ZL

ZS
ZM
y ZL

SOURCE

( 1-y )

ZL

C1

a1

C2

a2

C0

Z L1

Z S1
y Z L1

( 1-y )

Z L1

( 1-y )

Z L2

( 1-y )

Z L0

Z L2

Z S2
y Z L2

Z L0

Z S0

Z M0
I

Figure 26

a0

y Z L0

Sequence networks for an earth fault on a double circuit


line with single infeed

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 85 of 89

DIRECTION FOR OPERATION

P2

P1

LINE 1

OPTIMHO
19
20
21
22
23
24
25
26
27
28
MUTUAL COMPENSATION

DIRECTION FOR OPERATION

P2

P1

LINE 2

OPTIMHO
19
20
21
22
23
24
25
26
27
28
MUTUAL COMPENSATION

Figure 27

Optimho fault locator mutual compensation connections

Service Manual
LFZP 11x
28.3

R5911D
Chapter 1
Page 86 of 89

Fault locator settings


The procedure for setting the Fault Locator can be best illustrated using the 230kV
transmission line in the example shown in Figure 24 where the zero sequence mutual
impedance between circuits is assumed to be 0.1068 + j0.5712/Km.
Line length: 100Km
Line positive sequence impedance: Z1 = 0.484 /79.4/Km
CT ratio: 1200/5
VT ratio: 230,000/115
Ratio of secondary to primary impedance = 0.12
Mutual impedance: Z

M0

= 0.1068 + j0.5712
= 0.581 /79.4/Km

Mutual compensation factor KM

=Z
=

M0

/3Z
L1

0.581 /79.4
3 0.484 /79.4

= 0.4 /0
Required fault locator setting

= Protected line impedance


= 100 x 0.484 x 0.12
= 5.80 secondary

Fault locator setting

= KZF x KZPh x 5/In

KZPh = 1 (Optimho selected setting)


Required fault locator multiplier KZF = 5.8
KZF setting 1 to 40 in steps of 0.01
Therefore, set KZF = 5.8
Mutual compensation setting KZM = KM x KZPh
KZPh = 1 /80 (Optimho selected setting)
Therefore KZM

= 0.4 /0 x /80
= 0.4 /80

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R5911D
Chapter 1
Page 87 of 89

KZM setting range 0 to 1.36 in steps of 0.001.


Therefore, select KZM = 0.4
Mutual compensation angle THETA M setting range 50 to 85 in 5 steps.
Therefore, select THETA M = 80
Line units setting Kilometres
Line length setting: 0 to 99.99 in 0.01 steps and 100 to 999.9 in 0.1 steps to be set
at 100 (corresponding to the protected line length)
VT ratio setting:

1/1 or 10/1 to 9990/1 in 10/1 steps to be set to 2000/1


(corresponding to the actual VT ratio)

CT ratio setting:

1/1 or 10/1 to 5000/1 in 10/1 steps to be set to 240/1


(corresponding to the actual CT ratio)

Section 29.

LOSS OF LOAD ACCELERATED TRIP FEATURE

When only three pole tripping is used and no signalling channel is available, a novel
way to achieve an accelerated trip for unbalanced faults at the end zones of the
protected line is the `Loss of Load feature'.
It is based on the operation of Zone 2 comparators and the resetting of the healthy
phase(s) current level detectors. Load current is detected by either the LOW SET or the
HIGH SET current level detectors as selected on the relay menu. Before an accelerated
trip can occur load current must have been present prior to the occurrence of the fault.
The loss of load current in the health phase(s) opens a window of 40ms during which
time an accelerated trip can take place, if the Zone 2 comparators have operated. The
accelerated trip is delayed by 18ms in order to avoid the possibility of a Loss of Load
trip being produced during the clearance of an external fault due to pole scatter
opening of the circuit breaker.
In connection with this feature, it is important to note that the sensitivity of the current
level detectors is linked to the setting of the coarse adjustment KZPh and this current
sensitivity varies in the inverse ratio. That is, it is 5%In for the LOW SET and 7.5%In for
the HIGH SET at the reference setting of KZPh = 1 but they vary in accordance with
the expression 0.05In/KZPh for the LOW SET and 0.075In/KZPh for the HIGH SET for
other values of KZPh. Also that the Zone 2 comparators are gated with the current
level detectors so that on the clearance of external faults, the possible loss of load
causing all the current level detectors to reset would immediately block the Zone 2
comparator and thus avoid an unnecessary trip. Likewise operation of the Switch on to
Fault feature (SOTF) or a protection trip via the distance disables the Loss of Load
feature.

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 88 of 89

Although, the main usefulness of the Loss of Load feature is for use with the BASIC
scheme when no signalling channel is available, it can nevertheless be used in
conjunction with any three pole only tripping scheme to provide high speed back-up
clearance for end zone faults on failure of the signalling channel.
When selected for use with plain or tapped circuits it is essential to note the
relationship between the load current and/or standing current and the current level
detectors should be:
a)

That under normal healthy conditions the load current of the


protected circuit is greater than the effective current setting of the
selected current level detectors.

b)

That under end zone fault conditions the healthy phase(s) standing
current is less than the effective setting of the selected level
detectors.

Loss of Load Accelerated trip logic is:


Zone 2 comparators operation plus resetting of health phase(s) current level
detectors.

29.1

Current level detectors effective setting


The relationship between the load current and/or standing current and the current
level detector effective setting can best be illustrated by the following examples:
Short Transmission Lines
Line length: 5Km
Power system voltage 69KV
Line impedance: Z = 0.4 ohm/Km
1
Line charging current: 0.1A/Km
CT ratio: 500/5
VT ratio: 69000/115
Required Zone 1 reach is to be 80% of the line impedance.
Ratio of secondary to primary impedance =

500 / 5
= 0.1666
69000 / 115

Required Zone 1 reach = 0.8 x 5 x 0.4 x 0.1666

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 89 of 89
= 0.266 secondary

Relay Zone 1 reach = KZ1 x KZPh x 5/In


The relay coarse reach KZPh should be set to the nearest value below the required
Zone 1 reach. It is important to set KZPh as high as possible, since the current setting
of the relay current level detectors are inversely proportional to KZPh and it is best to
have the relay sensitivity as high as possible.
KZ1 x KZPh = 0.266
KZPh settings 0.040 to 1.0 in steps of 0.001
KZ1 settings 1.0 to 49.98 in steps of 0.02
Therefore, select KZ1 = 1.0 and KZPh = 0.266
Low set level detector effective setting =

Line charging current = 5 0.1

0. 05 5
= 0. 94 A
0. 266

5
= 0. 005 A Secondary (negligible)
500

For the Loss of Load feature to function, the line load current under normal healthy
conditions must be greater than the low set current level detector setting of 0.94A
(18.8% of rated current) to satisfy the requirement that load current must have existed
prior to the occurrence of the fault.
The current remaining in the healthy phase(s) when the remote circuit breaker is open
due to the internal fault must be less than the low set current level detector setting of
0.94A to allow the level detector(s) to reset, thereby detecting a `loss of load'
condition. In this example, this current is the line charging current of only 0.005A.
Long transmission lines
Line length: 150Km
Power system voltage:115KV
Line impedance: Z = 0.4 ohm/Km
1
Line charging current: 0.15A/Km
CT ratio: 1000/5
VT ratio: 115000/115
Required Zone 1 reach is to be 80% of the line impedance.
Ratio of secondary to primary impedance =

1000 / 5
= 0. 2
11500 / 115

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 90 of 89

Required Zone 1 reach = 0.8 x 150 x 0.4 x 0.2


= 9.6 secondary
Relay Zone 1 reach = KZ1 x KZPh x 5/In
The relay coarse reach KZPh should be set to the nearest value below the required
Zone 1 reach. It is important to set KZPh as high as possible, since the current setting
of the relay current level detectors are inversely proportional to KZPh and it is best to
have the relay sensitivity as high as possible.
KZ1 x KZPh = 9.6
KZPh settings 0.040 to 1.0 in steps of 0.001
KZ1 settings 1.0 to 49.98 in steps of 0.02
Therefore, select KZ1 = 9.6 and KZPh = 1.0
Low set level detector effective setting =

Line charging current = 150 015


.

0. 05 5
= 0. 25 A
1. 0
5

100

= 01125
.
A secondary

= 2.25% of rated current


For the Loss of Load feature to function, the line load current under normal healthy
conditions must be greater than the low set current level detector setting of 0.25A (5%
of rated current) to satisfy the requirement that load current must have existed prior to
the occurrence of the fault. It can be seen that for long lines where KZPh is large, this
condition is easily satisfied.
The current remaining in the healthy phase(s) when the remote circuit breaker is open
due to the internal fault must be less than the low set current level detector setting of
0.25A to allow the level detector(s) to reset, thereby detecting a `loss of load'
condition. In this example, this current is the line charging current of 0.1125A.
However, currents other than the line charging current may be present in the healthy
phase(s) when the remote breaker opens (for example tapped-off load current). If the
healthy phase current should exceed the low set level detector setting the level detector
sensitivity may be increased by:a)

Selecting the high set current level detectors, which have 1.5 times the low
set setting.
and/or

Service Manual
LFZP 11x
b)

R5911D
Chapter 1
Page 91 of 89
Decreasing the KZPh setting and adjusting all the distance multipliersto
maintain the required zone reaches.

Service Manual
LFZP 11x

Section 30.

R5911D
Chapter 1
Page 92 of 89

MULTIPLE SETTING GROUPS

The concept of multiple setting groups is a recent innovation in distance relays, made
possible since all settings are stored in non-volatile (EEPROM) memory, rather than
being linked to the position of setting switches, as was the case with earlier relays.
Optimho can store up to eight independent groups of settings. The active group is
selected either locally via the menu or remotely via the serial RS232 communications
using a modem.
The ability to quickly reconfigure the relay to a new setting group may be desirable if
changes to the system configuration demand new protection settings.
Typical examples where this feature can be used include single bus installations with a
transfer bus and double bus installations with or without a separate transfer bus, where
the transfer circuit breaker or bus coupler is used to take up the duties of the by-passed
feeder circuit breaker when both the circuit breaker and the current transformers are
by-passed.
In the case of a double bus installation when only two buses are provided it is usual
for bus 1 to be referred to as the main bus and bus 2 as the reserve bus, and for the
by-pass circuit isolator to be connected to bus 2 as shown in Figure 28. This
arrangement avoids the need for a current transformer reversed polarity switch that
would be required if both buses are to be used for by-pass purposes.
The standby relay, associated with the transfer circuit breaker or the bus coupler, can
be programmed with the individual setting required for each of the outgoing feeders.
For by-pass operation the appropriate setting group can be selected as required.
This facility can be extremely usefully in the case of unattended substations were all the
switching can be controlled remotely. Remote control of the relay settings removes the
need for a skilled engineer to travel to site to change the relay settings.
A further use for this novel feature of the relay is the ability to provide alternative
setting for teed feeders or double circuit transmission lines with mutual coupling, for
use when one line is out of service and grounded at both ends.
Similar alternative settings could be required to cover different operating criteria in the
event of the signalling channel or auto-reclose equipment failing, or alternative system
configuration (i.e. lines being switched in or out).

All relays leave the factory with all the setting groups programmed the same and
setting group 1 selected. For those users not requiring multiple setting groups it is
strongly recommended that the active setting group number be left unchanged.

Service Manual
LFZP 11x

R5911D
Chapter 1
Page 93 of 89

MAIN BUS

RESERVE BUS

21

21

FEEDER 1

Figure 28

OPTIMHO
STANDBY RELAY

21

FEEDER 2

Typical double bus installation with by-pass facilities

CHAPTER 2
DESCRIPTION, TECHNICAL DATA

Service Manual
LFZP 11x

Contents
1.
1.1
1.2
1.3
1.4
1.5
2.
3.
3.1
3.1.1
3.1.2
3.1.3
3.1.4
3.1.5
3.1.6
3.1.7
3.2
3.3
3.4
3.4.1
3.4.2
3.4.3
3.4.4
3.4.5
3.4.6
3.5
3.5.1
3.5.2
3.5.3
3.5.4
3.5.5
3.6
3.6.1
3.6.2
3.6.3
3.6.4
3.6.5
3.6.6
3.6.7
3.7
3.7.1
3.7.2
3.8

R5911D
Chapter 2
Contents
Page 1 of 10
Page

INTRODUCTION
General
Features
Benefits
Operating principles
Hardware structure
MECHANICAL LAYOUT
OPERATING INSTRUCTIONS
User interface
Keypad
Serial port
Parellel port
Indication LEDs
Relay available LED.
Alarm LED
Trip LED.
Visual indication of faults or events
View/scroll settings/data
Menu system
Default level
Time-out feature.
Multiple setting groups
How settings and records are stored
Setting trap
Operating the menu
Commission tests
Contact control
On load directional test
Power swing test
Monitor option
Output option
Communications
Access level
Serial Control
Active Port
Baud Rate
Protocol
Control Lines
Communications and multiple setting groups
Fault Records.
Viewing Fault Records
Clearing Fault Records
Metering

1
1
1
2
2
2
7
10
10
10
11
11
11
12
12
12
14
18
20
20
21
21
24
25
26
36
36
37
37
38
39
40
40
40
40
41
41
41
41
42
42
43
43

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LFZP 11x

R5911D
Chapter 2
Contents
Page 2 of 10

Contents

Page

3.9
3.9.1
3.9.2
3.10
3.10.1
3.10.2
3.10.3
3.11
3.11.1
3.11.2
3.11.3
3.11.4
3.12
3.12.1
3.12.2
3.12.3
3.12.4
3.12.5
3.12.6
3.12.7
3.12.8
3.13
3.13.1
3.13.2
3.13.3
3.13.4
3.13.5
3.13.6
3.13.7
3.13.8
3.13.9
3.14
3.14.1
3.14.2
3.14.3
3.14.4
3.14.5
3.14.6
4
4.1
4.1.1
4.1.2
4.1.3

44
44
45
50
50
51
51
52
52
52
52
53
53
54
54
57
60
61
61
61
64
71
71
71
72
73
73
75
75
75
76
78
78
78
79
79
81
83
86
86
86
88
90

Print option
Printing to the parallel port
Printing to serial port .
Identifiers
Group identifier
Software version.
Default display
Calendar clock
Format
Default time & date
Setting time & date
Clock reference
Settings
Contact configuration
Scheme
Distance
Block autoreclose block auto-reclose
VT supervision
Start indication
DEF
Fault locator
Serial communications
Introduction.
Security
Control of serial communications from the relay menu
Hardware connections
Logon procedure
K-Bus interface
Modem requirements
Recommended modems
Optimho serial communication protocol
Test features
Contact control
On load dir test
PwrSwg test
Monitor option
Output options
Parallel test socket
PRINCIPLES OF OPERATION
The comparator
Fundamentals of the comparator
Action of the comparator
Exclusion of noise

Service Manual
LFZP 11x

Contents
4.2
4.2.1
4.2.2
4.2.3
4.2.4
4.2.5
4.2.6
4.2.7
4.2.8
4.3
4.3.1
4.3.2
4.3.3
4.3.4
4.3.5
4.4
4.4.1
4.4.2
4.4.3
4.4.4
4.4.5
4.4.6
4.4.7
4.4.8
4.4.9
4.4.10
4.5
4.5.1
4.5.2
4.5.3
4.5.4
4.5.5
4.5.6
4.5.7
4.5.8
5
5.1
5.2
5.2.1
5.2.2
5.2.3
5.2.4
5.2.5
5.2.6

Pge
Polarising arrangements
Partially cross polarised mho
Synchronous polarising
Offset mho characterisitic
The lenticular characteristic
The quadrilateral characteristic
Two phase to ground faults (quadrilateral characteristic
The offset quadrilateral
Operate and polarising signals LFZP11x
Level detectors
Introduction
Inhibition of the comparator
Single pole tripping
Phase section
Other level detectors
Directional overcurrent ground fault protection (DEF)
Introduction
Implementation
Directional elements
Level detectors
Operation in single pole tripping schemes
Operation with voltage transformer supervision
Magnestising inrush current detector
Polarising
Negative sequence filters
Directional overcurrent backup protection
Fault locator
Introduction
Basic theory for ground faults
Data acquisition
Cyclic buffer processing
Fourier filtering
Distance to fault calculation
Mutual compensation
Metering
SCHEME FUNCTIONS
Level detector pole dead logic
Voltage transformers supervision (VTS)
Purpose
Principle of operation
Outputs
Implemetation
Level detector settings
Speed of operation

Contents
5.2.7

R5911D
Chapter 2
Contents
Page 3 of 10

95
96
99
100
100
101
102
104
105
120
120
120
121
121
122
127
127
127
127
128
128
128
128
129
129
129
135
135
136
138
139
141
141
145
145
150
150
152
152
152
152
152
154
154
Page

Seal-In of block and resetting

154

Service Manual
LFZP 11x
5.2.8
5.2.9
5.2.10
5.2.11
5.2.12
5.2.13
5.2.14
5.2.15
5.3
5.4
5.5
5.6
5.7
5.7.1
5.7.2
5.8
5.9
5.10
5.11
5.12
5.13
5.14
5.14.1
5.14.2
5.15
5.15.1
5.15.2
5.15.3
5.15.4
5.12.5
5.15.6
5.15.7
5.1
5.17
5.18
5.19
6
6.1
6.1.1
6.1.2
6.1.3

Operation for indication only


Operation with line side voltage
Operation with busbar voltage transformers
Operation with single pole tripping
Operation during line energisation with a voltage supply
fault present line VTs
Operation with weak infeed schemes
Operation with MCB
Operation with DEF
Comparator level detector checks
Swith on to fault logic (SOTF)
Power swing blocking (PSB)
Standard schemes in optimho distance
Basic scheme and loss of load accelerated tripping
Basic scheme
Loss of load acceleated trip feature
Zone 1 extension scheme
Permissive undereach scheme (PUR)
Permissive overreach scheme (POR 1)
Permissive overreach scheme (POR 2)
Permissive overreach scheme with weak infeed tripping
(POR 2 WI) trip
Unblocking permissive trip scheme
Blocking schemes
Blocking scheme
Blocking 2 scheme
Current reversal logic
Current reversal POR 1 scheme
Current reversal POR 2 schemes
Current reversal blocking scheme
Current reversal blcoking 2 scheme (Figure 5-20B)
Current reversal DEF FOR 1, POR 2 schemes
Current reversal DEF blocking scheme
Current reversal DEF blcoking 2 scheme
Bandpass filter, memory and comparator count control logic
Trip latching logic
Block auto-reclose logic
external fault locator start logic
MODULE AND BOARD DESCRIPTIONS
Self-monitoring
Introduction
Analogue circuits
Digital bus intergrity

Contents
6.1.4
6.1.5
6.2
6.2.1
6.2.2

R5911D
Chapter 2
Contents
Page 4 of 10
155
155
155
155
156
156
156
157
157
159
162
168
169
169
170
174
174
177
179
183
186
187
187
188
192
192
194
194
194
195
195
196
205
205
208
208
211
211
211
211
212
Page

Memory checks-RAM and EEPROM


Watch-dog monitoring
Main microcontroller software
Introduction
Initialisation

215
215
223
223
223

Service Manual
LFZP 11x
6.2.3
6.2.4
6.2.5
6.2.6
6.3
6.3.1
6.3.2
6.4
6.4.1
6.4.2
6.4.3
6.4.4
6.4.5
6.4.6
6.4.7
6.4.8
6.4.9
6.4.10
6.4.11
6.4.12
6.4.13
6.5
6.5.1
6.5.2
6.5.3
6.5.4
6.5.5
6.5.6
6.5.7
6.5.8
6.6
6.6.1
6.6.2
6.6.3
6.7
6.7.1
6.7.2
6.7.3
6.7.4

Main loop
Timers
Input routine
Output routine
Power supply unit GJ0236
Introduction
Operation
Main microcontroller board ZJ0138
Versions
Introduction
Operation - computer system
Main microcontroller
Slave microcontroller - timers
Identifier circuit
Transceiver and latch circuits - external bus control
External control lines - RD, WR, RS and R/W
EEPROM - non-volatile memory
Serial communication
Monitor circuits
Clock reference circuit
Accessing external memory - bus cycle timing
Front Module GJ0240 (board ZJ0137/ZJ0166
Versions
Mechanical
Liquid crystal display
Keypad operation
Address/Data Bus Checking Circuit
Parallel Port
Indication LEDs
Serial port
Optical isolator board ZJ0133
Introduction
Voltage rating
Implementation
Input module GJ0233
Introduction
Voltage input circuits
Current Input circuits
Optional current circuits

Contents
6.7.5
6.8
6.8.1
6.8.2
6.8.3
6.8.4
6.8.5
6.8.6
6.9

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Chapter 2
Contents
Page 5 of 10
224
224
228
229
231
231
232
234
234
234
235
236
236
236
237
237
238
238
239
239
240
244
244
244
244
245
246
246
249
249
251
251
251
251
253
253
253
255
256
Page

Input module calibration


Level detector doard ZJ0136
Introduction
Implementation
Voltage level detectors
Phase current level detectors
Neutral current level detectors
DEF level detectors (If DEF fitted
Zone 1/Zone 2 mho comparator board(ZJ0130)

257
263
263
263
264
264
264
265
267

Service Manual
LFZP 11x

R5911D
Chapter 2
Contents
Page 6 of 10
6.9.1
Introduction
267
6.9.2
Operation
267
6.10
Zone 3/Zone 6 offset lenticular comparator board (ZJ0131)
272
6.10.1
Introduction
272
6.10.2
Operation
272
6.11
Zone 1/Zone 2/Zone 3 quadrilateral comparator board (ZJ0132)
277
6.11.1
Introduction
277
6.11.2
Operation
277
6.12
Directional overcurrent ground fault protection board (ZJ0139)
284
6.12.1
Introduction
284
6.12.2
Comparators
284
6.12.3
Comparator input signals
284
6.12.4
Directional overcurrent backup protection
286
6.12.5
Magnetising inrush current detector
286
6.13
Fault Locator module GJ0277
288
6.13.1
Introduction
288
6.13.2
80C 186 processor
288
6.13.3
Memory
289
6.13.4
Data and address line buffering
289
6.13.5
Eight channel 12 bit data acrquisition system
289
6.13.6
Watch-dog timer and reset circuit
291
6.13.7
Eight bit parallel communication to protection
291
6.13.8
Mode link connections
291
6.10.9
Test serial I/O port
292
6.13.10 Test eight bit parallel output port
292
6.14
Output relay board ZJ0140
294
6.14.1
Mechanical arrangement
294
6.14.2
Circuit operation description
294
6.14.3
Noise suppression
296
6.14.4
Contact connections to terminal block
297
6.14.5
Operating time and power dissipation
297
6.14.6
Output option
297
6.14.7
Monitor option
297

Service Manual
LFZP 11x

Contents
7
7.1
7.2
7.3
7.4
7.4.1
7.4.2
7.4.3
7.4.4
7.4.5
7.4.6
7.5
7.6
7.7
7.8
7.9
7.10
7.11
7.12
7.13
7.14
7.15
7.16
7.17
7.18
7.19
8
8.1
8.2
8.3
8.4
8.4.1
8.4.2
8.4.3
8.4.4
8.5
8.6
8.6.1
8.6.2
8.6.3
8.6.4
8.6.5
8.6.6
8.6.7

Page
TECHNICAL DATA
Input ratings
Maximum overlaid ratings
Burdens
Distance elements
Settings
Accuracy of distance elements
Current sensitivity
Timers
Polarising
Operate and reset times
Switch on to fault (SOTF)
Voltage transformers supervision (VTS)
Power swing blocking (PSB)
Block auto-reclose
Current transformer requirements
Directional earth fault (DEF)
Fault location and instrumentation
Output contacts
Dimensions
Serial communications
Environmental withstand
Mechanical durability
Voltage withstand
High voltage withstand
Electrical Environment
OPTIMHO DISTANCE RELAY EXTERNAL CONNECTIONS
Power supply (Vx1)
AC voltage
AC current
Optical isolators
Breaker open
Relay blocked
Single pole open
Unblocking schemes
Serial communications port
Output connections
Output relays for LFZP111 without DEF
Output relays for LFZP111 With DEF
Output relays for LFZP112 without DEF
Output relays for LFZP112 with DEF
Output relays for LFZP113
Output relays for LFZP114 without DEF
Output relays forLFZP114 with DEF

Contents
8.6.8

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Chapter 2
Contents
Page 7 of 10

301
301
301
302
302
302
305
305
305
306
306
315
316
316
316
317
317
321
322
326
326
326
327
327
327
327
328
328
328
328
328
329
329
332
332
332
333
334
335
336
337
338
339
341
page

Reserved

343

Service Manual
LFZP 11x
8.6.9

Abbreviations used in contact names

R5911D
Chapter 2
Contents
Page 8 of 10
344

FIGURES
Figure 1-1
Figure 1-2
Figure 2-1
Figure 2-2
Figure 3-1
Figure 3-2
Figure 3-3
Figure 3-4
Figure 3-5
Figure 3-6
Figure 3-7
Figure 4-1
Figure 4-2
Figure 4-3
Figure 4-4
Figure 4-5
Figure 4-6
Figure 4-7
Figure 4-8
Figure 4-9
Figure 4-10
Figure 4-11
Figure 4-12
Figure 4-13
Figure 4-14
Figure 4-15
Figure 4-16
Figure 4-17
Figure 4-18
Figure 4-19
Figure 4-20
Figure 4-21
Figure 4-22
Figure 4-23
Figure 4-24
Figure 4-25
Figure 4-26
Figure 4-27
Figure 4-28
Figure 4-29
Figure 4-30
Figure 4-31
Figure 4-32
Figure 4-33
Figure 4-34
Figure 4-35
Figure 4-36

Selection chart
Electrical structure LFZP 11x series
Quietprocessing area
Module earthing arrangement
Front panel
Typical fault record print out for relay without fault locator
Typical fault record print out for relay with fault locator
Data transfer within optimho
Operation of setting trap
Typical settings print out (LFZP 11x with DEF & fault locator
Serial communications hardware connections
Sequence comparator voltages for mho characteristics
Comparator logic variables
Action of counter in comparator
Effect of high-frequency interference
Effect of exponentialoffset
Sequence comparator
Action of synchronous polarising
Resistive expansion of partially cross - polarised mho
Zone 1/1X.1Y/2 polarising arangement LFZP 111/112/113/114
Comparison of polarised characteristics
Critical angle
Critical angle
Synchronous polarising healthy live line conditions
Synchronous polarising faulty line conditions
Sequence comparator voltages for offset mho characteristic
Lenticular characteristic
Lenticular charac eristic block diagram
Quadrilateral Zone 1
Behaviour for a-b-g fault
Guard Zone logic
Quadrilateral Zone 3
Level detector gating of distance comparators
Level detector
Level detector inhibiting of distance comparators
Biased reference level
Biased neutral current level detectors
Simplified DEF block diagram
DEF control & backup logic
Simplified DEF inhibit and control logic
Principle of magnetising inrush detector
Adaptive negative sequence filters
Two machine equivalent circuit
Superimposed symmetrical components sequence diagram for A-N fault
Optimho fault locator data selection
Optimho fault locator data windows
Optimho fault locator selection of fault current zero

Service Manual
LFZP 11x
Figure 5-1
Figure 5-2
Figure 5-3
Figure 5-4
Figure 5-5
Figure 5-6
Figure 5-7
Figure 5-8
Figure 5-8b
Figure 5-9
Figure 5-10
Figure 5-11
Figure 5-12
Figure 5-13
Figure 5-14
Figure 5-15
Figure 5-16
Figure 5-16b
Figure 5-17
Figure 5-18
Figure 5-19
Figure 5-20
Figure 5-20b
Figure 5-21
Figure 5-22
Figure 5-22B
Figure 5-23
Figure 5-24
Figure 5-25
Figure 5-26
Figure 6-1
Figure 6-2
Figure 6-3
Figure 6-4
Figure 6-5
Figure 6-6
Figure 6-7
Figure 6-8
Figure 6-9
Figure 6-10
Figure 6-11
Figure 6-12
Figure 6-13
Figure 6-14
Figure 6-15
Figure 6-16
Figure 6-17
Figure 6-18
Figure 6-19
Figure 6-20
Figure 6-21

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Chapter 2
Contents
Page 9 of 10
Pole dead logic
Voltage tansformer supervision logic
Low set & high set level detectors gating of comparators
SOTF logic
Characteristic using zone 3
PSB characteristic using Zone 2
Power swing blocking logic
Basic scheme logic
Loss of load accelerated trip feature
Zone 1 extension scheme
Communication receive logic standard schemes
Communication receive leogic unblocking schemes
PUR Scheme
POR 1 scheme
POR 2 scheme
POR 2 weak infeed tripping scheme
Blocking scheme
Blocking 2 scheme
Current reversal in double circuit lines
Current reversal
Current reversal POR 2 & POR 2WI trip schemes
Current reversal Blocking Scheme
Current reversal Blocking 2 Scheme
Current reversal DEF POR 1, Por 2 & Por 2 WI trip schemes
Current reversal DEF blocking scheme
Current reversal DEF Blocking 2 Scheme
Bandpass Filter, memory & count 4 control
Trip Latching logic
Block autoreclose logic
External fault locator start logic
Self monitoring
Monitoring of anomalous conditiions
Digital bus check hardware
Digital bus check cycle
Watchdogs monitoring
Main software loop
Power supply GJ236
Main microcontroller ZJ0138
Program memory read cycle timing
Address decoding circuit for external bus control
Front Panel ZJ137/ZJ166
ZJ0133 optical isolator board
Input board 1 ZJ134
Input board 2 ZJ135
Voltage input circuits
Action of switched bandpass filter
Current input circuits
Level Detectors ZJ136
Zone 1/Zone 2 shaped mho ZJ0130
Directional inhibits and voltage memory processor ZJ0130
Zone 3/Zone 6 offset mho/ lenticular selectable one 3 reverse aped mho zj013

Service Manual
LFZP 11x
Figure 6-22
Figure 6-23
Figure 6-24
Figure 6-25
Figure 6-26
Figure 6-27
Figure 6-28
Figure 6-29
Figure 6-30
Figure 7-1
Figure 7-2
Figure 7-3
Figure 7-4
Figure 7-5
Figure 7-6
Figure 7-7
Figure 7-8
Figure 7-9
Figure 7-10
Figure 7-11
Figure 7-12
Figure 7-13
Figure 7-14
Figure 7-15
Figure 7-16
Figure 7-17
Figure 7-18
Figure 7-19
Figure 7-20
Figure 7-21
Figure 8-1
Figure 8-2

R5911D
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Page 10 of 10
Inhibit comparator controller ZJ0131
Zone 1/Zone 2/Zone 3 quadrilateral ZJ0132
Directional inhibit and Z1 guard Zone logic ZJ0132
Sidelines & pole dead inhibits forward & reverse inhibits ZJ0132
DEF ZJ0139
Fault locator ZJ0165
Output relay board for ZJ0140 & ZJ0140 003
Output relay board ZJ0140 002
Output contact connections to terminal blocks
Zone 1 typical operating times
Zone 1 typical operating times
Zone 1 typical operating times
Zone 1 typical operating Times
Zone 1 typical operating times
Zone 1 typical operating times
Zone 1 typical operating times
Zone 1 typical operating times
Zone 1 typical operating times
Zone 1 typical operating times
Zone 1 typical operating times
Zone 1 typical operating times
Zone 1 typical operating times
Zone 1 typical operating times
Zone 1 typical operating times
Zone 1 typical opearting times
IEC Characteristics(time multiplier=1
American characteristics (time multiplier=1
Arrangement & outline panel mounting horizontal
Arrangement & outline rack mounting
Arrangement & outline panel mounting vertical
Typical external connection diagram
Typical external connection diagram with mutual zero sequence input

Appendix A Optimho menu tree


Glossary

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Section 1. INTRODUCTION
1.1

General
Optimho is produced in several models, each suitable for a specific range of
applications. The LFZP 11x group of relays provide protection for high voltage
transmission lines and underground cables. Table 1 provides a summary of the features
of the LFZP 11x series. Selection of the appropriate model for the application involved
may be aided by the use of the selection chart, Figure 1-1. The complete range of
relays is detailed in Publication R4056.

1.2

Features
The LFZP 11X range of the Optimho relays provide the following features :
a)

Full scheme distance relay with 18 measuring elements.

b)

Phase and ground distance protection.

c)

Typical operating time one cycle for three phase faults.

d)

Integral user interface for easy access to relay setting


and fault records.

e)

Provision for remote communication if required.

f)

Provision for eight independent groups of settings.

g)

Four previous fault records are stored.

h)

Optional directional earth fault protection.

i)

Optional fault location with data recording for post fault analysis
and instrumentation functions.

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1.3

1.4

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Benefits
a)

Wide range (see publication R4056) for accurate


matching to applications.

b)

Remote interrogation reduces the need for site visits.

c)

Fault type / location data reduces outage time.

d)

Self diagnosis reduces maintenance costs.

e)

Vertical case option eases retrofit problems.

f)

Can interface with existing scheme logic.

Operating principles
All models of LFZP11X are full scheme distance relays, having a full set of measuring
elements for each main zone of protection.
The measuring elements use micro controllers to produce a direct software equivalent of
the phase sequence comparators used in Optimho's forerunners, Micromho and
Quadramho. This phase sequence comparator design is well proven, having
accumulated several thousand relay years of successful operating experience.
The phase sequence comparators and level detectors use logic processing to achieve
immunity from maloperation due to noise, such as harmonic distortion, travelling wave
effects, high and low frequency capacitor voltage transformer transients and current
transformer saturation. Operation of the phase sequence comparators and level
detectors can only occur if the input signals are dominated by power frequency
components. Filters are used to ensure this dominance and to optimise the operating
times.

1.5

Hardware structure
All models are built up from a small range of standard printed circuit boards used as
modular building blocks. All models use the same relay case, power supply unit, and
front panel. The relay hardware is bus-structured to allow printed circuit boards to be
plugged into the case in different combinations.
Figure 1-2 is a schematic representation of the electrical structure of the LFZP 11x
series.
The hardware uses several micro controllers to provide the functions of comparators,
level detectors, etc. A main micro controller uses the digital bus to read outputs from the
subsidiary micro controllers, read input signals from the outside world via optically
coupled isolators, communicate with the user interface and perform scheme logic, serial
communications, monitoring and output contact functions.

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Settings, indications, and fault records are stored in non-volatile memory, i.e.
unaffected by loss of dc supply. The layout of the relay case follows the `quiet region'
arrangement introduced in Micromho and Quadramho (see Section 2, Mechanical
Layout).
All settings and records are accessible from the integral user interface, or if preferred,
by the use of a `dumb' terminal connected to the serial communication socket on the
relay front panel. It is also possible to communicate with the relay remotely via the rear
mounted modem serial communication socket. (see Section 3.13)

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111

112

113

114

Phase Distance
Ground Distance
DEF
Fault Location with
Mutual Compensation

o
o

o
o

o
o

Overhead Lines
Underground Cables

18
Z1
Z2
Z3
Z1X
Z1Y

18
Z1
Z2
Z3
Z1X
Z1Y

18
Z1
Z2
Z3
Z1X
Z1Y

No. of Distance elements


Independent Zones
Reach Stepped Zones

12
Z1
Z2
Z1X
Z1Y

Single Pole Tripping


VT Supervision
Power Switching Blocking
Loss of Load Accelerated
Trip Feature
No. of output contacts

24

24

24

24

Schemes
BASIC
Z1 EXTENSION
PUR
PUR UNBLOCK
POR1
POR1 UNBLOCK
POR2
POR2 WI TRIP
POR2 UNBLOCK
POR2 WI TRIP UNBLOCK
BLOCKING
BLOCKING 2

Distance Characteristic
Z1,Z1X,Z1Y,Z2 Phase
Z1,Z1X,Z1Y,Z2 Ground
Z3 Phase
Z3 Ground

m
q/m
L
Q/L

m
m
L
L

m
m
L
L

m
m

DEF Polarising
Neg. Seq. Volts
Zero Seq. Currents
Zero Seq. Volts
Zero Seq. Volts+Current

* = Standard, o = Optional, m = Shaped mho, q = Quadrilateral


Q = Offset quadrilateral/reverse quadrilateral
L = Offset lenticular/reverse shaped mho

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START

TYPE OF SYSTEM

OVERHEAD
TRANSMISSION
LINES

UNDERGROUND
CABLES

YES

YES

QUADRILATERAL GROUND
FAULT ELEMENTS

LFZP113
OPTIONAL FAULT LOCATOR
(BUT SEE SECTION 4.5.1)
NO DEF

YES

NO

LFZP111
OPTIONAL DEF
OPTIONAL FAULT
LOCATOR

ANY OF THE FOLLOWING:


WEAK INFEED POR\UNBLOCKING SCHEME?
BLOCKING SCHEME?
BACK UP FOR REVERSED FAULTS?
POWER SWING BLOCKING

YES

LFZP112
OPTIONAL DEF
OPTIONAL FAULT LOCATOR

Figure 1-1

Selection chart

NO

LFZP114
OPTIONAL DEF
OPTIONAL FAULT LOCATOR

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LFZP 11x

Figure 1-2

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Page 6 of 345

Electrical structure LFZP 11x series

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Section 2. MECHANICAL LAYOUT


In order to ensure that the distance protection is unaffected by conditions of severe high
frequency interference, such as can occur in a high voltage substation,
certain precautions have been taken in designing the physical layout. These are:a)

Separation of interface functions from measuring and control functions. The


interface modules/boards occupy the right and left hand side of the subrack
and provide isolation between all connections with the outside world and
the measuring and control circuitry which occupies the central section of the
subrack (see Figure 2-1). The interface modules/boards provide galvanic
isolation to 5kV peak and filter out high frequency common-mode and
transverse-mode noise signals. The measuring and control circuits therefore
operate in a relatively quiet electrical environment. The need for galvanic
isolation of circuits in the quiet space is eliminated and so the relay internal
d.c. supply centre rail is connected to the case. The case earth stud is in turn
connected to the relay room earth.

b)

Within the ac current and voltage input module, isolating transformers have
screens to minimise primary to secondary capacitance coupling, thereby
attenuating common-mode interference.
The efficiency of any screen is defined more by the electrical strength of the
connection to the common rail or earth than by the design of the screen
itself, so the transformers are mounted on a metal plate and the
transformer screens are connected directly to this plate by short thick wires.
This ensures a low inductance between the screens and earth. A low
inductance is more important than low resistance because of the high rates
of rise of currents that exist in screen connections under interference
conditions.
The screen plate itself is connected to the relay case earth by a wide wiping
contact attached to the top of the module frame.

c)

Three different categories of currents flow to earth. These are signal


currents, power supply currents and screen surge currents. To eliminate
cross-coupling effects, these are conducted by separate paths to the case
earth stud. For convenience, the signal and power supply earth's are
connected to a common ground plane on the PCB backplane which is
employed to provide interconnection of module signals. The ground plane
also affords good screening of the intermodule connections. The ground
plane is connected to the relay case at one mounting point. Fig 2-2 shows
the basic schematic of the relay earthing and screening arrangements and
paths of current flow for some typical common mode surges.

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INPUT/
OUTPUT
1 2

3 4

Ribbon
cable

Interface
Area

PROCESSING

5
6
7
8
9
10
11

AC
INPUT

12
13

"Quiet" Area

Interface
Area

FRONT VIEW (PANEL REMOVED)


Figure 2-1

"Quiet" processing area

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LFZP 11x

Figure 2-2

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Module earthing arrangement

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Section 3. OPERATING INSTRUCTIONS


3.1

User Interface
The operator interface of the Optimho LFZP range of relays consists of:
a)
b)
c)

A two line by 16 character liquid crystal display (LCD).


A seven key keypad.
Two serial communication ports (front mounted designated LOCAL,
rear mounted designated MODEM).
A parallel printer/test port.
Three indication light emitting diodes (LED) designated TRIP (red), ALARM
(yellow) and RELAY AVAILABLE (green).

d)
e)

The operator interface is used to enter settings and obtain information from the relay.
The front panel is shown in Figure 3-1.
3.1.1

Keypad
The keypad consists of four cursor (arrow) keys mounted in a cruciform pattern, a RESET
key, a SET key and a ACCEPT/READ key. With the transparent front cover in position,
only the RESET and ACCEPT/READ keys can be operated via the push buttons mounted
on the transparent front cover.
Removal of the front cover is necessary to gain access to the four cursor keys and the
SET key. No aspect of the relay operation can be changed without using these keys,
provided the serial communications facility is not in use.
The function of each cursor key is as follows:
UP arrow key
DOWN arrow key
LEFT arrow key
RIGHT arrow key

move up in the menu or one step of a setting.


move down in the menu or one step of a setting.
move left in menu.
move right in menu or execute and confirm
command.

The SET key is used to :


a)
b)
c)

Update setting changes.


Clear fault records.
Execute certain commission tests.

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The RESET key is used to :


a)
b)
c)
d)
e)

Clear LCD and LED indications after a protection trip, start, or power
swing has occurred.
Reset the VT supervision alarm contact, LCD and LED indication, and
optional block, after a voltage supply failure has occurred and has
subsequently been corrected.
Ignore any newly entered settings.
Scroll information groups when in View/Scroll mode.
Log off serial communications.

The ACCEPT/READ key is used to :


a)
B)
c)
3.1.2

Page fault data information.


Accept alarms.
Scroll through data contained in information groups when in
View/Scroll mode.

Serial port
Each serial port enables communication via a remote terminal or computer. The rear
(MODEM) port is provided primarily for communication over telephone networks using
a modem. The front (LOCAL) port is provided primarily for communication via a
computer in order to load settings or extract records.

3.1.3

Parallel port
The parallel port is used for driving a local printer or parallel I/O connected
test/monitoring equipment.

3.1.4

Indication LED's
The indication LED's work in conjunction with the LCD to display the current status of the
relay.

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Relay available LED


Under normal working conditions the RELAY AVAILABLE LED is turned on, indicating
that the relay is healthy and available for protection operation. If the RELAY AVAILABLE
LED is off, this indicates one of the following conditions:
a)
b)
c)
d)
e)
f)

The on-load directional commission test is active.


The output option commission test is in use.
A contacts blocked commission option is selected.
The Relay Blocked opto-isolator is energised.
Bulk data transfer over serial communications link is in progress.
An internal failure has been detected. Operation of the protection may
or may not be allowed, depending on the nature of the failure, see
Sections 6.1 and 6.2.
VT supervision feature set to BLOCKED with VT fuse fail occurrence.

g)
3.1.6

Alarm LED
The ALARM LED is used to signal either :
a)
b)

The occurrence of a fault or event which is displayed on the LCD.


Detection of an internal failure which may be indicated on the LCD.

Generally the ALARM LED flashes for the above conditions until the alarm is accepted
by pressing the ACCEPT/READ key. If the alarm condition is accepted the ALARM LED
will turn on permanently. For alarms initiated by faults or events on the power system
the ALARM LED can be turned off either by :
a)

Energising the Reset Indications opto-isolator,


or

b)

Pressing the RESET key, provided the alarm has been accepted, i.e. is
not flashing.

A flashing ALARM LED may, under some conditions, revert to being permanently on or
off for the duration of the condition, these conditions being :
a)
b)
c)
d)
3.1.7

On-load directional commission test is active.


Output option commission test is in use.
Address/data bus failure.
Bulk data transfer via serial communications link in progress.

Trip LED
The TRIP LED is turned on when a protection trip has occurred, it can only be turned off
when either :
a)

The Reset Indications opto-isolator is energised,


or

b)

The RESET key is pressed, provided the ALARM LED is permanently on,
i.e. alarm has been accepted.

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Figure 3-1

Front panel

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3.2

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Page 14 of 345

Visual Indication of faults or events


Faults are defined as any condition which causes a trip. Events are defined as any
conditions which do not cause a trip, i.e., starts, relay blocked, VT fuse failure (provided
the appropriate menu option has been set to block tripping) and a power swing
condition (provided the appropriate menu option has been set to block tripping).
Occurrence of a trip is indicated by the TRIP and ALARM LED's. Information about the
latest zone and phase in which the relay tripped is presented on the LCD , and/or
whether the fault was tripped via the DEF elements if this option is fitted. The display
also indicates whether the trip was time delayed, or aided. Zone information is not
given for a distance aided trip. The time and date at which a fault or event occurs is
presented as a second page of LCD information which can be read using the
ACCEPT/READ key.
A trip produced by the switch on to fault logic is denoted by 'SOTF'. No phase
information is normally given, although if the switch on to fault trip occurred on
auto-reclosing on to an earlier trip, the previous faulty phase information is retained
together with 'SOTF'.
Occurrence of a fault detected by any Zone 2, Zone 3 or forward DEF comparator
operation is termed a 'start'. If the menu option to enable start indication is selected, the
start event, together with details of the phases and zone or zones which started, are
indicated on the LCD and the ALARM LED is flashed. If the menu option to block start
indications is selected, no indication is given for any start event. If the relay goes on to
trip because of the continued presence of the fault, the start information on the LCD is
replaced by the trip information previously described.
The internal trip and/or start information, from which the LCD and LED visual indication
is produced, is stored in non-volatile memory. If the dc supply to the relay is switched
off, the visual indication is only temporarily lost, automatically returning when the dc
supply is restored. The LCD and LED's can only be cleared when either an electrical
reset is applied via the Reset Indications opto-isolator, or by the RESET key (provided the
ALARM LED is not flashing, that is when the fault or event condition has been read and
accepted using the ACCEPT/READ key).
If a subsequent trip (or start, if start indication is enabled) occurs before the LCD and
LED information from a previous fault is cleared, only the information about the most
recent fault is displayed. Information about the last four faults or events displayed by the
relay is stored in non-volatile memory within the relay. This data can be viewed from the
FAULT RECORDS section of the menu.
For relays fitted with the optional fault locator, an additional 18 pages of LCD
information is available. The third page gives the fault location as a percentage of the
line length, or in miles or in kilometres, together with the duration (period) of the fault.
The remaining 17 pages detail the pre-fault and fault voltage and current values. For
certain fault conditions the calculated period, pre-fault voltage and/or pre-fault current
may not be applicable, for these cases 'n/a' is written. Figures 3-2 and 3-3 show typical
fault records. Each page of information can be read in turn by successive presses of the
ACCEPT/READ key. When the last page has been read the display wraps around to
show the first page on the next press of the ACCEPT/READ key. After the third page has
been viewed, the ALARM LED stops flashing and from this point it is possible to reset the
display by pressing the RESET key. If the fault locator is not fitted or the fault or event

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does not initiate the fault locator measuring elements (i.e. VT fuse fail, power swing,
starts (only if blocked), weak infeed trips, or relay blocked), only the first page of fault
information and the second page of time/date information is available. For these cases,
if the fault locator is not fitted; the ALARM LED will stop flashing when the time/date
page is viewed by pressing the ACCEPT/READ key, if the fault locator is fitted; the
ALARM LED will stop flashing when the first page of fault data is reviewed after the
time/date page has been viewed. The fault LCD and LED indications can then be
cleared by pressing the RESET key, provided the fault or event is not still active.
Detection of a power swing is indicated by the ALARM LED flashing and the message
'PwrSwg' on the LCD. If the power swing goes on to cause the relay to trip, the ALARM
LED and 'PwrSwg' LCD indications are retained, together with the TRIP LED and the type
of trip on the LCD. Detection of a power swing causes resetting of any previous trip or
start indications. Power swing indications can be suppressed by selecting the 'PwrSwg
detector blocked' menu option.
In the event of operation of the VT supervision feature the ALARM LED flashes, any
previous fault indication is reset and the message 'V~FAIL' appears on the LCD. If the
VT supervision logic has been set to block operation of the relay comparators by
selecting the 'TO BLOCK TRIP' VT supervision menu option, the RELAY AVAILABLE LED is
extinguished, the Relay Inoperative Alarm contact closes, and the message 'RELAY
BLOCKED' appears on the top line of the LCD with the 'V~FAIL' message on the bottom
line of the LCD.
Energisation of the Block Relay opto-isolator will cause the ALARM LED to start flashing,
reset any previous fault indication, and cause the message 'RELAY BLOCKED' to
appear; also the RELAY AVAILABLE LED will extinguish and the Relay Inoperative Alarm
contact will close. In this case, however, when the Block Relay opto-isolator is
de-energised, the indications and alarms all self reset.

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Z1Y
AB

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DELAY

1995 Oct. 06
13 : 17 : 55

Oldest record

Z1
BC
1995 Nov. 14
23 : 44 : 31
Z1
AN
1995 Dec. 04
02 : 05 : 08
Z2
BN
1995 Dec. 23
15 : 34 : 58
Figure 3-2

DELAY
Latest record

Typical fault record print out for relay without fault locator

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Z1
AN

Note, only one record shown.

1995 OCT. 01
08 : 54 : 20
LOC.= 60.1 %
PERIOD = 45 ms
PRE - FAULT Va
63.50 KV / 0.0
PRE - FAULT Vb
63.50 KV / -120
PRE - FAULT Vc
63.50 KV / 120
PRE - FAULT Ia
1.0 KA / -10.0
PRE - FAULT Ib
1.0 KA / -130.0
PRE - FAULT Ic
1.0 KA / 110.0
FAULT Va
36.73 KV / -1.8
FAULT Vb
63.50 KV / -120
FAULT Vc
63.50 KV / 120.0
FAULT Vo
7.643 KV / 178.9
FAULT V2
7.717 KV / -179.9
Figure 3-3

Typical fault record print out for relay with fault locator

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FAULT Ia
3.67 KA / -85.4
FAULT Ib
1.0 KA / -130.0
FAULT Ic
1.0 KA / 110.0
FAULT Io
1.224 KA / -85.4
FAULT I2
1.223 KA / -85.4
FAULT Im
0.223 KA / -85.4
Figure 3-3 continued .

3.3

View/scroll relay settings/data


Menu scrolling of settings/data is available via the use of the RESET and READ keys. The
scrolling feature is only active when the relay display is at the root or default level, that
is, when the display page shows one of the following :
'
'

'
'

(A blank display)

or

'.OPTIMHO
'

'
'

(User identifier string of up to 32


characters)

or

'ACTIVE SETTINGS
'GROUP = 1

'
'

Active setting group selected)

or

'Please set
'CALENDAR CLOCK

'
'

(If clock has not been set)

or

'PwrSwg TEST
'ENABLED

'

(If commission test option selected)

'
'

(If commission test option selected)

or

'

'Contacts blocked
'

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or

'ERROR# SLOT No 1
'5 6 7 8 9 10 11 '

'
(Diagnostics message indicates slot
number of faulty board/s)

or

'ERROR# I~FAIL
'

'
'

(Diagnostics message if anomalous


current condition detected i.e. Neutral
current flowing for no obvious reason)

In order to clarify the setting/data information stored within the relay, the information is
segregated and grouped under the following sections :
LAST FAULT
LAST FAULT 1
LAST FAULT 2
LAST FAULT 3
METERING
(Only if fault locator fitted)
IDENTIFIERS
CALENDAR CLOCK
COMMUNICATIONS
CONTACT CONFIG
SCHEME
DISTANCE
BLOCK AUTO RECLOSE
VT SUPERVISION
START INDICATION
DEF
(Optional for LFZP 111, 112 & 114)
FAULT LOCATOR
(Optional)
Pressing the RESET key (from one of the above default display pages) will bring up the
display :
'View / Scroll
'LAST FAULT

'
'

Repeated presses of the RESET key will scroll through the above list of information
groups.
To view settings or information contained in each group the READ key is pressed. The
first setting of the group is then displayed. Repeated presses of the READ key will scroll
each setting in turn. The order in which settings are presented is as listed in the menu
tree (Appendix A). When the last setting/data item of a particular group has been
viewed, a wrap around feature will display the first setting/data item on the next press
of the READ key. When the RESET key is pressed the display returns to the root or
default level. When the last group option (i.e. FAULT LOCATOR, if fault locator is fitted)
has been scrolled through using the RESET key, the display returns to the root or default
level.

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Menu system
The operator interface operates on the tree like menu system shown in Appendix A.
Each item in a branch of the menu forms a page of information when it is displayed on
the LCD,
e.g., 'OPTIONS'
'CALENDAR CLOCK'
is a page of information.
The cursor (arrow) keys are used to move around the menu tree, enabling the user to :
a)
b)
c)
d)

3.4.1

Change settings
Execute commands
Reconfigure the relay during commissioning
View settings

Default level
The top of the menu tree is designated the default level. When the operator interface is
not in use the liquid crystal display will always show an appropriate default page. The
normal default or root page will be as selected in the
'OPTIONS
'
'IDENTIFIERS '
section of the menu. This will be either a blank page, a group identification string of up
to 32 characters which has been entered by the user (see Section 3.10) or,
the active setting group number selected. Under certain conditions, as indicated below,
the root page may be replaced by one of the following default pages which are listed in
a hierarchical order, item a) having the highest precedence :
a)

'Serial Comms

'

If serial communications is logged on.


Note, serial communications can only log on
when either a root page or one of the default
pages b) to h) below are displayed.

b)

'Push SET to
'update changes

'
'

Only if setting changes have been made.

'Push SET to
'update group

'
'

Only if active setting group no. has


been changed.

'Z1
'AN V FAIL

'
'

Fault or event information.

or

c)

d)

'PwrSwg TEST
'ENABLED

' If the power swing test commission


' option has been selected.

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e)

'Contacts blocked

' If either the 'contacts blocked' or


'the 'contacts blocked except any trip'
commission options have been selected.

f)

'ERROR # SLOT No 1
'5 6 7 8 9 10 11

' Diagnostic information, if any faults have


'
been detected.

g)

'ERROR # I FAIL

'
'

Diagnostic information, if anomalous


condition has been detected .

h)

'Please set
'CALENDAR CLOCK

'
'

If power up reset has occurred.

Timeout feature
If no key is pressed within a 15 minute interval, an appropriate root or default page is
automatically selected.

3.4.3

Multiple setting groups


The currently active working relay settings constitute a setting group. Eight independent
setting groups can be stored within the relays non-volatile (EEPROM) memory. Each
setting group can be pre-programmed and then selected to become the active working
setting group by a menu option to select the group number required.
The concept of multiple setting groups is a recent innovation made possible since all
settings are stored in non-volatile (EEPROM) memory, rather than being linked to the
position of setting switches, as was the case with earlier relays. The ability to quickly
reconfigure the relay to a new setting group may be desirable if changes to the system
configuration demand new protection settings. For instance, maintenance outage time
may be reduced by substituting a spare relay, pre-programmed with setting groups
which match a number of different relays, and selecting the setting group required.
Changing setting groups
The active setting group selection is made from the
'OPTIONS
'ACTIVE SETTINGS

'
'

section of the menu. The method used to change any setting within the relay is a
general one and is applicable to all setting changes, refer to Section 3.4.6 (Operating
the Menu). Before any setting group change is implemented the user is requested for
confirmation at a 'group trap' page when exiting from the menu back to the default
level.
From the 'group trap' page :
'push SET to
'update group
the user has the option of :

'
'

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a)

pressing the SET key to confirm the setting group change, this
reconfigures the relay to the new setting group.
or

b)

pressing the RESET key to ignore the setting group change.


or

c)

pressing the RIGHT arrow key to re-enter the menu.

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If the SET key is pressed, the page :


'settings group
'updated

'
'

appears. From this page, pressing the LEFT or RIGHT arrow keys steps the user to :
'OPTIONS
'ACTIVE SETTINGS

'
'

If the RESET key is pressed, the page :


'settings group
'change ignored

'
'

appears.
From this page, pressing the LEFT or RIGHT arrow keys steps the user to :
'OPTIONS
'ACTIVE SETTINGS

'
'

If the RIGHT arrow key is pressed, the page :


'OPTIONS
'ACTIVE SETTINGS

'
'

is stepped to. Notice that the UP/DOWN keys have no effect from this page until the
group change has been confirmed or ignored by pressing SET or RESET from the group
trap page. This restriction prevents the settings from within a group being changed
whilst confirmation of a group change is still pending.
Active settings group as a default page
If required, the active settings group page can be displayed as a default page by
selecting this option from the DEFAULT DISPLAY section of the IDENTIFIERS section of
the menu. This feature may be useful for commissioning purposes in order to easily
confirm the currently selected setting group.
Factory default settings
All relays leave the factory with the active setting group number set to 1. For those user
not requiring multiple setting groups it is strongly recommended that the active setting
group number be left unchanged.

Changing or reading active setting group values via remote serial comms.

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The GECA T&D PC based communications program 'Opticom' (Publication number


R-5928) has been specifically developed to run under MS-DOS 3.2 or above to
facilitate remote communications with Optimho. Opticom enables the user to send and
retrieve settings and data from a remote relay, it also allows the user to manipulate any
of the relays 8 setting groups.Opticom enables the user to send and retrieve settings
and data from a remote relay, it also allows the user to manipulate any of the relays 8
setting groups. For information on the application of Optimho over K-Bus see
publication R8532, KITZ103.
3.4.4

How settings and records are stored


There are 3 distinct areas of memory used to store relay settings and records,
these are :
a)
b)
c)

Working RAM
Scratchpad RAM
EEPROM (Electrically programmable and erasable ROM)

Working RAM
This area of memory stores all the settings to which the relay is actually set.
Scratchpad RAM
This area of memory holds a temporary copy of all the most recent setting changes
made prior to updating the changes. If these recent setting changes are confirmed, the
Scratchpad RAM is copied to the Working RAM. If the recent settings changes are
cancelled, the temporary Scratchpad RAM copy is over written with a copy of the
Working RAM.
EEPROM
This area of memory is non-volatile, that is, it maintains the information stored within it
even if the dc supply is removed. This area of memory is copied to the Working RAM
after a dc power up, but only written to, and read from, if settings changes are updated
or a fault condition occurs.
Figure 3-4 illustrates how the transfer of settings and records between each area of
memory is implemented for each of the following conditions :
a)
b)
c)
d)

DC power up
Updating recent changes
Cancelling recent changes
Storing fault records

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Setting trap
In order to implement all setting changes at once, a so called 'setting trap', as illustrated
in Figure 3-5, is used. The default display page :
'Push SET to
'
'update changes '
appears if setting changes have been made, whenever the user exits from the menu
tree.
At this point the user has three options, these are :
a)

Push SET key to update settings changes, this reconfigures the relay to
these changes and stores the changes in working RAM memory and nonvolatile EEPROM memory.
or

b)

Push RESET key to cancel and ignore all recent setting changes,
or

c)

push the RIGHT arrow key to move back into the menu.

If the SET key is pressed, the confirmation display page :


'all changes
'updated

'
'

appears. From this page, pressing the LEFT arrow key returns the user to the root
display or a default display if a default condition is active, pressing the RIGHT arrow key
steps the user to :'OPTIONS
'PRINT

'
'

(Note, this page is located in the menu above the setting trap)
If the RESET key is pressed, the display page :
'all changes
'ignored

'
'

appears. From this page, pressing the LEFT or RIGHT arrow keys has the same effect as
above.
If the RIGHT arrow key is pressed, the page :
'OPTIONS
'IDENTIFIERS

'
'

is stepped to. Notice that this page is the first page in the menu tree immediately below
the setting trap. This page is stepped to because at this stage no commitment has been

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taken to update or ignore the setting changes made. The menu sections ACTIVE
SETTINGS, PRINT, FAULT RECORDS and METERING (if Fault Locator fitted) are all
located above the setting trap and as such are unavailable until the current changes are
either updated or ignored by pressing SET or RESET at the setting trap.
3.4.6

Operating the menu


The four cursor (arrow) keys are used to navigate around the menu tree. The function of
each key is to move the user one step at a time in the direction of the arrow for each
press of the key. A key press repeat feature will automatically initiate successive key
presses at about a rate of 1 press per second if a key is maintained pressed. The
following examples illustrates how the cursor keys are used to navigate around the
menu and change a setting.
Example 1 - Setting contact configuration
From the root or default page,
1)

Press RIGHT arrow key to step to :


'OPTIONS
'ACTIVE SETTINGS

2)

Press DOWN arrow key to step to :


'OPTIONS
'PRINT

3)

'
'

Press DOWN arrow key to step to :


'OPTIONS
'METERING

5)

'
'

Press DOWN arrow key to step to :


'OPTIONS
'FAULT RECORDS

4)

'
'

'
'

Press DOWN arrow key to step to :


'OPTIONS
'IDENTIFIERS

'
'

(Only if Fault Locator fitted).

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Press DOWN arrow key to step to :
'OPTIONS
'
'CALENDAR CLOCK '

7)

Press DOWN arrow key to step to :


'OPTIONS
'
'COMMISSION TESTS'

8)

Press DOWN arrow key to step to :


'OPTIONS
'
'COMMUNICATIONS'

9)

Press DOWN arrow key to step to :


'OPTIONS
'SETTINGS

'
'

(Note, in this instance it would have been quicker to press the UP arrow key from the
page :
'OPTIONS
'ACTIVE SETTINGS

'
'

since the presentation order of pages in the menu tree automatically wraps around
from bottom to top or top to bottom).
10)

Press RIGHT arrow key to step to :


'SETTINGS
'
'CONTACT CONFIG '

11)

Press RIGHT arrow key to step to :


'CONTACT CONFIG- '
'URATION NO. 01
'

12)

Press RIGHT arrow key to obtain above page with alternating up/down arrow
after CONFIGURATION NO. 01.

Note that settings can only be changed when the alternating up/down arrow is
showing.
13)

Press DOWN arrow key to select :


'CONTACT CONFIG '
'URATION NO. 02
'

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Note:

in this case, Contact configuration No.1 is the actual relay setting held in
current memory and non-volatile memory. Changing this setting to
CONFIGURATION NO. 02 does not change the actual relay setting at this
stage. Instead, the new setting is held in temporary memory and is only
transferred to the current memory and non-volatile memory if the user
confirms the update of settings, at the setting trap, when exiting the menu.
The mechanism used is described in step 17) below.

14)

Press LEFT arrow key to remove alternating up/down arrow.

15)

Press LEFT arrow key to step to :


'SETTINGS
'
'CONTACT CONFIG '

16)

Press LEFT arrow key to step to :


'OPTIONS
'SETTINGS

17)

'
'

Press LEFT arrow key to step to :


'Push SET to
'update changes

'
'

Note, this is the settings trap default page which appears whenever any setting changes
have been made. At this point the user has the option of :
a)

pressing the SET key to confirm the setting changes, reconfigure the relay
to these changes and store the changes in the current memory and
non-volatile memory.
or

b)

pressing the RESET key to ignore setting changes.


or

c)

pressing the RIGHT arrow key to re-enter the menu.

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If the SET key is pressed, the page :


'all changes
'updated

'
'

appears. From this page, pressing the LEFT arrow key steps the user back to the root
display or a default display if a default condition is active, pressing the RIGHT arrow key
steps to :'OPTIONS
'ACTIVE SETTINGS

'
'

If the RESET key is pressed, the page :


'all changes
'ignored

'
'

appears. From this page, pressing the LEFT or RIGHT arrow keys has the same effect as
above.
If the RIGHT arrow key is pressed, the page :
'OPTIONS
'IDENTIFIERS

'
'

is stepped to. Notice that this page is the first page in the menu tree immediately below
the setting trap. This page is stepped to because at this stage no commitment has been
taken to update or ignore the setting changes made. The menu sections ACTIVE
SETTINGS, PRINT, FAULT RECORDS and METERING (if Fault Locator fitted) are all
located above the setting trap and as such are unavailable until the current changes are
either updated or ignored by pressing SET or RESET at the setting trap.
Example 2 - Setting the time and date
When the relay is first powered up the default display page will be :
'Please set
'
'CALENDAR CLOCK '
provided no higher priority default conditions are active. Since this page will always be
displayed whenever the relay is powered up the menu treats this condition as a special
case by stepping the user directly to the CALENDAR CLOCK branch of the menu,
instead of the PRINT section, when the RIGHT arrow key is pressed.

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From the default display page :


'Please set
'
'CALENDAR CLOCK '
1)

Press RIGHT arrow key to move to :


'OPTIONS
'
'CALENDAR CLOCK '

2)

Press RIGHT arrow key to move to :


'CALENDAR CLOCK '
'READ TIME & DATE '

3)

Press DOWN arrow key to move to :


'CALENDAR CLOCK '
'SET TIME & DATE
'

4)

Press RIGHT arrow key to move to :


'SET TIME & DATE
'SET YEAR 1995

'
'

5)

Press RIGHT arrow key to obtain above page with alternating up/down arrow
after 1995. Note that settings can only be changed when the alternating
up/down arrow is showing.

6)

Press UP or DOWN arrow key to increment or decrement the year value.


An acceleration feature is provided to speed up numerical setting changes
when the UP or DOWN keys are held pressed.
Note, the value 1995 is the actual relay setting held in current memory and
non-volatile memory. Entering a new value does not change the actual relay
setting at this stage. Instead, the new value is held in temporary memory. Any
changes to the time/date values are only transferred to current memory when
the user steps back to the page :
'CALENDAR CLOCK '
'SET TIME & DATE
'

as described in step 13) below. New time/date values are only transferred to nonvolatile memory if the user confirms the update of settings when exiting the menu. The
mechanism used is described in step 15) below.

7)

When the desired year is obtained, press LEFT arrow key to remove the
alternating up/down arrow.

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Press DOWN arrow key to step to :
'SET TIME & DATE
'SET MONTH Jan

'
'

9)

Press RIGHT arrow key to obtain above page with alternating up/down arrow
after Jan.

10)

Use UP or DOWN arrow keys to change month.

11)

When the desired month is obtained, press LEFT arrow key to remove the
alternating up/down arrow.

12)

Repeat the above procedure to set the DAYS, HOURS, MINUTES and
SECONDS values.

13)

From the page :


'SET TIME & DATE
'SET SECOND 0

'
'

press LEFT arrow key to step to :


'CALENDAR CLOCK '
'SET TIME & DATE
'
Note, the time and date is set at this point, i.e. when the LEFT arrow key is pressed to
step back to above page.
14)

Press LEFT arrow key to step to :


'OPTIONS
'
'CALENDAR CLOCK '

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15)

Press LEFT arrow key to step to :


'Push SET to
'update changes

Note:

'
'

this is the settings trap default page which appears whenever any setting
changes have been made. At this point the user has the option of:
a)

Pressing the SET key to confirm the setting changes, reconfigure the relay
to these changes and store the changes in non-volatile memory. Note,
the actual time/date stored at this point is that time at which the SET key
is pressed, this will be the time/date which was set in the CALENDAR
CLOCK section plus the time interval that has elapsed prior to the SET
key being pressed. The time/date value stored in non-volatile memory is
used on setting printouts to indicate when settings were last updated and
is also used to restore an initial time/date value when the relay is
powered up.
or

b)

Pressing the RESET key to ignore setting changes. Note, since the
time/date is a special case, the time/date as set in the CALENDAR
CLOCK section remains active until the dc supply to the relay is
removed. On power up the relay time/date will default to the time/date
which was recorded when the SET key was last pressed to update
settings.
or

c)

Pressing the RIGHT arrow key to re-enter the menu.

If the SET key is pressed, the page :


'all changes
'updated

'
'

appears.
From this page, pressing the LEFT arrow key steps the user back to the root display or a
default display if a default condition is active, pressing the RIGHT arrow key steps to:
'OPTIONS
'ACTIVE SETTINGS

'
'

If the RESET key is pressed, the page :


'all changes
'ignored

'
'

appears. From this page, pressing the LEFT or RIGHT arrow keys has the same effect as
above.

If the RIGHT arrow key is pressed, the page :

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'OPTIONS
'IDENTIFIERS

'
'

is stepped to. Notice that this page is the first page in the menu tree immediately below
the setting trap. This page is stepped to because at this stage no commitment has been
taken to update or ignore the setting changes made. The menu sections ACTIVE
SETTINGS, PRINT, FAULT RECORDS and METERING (if Fault Locator fitted) are all
located above the setting trap and as such are unavailable until the current changes are
either updated or ignored by pressing SET or RESET at the setting trap.

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WORKING
RAM
MEMORY
SCRATCHPAD
RAM
MEMORY

EEPROM
MEMORY

Data Transfer on DC Power Up

WORKING
RAM
MEMORY
SCRATCHPAD
RAM

EEPROM

MEMORY

MEMORY

Data Transfer when Setting Changes Updated

WORKING
RAM
MEMORY
SCRATCHPAD
RAM

EEPROM
MEMORY

MEMORY

Data Transfer when Setting Changes Ignored

WORKING
RAM
MEMORY
SCRATCHPAD
EEPROM

RAM
MEMORY

MEMORY

Data Transfer when Recording Faults or Events


Figure 3-4

Data transfer within Optimho

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Operation of setting trap

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Commission tests
This section of the menu provides necessary test and monitoring facilities for
commissioning the relay. Refer to Commissioning Instructions and Test Features (Section
3.14) for more detailed explanations on the use and implementation of these features.
Options provided are :
a)
b)
c)
d)
e)

3.5.1

Contact control
On load directional testing
Power swing testing
Monitor options
Output options

Contact control
Options provided are :
a)

'ALL CONTACTS
'ENABLED

'
'

This is the normal working setting

b)

'ALL CONTACTS
'BLOCKED

'
'

Operation of all relay functions are as


normal except for final trip signals issued
to output trip relays which are blocked.

c)

'CONTACTS
'BLOCKED EXCEPT
'ANY TRIP

'
'
'

Operation of all relay functions and


'Any Trip' output relay are as normal
except for final trip signals issued to
output trip relays which are blocked.

Note:
1)

The above contact options are only active when the SET key is pressed at the
setting trap page :
'push SET to
'update changes

'
'

to reconfigure the relay with the new settings.


2)

Provided no other higher priority default messages are active (see Section
3.4.1), the default display page :

'Contacts blocked
'
'
'
is displayed at the default level if either of the contacts blocked options b) or c) has
been selected.
3)

3.5.2

In the event of a dc power up or software reset the contact control option


selected when settings were last updated is restored.

On load directional test

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This test is only active when the SET key is pressed from the page :
'ON LOAD DIR TEST
'push SET to test

'
'

When the test is actioned, by pressing the SET key, the relay is reconfigured to enable its
measuring circuits to respond to the test condition (see Test Features Section 3.14). Also,
the RELAY AVAILABLE LED is turned off and Relay Inoperative Alarm contact closes.
One of the following three pages will be displayed :
a)

'Fault seen as
'FORWARD

'
'

b)

'Fault NOT seen


'as FORWARD

'
'

c)

'Test aborted
'check I &/or V

'
'

Page c) will result if any current or voltage level detectors are not picked up.
Note:

3.5.3

if the ACCESS LEVEL (COMMUNICATIONS section) is set to LIMITED the


ON LOAD DIR TEST option feature is not accessible.

Power swing test


Options provided are:
a)
b)

'PwrSwg TEST '


'DISABLED

'

'PwrSwg TEST '


'ENABLED

'

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Note:
1)

The above power swing options are only active when the SET key is pressed at
the setting trap page :
'push SET to
'update changes

2)

'
'

Provided no other higher priority default conditions are active (see Section
3.4.1), the default display page :
'PwrSwg TEST
'ENABLED

'
'

is displayed at the default level if the that option has been selected.

3.5.4

3)

Monitor option number 8 is used to monitor the relay response to this test.

4)

In the event of a dc power up or software reset the power swing test option
selected when settings were last updated is restored.

Monitor option
This feature allows the status of various internal signals such as level detectors or
comparators to be monitored as discrete logical values (e.g. 0 or 1) either on the LCD
or at the PARALLEL port. Refer to Test Features Section 3.14 for a detailed listing of each
option.
Monitor signals for the option selected are always sent to the PARALLEL port and appear
at pins 2 through to 9, the same signals are displayed on the LCD when the monitor
option page is viewed. When viewed on the LCD or measured on the PARALLEL port,
the monitor option selected is always active, there is no need to step back through the
setting trap to action a particular option.
Since monitor option signals are always sent to the PARALLEL port, regardless of the
current menu display, it may, depending on equipment available, be more
advantageous to monitor the port signals rather than the LCD signals.
In the event of a dc power up or software reset the monitor option number displayed is
that option which was selected when settings were last updated.

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Output option
Trip testing on individual or groups of output relays can be performed using this option.
Refer to Test Features Section 3.14 for a detailed listing of each output option.
Provided contacts have not been blocked by selecting either of the contact control
commission test blocking options, trip tests are activated whenever the SET key is
pressed from the display page :
'push SET to test
'OUTPUT OPT # xx

'
'

The selected output relay/s will remain energised until the SET key is released. If
contacts have been set to blocked, the page :
'Contacts blocked
'

'
'

is displayed and no contacts are energised when the SET key is pressed.
Note:
1)

When the page :


'push SET to test
'OUTPUT OPT # xx

'
'

is displayed the relay is taken out of service, the RIA contact closes and the
green RELAY AVAILABLE LED is extinguished. The relay is put back in service
when the <- key is pressed to return to the page :
'COMMISSION TEST
'OUTPUT OPTION

'
'

2)

Since the output test option results in a change of relay status when the relay
is taken out of service, the 15 minute time out feature, which normally returns
the relay display to an appropriate default level, is not applicable.

3)

If the ACCESS LEVEL (COMMUNICATIONS section) is set to LIMITED the


output test option feature is not accessible.

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3.6

Communications

3.6.1

Access level
In applications where remote serial communication facilities are used (see Section
3.13), it may be deemed necessary to provide total security against unauthorised access
in order to prevent any changes being made to relay settings. The ACCESS LEVEL
setting, which can be set to LIMITED or FULL, provides this security.
When serial communications is logged on to the MODEM (rear) port and the access
level is set to LIMITED, all settings can be viewed but only the time and date settings can
be changed. Also, the CLEAR ALL RECORDS option and the commission options for ON
LOAD DIR TEST and OUTPUT OPTION are not available. Alteration of time and date
values is allowed since it may be necessary to reset the time/date in the event of a dc
power failure.
When the serial communications is logged on to the LOCAL (front) port and the access
level is set to LIMITED, all settings can be viewed but only the time and date, and
ACCESS LEVEL settings can be changed. Also, the CLEAR ALL RECORDS option and the
commission options for ON LOAD DIR TEST and OUTPUT OPTION are not available.
When the serial communications is logged on to the MODEM or LOCAL ports and the
access level is set to FULL, all settings can be viewed and changed.

3.6.2

Serial control
The serial communications feature allows :
a)
b)
c)

Fault records to be viewed remotely,


Settings to be viewed and changed remotely,
Bulk transfer of settings, fault records and metering information (if fault
locator is fitted) using GEC ALSTHOM T&D Protection & Control PC
based software `Opticom'

Refer to Section 3.13 for information regarding the implementation and use of the
serial communication facility.
3.6.3

Active port
Only one of the serial ports, LOCAL or MODEM, can be active at any one time. This
menu option is used to select either the LOCAL (front) or MODEM (rear) serial control
port as the active port.

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Baud rate
Separate BAUD rate settings are available for LOCAL and MODEM ports.
These are :
300, 600, 1200, 2400 & 4800.

3.6.5

Protocol
Separate protocols are available to set up the bit framing (DATA, PARITY, STOP) for
LOCAL and MODEM ports. Protocols available are :
DATA
8
8
8
8
7
7
7
7
7

3.6.6

PARITY
NONE
EVEN
ODD
NONE
EVEN
ODD
EVEN
ODD
NONE

STOP
1
1
1
2
1
1
2
2
2

Control lines
This option is only applicable to the MODEM (rear) port. If modem control lines CTS
(clear to send), DTR (data terminal ready), RTS (request to send) and DSR (data set
ready) are required, this option should be set to :
'CONTROL LINES
'IN USE

'
'

If modem control lines are not required, this option should be set to :
'CONTROL LINES
'NOT IN USE
3.6.7

'
'

Communications and multiple setting groups


The branch of the menu tree containing all the communication settings (Sections 3.6.1
to 3.6.6) appears in each of the setting group's individual menu trees. However these
settings are common to all the setting groups and are copied into the other setting
groups when a setting group is updated.

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Fault records
The most recent four records are stored by the relay, the latest being LAST FAULT and
the oldest being LAST FAULT - 3.

3.7.1

Viewing fault records


Fault (or event) records can be viewed using the VIEW/SCROLL feature (see Section 3.3)
or by entering the FAULT RECORDS branch of the menu tree. If a fault record has
previously been cleared the page :
'No record
'

'
'

is displayed when that fault record is viewed.


Viewing fault records with fault locator not fitted
Each fault record comprises two display pages. The first page contains all information
pertinent to the fault or event (except time/date). The second page displays the
time/date of the fault or event. Figure 3-2 shows a typical fault record.
Viewing fault records with fault locator fitted
The fault record will comprise either 2 or 20 pages depending on whether the fault or
event initiated the fault locator measuring elements (see Visual Indication of Fault
Records, Section 3.2). If the fault locator measuring elements were initiated, the fault
record will comprise 20 pages, otherwise it will comprise 2 pages.
The first page always contains all information pertinent to the fault or event (except
time/date) obtained from the distance (and DEF if fitted) measuring elements.
The second page displays the time/date of the fault or event.
The third page displays the fault location (in Km, miles or percent) and the period
(duration) of the fault.
The remaining 18 pages display the pre-fault and fault voltage and current values.
Figures 3-2 and 3-3 show typical fault records.
Note:

For certain fault conditions the calculated period, pre-fault voltage and/or
pre-fault current may not be applicable, for these cases 'n/a' is written, refer
to Section 4.5.4 for further details.

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Clearing fault records


The facility to clear fault records is provided primarily to enable all fault records to be
cleared subsequent to commissioning. Note that :
a)

ALL fault records are cleared by the clear records feature.

b)

The clear records facility is only available if the ACCESS LEVEL (in
COMMUNICATIONS section) is set to FULL.

To clear all fault records the SET key is pressed from the display page :
'push SET to
'
'clear all records '
The confirmation display page :
'all records
'cleared

'
'

appears if SET is pressed.


Note:
3.8

Fault records can be viewed using the view/scroll feature (see Section 3.3).

Metering
The metering option is only available on relays which have the optional fault locator
fitted.
Primary three phase voltage and current are measured and displayed in magnitude
(rms) and phase angle relative to phase A voltage. Real and reactive powers are also
measured.
Note:

Measured values are relative to the VT and CT ratios set in the FAULT
LOCATOR section of the menu.

Metering can be obtained by using the VIEW/SCROLL feature (see Section 3.3) or by
entering the METERING section of the menu tree.
If the fault locator PCB is fitted to the LFZP 113 relay for cable applications, it is
possible to use the metering feature. Although the fault locator will also be available,
there will be inaccuracy in fault measurement due to the cable capacitance

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Print option
The print facility can be used in conjunction with either :
a)

A parallel printer plugged into the relay PARALLEL port socket,


or

b)

Remote or local serial communications equipment connected to the


appropriate rear or front SERIAL port socket.

Two menu options are available, these are :


a)

Print all settings


and
b)
Print fault records.
Settings are printed in the same order as they appear in the menu tree. Fault records
are printed oldest (least recent) first and latest (most recent) last.
Typical printouts for each option are show in Figures 3-2, 3-3 and 3-6.
3.9.1

Printing to the parallel port


Printing is directed to the PARALLEL port provided serial communications is not logged
on. If serial communications is logged on, printing is only directed to the active SERIAL
port. The active serial port is selected in the COMMUNICATIONS section of the menu.
Appropriate printer connections for the 25 way PARALLEL socket are detailed in Table
3-1.
Note:

for correct printer operation pin 10 and pins 12 to 21 should not be


connected.

When the -> key is pressed from the LCD display page :
'push -> to print
'all settings
or
'push -> to print
'fault records

'
'
'
'

the relay checks if a printer is connected and is 'on line'. If no printer is connected or the
printer is not 'on line' the LCD will display the page :
'printer not
'ready
'

'

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If a printer is connected and is 'on line' the LCD will display the page :
'printing in
'progress

'
'

and printing will commence. Should the printer run out of paper or go 'off line' whilst
printing is in progress the LCD will display the page :
'printer not
'ready

'
'

When the printer goes back 'on line' the LCD will display the page
'printing in
'progress

'
'

and printing will resume.


Printing can be terminated by pressing the <- key to return the LCD display to the page
:
'push -> to print
'all settings
or
'push -> to print
'fault records

'
'
'
'

When printing is complete the LCD display automatically returns to the page :
3.9.2

Printing to serial port


Printing is only directed to the active SERIAL port when serial communications is logged
on. If serial communications is not logged on, printing is only directed to the PARALLEL
socket. The active serial port is selected in the Communications Section of the menu.
Print format is as shown in Figures 3-2, 3-3 & 3-6.
Appropriate connections for the 25 way SERIAL socket are detailed in Table 3-2.

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When the -> key is pressed from the VDU (visual display unit) display :
'push -> to print '
'all settings
'
or
'push -> to print '
'fault records
'
printing to the VDU will commence. The display can be halted for viewing using CTRL S
(X-OFF), and restarted using CTRL Q (X-ON).
When printing is complete, the page :
'type C to continue

'

is displayed. Typing C returns the display to


'push -> to print '
'all settings
'
or
'push -> to print '
'fault records
'
Hard copy printouts can be obtained by capturing the print information sent to the VDU
or computer terminal using the VDU or computer terminal memory and then printing
the captured file information. Formatted printouts are available using GECA s software
package `Opticom'.
Note:

A time out feature will automatically select X-ON if X-OFF is active for more
than 60s.

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Settings printed
on : -

CONTACT CONFIGURATION No 01

Z1 & Z2 SETTING
KZ1Y = 3.00

ALLOW A/R ON
Z1X (T) TRIP

1995 Apr. 01
09 : 29 : 36

SCHEME SELECTION
BASIC

Z1 & Z2 SETTING
KZ2 = 3.00

ALLOW A/R ON
Z1Y (T) TRIP

Settings last
changed on : -

DEF ELEMENTS
ALL BLOCKED

ZONE 3 SETTING
OFFSET

BLOCK A/R ON
Z2 (T) TRIP

1991 Apr. 01
08 : 33 : 47

LOSS OF LOAD
FEATURE ENABLED

ZONE 3 SETTING
KZ3' = 2.0

ALLOW A/R ON
CHANNEL OUT

Group identifier
is : -

LL ENABLED BY
LS I LEVEL DET

ZONE 3 SETTING
KZ3 = 5.00

ALLOW A/R ON
DEF DELAY TRIP

OPTIMHO

TYPE OF TRIP
3 POLE ONLY

ZONE 3 SETTING
LENT a/b = 0.41

ALLOW A/R ON
DEF AIDED TRIP

DISTANCE
18 LFZP 087 A

ZONE 1 TRIPPING
ENABLED

SWCH ON TO FAULT
ENABLED

VT SUPERVISION
TO BLOCK TRIP

FAULT LOCATOR
10 LFZP 100 A

TIME DELAY TRIP


Z1X (T) BLOCKED

SWCH ON TO FAULT
ENABLED IN 0.2 s

SELF RESETTING
ENABLED

CLOCK REF.
RELAY CRYSTAL

TIME DELAY TRIP


Z1Y (T) BLOCKED

SWCH ON TO FAULT
BY LD OR COMP

START INDICATION
ENABLED

ACTIVE SETTINGS
GROUP 1

TIME DELAY TRIP


Z2 (T) ENABLED

PwrSwg DETECTOR
ENABLED

DEF LOW SET


3Io = 0.01 In

DEFAULT DISPLAY
GROUP IDENTIFIER

TIME DELAY TRIP


TZ2 = 0.46 s

PwrSwg DETECTOR
TIMING Z6--> Z3

DEF ELEMENTS
ALL BLOCKED

ALL CONTACTS
ENABLED

TIME DELAY TRIP


Z3 (T) ENABLED

PwrSwg DETECTOR
TO BLOCK Z1

REACH
KZF = 1.00

PwrSwg test
DISABLED

TIME DELAY TRIP


TZ3 = 0.60 s

PwrSwg DETECTOR
TO BLOCK Z1X

LINE UNITS
= 100%

MONITOR 23456789
OPT 20
00000000

TIME DELAY TRIP


ALL G ENABLED

PwrSwg DETECTOR
TO BLOCK Z1Y

FAULT LOCATOR
CT Ratio = 1000 : 1

ACCESS LEVEL
FULL

BASE SETTING
KZPh = 0.800

PwrSwg DETECTOR
TO BLOCK Z2

FAULT LOCATION
VT Ratio = 1000 : 1

ACTIVE PORT
LOCAL

BASE SETTING
THETA Ph = 70

PwrSwg DETECTOR
TO BLOCK Z3

MUTUAL COMP .
ENABLED

MODEM BAUD RATE 4800

BASE SETTING
KZN = 0.800

PwrSwg DETECTOR
TZ6 = 50 ms

MUTUAL COMP .
KZM = 0.50

DATA PARITY STOP


7
EVEN
1

BASE SETTING
THETA N = 70

PwrSwg DETECTOR
KZ6 = 6.50

MUTUAL COMP .
THETA M = 70

CONTROL LINES
NOT IN USE

DIST G CHAR'STIC
MHO

PwrSwg DETECTOR
KZ6' = 3.5

LOCAL BAUD RATE


2400

Z1 & Z2 SETTING
KZ1 = 1.00

PwrSwg DETECTOR
LENT a/b = 0.41

DATA PARITY STOP


8
NONE
1

Z1 & Z2 SETTING
KZ1X = 2.00

BLOCK A/R ON
Z1 + AT 3Ph/F

Figure 3-6

Typical settings print out (LFZP 11x with DEF & Fault Locator)

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Table 3-1Parallel port pin connections


Parallel
port pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Note:

Printer
connections
STB (Pin 1)
D0 (Pin 2)
D1 (Pin 3)
D2 (Pin 4)
D3 (Pin 5)
D4 (Pin 6)
D5 (Pin 7)
D6 (Pin 8)
D7 (Pin 9)
Do not connect
BUSY (Pin 11)
Do not connect
Do not connect
Do not connect
Do not connect
Do not connect
Do not connect
Do not connect
Do not connect
Do not connect
Do not connect
0v (Pin 22)
0v (Pin 23)
0v (Pin 24)
0v (Pin 25)

Function name
Printer strobe
(Output)
Data line D0
(Output)
Data line D1
(Output)
Data line D2
(Output)
Data line D3
(Output)
Data line D4
(Output)
Data line D5
(Output)
Data line D6
(Output)
Data line D7
(Output)
Data line D6 RESET key
(Input)
Data line D7 Printer Busy
(Input)
Data line D5 READ key
(Input)
Data line D4 SET key
(Input)
Data line D3 LEFT key
(Input)
Data line D2 DOWN key ( Input)
Data line D1 RIGHT key
(Input)
Data line D0 UP key
(Input)
5v
Monitor
(Output)
12v
Monitor
(Output)
-12v
Monitor
(Output)
12v (Relay) Monitor
(Output)
0v
0v (Note: All 0v are commoned,
0v
only 1 connection is
0v
necessary)

for correct printer operation pin 10 and pins 12 to 21 should not be


connected.

Table 3-2a Serial port pin connections for front (LOCAL) socket

Service Manual
LFZP 11x

Serial
port pin
1
2
3
4
5
6
7
8 to 24
25

R5911D
Chapter 2
Page 49 of 345
Function name
0v (Ground)
TXD (Transmit)
RXD (Receive)
Not connected
Reserved, do not connect
Not connected
0v (Signal ground)
Not connected
Reserved, do not connect

Refer to Figure 3-7 for


appropriate connections

Table 3-2b Serial port pin connections for rear (MODEM) socket
Serial
port pin
1
2
3
4
5
6
7
8
9
10
11 to 19
20
21 to 25

Function name
0v (Ground)
TXD (Transmit)
RXD (Receive)
RTS
CTS
DSR
0v (Signal ground)
Not connected
+ 12v
- 12
Not connected
DTR
Not connected

Refer to Figure 3-7 for


appropriate connections

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Identifiers
This section of the menu is used to :
a)
b)
c)

3.10.1

Enable the user to enter a unique group identification code which can
be up to 32 characters long.
Read the factory set software version numbers.
Select either a blank display or the user set group identification code or
the active setting group number as a root default display.

Group identifier
Each settings group has its own unique GROUP IDENTIFIER, but it is important to note
that the identifier for group 1 is also the code used by the serial communications as a
log on password. All relays leave the factory with all the group identifiers set to
'Optimho'.
To change/set the group identifier the user should press the RIGHT arrow key from the
display page :
'GROUP IDENTIFIER
'push -> to set

'
'

The display page changes to the group identifier code with an underline cursor
positioned under the first character position of the group identifier code. The
UP/DOWN arrow keys step the character at the cursor position either up or down
through the ASCII table of characters given in Table 3-3. The RIGHT and LEFT arrow
keys are used to move the cursor position right or left. On pressing the LEFT arrow key,
with the cursor at the first character position, the display steps back to the page :
'GROUP IDENTIFIER
'push -> to set

'
'

Any changes to the group identifier code will be updated when the user presses the SET
key at the settings trap position in the menu (see Section 3.4.5).
Note:
1)

If the ACCESS LEVEL (COMMUNICATIONS section) is set to LIMITED, the


group identifier code can be viewed but not changed.

2)

Any blank spaces at the end of the group identification code are ignored by
the serial communications when entering the group identifier as a log on
password.

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Page 51 of 345

Software version
The software version number is factory set and can not be changed by the user.
An additional software version number is given for relay versions which have the
optional fault locator fitted.

3.10.3

Default display
The default display is determined by the status of the relay, as detailed in Section
3.4.1. If there are no higher priority default conditions active, the default or root
display page will be as selected in this section, this will be either a blank display
or group identification code or active setting group number.
Note:

the GROUP IDENTIFIER, SOFTWARE VERSION and DEFAULT DISPLAY


can all be viewed using the View / Scroll feature (see Section 3.3).

Table 3-3 Group Identifier character set


The following characters are available:
space
!
"
#
$
%
&
'
(
)
*
+

,
.
/
0
1
2
3
4
5
6
7

8
9
:
;
<
=
>
?
@
A
B
C

D
E
F
G
H
I
J
K
L
M
N
O

P
Q
R
S
T
U
V
W
X
Y
Z
[

Y
]
^
_
`
a
b
c
d
e
f
g

i)

The Y character is shown as \ on the VDU or computer


terminal.
The -> character is shown as ~ on the VDU or computer
terminal.

h
i
j
k
l
m
n
o
p
q
r
s

t
u
v
w
x
y
z
{
|
}
->

Note:

ii)

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Page 52 of 345

Calendar clock
The calendar clock feature is primarily provided for time and date stamping of
fault records, it is therefore important that the calendar clock be set prior to
placing the relay in service.

3.11.1

Format
The ISO time / date format :
Year Month Day
Hour Minute Second
is used.

3.11.2

Default time & date


The calendar clock is not battery backed up. In the event of a dc power failure or
software reset, the calendar clock will default to the time & date stored in nonvolatile memory, this will be the time & date recorded when settings were last
updated.
A '?' is appended to the defaulted time/date to indicate that the time & date
setting is no longer correct. If at power up, no higher priority default conditions
are active (see Section 3.4.1), the page :
'Please set
'CALENDAR CLOCK

'
'

is displayed. In order to reduce the number of key presses required to set the
clock the menu steps the user to the page :
'OPTIONS
'CALENDAR CLOCK

'
'

when the RIGHT arrow key is pressed.


3.11.3

Setting time & date


The general rule for all relay settings is that settings are only updated when the
SET key is pressed at the setting trap page :
'push SET to
'
'update changes '

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The time and date setting however, is an exception to this rule and is updated
when the LEFT arrow key is pressed to step to the page :
'CALENDAR CLOCK
'SET TIME & DATE

'
'

The method used to set the time/date is described in Section 3.4.6. The '?' symbol
is removed from the time & date display when the clock has been set.
3.11.4

Clock reference
In circumstances where the average system voltage frequency is accurately
maintained at its nominal value, it may be preferable to reference the calendar
clock to the system frequency rather than to the internal relay crystal. The CLOCK
REFERENCE menu option allows the clock to be referenced to either the relay
crystal or the system voltage frequency.
If the option to reference the calendar clock to the system voltage is selected, and
the system voltage falls to less than about 70% of nominal, the calendar clock
automatically references to the internal crystal until the system voltage rises to
above 70% of nominal.
Note, the Calendar Clock can be viewed using the View/Scroll feature (see
Section 3.3).

3.12

Settings
Settings which relate directly to the relay protection elements are grouped in this
branch of the menu tree under the following sections:
a)
b)
c)
d)
e)
f)
g)
h)

CONTACT CONFIGURATION
SCHEME
DISTANCE
BLOCK AUTORECLOSE
VT SUPERVISION
START INDICATION
DEF (Optional for LFZP versions 111, 112 & 114)
FAULT LOCATOR (Optional for LFZP versions 111, 112 & 114)

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Contact configuration
The adoption of a bus oriented system, running under software control, has
eliminated the need for fixed hard wired connections to output tripping relays.
Each individual output relay has a unique software address, this allows it to be
control LED by the particular scheme software selected and thus allows different
output configurations to be implemented.
Output contact configurations are detailed in Section 8.

3.12.2

Scheme
The LFZP 11x range of relays provide an extensive range of scheme options.
12 different scheme options are available, these are:
a)
b)
c)
d)
e)
f)
g)
h)

BASIC
Z1 EXTENSION
PUR
PUR UNBLOCK
POR 1
POR 1 UNBLOCK
POR 2
POR 2 WI TRIP

i)
j)

POR 2 UNBLOCK
POR 2 WI TRIP
UNBLOCK

BLOCKING
BLOCKING 2

*
*

k)
l)

*
*

(Permissive Underreach)
(Permissive Underreach Unblock)
(Permissive Overreach 1)
(Permissive Overreach1 Unblock)
(Permissive Overreach 2)
(Permissive Overreach 2 Weak
Infeed Trip)
(Permissive Overreach 2 Unblock)
(Permissive Overreach 2 Weak
Infeed Trip unblock)

* (Not available for version LFZP 114)


Scheme options are described in Section 5.6.
Scheme timers
Depending on the scheme selected, up to 3 scheme timers are available, these
are TP, TD and TDW. If the DEF is fitted, an additional 2 timers are also
available, these are TPG and TDG. All timers have a setting range of 0 to 98ms,
selectable in 2ms increments.

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Timer TP
This timer is only available if any of the following scheme options are selected:
POR 1
POR 1 UNBLOCK
BLOCKING
BLOCKING 2
Timer TD
This timer is only available if any of the following scheme options are selected:
POR 1
POR 1 UNBLOCK
POR 2
POR 2 UNBLOCK
POR 2 WI TRIP
POR WI TRIP UNBLOCK
BLOCKING
BLOCKING 2
Timer TDW
This timer is only available if any of the following scheme options are selected:
PUR UNBLOCK
POR 1 UNBLOCK
POR 2 UNBLOCK
POR 2 WI TRIP UNBLOCK
Timer TPG
This timer is only available if both DEF ELEMENTS and DEF AIDED TRIP are
ENABLED and the BLOCKING scheme option is selected.

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Timer TDG
This timer is only available if both DEF ELEMENTS and DEF AIDED TRIP are
ENABLED and any of the following scheme options are selected:
POR 1
POR 1 UNBLOCK
BLOCKING
BLOCKING 2
DEF elements
Setting options relating to the DEF are only available if the DEF is fitted. All
elements of the DEF feature can be ENABLED or BLOCKED either in the
'SETTINGS
'SCHEME '

'

section of the menu tree or in the


'SETTINGS
'DEF
'

'

section of the menu tree. If the DEF elements are set to ALL BLOCKED, all other
DEF element settings (except DEF LOW SET in DEF section of the menu tree) are
not available.
DEF aided trip
Provided DEF elements are ALL ENABLED, the DEF AIDED TRIP can be ENABLED
or BLOCKED. If the DEF AIDED TRIP is set to BLOCKED, DEF AIDED TRIP
HIGHSET, TPG and TDG are not available.
The DEF AIDED TRIP is automatically set to BLOCKED if any of the following
schemes are selected:
BASIC
Z1 EXTENSION
PUR
PUR UNBLOCK

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DEF aided trip highset


This setting is only available if both DEF ELEMENTS and DEF AIDED TRIP are
ENABLED and any of the following schemes are selected:
POR 1
POR 1 UNBLOCK
POR 2
POR 2 UNBLOCK
POR 2 WI TRIP
POR WI TRIP UNBLOCK
BLOCKING
BLOCKING 2
The DEF HIGHSET 3Io setting range is 0.05In to 0.8In, selectable in increments of
0.05In.
Loss of load
This feature can be ENABLED or BLOCKED. If ENABLED a choice can be made
between using low set current level detectors or high set current level detectors.
3.12.3

Distance
Settings related to the distance measuring elements are grouped under the
DISTANCE section of the menu tree, these are:TYPE OF TRIP
ZONE 1 TRIPPING
TIME DELAY TRIP
BASE SETTING
DIST G CHAR'STIC (Only available for LFZP 111)
Z1 & Z2 SETTING
ZONE 3 SETTING (Not available for LFZP 114)
SWCH ON TO FAULT
PwrSwg DETECTOR (Not available for LFZP 114)
Type of trip
Options available are:
1 OR 3 POLE TRIPPING
or 3 POLE TRIPPING ONLY

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Zone 1 tripping
Zone 1 tripping can be selected to be either ENABLED or BLOCKED.
Time delay trip
Time delayed zones Z1X(T), Z1Y(T), Z2(T), Z3(T) and all ground fault elements
can be selected to be either ENABLED or BLOCKED. Timers TZ1X, TZ1Y, TZ2 and
TZ3, associated with each zone, are only available if their corresponding zone is
ENABLED. Each timer has a setting range of 100ms to 9980ms, selectable in
20ms increments.
Time delayed zone Z3(T) is not available for relay versions LFZP 114.
Base setting
Base settings are KZPh, THETA Ph, KZN and THETA N. KZPh and KZN setting
ranges for all relay versions are :KZPh
KZN

0.04 to 1.000 selectable in increments of 0.001


0 to 1.360 selectable in increments of 0.001

THETA Ph and THETA N setting ranges for relay versions LFZP 111, 112 & 114
are :
THETA Ph 50 to 85 selectable in increments of 5
THETA N 50 to 85 selectable in increments of 5
THETA Ph and THETA N setting ranges for relay version LFZP 113 is :THETA Ph 45 to 80 selectable in increments of 5.
THETA N -45, -35, -25 to 80 selectable in increments of 5.
Dist G Char'stic (Distance ground fault characteristic)
This option is only available for relay version LFZP 111.
Either MHO or QUADRILATERAL characteristics are available.
Resistive reach factor KR is only available if QUADRILATERAL is selected. KR has a
setting range of 1 to 30, selectable in increments of 1.

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Z1 & Z2 setting
The setting range for Zone 1 and Zone 2 reach setting multiplier factors KZ1,
KZ1X, KZ1Y and KZ2 is 1 to 49.98, selectable in increments of 0.02.
Zone 3 setting
This option is not available on relay version LFZP 114.
The Zone 3 characteristic can be selected to be either OFFSET or REVERSE
LOOKING. Setting ranges for Zone 3 settings KZ3', KZ3 and aspect ratio a/b are
:
KZ3'
KZ3
a/b
Note:

0.2 to 49.9 selectable in increments of 0.1


1 to 49.98 selectable in increments of 0.02
1, 0.67 or 0.41

KZ3 and a/b settings are only available if OFFSET characteristic


has been selected.

Swch on to fault (Switch on to fault)


This feature can be selected to be either ENABLED or BLOCKED.
The following options and settings are only available if switch on to fault is
selected to be ENABLED :
a)

Switch on to fault ENABLED IN 110s, or Switch on to fault


ENABLED IN 0.2s

b)

Switch on to fault BY COMPARATORS, or Switch on to fault BY


LEVEL DETECTORS, or Switch on to fault BY LEVEL DETECTORS or
COMPARATORS

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PwrSwg DETECTOR (Power swing detector)


This option is not available on relay version LFZP 114.
This feature can be selected to be either ENABLED or BLOCKED.
The following options and settings are only available if the PwrSwg DETECTOR is
selected to be ENABLED :
a)
b)
c)
d)
e)
f)
g)
h)
i)
j)

TIMING Z6-->Z2 or TIMING Z6-->Z3


TO ALLOW Z1 or TO BLOCK Z1
TO ALLOW Z1X or TO BLOCK Z1X
TO ALLOW Z1Y or TO BLOCK Z1Y
TO ALLOW Z2 or TO BLOCK Z2
TO ALLOW Z3 or TO BLOCK Z3
TZ6
KZ6
KZ6'
LENT a/b

Factors influencing appropriate selection are discussed in Section 5.5.


Setting ranges for TZ6, KZ6, KZ6' and aspect ratio a/b are:
TZ6
KZ6
KZ6'
a/b
Note :

3.12.4

20 to 90ms selectable in increments of 5ms


1 to 49.98 selectable in increments of 0.02
0.2 to 49.9 selectable in increments of 0.1
1, 0.67 or 0.41
If the DEF is fitted, THE LOW SET 3Io
setting MUST BE SET if the PSB option is
ENABLED. Refer to Section 5.5.

Block Autoreclose (Block Auto-reclose)


Several options are available to enable auto-reclose to be either ALLOWED or
BLOCKED subject to the option selected, these are :
a)
or
or

BLOCK A/R ON Z1 OR AT 2&3Ph/F (Block auto-reclose on


Zone 1 or aided Trip 2&3 Phase faults)
ALLOW A/R ON Z1 OR AT 2&3Ph/F
BLOCK A/R ON Z1 OR AT 3Ph/F

b)
or

BLOCK A/R ON Z1X(T) TRIP


ALLOW A/R ON Z1X(T) TRIP

c)
or

BLOCK A/R ON Z1Y(T) TRIP


ALLOW A/R ON Z1Y(T) TRIP

d)
or

BLOCK A/R ON Z2(T) TRIP


ALLOW A/R ON Z2(T) TRIP

e)

BLOCK A/R ON CHANNEL OUT

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or

ALLOW A/R ON CHANNEL OUT

f)
or

BLOCK A/R ON DEF DELAY TRIP


ALLOW A/R ON DEF DELAY TRIP

g)
or

BLOCK A/R ON DEF AIDED TRIP


ALLOW A/R ON DEF AIDED TRIP

Note:
3.12.5

options f) and g) are only available if the DEF is fitted.

VT supervision
VT supervision can be selected either TO ALLOW TRIP or TO BLOCK TRIP in the
event of a VT fuse failure. SELF RESETTING of the VTS feature can be ENABLED or
DISABLED.

3.12.6

Start indication
Start indications can be selected to be either ENABLED or BLOCKED.
In the event of a fault, operation of any comparator or DEF (if fitted and enabled)
element will initiate a start indication on the LCD if the start indication option has
been selected to be ENABLED.
If the optional fault locator is fitted and start indications are selected to ENABLED,
the fault locator measuring elements will be initiated by any start event. If start
indications are selected to BLOCKED, the fault locator measuring elements will
not be initiated by any start event.

3.12.7

DEF
DEF is an optional feature for LFZP versions 111, 112 & 114.
Settings related to the directional earth fault measuring elements are grouped
under the DEF section of the menu tree, these are:
a)
b)

LOW SET
ELEMENTS

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Low set
The DEF LOW SET 3Io setting is separate from all other DEF settings which are
grouped under the ELEMENTS section. This arrangement enables the DEF LOW
SET element to be set even if all other DEF elements are DISABLED.
Note :

If the DEF is fitted, THE LOW SET 3Io


setting MUST BE SET if the PSB option is
ENABLED. Refer to Section 5.5.

The DEF LOW SET 3Io level detector has a setting range of 0.05In to 0.8In,
selectable in increments of 0.05In.
Elements
All settings other than the LOW SET 3Io setting are grouped under this section,
these are :
a)
b)
c)
d)
e)

DELAY TRIP
AIDED TRIP
POLARISING
ANGLE
MAG INRUSH

None of the above options are available if DEF ELEMENTS are selected to ALL
BLOCKED.
Delay trip
This option can be selected to be either ENABLED or BLOCKED.
The following settings are only available if DELAY TRIP is ENABLED :
a)
b)
c)

Time delay characteristic


Time multiplier
Base setting Is.

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Time delay characteristic


Inverse and definite time overcurrent characteristics are shown in Figures 7-17 &
7-18. Four IEC and four AMERICAN inverse time curves are available, also three
definite time curves are available, these are :
Inverse (IEC):

CURVE 1
CURVE 2
CURVE 3
CURVE 4

(Standard Inverse)
(Very Inverse)
(Extremely Inverse)
(Long-time Stand-By Earth Fault)

Inverse (AMERICAN):

CURVE 5
CURVE 6
CURVE 7
CURVE 8

(US Moderate Inverse)


(US Standard Inverse)
(US Very Inverse)
(US Extremely Inverse)

Definite time :

2 SECOND
4 SECOND
8 SECOND

Time mulitiplier
Time multiplier setting (*t) range is 0.025 to 1, selectable in increments of 0.025.
Base setting
Base setting (Is) setting range is 0.05In to 1.2In, selectable in increments of
0.05In.
Aided trip
This option can be selected to be either ENABLED or BLOCKED.
The following settings are only available if AIDED TRIP is ENABLED :
a)
b)
c)

Highset 3Io
Timer TPG
Timer TDG

Highset
Highset 3Io setting range is 0.05In to 0.8In, selectable in increments of 0.05In.

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TPG
TPG setting range is 0 to 98ms, selectable in 2ms increments.
TDG
TDG setting range is 0 to 98ms, selectable in 2ms increments.
Polarising
Four methods of directional polarising are selectable, these are :
a)
b)
c)
d)

NEGATIVE SEQ. V
ZERO SEQ. I
ZERO SEQ. V
ZERO SEQ. V&I

(negative sequence voltage)


(zero sequence current)
(zero sequence voltage)
(dual zero sequence voltage & current)

Angle
DEF ANGLE THETA N setting range is 10 to 80 degrees, selectable in increments
of 10 degrees.
Mag inrush
The DEF utilises a novel measuring circuit to detect transformer magnetising
inrush current. Refer to Section 4.4.7 for details of the measurement technique.
The output from the magnetising inrush detector can be selected to stabilise the
DEF measuring circuit when in-zone transformers are connected.
Options available are STABILISER ON or STABILISER OFF.
3.12.8

Fault locator
The fault locator is an optional feature available for LFZP relay versions 111, 112,
113 (but see section 4.5.1) & 114.
Reach
The fault locator reach multiplier KZF is adjustable from 1 to 40 in steps of 0.01.
Line units
Line Units can be set to Km, Miles or 100%.

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Line length
If LINE UNITS are set to Km or Miles the LINE LENGTH is adjustable from 0 to
99.99 in steps of 0.01, and from 100 to 999.9 in steps of 0.1.
If LINE UNITS are set to 100% the line length is fixed at 100%.
CT Ratio
CT RATIO is selectable as 1:1 or 10:1 to 5000:1 in steps of 10:1
VT Ratio
VT RATIO is selectable as 1:1 or 10:1 to 9990:1 in steps of 10:1
Mutual Comp.
Mutual compensation can be ENABLED or DISABLED. If ENABLED the setting
ranges of KZM and THETA M are:
KZM
THETA M

0 to 1.360 selectable in increments of 0.001


50 to 85 selectable in increments of 5

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Table 3-4 Summary table of numeric settings


Setting

Minimum

Maximum
Step
TP
0
98ms
2ms
TD
0
98ms
2ms
TDW
0
98ms
2ms
TPG
0
98ms
2ms
TDG
0
98ms
2ms
TZ1X
100ms
9980ms
20ms
TZ1Y
100ms
9980ms
20ms
TZ2
100ms
9980ms
20ms
TZ3
100ms
9980ms
20ms
TZ6
20ms
90ms
5ms
KZPh
0.040
1.000
0.001
KZN
0
1.360
0.001
KR
1
30
1
KZ1
1.00
49.98
0.02
KZ1X
1.00
49.98
0.02
KZ1Y
1.00
49.98
0.02
KZ2
1.00
49.98
0.02
KZ3
1.00
49.98
0.02
KZ6
1.00
49.98
0.02
KZ3'
0.2
49.9
0.1
KZ6'
0.2
49.9
0.1
KZF
1.00
40.00
0.01
KZM
0
1.360
0.001
DEF Low Set 3Io
0.05In
0.8In
0.05In
DEF Highset 3Io
0.05In
0.8In
0.05In
DEF MULT * t
0.025
1.000
0.025
DEF Base setting Is
0.05In
1.2In
0.05In
THETA G
10
80
10
THETA Ph
50
85
5
THETA N
50
85
5
THETA M
50
85
5
THETA Ph
45
80
5
THETA N
-45, -35, -25, to 80 in steps of 5
Baud (Modem)
300, 600, 1200, 2400 & 4800
Baud (Local)
300, 600, 1200, 2400 & 4800
CT Ratio
1 : 1 and 10 : 1 to 5000 : 1 in steps of 10 : 1
VT Ratio
1 : 1 and 10 : 1 to 9990 : 1 in steps of 10 : 1
Z3 Lenticular a/b
1.00, 0.67 & 0.41
Z6 Lenticular a/b
1.00, 0.67 & 0.41
Line Length
0 to 99.99 in steps of 0.01 plus 100 to 999.9 in steps
of 0.1
* LFZP Versions 111, 112 & 114.
** LFZP 113

*
*
**
**

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Summary of menu option settings

SECTION
IDENTIFIER
CALENDAR CLOCK
COMMISSION

COMMUNICATIONS
COMMUNICATIONS
\SERIAL CONTROL

SETTINGS
CONTACT
CONFIGURATION

SETTING
DEFAULT DISPLAY
Blank display
GROUP IDENTIFIER
ACTIVE GROUP
CLOCK REFERENCE
RELAY CRYSTAL
SYSTEM VOLTAGE
ALL CONTACTS
ENABLED
BLOCKED
BLOCKED EXCEPT ANY
TRIP
PwrSwg TEST
DISABLED
ENABLED
ACCESS LEVEL
FULL
LIMITED
ACTIVE PORT
MODEM
LOCAL
DATA PARITY STOP
8 NONE 1 (MODEM)
8 EVEN 1
8 ODD 1
8 NONE 2
7 EVEN 1
7 ODD 1
7 EVEN 2
7 ODD 2
7 NONE 2
CONTROL LINES
IN USE
NOT IN USE
DATA PARITY STOP
8 NONE 1 (LOCAL)
8 EVEN 1
8 ODD 1
8 NONE 2
7 EVEN 1
7 ODD
1
7 EVEN 2
7 ODD
2
7 NONE 2
CONTACT
RESERVED
CONFIGURATION
01
02
03
04
05
(plus any specials)

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Table 3-5 Continued.


Section
SETTINGS
\SCHEME

SCHEME SELECTION

DEF ELEMENTS
DEF AIDED TRIP
LOSS OF LOAD

SETTINGS
\DISTANCE

TYPE OF TRIP
ZONE 1 TRIPPING
TIME DELAYED TRIP

DIST G
CHARACTERISTIC
ZONE 3 SETTING

Setting
BASIC
Z1 EXTENSION
PUR
PUR UNBLOCK
POR 1
POR 1 UNBLOCK
POR 2
POR 2 WI TRIP
POR 2 UNBLOCK
POR 2 WI TRIP UNBLOCK
BLOCKING
BLOCKING 2
(plus any specials)
ALL ENABLED
ALL BLOCKED
ENABLED
BLOCKED
ENABLED
BLOCKED
BY LS I LEVEL DETECTORS
BY HS I LEVEL DETECTORS
1 OR 3 POLE
3 POLE ONLY
ENABLED
BLOCKED
Z1X (T) ENABLED
Z1X (T) BLOCKED
Z1Y (T) ENABLED
Z1Y (T) BLOCKED
Z2 (T) ENABLED
Z2 (T) BLOCKED
Z3 (T) ENABLED
Z3 (T) BLOCKED
ALL G ENABLED
ALL G BLOCKED
MHO
QUADRILATERAL
OFFSET
REVERSE LOOKING

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Table 3-5 continued.

Section
SETTINGS
\DISTANCE

Setting
SWCH ON TO FAULT

PwrSwg DETECTOR

SETTINGS
\BLOCK AUTORECLOSE

BLOCK A/R ON

ALLOW A/R ON

SETTINGS
\VT SUPERVISION

VT SUPERVISION

SETTINGS
\START INDICATION

START INDICATION

ENABLED
BLOCKED
ENABLED IN 110s
ENABLED IN 0.2s
BY COMPARATORS
BY LEVEL DETECTORS
BY LD OR COMP
ENABLED
BLOCKED
TIMING Z6-->Z2
TIMING Z6-->Z3
TO ALLOW Z1
TO BLOCK Z1
TO ALLOW Z1X
TO BLOCK Z1X
TO ALLOW Z1Y
TO BLOCK Z1Y
TO ALLOW Z2
TO BLOCK Z2
TO ALLOW Z3
TO BLOCK Z3
Z1 + AT 2 &3 Ph/F
Z1 + AT 3Ph/F
Z1X (T) TRIP
Z1Y (T) TRIP
Z2 (T) TRIP
CHANNEL OUT
DEF DELAY TRIP
DEF AIDED TRIP
Z1 + AT 2 & 3 Ph/F
Z1X (T) TRIP
Z1Y (T) TRIP
Z2 (T) TRIP
CHANNEL OUT
DEF DELAY TRIP
DEF AIDED TRIP
TO ALLOW TRIP
TO BLOCK TRIP
SELF RESETTING ENABLED
SELF RESETTING DISABLED
ENABLED
BLOCKED

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Table 3-5 continued.


Section
SETTINGS
\DEF

Setting
DEF ELEMENTS
DEF DELAY TRIP

DEF POLARISING

DEF MAG INRUSH


SETTINGS
\FAULT LOCATOR

LINE UNITS
MUTUAL COMP.

ALL ENABLED
ALL BLOCKED
ENABLED
BLOCKED
CURVE 1
CURVE 2
CURVE 3
CURVE 4
CURVE 5
CURVE 6
CURVE 7
CURVE 8
DEFINITE t = 2s
DEFINITE t = 4s
DEFINITE t = 8s
NEGATIVE SEQ. V
ZERO SEQ. I
ZERO SEQ. V
ZERO SEQ. V & I
STABILISER ON
STABILISER OFF
= Km
= Miles
= 100%
ENABLED
DISABLED

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3.13

Serial communications.

3.13.1

Introduction
Optimho Serial communications provides a means to access the relays menu
structure from a remote terminal.
The serial communications feature allows :
a)
b)
c)

Event records to be viewed remotely.


Settings to be viewed and changed remotely.
Bulk transfer of settings, event records and metering information
(if fault locator is fitted) using GECAM PC based software
'Opticom'. (This technique is detailed in a separate publication
number R5928.)

The method of use is designed to remain similar to that provided on the relay
input keys by using the numeric keypad normally situated on the right hand side
of the keyboard.
Two RS232 connectors are provided on the relay, one for local use on the front of
the relay (designated LOCAL) and the second for remote use on the rear panel of
the relay (designated MODEM).
3.13.2

Security
Basic security is provided by the setting group 1 `group identifier' (see Section
3.10.1) which acts as a unique password. (see Section 3.13.5 "Logon procedure".)
In some applications where remote serial communication facilities are used, it
may be considered necessary to provide total security to prevent changes being
made to relay settings by unauthorised users. The ACCESS LEVEL setting can be
set to LIMITED to provide this security.
When using the MODEM port the ACCESS LEVEL setting can only be changed
from FULL to LIMITED.
When the ACCESS LEVEL is set to LIMITED, all settings can be viewed but only the
time and date settings can be changed. Also, the CLEAR ALL RECORDS option
and the commissioning options for ON LOAD DIR TEST and OUTPUT OPTION
are not available. Alteration of time and date values is allowed since it may be
necessary to reset the time/date in the event of a dc power failure.
When the ACCESS LEVEL is set to FULL all settings can be viewed and changed
with the exception that, when using the MODEM port, the ACTIVE PORT LOCAL
selection is not available , to prevent any user from accidentally selecting LOCAL
and therefore losing the serial communication link.

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Control of serial communications from the relay menu


Active port
Only one of the serial ports, LOCAL or MODEM, can be active at any one time.
This menu option is used to select either the LOCAL (front) or MODEM (rear)
serial control port as the active port.
Baud rate
Separate BAUD rate settings are available for LOCAL and MODEM ports. These
are 300, 600, 1200, 2400 & 4800.
Protocol
Separate protocols are available to set up the bit framing (DATA, PARITY, STOP)
for LOCAL and MODEM ports. Protocols available are :No of data bits
8
8
8
8
7
7
7
7
7

Parity
NONE
EVEN
ODD
NONE
EVEN
ODD
EVEN
ODD
NONE

No of stop bits
1
1
1
2
1
1
2
2
2

Note 1: Where Optimho 100 is used over K-Bus, both the pc and the Optimho
must be matched to the KITZ101/102 and KITZ103 respectively with respect to
their baud rates and bit framing protocols, see publication R5832, KITZ103.
Control Lines
This option is only applicable to the MODEM (rear) port. If modem control lines
CTS (clear to send), DTR (data terminal ready), RTS (request to send) and DSR
(data set ready) are required, this option should be set to :'CONTROL LINES
'IN USE

'
'

If modem control lines are not required, this option should be set to :'CONTROL LINES
'NOT IN USE

'
'

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Hardware connections
The hardware connections for the two ports are shown in Figure 3-7. (Options 1
and 2). It should be noted that the LOCAL port is considered as a DCE (Data
communications equipment) whilst the MODEM port is configured as a DTE (Data
Terminal Equipment). This implies that should it be necessary to drive another
DTE from the MODEM port then the wires between pins 2 and 3 should be
crossed. (Figure 3-7 option 3).
In a substation environment it is recommended that the RS232 wires are isolated.
An optional optical isolator unit is available as shown in Figure 3-7 option 4.
Mounting points are provided on the rear of the relay for this optical isolator unit
type GT0022, details of which are available from GEC ALSTHOM T&D Protection
& Control, reference publication R-4082B.

3.13.5

Logon procedure
The serial communications may be accessed using either a VT100 (DEC
Corporation) or ANSI (American National Standards Institution) compatible
terminal or a proprietary VT100 terminal emulation software package running on
a personal computer.
The procedure to logon is as follows :
a)

Enter the setting group 1 group identifier followed by <CR>.


The group identifier acts as a unique password and is not echoed
to the screen by the relay.

b)

When the relay being addressed successfully receives its group 1


group identifier it replies with a prompt "GECAM:".

c)

At this stage the relay will recognise the following commands:


LOGON<CR> To enter the settings menu.
QUIT<CR> To close communications.

These commands may be either upper or lower case characters but not a
combination.
Note:

<CR> signifies the keyboards "Enter" or "Carriage return" key.

The command "LOGON" will give the user access to a settings menu similar to
that seen on the relays liquid crystal display. The menu is displayed on two lines in
the top left hand corner of the screen. The seven keys on the front of the relay are
simulated by the numeric keypad normally found on the right hand side of the
keyboard :-

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Once the settings menu has been entered the arrow keys are used to navigate
around the menu in the normal manner. The allocation of the keys is as follows:
key
8
key
2
key
6
key
4
SET key
5
RESET key
1
ACCEPT/READ key

All Print options are redirected to the terminal when serial communications is in
use. The communications software supports a character flow-control protocol
known as Xon/Xoff. (i.e. The screen can be paused by sending an Xoff character
and restarted by sending an Xon character.)
The designated character for Xoff is <Ctrl><S>.
The designated character for Xon is <Ctrl><Q>.
Note:

<Ctrl><S> signifies to press and hold the "Ctrl" key and press "S" or "s"
<Ctrl><Q> signifies to press and hold the "Ctrl" key and press "Q" or "q"

There is a 1 minute timeout on Xoff. (i.e. Xon is automatically reselected if Xoff is


selected for greater than 1 minute.)
Serial Communications will be logged off and a closing message "Serial
communication has been logged off" sent to the terminal when the key 'Q' or 'q' is
pressed.

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If no key is pressed in any 15 minute period the relay will automatically close
serial communications and send the closing message. This timeout ensures that in
the event of a prolonged failure in the communication link the relay is released
from serial communications.
Serial communications will also be logged off if the RESET key on the front of the
relay is pressed.
3.13.6

K-Bus interface
The introduction of the KITZ103, a K-Bus to Optimho interface unit, has made it
possible to group as a single network, the LFZP and K-Range relay families. It is
still possible to make a direct connection between a VT 100 type terminal or even
a pc emulation to an Optimho to gain access to the relay menu features, but
within Opticom, the dumb terminal and IEC 870 formatted data options are
mutually exclusive. For more information on the use of Optimho 100 over K-Bus,
including modem connections and communication parameter set-ups, see
publications R8532, KITZ103 and R5928, Opticom.

3.13.7

Modem requirements
Due to the wide variety of modems and possible configurations, it is not possible
to specify exact requirements, the user should always refer to the manufactures
manual for information regarding the use and operation of his modem. As a
general guide the following suggestions are given to assist the user in configuring
his modems for use with Optimho:

3.13.8

The modem should be configured to a communications standard which


supports Full Duplex asynchronous RS-232C communications.

The modem must support the Hayes AT Command language.

A 10 bit framing protocol should be used.

DTE and DCE devices should be set to operate at the same Baud rate.
Modems should be configured to ignore DTR.
The remote modem (relay location) should be set to Auto-Answer.
Any data compression, error checking, speed buffering or automatic speed
changing should be turned off.

Recommended modems
Modems which comply with the above requirements should be suitable for use
with Optimho. However, future GEC ALSTHOM T&D Protection & Control relays
and systems which utilise serial communications (i.e., K range relays) will comply
with IEC870 FT1.2 protocol. This protocol has several requirements that restrict
the choice of modems which may be used. This restriction results from the need to
support an eleven bit asynchronous frame with frames transmitted without idle
periods between characters. To assist customers in their choice of suitable
modems which will operate with Optimho and other GEC ALSTHOM T&D

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Protection & Control relays and systems, the following modems have been
evaluated by GEC ALSTHOM T&D Protection & Control for use with the full
IEC870 FT1.2 protocol, and are recommended for use:

1. Dowty Quattro (BS2422)


2. Motorola Codex 3265 or 3265 Fast
To extend the choice of suitable modems, GEC ALSTHOM T&D Protection &
Control have decided to introduce an additional protocol based on IEC870 FT1.2
but with parity bit omitted. This protocol is less secure than the FT1.2 frame as
one of the error checks is discarded. Other modems may be used provided the
following features are available:
1.

Must support 11 bit frame (one start bit, eight data bits, even
parity bit and one stop bit). This feature is not required if the
10 bit option is chosen.

2.

Must be possible to disable all error correction, data


compression, speed buffering or automatic speed changes.

3.

Must save all the settings required to achieve connection in nonvolatile memory. This feature is only required for modems
at the outstation end of the link.

Notes:
1.
2.
3.13.9

The V23 asymmetric data rate (1200/75bps) is not supported .


Modems made by Hayes do not support 11 bit characters.

Optimho serial communication protocol


In order to allow party vendors to develop communications equipment for use
with Optimho relays a detailed specification no. 50184.1700.001 is available.
This specification covers all aspects of serial communication as implemented by
all standard variants of Optimho relays.
Liability
GEC ALSTHOM T&D Protection & Control Limited accept no liability resulting
from any consequent mal-operations of Optimho relays pertaining to the use of
third party vendors equipment developed to communicate with Optimho relays.

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Chaper 2
Page 77 of 345

Relay (Rear)
DTE

Modem
DCE

Relay (Front)
DCE

Terminal
DTE

TXD

TXD

RXD

RXD

RTS

CTS

DSR

Common

7
20

DTR

20

4
5

DTR

20

DSR
DCD

6
8
7
25 Pin
Connector

Option 2a

Relay (Front)
DCE

Terminal
DTE

2 TXD

TXD 2

3 RXD

RXD 3

Relay (Rear)
DTE

Terminal
DTE

TXD

TXD

RXD

RXD

9 Pin AT
7

Common

Connector

Option 2b

TXD

RXD

RTS

CTS

DSR

Common

GECAM
Optical
Isolator
Unit

TXD

RXD

RTS

CTS

DSR

6
7

Common

+12v

+12v

10

-12v

10

10

-12v

10

20

DTR

20

DTR

20

RTS
CTS

4
5

DTR

20

DSR
DCD

6
8
7
25 Pin
Connector

20

NB. Pin assigments may be


different for other terminals
in particular pins 2 and 3
may have to be crossed.
Check the serial interfacing
of the terminal being used.

Option4

Figure 3-7

Modem
DCE

Common

Option 3

Relay (Rear)
DTE

3
RTS
CTS

Common

Option 1

Serial communications hardware connections.

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LFZP 11x
3.14

R5911D
Chaper 2
Page 78 of 345

Test features
Optimho has several menu driven features to aid testing and commissioning.
These are to be found on the menu under the Commissioning Section and are
described in the following sections.

3.14.1

Contact control
This option allows all the relay output contacts to be disabled for example during
commissioning, and thus prevent tripping of the circuit breaker or remote alarms
being sent. A second option allows all contacts except Any Trip to be disabled.
The Any Trip contact can be used for timing or monitoring purposes. If either of
these two options are selected the green relay available LED is extinguished and
the relay inoperative alarm contact is closed. Also the default message on the
display indicates that the contacts are blocked. The normal setting will be all
contacts enabled.

3.14.2

On load dir test


This option simplifies the on load directional testing of the relay. When the SET
key is pressed to activate the test the following actions occur within the relay.
a)
b)
c)
d)
e)
f)
g)
h)

All contacts are blocked, the relay available LED is extinguished


and the Relay Inoperative alarm contact closed.
The comparator count control is set to 4.
The voltage and current bandpass filters are switched in. (Load
currents may be distorted)
KZPh is set to maximum. (Gives maximum sensitivity)
KZ1 is set to infinity. (Makes Zone 1 Directional)
THETA Ph is set to minimum. (Nearer to expected load)
Level detectors LDOVA, LDOVB, LDOVC, LDLSA, LDLSB & LDLSC
are checked and if they are not all picked up the message Test
aborted is written to the LCD display.
If the level detectors are picked up the Zone 1 phase fault
comparators are checked and the appropriate message
Fault seen as FORWARD or Fault NOT seen as FORWARD.
is written to the LCD display

When the SET key is released to deactivate the test the following actions occur
within the relay.
a)
b)
c)

All settings that have been changed are restored.


All comparators are reset.
The contacts are unblocked and the relay is returned to service.

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3.14.3

R5911D
Chaper 2
Page 79 of 345

PwrSwg test
This test simplifies testing of the power swing blocking (PSB) feature. The relay
remains in service even when the test is enabled but the default message on the
display indicates that the PwrSwg TEST is enabled.
The test is provided to assist with two problems encountered during testing. On
relays that have optional DEF fitted the PSB Zone 6 comparator is blocked if the
negative sequence current detector (LDLSI2) operates. This would require the PSB
to be tested with balanced 3 phase faults which many test sets cannot deliver. This
test option removes this check thus allowing a AB phase fault to be used.
The second problem with some test sets is that while simulating a power swing a
transient pole dead condition may occur with the result that the PSB logic is
inhibited for 240ms. The test option removes this check.

3.14.4

Monitor option
This option enables all the input signals to the main microcontroller i.e. status of
level detectors, comparators & optical isolators and several internal signals to be
monitored.
Table 3-6 lists all the monitor options which are selected by a number and the
corresponding data which is displayed on the LCD while the monitor option page
is displayed. This information is also available on the parallel socket on the front
of the relay at all times.
The signals on the socket can be used for monitoring or to control timers etc. The
signal level is 0V corresponding to a 0 on the display or 5V corresponding to a 1.
The relay remains in service when the test options are being used.

Service Manual
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Page 80 of 345

Table 3-6 Monitor options


NB. When using the parallel socket pin 25 is 0V reference.
Test
no.
0

parallel socket pin


4
5
SLOT 6
SLOT 7
DIAG
DIAG
CpCZ1
CpABZ1
CpCZ2
CpABZ2
CpCZ3
CpABZ3
DEF
0
T BU
OPTO
OPTO
66-68
70-72
LD0VC
LDV0
LDHSI0
0

2
SLOT 1
DIAG
CpAZ1
CpAZ2
CpAZ3
MAG
INRUSH
OPTO
58-60
LD0VA
LDLSI0

3
SLOT 5
DIAG
CpBZ1
CpBZ2
CpBZ3
DEF BU
STSRT
OPTO
62-64
LD0VB
LDLSI2

Z1

Z1XT

Z1YT

10
11
12
13
14
15
16
17

UP
SK2-17
LDCpAZ1
LDCpAZ2
LDCpAZ3
RL29-31
RL30-32
RL57-59
Count 4

RIGHT
SK2-16
LDCpBZ1
LDCpBZ2
LDCpBZ3
RL29-33
RL30-34
RL57-61
0

18

19

Timer 1

Timer 2

20
21

Z1REACH
Timer 1

ZIXREACH
Timer 2

22

Timer 1

Timer 2

23

LD0VA

LD0VB

24

EEPROM
Settings
Signal
Start

1
2
3
4
5
6
7
8

25

Signal
Stop

no. and LCD position


6
7
SLOT 8
SLOT 9
DIAG
DIAG
CpBCZ1
CpCAZ1
CpBCZ2
CpCAZ2
CpBCZ3
CpCAZ3
CpDEF_F
CpDEF_R

8
SLOT 10
DIAG
0
0
CpABZ6
0

9
SLOT 11
DIAG
0
0
0
0
0

OPTO
74-76
LDLSA
LDHSA

OPTO
78-80
LDLSB
LDHSB

OPTO
82-84
LDLSC
LDHSC

Z2T

Z3T

LDCpABZ6

DOWN
SK2-15
LDCpCZ1
LDCpCZ2
LDCpCZ3
RL29-35
RL30-36
RL57-63
Pole
Dead C
0

LEFT
SK2-14
LDCpABZ1
LDCpABZ2
LDCpABZ3
RL37-39
RL38-40
RL65-67
Pole
Dead B
0

SET
SK2-13
LDCpBCZ1
LDCpBCZ2
LDCpBCZ3
RL41-43
RL42-44
RL69-71
Pole
Dead A
0

READ
SK2-12
LDCpCAZ1
LDCpCAZ2
LDCpCAZ3
RL45-47
RL46-48
RL73-75
0

SOTF
Trip
RESET
SK2-10
0
0
LDCpABZ6
RL49-51
RL50-52
RL77-79
0

SK2-11
0
0
0
RL53-55
RL54-56
RL81-83
0

DEF
Aided
Z1YREACH
Any
Trip
Any
Trip
Any
Trip
EEPROM
Records
Any
Trip

DIST
Aided
0

DEF_R

Filter
(I)
DEF_F

Ampl.
Hyst
Z3
Comp
0

Filter
(V)
Z2
Comp
0

Signal
Send
Signal
Send
Signal
Send
Internal
RAM
Test
Point

LGS
opto
LGS
opto
LDLSA

CRX
opto
CRX
opto
LDLSB

Z3
Comp
DEF-R

Z2
Comp
DEF-F

External
RAM
DEF-R

LCD

Z3
Comp
ANOMAL

CRX
opto
0

Z3
Comp

Z2
Comp

Note: options 26 to 30 inclusive are not used.

DEF-F

LDLSN
LDHSN
TZ6
Timed
Out
SOTF
En

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3.14.5

R5911D
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Page 81 of 345

Output options
This option allows each output contact to be closed individually for testing
purposes. The relay is taken out of service indicated by the green relay available
LED being extinguished and the relay inoperative alarm contact closed when the
message push SET to test is displayed. On pushing SET the appropriate contact is
closed.
Table 3-7 relates test numbers to contacts. Test numbers 24 to 27 can be used for
circuit breaker trip tests. For example test 24 is used to simulate a single pole trip
on A phase. The test closes all contacts labelled Trip A or Any Trip for the
particular contact arrangement selected. Similarly test 25 simulates a single pole
trip on B phase and test 26 a single pole trip on C phase. Test 27 simulates a 3
pole trip closing all trip contacts. For 3 pole only tripping schemes tests 24 to 26
are inoperative. If the contacts are blocked as described earlier the message
Contacts Blocked is given on the display.

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Table 3-7 Output test options

Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27

Contact operated
29-33
29-35
37-39
41-43
45-47
49-51
53-55
30-32
30-34
30-36
38-40
42-44
46-48
50-52
54-56
57-59
57-61
57-63
65-67
69-71
73-75
77-79
81-83
Trip A & Any Trip
Trip B & Any Trip
Trip C & Any Trip
Trip A, B, C, 3Ph & Any Trip

Note: option 24, 25 & 26 only applicable if 1 or 3 pole tripping is selected.

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3.14.6

R5911D
Chaper 2
Page 83 of 345

Parallel test socket


The parallel test socket on the front of the relay has the combined functions of a
parallel printer interface and a test socket. The pin connections are shown in the
table below. A monitor box which converts the 25 way D type connector to 25
4mm sockets is available as an option.
The output data lines can be used in conjunction with the Monitor options
described earlier. The output signal level is 0V for logic 0 and 5V for logic 1.
The input data lines can be used to mimic the 7 keys by connecting the
appropriate pin (D0 to D7) to 0V (pin 25) to represent a key press.
Other signals allow the internal voltage rails to be monitored.

Table 3-8

Note:

Parallel test socket


Parallel
Port pin

Printer
Connections

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25

STB (Pin 1)
D0 (Pin 2)
D1 (Pin 3)
D2 (Pin 4)
D3 (Pin 5)
D4 (Pin 6)
D5 (Pin 7)
D6 (Pin 8)
D7 (Pin 9)
Do not connect
BUSY (Pin 11)
Do not connect
Do not connect
Do not connect
Do not connect
Do not connect
Do not connect
Do not connect
Do not connect
Do not connect
Do not connect
0v (Pin 22)
0v (Pin 23)
0v (Pin 24)
0v (Pin 25)

Function Name

Printer strobe
(Output)
Data line D0
Output)
Data line D1
(Output)
Data line D2
(Output)
Data line D3
Output)
Data line D4
Output)
Data line D5
Output)
Data line D6
(Output)
Data line D7
(Output)
Data line D6 RESET key
( Input)
Data line D7 Printer Busy
(Input)
Data line D5 READ key
(Input)
Data line D4 SET key
(Input)
Data line D3 LEFT key
(Input)
Data line D2 DOWN key
(Input)
Data line D1 RIGHT key
(Input)
Data line D0 UP key
( Input)
5v
Monitor
(Output)
12v
Monitor
(Output)
-12v
Monitor
(Output)
12v(Relay) Monitor
( Output)
0v
0v
(Note: All 0v are commoned,
0v
only 1 connection is necessary)
0v

for correct printer operation pin 10 and pins 12 to 21 should not be


connected.

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LFZP 11x

R5911D
Chaper 2
Page 84 of 345

The monitor options may also be selected using an appropriate code applied to
the input data lines of the parallel socket as shown in the Table 3-9. This feature
can be used with automatic test sets to select monitor options. Note there will be a
20ms delay before the option is available.

Service Manual
LFZP 11x

R5911D
Chaper 2
Page 85 of 345

Table 3-9 Monitor options selected by parallel test socket


Code applied to parallel socket
Data line
socket pin

NB:

D7
11
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

D6
10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0

D5
12
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

D4
13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

D3
14
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1

D2
15
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1

D1
16
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1

D0
17
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0

Monitor
option
no selected

To input a code on pins 10 to 17 logic 1's are not connected and


logic 0's are connected to 0V pin 25. For example to select monitor
option 02 connect input data lines D6, D4, D3, D2 & D0 to 0V
leaving D7, D5 & D1 unconnected.

00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

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R5911D
Chaper 2
Page 86 of 345

Section 4. PRICIPLES OF OPERATION


4.1

The comparator
The important requirements of high speed and high stability have both been
satisfied in the comparator design. Usually these two requirements are in
contention because the greater the operating speed, the greater the risk of false
operation caused by contaminated relay input signals. Signal contamination's
include harmonic components, switching surges, lightning impulses, travelling
waves, exponential decays, saturated current transformer waveforms and
interference voltage induced on low voltage wiring due to switching on the high
voltage system.
The comparator resolves the speed/stability contention by checking its own input
signals to verify that they are dominated by components consistent with power
system frequency waveforms. If verification is obtained the full operating speed is
allowed. If verification is not obtained, the comparator demands more data
before tripping can be allowed, thereby automatically extending the signal
processing time sufficiently to ensure that no maloperation can occur. By suitable
filtering and preconditioning of the comparator input signals, the relay design ensures that the comparator is able to operate at its highest speed for the majority
of transmission line faults.
The sequence comparator employed in the Optimho range of distance relays
derives its pedigree from Micromho and Quadramho distance protections, and
embodies the experience gained in the development and application of these
products.

4.1.1

Fundamentals of the comparator


In the Optimho range the comparators are used to provide a variety of different
characteristic shapes, such as quadrilateral, mho, offset mho, lenticular etc. The
easiest to explain is the mho (or circular), so this will be described first.
For simplicity describing a self polarising characteristic, the comparator inputs are
shown in Figure 4-1, such that:
A = V-IZ
B = V/-90
and the condition for operation is that A lags B by 0 to 180.
Since the operation of the comparator is independent of the magnitude of A and
B, these two quantities are changed to "square waves", by use of high gain
amplifiers, before being supplied to the comparators. The "squared up" signals
convey the phase angle information of the original signals in a digital form.

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Page 87 of 345

The comparator processes the input "square waves" as logic variables which can
each have a high (H) or low (L) logic state at any time. To facilitate the following
explanation, signal A will be described as A(H) or A(L) depending on its logic state
at a particular instant of time, and signal B will be described as B(H) or B(L).
There are four possible combinations of logic state:
A(L).B(L)
A(L).B(H)
A(H).B(H)
A(H).B(L)
If both signals have unity mark/space ratios and equal periods but different
phases, then the four combinations will occur in a cyclic manner.
There are only two possible sequences of these combinations, as shown in Figure
4-2. These are :
If A leads B:
A(H).B(H), A(L).B(H), A(L).B(L), A(H).B(L), A(H).B(H)
If A lags B:
A(H).B(H), A(H).B(L), A(L).B(L), A(L).B(H), A(H).B(H)
From these the following logic statements can be deduced.
a)

If A leads B, then when A changes it acquires the opposite state


B, and when B changes it acquires the same state as A.

b)

If A lags B, then when A changes it acquires the same state as B,


and when B changes it acquires the opposite state to A.

to

The comparator processor algorithm scrutinizes the input signals at each change
of state to decide which of the two states is true and thus determine whether the
sequence is progressing in a restrain or tripping direction. The comparator
algorithm can identify the direction of the progression from a single change of
logic state of either input, and from any starting point in the sequence.

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Page 88 of 345

The presence of noise can introduce false changes of state unconnected with the
true signals at the power system frequency. A single change of state matching the
trip sequence does not necessarily represent a fault condition within the protected
section of line. Greater security is obtained if the criterion for tripping is to receive
a number of successive changes of state each of which matches the tripping
sequence. The comparator therefore has a counter for determining whether one,
two, three or four such changes have been observed. Each acceptable change
matching the tripping sequence adds to the total count (up to a maximum of
four), while every change matching the restrain sequence subtracts from the total
count (down to a minimum of zero).
The criterion for operation for self-polarised characteristics is a count of three. For
partially cross-polarised characteristics, if the input signals are relatively noise and
transient free, a count of two is sufficient.
The action of the counter for a typical fault within the measuring zone is shown in
Figure 4-3.
4.1.2

Action of the comparator


Figures 4-2 and 4-3 show pure power-frequency signals, but it is obvious that the
presence of noise would change the situation. To illustrate the point, Figure 4-4
shows a restrain condition of the power-frequency signals, with a burst of
high-frequency noise superimposed on a comparator input. Because the noise
happens to coincide with a change of state of the other comparator input, a
count-up situation occurs at high frequency. To prevent the comparator incorrectly
tripping, the rate of counting up is deliberately limited, preventing a count-up of
more than one being registered under these conditions.
The method of restricting the rate of counting up is to set a minimum acceptable
time period between successive count-up occurrences of 0.15 cycles of nominal
system frequency (0.175 cycles for partially cross-polarised characteristics. If a
count-up occurs within this time, then the period is restarted. While this period is
running the counter cannot be incremented further. Each change of state in a
restrain sequence decrements the counter and terminates any time period
running, so there is no restriction on the rate of counting down.

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R5911D
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Page 89 of 345

The restriction on the rate of counting up effectively limits the operating


bandwidth of the comparator, eliminating maloperation due to high frequency
interference. The same restriction also prevents the possibility of transient
overreach occurring when the V-IZ comparator input has an exponential offset
which distorts the mark/space ratio of the square wave, as shown in Figure 4-5.
Note that the exponential component of the current does not cause a significant
exponential offset in the IZ vector, because the signal is differentiated with a short
time constant by the current input devices. The voltage supply can have an
exponential component which is reflected in the comparator V-IZ input and in the
comparator polarising input of self-polarised relays. Therefore, for self-polarised
characteristics a trip output is issued by the comparator when the counter is
incremented to three, as shown in Figure 4-6.
For partially cross-polarised characteristics the exponential component in the
voltage is not reflected in the comparator polarising input, since this signal is
normally dominated by healthy phase components. Therefore a trip output is
issued by the comparator when the counter increments to two, subject to :
a)

No change of state of a restrain sequence is observed after the


counter has incremented to one or more.

b)
That a time of 0.35 cycle of nominal system frequency has
expired since the counter was incremented to one. This
ensures adequate processing time in the event of disturbances
causing polarising phase shifts.
c)

That no inhibit is applied to the comparator whilst count 2 is set


with the 0.35 cycle timer running.

If these criteria are not met, then tripping on count 2 is disabled until the
comparator receives four consecutive down-counts after reaching a count of 0.
Whilst tripping on count two is disabled the comparator will issue a trip when the
counter is incremented to three. Figure 4-6 shows a flowchart representation of
the comparator logic.
A further safeguard is provided against incorrect directional response caused by
capacitor voltage transformers which have severe transient voltage errors.
The CVTs concerned are those with near system frequency components in their
transient error waveforms, against which the comparator controls are ineffective.
The safeguard comprises a directional sequence comparator, which compares the
IZ vector with the polarising vector. This polarising vector (see Section 4.2) has
sufficient synchronous polarising present to mask out the CVT transient from the
polarising signal.
If the directional comparator indicates that a fault lies in the reverse direction of
the relay, the main comparator is inhibited (i.e. it treats all counts as if they were
in a restrain sequence) thus preventing relay mal-operation.

4.1.3

Exclusion of noise

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R5911D
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Page 90 of 345

The following interfacing and preconditioning measures ensure that the full high
speed performance potential of the comparator is achieved even with severely
contaminated relay input signals.
a)

Good physical layout and electrical filtering has been used to


exclude high frequency noise generated in the substation. The
relay terminals and all of the relay modules/boards which interface
with the outside world are located on the right and left hand
sides of the relay case. The interface modules/boards provide
electrical isolation to 5kV peak, using isolating transformers with
screens to shunt high frequency currents to earth and so attenuate
common-mode interference. Transverse mode interference is
attenuated by low pass filters. The measuring and control boards
which occupy the centre portion of the relay case, therefore
operate in a quiet electrical environment.

b)

Other high frequency signals, such as travelling wave effects and


other high harmonic frequencies, are attenuated by low pass
filters which have a cut-off of approximately 120 Hz.

c)

Exponential components of the current supply are attenuated with a


short time constant by the main current input devices of the
relay.

d)

Coupling capacitor voltage transformer (CVT) transients are


prevented from having any effect on the polarising signal by the
dominant effect of sound phase polarising or synchronous
polarising (Section 4.2). Alternative band-pass filter outputs are
selected at the appropriate time to eliminate excessive effects of
CVT transients in other signals derived from the ac voltage
supply.
(See also Sections 5.17 and 6.7)

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Page 91 of 345

IX

V-IZ
IZ

Fault
outside
characteristic
Fault on

boundary

Fault inside
characteristic

IR

Vpol = V -90
Figure 4-1 Sequence comparator voltages for mho characteristics

Sine wave
inputs
A = V-IZ
B = V -90

Squared
inputs

Logic states

B
AB AB AB AB AB AB AB
RESTRAIN CONDITION

Figure 4-2

Comparator logic variables

AB AB AB AB AB AB
OPERATE CONDITION

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Page 92 of 345

Fault Occurs
A
B

AB AB AB AB AB

AB

AB AB AB AB AB AB

4
3
2
Counter
Figure 4-3

Action of counter in comparator

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Page 93 of 345

Sinusoidal V-IZ input


A

BURST OF
INTERFERENCE

SQUARED INPUTS
V-IZ

Vpol

1
COUNTER

0
NO SECOND UP-COUNT
AS CHANGES SPACED 0.15 < CYCLE

Figure 4-4

Effect of high - frequency interference

FAULT OCCURS
OUTSIDE BOUNDARY
OF OPERATION

SINUSOIDAL
V-IZ
INPUT

V-IZ

SQUARED
INPUTS

Vpol

1
COUNTER

NO SEC0ND UP-COUNT
AS CHANGES SPACED <0.15 CYCLE

Figure 4-5

Effect of exponential offset

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Read inputs

is
reset input
high ?

Reset output
Reset all Count registers
Set all Block registers
Restart Timer 1
Reset Timer 2

yes

no
2
is
inhibit input
high
?
no

yes

is
count 2
register
set ?

yes

set ALL
block registers

no
1

is
count 2
register
set ?

yes

no

is
Timer 2
finished
?

is
block 1
register
set ?

yes

yes

no

no

are
4 counts
required
?

are
3 counts
required
?

no

yes

no
SET OUTPUT

yes

has
no input A or B
changed
?
yes

Notes
has
input A
changed
?

does
B=A
?

yes

yes

1) A minimum of 3 counts are required for self polarised


characteristics

no

yes

3) 4 consecutive downcounts are required, after count 1


register resets, to remove any block on count two tripping

no

has
input B
changed
?

2) Count 2 trips are blocked if the inhibit input goes high


whilst waiting for Timer 2 to finish

4) No action is taken if both A and B inputs are seen to


change together

no

5) For cross polarised characteristics T1 = 3.5 mS T2 = 7 mS


Operation on count 2 permitted.
does
A=B
?

no

For self polarised characteristics T1 = 3 mS T2 n/a


Operation on count 2 not permitted.

yes

Times are for 50 Hz


is
inhibit input
high
?
no

Re-start
Timer 1

yes

RESTRAIN

Finish Timer 1
3

OPERATE
no

is
Timer 1
finished ?

is
count 1
register
set ?

no

is
count 1
register
set ?

no

is
block 2
register
set ?

set ALL
block registers

no

is
count 2
register
set ?

is
count 2
register
set ?

yes

no

is
count 3
register
set ?

Set count
register 4

no

is
count 4
register
set ?

is
count 4
register
set ?
yes

yes

SET OUTPUT

Figure 4-6

Reset count
register 1
reset timer 2
reset output

Reset block
register 1

Reset count
register 4

Sequence comparator

is
block 3
register
set ?

no

Reset block
register 2

no

Reset block
register 3

yes

no

Reset count
register 2

is
block 4
register
set ?
yes

yes

yes

are
4 counts
required
?
no

is
count 3
register
set ?

no

yes

yes

Set count
register 3

no

yes

yes

Set count
register 2

no

yes

yes

yes

Set count
register 1
Start Timer 2

is
block 1
register
set ?

no

Reset count
register 3

Reset block
register 4

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4.2

R5911D
Chaper 2
Page 95 of 345

Polarising arrangements
To simplify the description, the mho characteristic has been described in Section
4.1.1 as if it were self polarised. In fact, partial healthy phase cross polarising and
partial synchronous polarising components are used. These extra polarising
components are used in order to satisfy the following requirements:
a)

To maintain a correct polarising (i.e. directional reference) signal


for the relay comparators under conditions of close up faults of
all types even in the presence of large transient voltage errors
from CVTs, so that correct directional response can be
ensured.

b)

To enable fast operating time to be obtained for close up faults


of all types in the forward direction of the relay.

c)

To provide expansion of the resistive coverage of the mho for


faults with low infeed currents, where arc resistance may be
large.

Both the healthy phase and synchronous components are square wave signals of
amplitude 16% of the peak prefault voltage vectors. Under unbalanced fault
conditions, the proportion of healthy phase polarising is enough to overcome the
effects of normal CVT transients. Under three phase fault conditions, the synchronous polarising works in a similar way. Figure 4-7 shows that by adding a
16% square wave to the CVT error, the correct zero crossings of the polarising
voltage are restored. The polarising signal is squared up and phase retarded by
90 to become input B of the comparator as described in Section 4.1.
The unique shapes of the partially cross polarised mho practical polar
characteristics, shown in Figure 4-8, have been achieved by suitable choice of the
wave shape of the signals involved in the polarising mixing circuits. In
conventional polarising mixing circuits all the signals are sine waves, but in the
Optimho the synchronous polarising and sound phase cross polarising components are square waves. The advantages of these unique polar characteristics are
obtained with only one two input comparator, enabling optimum operating time
to be obtained. Due to the partial synchronous polarising component, the resistive
expansion is maintained for three phase faults. The top line of the expanded
characteristic is part of a fully cross polarised circle and moves with prefault
power flow so as to avoid overreach or underreach.

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4.2.1

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Partially cross polarised mho


The polarising quantity, VPol, is formed by squaring and summing circuits
supplied with the phase-ground voltages and the synchronous polarising signal.
The circuits are so arranged that the effect of synchronous polarising only
becomes significant when the phase-ground voltages are reduced under low
voltage three phase fault conditions. This is explained by reference to Figure 4-9,
which shows circuit details for two typical phases of the polarising mixing circuits.
Taking first the A-G phase, the sine wave quantities VB and VC are summed using
two equal value resistors, R3 and R4, attenuated to the correct level by R5, and
then applied to the inverting input of a high gain amplifier IC1. The square wave
synchronous polarising voltage Vmem A and the phase voltage VA are potentially
divided with R1 and R2 and supplied to the non inverting input. This arrangement
results in the A-G element being cross polarised by the sum of the A-B and A-C
voltage vectors phase lagged by 90, and exhibits good angular stability for
single phase faults on other phases, and therefore provides good phase selection
performance.
The resistor values are chosen so that the effective peak value of the Vmem A
waveform on the non inverting input is 16% of the effective peak value of the
vector summation of the other waveforms under healthy supply conditions. The
square wave output VKA from IC1 retains the phase information of the zero
voltage crossings of the sum of the input waveforms. The phase of VKA is
dominated by the cross polarising signal 2VA - (VB+VC) for most types of fault.
The exception being low voltage three phase faults, where the synchronous
polarising signal Vmem A becomes the controlling quantity.
A proportion of VKA is then added to the self voltage VA using R6 and R7 and a
second high gain amplifier IC2. The values of R6 and R7 are arranged so that the
peak value of the square wave VKA produces the same voltage at the input of IC2
as 16% of the peak value of the sine wave VA under healthy supply conditions.
The squared output VQA from IC2 is phase shifted 90 by a shift register and the
resultant signal VPol is then supplied to the comparator. The phase of VQA is
dominated by input VA throughout all types of fault except ground fault conditions
involving the A phase and three phase faults which cause the supply to collapse.
For these conditions of low VA voltage the VKA input predominates. Indeed if VA
collapses to less than 16% of rated voltage, VA ceases to have any influence at all
on the polarising signal and the comparator becomes effectively fully cross
polarised. The resistive expansion of the characteristic for low voltage ground
faults is, therefore, much stronger than for a conventional partially cross polarised
mho relay. (See Figure 4-8). The synchronous polarising also causes similar large
resistive expansion for low voltage three phase faults.

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For the B-C polarising mixing circuit (also shown in Figure 4-9) The A-G
polarising signal VPol A is level shifted by the action of IC3 to produce the bipolar
signal VPOL A. A set of resistors R8, R9, R10, and R11 are used to mix VPOL A
with VB and VC in such proportions that the peak value of VPOL A corresponds to
16% of the peak value of VB-VC at the input of squaring amplifier IC4. The
output VQBC of IC4 is phase shifted through a lagging angle of 90 by a shift
register and is then supplied to the comparator.
The phase of VQBC is determined largely by the zero crossings of VB-VC under
all types of fault conditions except B-C, B-C-G and three phase faults which cause
the B-C voltage to collapse. For these conditions of low B-C voltage the VPOL A
input dominates the phase of the polarising signal. VPOL A in turn is controlled by
VA if this fault involves the B-C or B-C-G phases, or by Vmem A if the fault
involves all three phases. Therefore, if VB-VC collapses below 16%, the B-C unit is
effectively fully cross polarised and consequently the resistive expansion of the
impedance characteristic is greater than for a conventional partially cross polarised relay. Furthermore, the resistive expansion also applies to three phase faults.
The combination of the sine wave faulty phase voltage with the square wave cross
polarising (or synchronous polarising) voltage results in a phase displacement of
the resultant polarising signal from its prefault position which is different from that
of a conventional partially cross polarised mho. Figure 4-10 shows the
relationship of the phase displacements of the faulty phase and polarising signals
for Optimho and conventionally polarised comparators, drawn for a typical fault
voltage amplitude. In Optimho the displacement of the polarising signal is zero
until the faulted phase is displaced by more than a critical angle , the capture
angle. Once the critical angle is exceeded, the polarising voltage phase
displacement rises linearly with the faulted phase voltage displacement.
The explanation for this behaviour is shown in Figures 4-11 and 4-12. Figure
4-11, shows an example of the composition of the polarising signal in Optimho.
The faulted phased sine wave is drawn here for a fault voltage of 25%, displaced
by 30 lagging, relative to the prefault values. This signal is summed with the
square wave cross polarising signal whose magnitude is 16% of the prefault sine
wave peak voltage. The zero crossings of the resultant signal remain in phase
with those of the cross polarising signal, that is, no displacement from the prefault
position.
Figure 4-12 shows conditions similar to Figure 4-11, but with the faulted phase
voltage displaced by 60. Under these conditions the resultant polarising signal is
displaced by about 20 from its prefault position, because the faulted phase
displacement exceeds the captive angle by this amount.

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When the displacement of the faulted phase voltage is just equal to the captive
angle ;
Vpk(sin ) = VPol

Captive angle = sin 1

Vpol
Vpk

provided that Vpk > = VPol


If Vpk < VPol, the sine wave has no effect on the polarising signal, so the
characteristic becomes fully cross polarised.
Since the displacement of the resultant polarising signal is zero if the faulted
phase voltage is less than the captive angle, the boundary of the characteristic
over this range is the same as that of a fully cross polarised mho (see Figure
4-10). For high values of displacement of the faulty phase, the curves of the
resultant polarising signal for a conventional partially cross polarised mho and for
Optimho are asymptotic. This means
the reach of Optimho in the capacitive reactance region is the same as for a relay
with 16% sine wave cross polarising (see Figure 4-10).
Although Figure 4-10 is drawn for a constant fault voltage, the principles remain
the same for constant System Impedance Ratio (SIR) conditions. The higher the SIR
the lower the fault voltage and the larger the capture angle. Hence the relay
becomes progressively more cross polarised as the SIR rises, as previously shown
in Figure 4-8.
Note :

On Optimho 11* version "D", the polarising arrangement for the


direction line has changed - see Figure 4-9. By using the sound
phase polarising signal to polarise the direction line, there is improved
direction stability for reverse faults, when importing heavy pre-fault
load. On earlier versions of Optimho the directional line
polarising signal was dominated by the faltered phase, or phases.

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4.2.2

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Chaper 2
Page 99 of 345

Synchronous polarising
The synchronous polarising signal is available for 16 cycles following a three
phase close up fault. This time is sufficient to keep the Zone 1 comparators in a
stable condition for a reverse fault, until the fault is cleared by other protection. In
the case of a forward fault, 16 cycles is more than sufficient to allow Optimho to
trip and clear the fault. (or to bring in breaker fail protection if necessary)
Under three phase close up fault conditions, the polarising signal is controlled by
the synchronous polarising signal Vmem A (see Figure 4-9). After 16 cycles this
power system frequency signal is replaced by 0.3% of -IA ZPh. This limits the
directional sensitivity of the comparator, once the synchronous polarising has
expired, to approximately 1.3% of rated voltage, for three phase faults.
The synchronous polarising system is implemented as a software control feature
of a microcontroller on the Zone 1 / Zone 2 comparator board (see Section 6.9),
and the basis of the system is a set of 64 registers of 8 bits each, which may be
imagined as being arranged in a carousel as shown in Figure 4-13. The carousel
may be regarded as rotating anticlockwise under healthy live conditions on the
transmission line.
Phase B voltage is used as a reference signal for prefault phase information, after
being squared by a high gain amplifier. The length of one half-cycle is measured
in units of 108s (the timer interrupt period of the microcontroller) and the
number of units is stored in a register. When this half-cycle finishes, the carousel
is rotated anticlockwise by one register and the length of the next half-cycle
measured and stored.
This process continues indefinitely, with new data overwriting the old when all 64
registers are full.
To generate the synchronous polarising output signals, an examination is made of
the data held in the 8th register anticlockwise from the present input register when
the outputs are connected. This number is then used to determine the length of
the output half-cycle required. When the output half-cycle has been produced the
polarity of the output is reversed and another examination is made of the data
held in the next register anticlockwise from the last one used. The next half-cycle is
generated accordingly. This process is repeated indefinitely, producing the
synchronous polarising output waveforms.
This method allows the reproduction of the frequency of the input signal VB. The
output is phase locked with the input, during healthy line conditions, by effectively
adjusting the number in the output register by plus or minus one, every fourth
output edge, to bring the output into phase with VB as closely as possible. The
microcontroller also produces signals +120 and -120 with respect to VB,
thereby providing three synchronous polarising signals Vmem A, Vmem B and
Vmem C.

When any voltage level detector resets, or any comparator operates, this is
deemed to be a faulty or dead line condition and the memory is allowed to run

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Page 100 of 345

out. Under these circumstances, the direction of rotation of the carousel is


reversed (see Figure 4-14) and the output is maintained from data previously
stored, for 32 half-cycles, after which the synchronous polarising output is
disconnected from the polarising mixing circuits. The data in the most recently
recorded registers are not used, because distorted voltage may be present in the
period just before the voltage level detector resets, or the comparator operates.
During the 32 half-cycles of memory run out, the phase lock is disabled to protect
the synchronous polarising from any undesirable change in frequency.
A period of 25 half-cycles is allowed to occur after all voltage level detectors
become operated and all comparators are reset, before the synchronous
polarising is reconnected. Immediately before the synchronous polarising is
reconnected, a comparison is made between the number in the current input
register (equivalent to the elapsed time of the current half-cycle) and the number
in the next anticlockwise register (equivalent to the length of the previous
half-cycle). The difference in time is effectively put into the output register, so that
when the synchronous polarising is reconnected, the output is in phase with the
input. Therefore, at the instant of reconnection, 16 half-cycles of accurate
synchronous polarising is available for Zone 1 comparator operation. This
method ensures that synchronous polarising is available after the expire of the
SOTF enable time.
4.2.3

Offset mho characteristic


The offset mho characteristic for Zone 3 (not available on LFZP 114) is produced
by the same type of phase comparator as for Zone 1 and Zone 2, but using
different input quantities. (See Figure 4-15) i.e.
A1 = V + IZ'
B1 = (V - IZ) /-90

4.2.4

The lenticular characteristic


An offset lenticular characteristic is available for Zone 3 for long line applications
where load impedance may encroach on to an offset mho characteristic. The
lenticular characteristic is produced by the intersection of two circles as shown in
Figure 4-16. The two circles are generated by two comparators using the same
signals as for a normal offset circular characteristic, but using different phase
shifts.

The inputs to the comparators then become:


A1 = V + IZ'
B1 = (V - IZ) /-

)
)

comparator C1
) (main comparator)

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Page 101 of 345
A2 = V - IZ

)
) comparator C2
) (inhibit comparator)

B2 = (V + IZ') /-

The intersections of the two circles occur on the characteristic angle of the relay
and determine the forward and reverse reach of the lenticular characteristic. The
reach remains independent of the comparison angles.
The aspect ratio, or ratio of the length of the minor and major axes of the
lenticular shape, is determined by the angle . The aspect ratio can be set to
0.41, 0.67 and 1.00.
The block diagram is shown in Figure 4-17. The inhibit comparator consists only
of basic circuitry for determining whether changes of state of the input signals
constitute an operate or a restrain sequence. There is no counter associated with
the inhibit comparator as its purpose is only to provide a signal for the inhibit
terminal of the main comparator. Therefore the main comparator only produces
a trip signal for faults within the lenticular characteristic.
4.2.5

The quadrilateral characteristic


The quadrilateral characteristic, available as an optional characteristic for the
ground fault comparators on Optimho type LFZP 111, offers an increased
coverage of fault resistance for short lines with strong infeed, where the resistive
expansion of the partially cross polarised mho may not be sufficient to cover high
tower footing or ground contact resistance.
Only a single main comparator is needed to produce a quadrilateral
characteristic, thus avoiding the race problems associated with characteristics
produced by multiple comparators. As shown in Figure 4-18, the main
comparator of Zone 1 produces the top or "reactance" line of the quadrilateral
from inputs:
A1 = V - IZ and
B1 = INR, where INR = (IAR + IBR + ICR) /-3
The vector INR is obtained from the line currents via three current transactors,
after phase shifting (see description GJ0233, Section 6.7). The replica signals are
bandpass filtered to remove exponential and high frequency components before
being mixed to produce an IR signal representing the residual current component.
The top line moves with active power flow to avoid the overreach or underreach
problems associated with phase current polarised reactance characteristics.
The other three sides of the Zone 1 quadrilateral are formed by three inhibit
comparators, that is, comparators without counters, arranged to inhibit the main
comparator. The main comparator can only count up when the three inhibit
comparators all agree that the impedance is within the operating zone (but see
also Section 4.2.6).
The signals used are as follows:
A2 = IZ
B2 = V - IR

)
)

right hand "resistance" line

Service Manual
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R5911D
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Page 102 of 345
A3 = V + IR
B3 = IZ

)
)

left hand "resistance" line

A4 = VPol
B4 = IZ

)
)

"directional" line

Throughout, V is the faulty phase voltage, VPol is the partially cross polarised
voltage described under "polarising mixing circuits" and IZ is the residually
compensated vector (IPhZPh + INZN) from the transactors. The IR signal for the
resistance lines is derived from the phase current only, the absence of residual
compensation permitting good phase selection for single pole tripping purposes.
This method of producing a quadrilateral characteristic has several advantages
over other methods:

4.2.6

a)

Independent settings for reach and resistance coverage

b)

Relay characteristic angle can be set to line angle giving fastest


operating speed for solid faults and optimum control of reach
accuracy

c)

Good operating speed over the whole of the characteristic.

Two phase to ground faults (quadrilateral characteristic)


The operation of the quadrilaterial characteristic during two phase to ground
faults presents special problems. This type of fault may be measured in three
ways:
a)

Operation of the corresponding phase-phase element

b)

Operation of the leading ground fault element

c)

Operation of the lagging ground fault element

The operation of the phase-phase elements is practically independent of the fault


resistance to ground. However, the measurement of the ground fault elements
under these conditions, is affected by the resistance of the fault to ground. The
effect being that the leading phase-ground element will tend to overreach and the
lagging phase-ground element will tend to underreach.
The effect of arc resistance between phases and to ground can also have the
effect of making the leading phase-ground element underreach and the lagging
phase-ground element overreach. (See Figure 4-19).
The amount of overreach, or underreach, depends on the arc and ground
resistances, the prefault load current and the type of polarisation used for the
"top" or "reactance" line. In Optimho, the polarisation of the Zone 1 reactance line
is optimised for single phase faults, and a technique is employed to inhibit the
operation of the ground fault comparators for two phase to ground faults. The

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Page 103 of 345

phase fault comparators, with their partially cross polarised


characteristics, are allowed to operate on two phase to ground faults.

shaped

The technique used to prevent operation of the quadrilateral ground fault


comparators is as follows:
The three Zone 1 ground fault comparators each have a corresponding "guard"
zone, whose characteristic shape comprises the same side and directional lines as
Zone 1. The top line of the "guard" zone has ten times the reach of Zone 1 and
has different polarisation (IphZph -10). The "guard" zone is generated entirely
from inhibit comparators and so its operating speed is only a fraction of a cycle.
Due to the different polarisation employed for the reactance lines, under two
phase to ground fault conditions the reactance lines of the Zone 1 and corresponding "guard" zone tilt with respect to each other (see Figure 4-19). This action
is used to advantage with the logic of Figure 4-20 to prevent operation of the
ground fault comparator. The ground fault comparators are allowed to operate if
the corresponding "guard" zone, and no other, operates. For example, for the
external A-B-G fault condition depicted in Figure 4-19 which is 30% beyond Zone
1 reach setting, it can be seen that the B phase Zone 1 reach line tilts such that
the measured B-G impedance appears within B phase Zone 1 ground fault
characteristic. The measured B-G impedance is also within the B phase "guard"
zone characteristic. This would cause the B phase Zone 1 ground fault element to
operate if it was not for the fact that the measured A-G impedance appears within
the A phase guard zone characteristic. The operation of the A phase guard zone
in conjunction with the B phase guard zone ensures that all ground fault Zone 1
comparators are inhibited due to logic action as depicted in Figure 4-20.
The "guard" zone system allows correct Zone 1 operation on single phase faults
since the phase selection properties of the guard zone comparators ensure that
only the faulty phase guard Zone comparators operate. The 10:1 ratio of the
"guard" zone reach for Zone 1 reach ensures that the resistive coverage of Zone 1
is not seriously affected by any angular "droop" of the "guard" zone reactance line
under load exporting conditions, caused by its non optimum polarising quantity
for single phase faults.
With the guard zone set to 10x reach, zone 1 may overreach for phase to phase
faults which occur on the far side of a star/delta transformer at the remote end of
the line. If the impedance matrix is unbalanced, a small neutral current may be
produced, possibly high enough to pick up the biased neutral current level
detector. If the phase of this neutral current is such that the top line of the zone
quadrilateral becomes inverted, the guard zone no longer prevents zone 1 from
overreaching.
To prevent this type of problem the zone 1 quadrilateral is gated with the zone 2
quadrilateral of the same phases. Zone 2 has a top line polarised with phase plus
neutral current and cannot invert under these circumstances.
Overreach of Zones 2 and 3 under two phase to ground fault conditions is less
serious than overreach of Zone 1 and can be tolerated, provided that grading
problems between time delayed Zone 2 and Zone 3 back up trips do not occur.
To avoid having to provide guard zones for Zones 2 and 3, the polarising signal
(IPhR + INR) for these two zones provides a compromise between single phase
and two phase to ground fault requirements. Any consequent errors are bounded
by the accuracy claims for Zones 2 and 3.

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4.2.7

R5911D
Chaper 2
Page 104 of 345

The offset quadrilateral


The offset quadrilateral characteristic of Zone 3 is produced in a similar way to
that of Zones 1 and 2, a further main comparator is used for the reverse reach,
having vectors:
A5 = IPhR + INR
B5 = V + IZ'
This is shown in Figure 4-21.
The outputs of the Zone 3 forward main comparator and Zone 3 reverse main
comparator are "ORed" to obtain the complete Zone 3 characteristic shape.
The side lines are shared with Zone 1 and Zone 2. The resistive reach of the right
hand line is set via an option on the menu. The reach of the left hand line is set to
be 20% larger. This ensures that the reverse resistive coverage of Zone 3 is
greater than the forward resistive coverage of the overreaching Zone 2 elements
at the other end of the line. This will ensure that the protection is stable for
external resistive faults in the blocking and permissive overreach schemes.

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4.2.8

R5911D
Chaper 2
Page 105 of 345

Operate and polarising signals LFZP 11x


Function

I/Ps

Mho

Quad

A1

VA/KZ1 - IAZPh - INZN

As Mho

B1

{VA+0.16[2VA-VB-VC+0.16VMA]}/-90
=Vpol A
(VA - VB)/KZ1 - (IA - IB)ZPh

INR

Zone 1A

A2
Zone1 AB
B2
A1
Zone 1 B
B1
A2
Zone 1 BC
B2
A1
Zone 1 C
B1
A2
Zone 1 CA

As Mho

{VB+0.16[2VB-VC-VA+0.16VMB]}/-90
=Vpol B
(VB - VC)/KZ1 - (IB - IC)ZPh

INR

As Mho

As Mho

{(VB - VC) + 0.16VpolA}/-90


=Vpol BC
VC/KZ1 - ICZPh - INZN

As Mho

{VC+0.16[2VC-VA-VB+0.16VMC]}/-90
=Vpol C
(VC - VA)/KZ1 - (IC - IA)ZPh

INR

As Mho

As Mho
As Mho

A1
B1
A2

Vpol A
(VA - VB)/KZ2 - (IA - IB)ZPh

IAR + INR
As Mho

B2
A1

Vpol AB
VB/KZ2 - IBZPh - INZN

As Mho
As Mho

B1
A2

V pol B
(VB - VC)/KZ2 - (IB - IC)ZP

IBR + INR
As Mho

B2
A1

Vpol BC
VC/KZ2 - ICZPh - INZN

As Mho
As Mho

B1
A2

Vpol C
(VC - VA)/KZ2 - (IC - IA)ZPh

ICR + INR
As Mho

B2
DA1

Vpol CA
-IAZPh - INZN

As Mho
Vpol A

DB1
DA2

(VB - VC) + 0.16Vpol A


Not Used

IA ZPh + INZN
VA + IAR

DB2
DA1

Not Used
-IBZPh - INZN

IAZPh + INZN
Vpol B

DB1

VC - VA + 0.16Vpol B

IBZPh + INZN

Zone 2 A

Zone 2 AB

Zone 2 B

Zone 2 BC

Zone 2 C

Zone 2 CA

A Directional

Side Line

{(VA - VB) + 0.16Vpol C}/-90


=Vpol AB
VB/KZ1 - IBZPh - INZN

{(VC - VA) + 0.16Vpol B}/-90


=Vpol CA
VA/KZ2 - IAZPh - IN ZN

B2

A Left Hand

As Mho

B Directional

As Mho

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LFZP 11x

R5911D
Chaper 2
Page 106 of 345

Function

I/Ps

Mho

Quad

B Left Hand

DA2

Not Used

VB + IBR

Side Line

DB2
DA1

Not Used
-ICZPh - INZN

IBZPh + INZN
Vpol C

DB1
DA2

VA - VB + 0.16Vpol C
Not Used

ICZPh + INZN
VC + ICR

DB2
DA1

Not Used
-IABZPh

ICZPh + INZN
Vpol AB

DB1
DA2

VQC=2VC-(VA+VB)+0.16VmemC
Not Used

IABZPh
IAZPh + INZN

DB2
DA1

Not Used
-IBCZPh

DB1
DA2

VQA=2VA-(VB+VC)+0.16memA
Not Used

VA - IAR
Vpol BC
IBCZPh
IBZPh + INZN

DB2
DA1

Not Used
-ICAZPh

VB - IBR
Vpol CA

DB1
DA2

VQB=2VB-(VC+VA)+0.16VmemB
Not Used

ICAZPh
ICZPh + INZN

DB2
A1

Not Used
(VA/KZ3 - IAZPh - INZN)/-

VC - ICR
VA/KZ3-IAZPh-INZN

B1
A2

VA/KZ3' + IAZPh + INZN


{(VA - VB)/KZ3 - (IA - IB)ZPh}/-

IAR + INR
As Mho

B2
A1

(VA - VB)/KZ3+ (IA - IB)ZPh


(VA/KZ3 - IBZPh - INZN)/-

As Mho
VB/KZ3 - IBZPh - INZN

B1
A2

VB/KZ3+ IBZPh + INZN


{(VB - VC)/KZ3 - (IB - IC)ZPh}/-

IBR + INR
As Mho

B2
A1

(VB - VC)KZ3' + (IB - IC)ZPh


(VC/KZ3 - ICZPh - INZN)/-

As Mho
VC/KZ3 - ICZPh - INZN

B1
A2

VC/KZ3' + ICZPh + INZN


{(VC - VA)/KZ3 - (IC - IA)ZPh}/-

ICR + INR
As Mho

B2
A1

(VC - VA)/KZ3' + (IC - IA)ZPh


Not Used

As Mho
IAR + INR

B1
A2

Not Used
{(VA - VB)/KZ6 - (IA - IB)ZPh}/-

VA/KZ3' + IAZPh +INZN


As Mho

B2

(VA - VB)/KZ6' - (IA - IB)ZPh

As Mho

C Directional
C Left Hand
Side Line
AB Directional
A Right Hand
Side Line
BC Directional
B Right Hand
Side Line
CA Directional
C Right Hand
Side Line
Zone 3 A

Zone 3 AB

Zone 3 B

Zone 3 BC

Zone 3 C

Zone3 CA

Zone 3' A

Zone 6 AB

Service Manual
LFZP 11x

Function

R5911D
Chaper 2
Page 107 of 345
I/Ps

Mho

Quad

A1

Not Used

IBR + INR

B1
A2

Not Used
Not Used

VB/KZ3' + IBZPh +INZN


ICR + INR

B2
DA1

Not Used
VA/KZ3 - IAZPh - INZN

VC/KZ3' + ICZPh +INZN


Not Used

DB1
DA2

(VA/KZ3' + IAZPh + INZN)/-


(VA - VB)/KZ3 - (IA - IB)ZPh

Not Used
Not Used

DB2
DA1

{(VA - VB)/KZ3' + (IA - IB)ZPh}/-


VB/KZ3 - IBZPh - INZN

Not Used
Not Used

DB1
DA2

(VB/KZ3' + IBZPh + INZN)/-


(VB - VC)/KZ3' - (IB - IC)ZPh

Not Used
Not Used

DB2
DA1

{(VB - VC)/KZ3' + (IB - IC)ZPh}/-


VC/KZ3 - ICZPh - INZN

Not Used
Not Used

DB1
DA2

(VC/KZ3'+ ICZPh + INZN)/-


(VC - VA)/KZ3' - (IC - IA)ZPh

Not Used
Not Used

DB2
DA1

{(VC - VA)/KZ3'+ (IC - IA)ZPh}/-


Not Used

Not Used
VA/10KZ1 - IAZPh

DB1
DA2

Not Used
(VA - VB)/KZ6 - (IA - IB)ZPh

IAZPh/-10
Not Used

DB2
DA1

{(VA - VB)/KZ6'+ (IA - IB)ZPh}/-


Not Used

Not Used
VB/10KZ1 - IBZPh

DB1
DA2

Not Used
Not Used

IBZPh/-10
VC/10KZ1 - ICZPh

DB2

Not Used

ICZPh/-10

Zone 3' B

Zone 3'C

Zone 3 A INH

Zone 3 AB INH

Zone 3 B INH

Zone 3 BC INH

Zone 3 C INH

Zone 3 CA INH

A Guard Zone

Zone 6 AB INH

B Guard Zone

C Guard Zone

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Chaper 2
Page 108 of 345

FAULT
INCIDENCE

FAULTY
PHASE
VOLTAGE

CVT ERROR

16% SYNCHRONOUS
POLARISING

POLARISING VOLTAGE

(BEFORE SQUARING AND


90

Figure 4-7

PHASE SHIFT)

Action of synchronous polarising

Service Manual
LFZP 11x

R5911D
Chaper 2
Page 109 of 345

Figures are S.I.R.s

Figure 4-8

12

24

Resistive expansion of partially cross - polarised mho

60

Service Manual
LFZP 11x

Vmem A
VA

R1
R2
R3

VB
VC

R5911D
Chaper 2
Page 110 of 345

R4

+
-

VKA = 2VA - (VB + VC) + 0.16Vmem A


IC1

R5

BC Directional polarising

VQA=2VA-(VB+VC)+ 0.16 Vmem A

R6

0V

R7

+
-90 o

Vpol A

IC2
0V

0V

+
-12V

VPOL A

A phase directional polarising signal

IC3

LFZP11X only
VQBC = (VB - VC) + 0.16VPOL A

R8
0V

R9

Vpol BC
-90 o

R10

IC4
0V

R11
0V

Figure 4-9

Zone 1/1X/1Y/2 polarising arrangement LFZP 111/112/113/114

Service Manual
LFZP 11x

R5911D
Chaper 2
Page 111 of 345

140

Faulted voltage = 25%

ANGLE OF
RESULTANT
POLARISING
SIGNAL
RELATIVE TO
PRE-FAULT
[ LAG]

120

100
100% Self-polarised

80

16% Sinewave
Cross-polarised

60

40

16% Squarewave
Cross-polarised

20
100% Cross-polarised

20

40

60

80

100

120

DISPLACEMENT OF FAULTED-PHASE VOLTAGE [


RELATIVE TO PRE-FAULT POSITION

140

LAG]

ANGLE OF PRE-FAULT VOLTAGE


100% Self-polarised

X
100% Cross-polarised

16% Squarewave
Cross-polarised
R

EXTRA RESISTIVE
COVERAGE
16% Sinewave
Cross-polarised

Figure 4-10

Comparison of polarised characteristics

Service Manual
LFZP 11x

R5911D
Chaper 2
Page 112 of 345

30
16%

16%

16%

90

270

360 etc.

Faulted Phase voltage (-30 displacement)


Cross-polarising voltage

A + B

D
Figure 4-11

180

Resultant Polarising (before -90 phase shift)


Critical angle

Service Manual
LFZP 11x

R5911D
Chaper 2
Page 113 of 345

60
16%

16%

16%

20
90

270

360 etc.

Faulted Phase voltage (-60 displacement)


Cross-polarising voltage

A + B

Resultant Polarising (-20 displacement)


(Before -90 phase shift)

Figure 4-12

180

Critical angle

Service Manual
LFZP 11x

R5911D
Chaper 2
Page 114 of 345

ROTATION
ANTICLOCKWISE

92 92 93 92 91 91 92

92

92

92
92
91
DATA OUT

'DATA IN' IS MEASURED LENGTH


OF HALF CYCLE IN UNITS OF 108us
DATA IN
ELAPSED TIME

92

92

91
93

92

91

92

92

HALF CYCLE GENERATED


USING 'DATA OUT'

SYNCHRONISM CHECKED EVERY


4TH EDGE AND ADJUSTED + 1 COUNT

Figure 4-13

Synchronous polarising healthy live line conditions

ROTATION
REVERSED

93
21 58 41 92 92

92

92
92
92
91
DATA OUT

92

93

92

HALF CYCLE GENERATED


USING 'DATA OUT'

Figure 4-14

Synchronous polarising faulty line conditions

Service Manual
LFZP 11x

R5911D
Chaper 2
Page 115 of 345

jI X
IZ

V-IZ

V
V+IZ`
IR

-IZ`

(V+IZ`) -90

Figure 4-15

Sequence comparator voltages for offset mho characteristic

jI X
MAIN
COMPARATOR

INHIBIT
COMPARATOR

(V-IZ)
B

V-IZ
A
IZ
A
V+ IZ`

IR

- I Z`

(V+IZ`)
B

Figure 4-16 Lenticular characteristic

Service Manual
LFZP 11x

R5911D
Chaper 2
Page 116 of 405

a
b =
ASPECT
RATIO

LENTICULAR ZONE 3

a
= 1.00
b
= 90

1
tan (180 2

0.67

67.5

0.41

45

BOUNDARY
OF
LOAD

V-IZ

PHASE
SHIFT

INHIBIT
COMPARATOR

MAIN
INHIBIT

C1

C2

V+IZ'

Figure 4-17

COMPARATOR

B
PHASE
SHIFT

Lenticular characteristic block diagram

OUTPUT

Service Manual
LFZP 11x

R5911D
Chaper 2
Page 117 of 345

IX
3 tilt

A1= Vph Zph - In Zn


B1= In R

ZI

A3= Vph + Iph 1.2 R


B3= ZI

A2= Iph Zph + In Zn


B2= Vph - Iph R

IR
-R
Left hand sideline
has 20% more
resistive reach
( see Fig.4-21 )

Figure 4-18

Quadrilateral Zone 1

A4= Vpol ph
B4= Iph Zph + In Zn

Service Manual
LFZP 11x

R5911D
Chaper 2
Page 118 of 345

B-G GUARD Zone

10X Z1ph

-10
TOP LINE OF QUAD

R.H. QUAD
ZN(RESIDUAL COMP)
Z1

Z1ph

A-G GUARD ZONE

10X Z1ph

QUAD TO TOP LINE

R.H.GUARD ZONE
(R.H. QUAD)

Zn
Zph
Z1

Figure 4-19

Behaviour for A - B - G fault

Service Manual
LFZP 11x

R5911D
Chaper 2
Page 119 of 345

Guard Zone A

&

Pole Dead A

&

Inhibit Zone 1 A-G

&

Inhibit Zone 1 B-G

&

Inhibit Zone 1 C-G

Guard Zone B

&

Pole Dead B

=1

Guard Zone C

&

Pole dead C

Figure 4-20

Guard zone logic

IX
3 tilt

A1 = V-IZ
B1 = IPhR+INR

IZ

A3 = V+IR
B3 = IZ

A2 = IZ
B2 = V-IR

IR

-IR
-IZ`

Left hand sideline


has 20% more
resistive reach

Figure 4-21

Quadrilateral zone 3

A5 = IPhR+INR
B5 = V+IZ`

Service Manual
LFZP 11x

4.3

Level detectors

4.3.1

Introduction

R5911D
Chaper 2
Page 120 of 345

On de-energising a transmission line, line voltage transformers can supply one input
terminal of the comparators with low frequency voltage waveforms, particularly if
electromagnetic transformers are connected to the isolated line. To avoid the risk of
false operation of the relay comparators caused by the continuing presence of
synchronous polarising of the other input of the comparators, phase current level
detectors are provided. These have a very fast reset time and are used to block
comparator operation when the line is de-energised as shown in Figure 4-22. The
actual blocking operation is performed under software control in the main
microcontroller.
The principle of operation of the current level detectors is explained with the help of
Figure 4-23. If the instantaneous amplitude of the input voltage (VIN) exceeds a
threshold setting VREF either on a positive half cycle or on an inverted negative half
cycle, a timer T1 is started. If T1 finishes before the non inverted or the inverted input
signal has fallen below VREF, the input sine wave is known to be greater than the
level detector setting and the output is set high.
At the same time as the output is set, a second timer T2 is started, whose purpose is
to bridge the time interval between the positive and negative half cycles. So while T2
is running, the output cannot reset. When the level VREF is exceeded on the next half
cycle, the output is kept in the operated state. Only if the threshold level fails to be
exceeded on the next half cycle, is the output reset after T2 finishes. The output also
resets if the input signal becomes a unidirectional signal greater than VREF, after
both T1 and T2 have timed out. Positive feedback is applied from output to input to
give a reset/operate ratio of 0.85 to prevent chatter when the input signal is at the
pick-up level.
The current level detectors are designed to restrict the operative range of the relay,
preventing excessive sensitivity, although because they have a low setting (5% of
rated current at the relay reference setting), this restriction does not constitute any
practical disadvantage. Hence the maximum SIR for ground faults is 126 and for
phase faults is 219. The operating time of the level detector circuit is fast enough not
to limit the minimum operating time of the relay. The maximum reset time of the
level detector is less than the fastest practical comparator operating time.
4.3.2

Inhibition of the comparator


With busbar voltage transformers, the comparator returns naturally to a restrained
condition when the circuit breaker is opened. However, when line voltage
transformers are used the relay must take special measures to ensure the
comparators reset when the line is de-energised.

Service Manual
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Page 121 of 345

In addition to the current level detectors, the relay contains voltage level detectors
operating on a similar principle, with a setting of approximately 70% of rated
voltage. If the transmission line is de-energised, the voltage and current level detectors of the de-energised poles reset, a "pole dead" signal is produced and after 20ms
is supplied to the "inhibit" terminals of the relevant comparators as shown in Figure
4-24. This terminal, when activated, causes the counter of the comparator to register
all changes of state of each input A and B as down counts. The counters of any
comparators which have operated, will be rapidly decremented to zero when the
transmission line is de-energised. The implementation of the "Pole Dead" signals is
performed by software operations in the main microcontroller.
With 3 pole tripping there may be no signal on either input of the comparator during
the time the line is de-energised. Under these conditions the comparator may remain
operated or partially operated. To ensure a full reset on detecting all the poles are
dead all the comparators are reset by the main microcontroller.
4.3.3

Single pole tripping


The level detectors are also beneficial when single pole tripping of the circuit
breakers is required when using line voltage transformers. Following a single phase
to ground fault and a single pole trip, the output of the ground fault comparator is
blocked by the resetting of the relevant phase current level detector and the
comparator is forced to count down by the relevant pole dead signal. Thus the relay
resets correctly even though the presence of residual current due to load and the
presence of sound phase cross polarising, may appear as an impedance within the
relay characteristic.

4.3.4

Phase selection
A problem with full scheme distance relays is that heavy close up single phase faults
can sometimes intrude into the operating characteristics of the phase fault
comparators, causing a three pole trip where a single pole trip would be
appropriate. In Optimho a special neutral current level detector is used to block the
phase fault comparators to prevent this type of incorrect trip.
This neutral current detector, known as the "high set" (LDHSN), has a setting level
which is biased by the maximum amplitude of phase difference current flowing at
any time. The three phase to phase signals IA-IB, IB-IC and IC-IA are rectified by a
precision three phase full wave rectifier and a peak level formed by a fast charge
slow discharge smoothing circuit. A fixed proportion of this level is then used as the
value VREF in a level detector of the type previously described. See Figure 4-25.

Service Manual
LFZP 11x

R5911D
Chaper 2
Page 122 of 345

In order to prevent chatter of the output and also to give the level detector a
minimum sensitivity under no load or very low load conditions, a fixed minimum
reference level is "ORed" with the variable reference.
For practical reasons, an upper limit to the reference level is used to ensure that
under very heavy fault current conditions the detector will operate correctly and not
be limited by internal power supply rails.
The signal input to the neutral detectors is derived by summing together the
individual phase current signals, in order to maintain the relay sensitivity
independent of residual compensation setting.
A similar "low set" neutral current detector (LDLSN) is used to enable the ground fault
comparators, thereby preventing wrong operation of a ground fault comparator
under heavy close up phase-phase fault conditions. See Figure 4-26. The low set
neutral detector is also used by the Voltage Transformer Supervision feature since it
has a high degree of immunity from operating under unbalanced load conditions.
Biasing the neutral current detector has distinct advantages. The detector can be set
sensitive enough to operate for all single phase faults which could cause phase fault
comparator maloperation, without any risk of the detector picking up on neutral spill
current during phase to phase faults. Neutral spill current arises from mismatched
current transformers, CT saturation, etc. The biasing also ensures that the phase fault
comparators are generally enabled during two phase to ground faults, permitting
the relay to give its fastest possible three pole trip. For two phase to ground faults
with high resistance in the neutral, only the phase fault comparators are enabled,
avoiding possible measuring errors which ground fault comparators can exhibit
under these conditions. For conditions where the fault resistance places the fault
impedance just outside the ground fault comparator characteristic, but with sufficient
neutral spill current to still block the phase fault comparators, a special logic feature
is employed (see Figure 5-3) whereby if the "high set" detector operates for 35ms
without any Zone 1 or Zone 2 ground fault comparator operating, then the "high set"
block of the phase fault comparator is removed.
4.3.5

Other level detectors


A zero sequence voltage detector is used in the voltage transformer supervision
feature. This is described in the VTS section. Three high set phase current detectors
which have settings 50% higher than the low sets are used in some schemes, such as
the Blocking scheme and the Permissive Overreach scheme with weak infeed. The
optional DEF feature uses three additional level detectors, two operating on zero
sequence current and one on negative sequence current. These are described in the
section on DEF.

Service Manual
LFZP 11x

V-IZ

R5911D
Chaper 2
Page 123 of 345

COMPARATOR
POLE DEAD
INHIBIT

OUT

V POL
B

&
I

Figure 4-22

LOW SET
LEVEL DETECTOR

Level detector gating of distance comparators

TRIP

Service Manual
LFZP 11x

R5911D
Chaper 2
Page 124 of 345

T1

T2

+Vref
START

VIN
-Vref
T1

IS
MODULUS OF
INSTANTANEOUS
VALUE OF Vin
> Vref?

NO

IS
TIMER T2
RUNNING?

RESET TIMER T1
RESET FLAG

YES

NO
YES
SET OUTPUT LOW
IS
FLAG
SET?

YES
RESTORE Vref

NO

IS
TIMER T1
RESET?

NO

YES

HAS
TIMER T1
FINISHED?

YES

START TIMER T1

SET FLAG
RESET TIMER T2
START TIMER T2

INITIAL
CONDITIONS

LET Vref=Vref*0.9

FLAG RESET
TIMERS RESET
Vref NORMAL
OUTPUT LOW

SET OUTPUT HIGH

Figure 4-23

NO

Level detector

Service Manual
LFZP 11x

R5911D
Chaper 2
Page 125 of 345

LOW SET CURRENT

LEVEL DETECTOR

22.5ms

1
V

t
0

VOLTAGE

POLE DEAD
SIGNAL
TO INHIBIT
COMPARATORS

LEVEL DETECTOR

Figure 4-24

Level detector inhibiting of distance comparators

LDIA
PRECISION FULL WAVE RECTIFIER
FAST CHARGE
SLOW DISCHARGE

LDIB
REFERENCE
LEVEL

LDIC

LIMITS MAX VALUE


OF REFERENCE

BASE REFERENCE LEVEL

Figure 4-25

Biased reference level

Service Manual
LFZP 11x

R5911D
Chaper 2
Page 126 of 345

GREATEST
Figure 4-26

PHASE DIFFERENCE CURRENT

Biased neutral current level detectors

Service Manual
LFZP 11x
4.4

Directional overcurrent ground fault protection (DEF)

4.4.1

Introduction

R5911D
Chaper 2
Page 127 of 345

The directional ground fault (DEF) feature is used to cover high resistance ground
faults. It employs separate forward and reverse looking directional elements, two
zero sequence current level detectors and an overcurrent unit.
The directional elements have four types of polarising allowing a choice of zero
sequence voltage, zero sequence current, dual zero sequence current and voltage,
and negative sequence voltage.
The directional units are used in a number of aided tripping schemes. The
overcurrent unit allows for time delayed backup tripping with a choice of definite
time, inverse IEC or American curves.
Stabilisation against magnetising inrush currents when energising a line with in-zone
transformers is provided.
4.4.2

Implementation
Most of the hardware required to implement the DEF protection is located on the
DEF board ZJ0139. The level detectors are on the level detector board ZJ0136 and
the controlling logic is run in the main processor on ZJ0138.
Figure 4-27 shows a simplified block diagram of the hardware. Figure 4-28 shows
the logic equivalent of the software.

4.4.3

Directional elements
The directional elements employ two sequence comparators of the type described in
Section 4.1 one being forward looking, the other reverse. The A and B inputs are
dependent on the type of polarising selected and are shown in Figure 4-29 for the
forward looking element. The inputs are reversed for the reverse looking element.
The directional element inhibit is controlled by the low set zero sequence level
detector (LDLSI0), and by the high set level detector (LDHSI0)(If the DEF aided
tripping is selected).
The level detectors ensure the comparators are fully restrained under all but fault
conditions. Without this check the unbalance in the zero sequence quantities would
result in the comparators partially operating and thus less stable.
The directional element has an adjustable characteristic angle THETA G, set via the
menu, which covers the range 10 to 80.

Service Manual
LFZP 11x
4.4.4

R5911D
Chaper 2
Page 128 of 345

Level detectors
The level detectors used are similar to those described in Section 4.3. The difference
is that the operate levels are adjustable and settings are provided via the menu.
The operate levels of the DEF low set and the DEF high set zero sequence current
level detectors are independent and they determine the sensitivity of the directional
elements.
An additional negative sequence current level detector is employed when negative
sequence polarising is used. Its setting is 70% of the DEF low set zero sequence level
detector, or if DEF aided tripping is enabled, 70% of the lower setting of either the
low set or high set zero sequence level detectors. This ensures that sufficient negative
sequence current is present for the comparators to function correctly. For relays with
the power swing blocking feature enabled the setting changes to 100% during
detected power swings (Section 5.5). This ensures the level detector does not operate
due to large spill currents during the power swing.

4.4.5

Operation in single pole tripping schemes


The DEF cannot give single pole trips but it can be used in conjunction with the
distance comparators in single pole tripping schemes. When a single pole is open
the DEF cannot derive suitable quantities to operate correctly and therefore must be
disabled. The Single Pole Open optical isolator is used for this purpose. To cover the
time difference between the relay issuing a single pole trip and the optical isolator
being energised internal logic is used to inhibit the DEF.
In aided schemes with single pole tripping selected the distance comparators are
given priority to trip single pole were possible. This condition is detected if a single
Zone 2 ground fault comparator operates and logic blocks the DEF. This allows the
distance to trip single phase.

4.4.6

Operation with voltage transformer supervision


The DEF directional units are stable to a fault in the ac voltage supply, because there
is no zero sequence current flowing. However if a subsequent transmission line fault
occurs the DEF could maloperate. To prevent this the DEF is inhibited by the
sealed-in VTS block signal which occurs 5.5 seconds after detection of the ac supply
failure. The Block Relay optical isolator also inhibits the DEF.

4.4.7

Magnetising inrush current detector


A magnetising current inrush detector is used to prevent maloperation when
energising multiple in-zone transformers. The circuit uses the principle of detecting
zeros in the current lasting for a quarter cycle or more. See Figure 4-30. This
detector is selected or deselected by the menu.

Service Manual
LFZP 11x
4.4.8

R5911D
Chaper 2
Page 129 of 345

Polarising
There are four types of polarising selectable via the menu allowing a choice of zero
sequence voltage, zero sequence current, dual zero sequence current and voltage,
and negative sequence voltage. System operating conditions may determine which
type is required.
The zero sequence voltage is derived internally from the three phase-neutral
voltages. In some system configurations the level of zero sequence voltage produced
is insufficient to polarise the directional elements.
Zero sequence current may be used if system configuration allows a suitable current
from say the neutral current transformer of a local power transformer with an
earthed neutral or the neutral current of an earthing transformer.
In certain systems dual polarising is used if the possibility of low zero sequence
voltage and or loss of current polarising is present.
Negative sequence polarising can be used if zero sequence is not possible or on
double circuit lines where coupling can cause problems.
It should be noted however that on versions of Optimho fitted with both a DEF
element and a fault locator the DEF zero sequence current polarising input is shared
with the mutual compensation current input terminals. Thus DEF zero sequence
current polarising cannot be used at the same time as fault locator mutual
compensation.

4.4.9

Negative sequence filters


Negative sequence voltage and currents are derived using filters. Most filters are
prone to unacceptable errors as the frequency drifts away from the nominal thus
limiting the sensitivity. These errors are overcome by a filter which has 8 centre
frequencies and automatically adjusts itself to the nearest one thus maintaining
errors below the required sensitivity level. See Figure 4-31.

4.4.10

Directional overcurrent backup protection


The overcurrent unit allows for time delayed backup tripping. It is made directional
by the forward looking directional element. A range of sensitivities with a choice of
definite time, inverse IEC or American curves are available controlled via the menu.

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Figure 4-27

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Simplified DEF block diagram

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Figure 4-28

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DEF control & backup logic

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POLARISING

INPUT 1

ZERO SEQ VOLTAGE

3VO

ZERO SEQ CURRENT

Ip

INPUT 2

-THETA G

DUAL VOLTAGE & CURRENT

3VO

-THETA G

NEGATIVE SEQ VOLTAGE

3V2b

-THETA G

+ kI p

3I 0

-90

3I 0

-90

3I 0

-90

3I 2b

-90

INPUT 1
A
COMPARATOR
LDLSI0

LOW SET I0
LEVEL DETECTOR

3I0

INPUT 2
LDHSI0
HIGH SET I0
LEVEL DETECTOR

CpDEF_F

INHIBIT OUT

&

A
COMPARATOR

CpDEF_R

INHIBIT OUT

DEF AIDED EN (menu)

B
CpDEF_F
DEF AIDED En (menu)

&

LDHSI0

&

DEF_F

&

DEF_R

LDLSI0

CpDEF_R

Signal

Scheme

Use

DEF_F

All POR
All Schemes

Trip
Enables overcurrent

DEF_R

All POR
Blocking

Current Reversal
CRX

DEF_F . LDHSI0

Blocking
POR 2 WI TRIP

Trip
CRX

Figure 4-29

Simplified DEF inhibit and control logic

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Inrush current waveform

Waveform after differentiation

Full wave rectified signal shows gaps

Notes
1 Threshold level 1/3 of peak up to rated current, then fixed at higher currents
2 Bias of 1/3 peak chosen for immunity to operation on saturated CTs
3 Block if gap > 1/4 cycle. Block resets after 2 cycles if no reappearance of gap.

Figure 4-30

Principle of magnetising inrush detector

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Negative Seq Filter


VA
VB
VC

3V2B = -(VAB+VCA 60)

Adaptive 60 deg
Phase advance
circuit
Frequency
Tracking
Controller

Signal
Mixing

Adaptive 60 deg
Phase advance
circuit

-IAX
-IBX
-ICX

3I2B = -(IAB+ICA 60)

Negative Seq Filter

Graph of % error in V2B against frequency


for balanced inputs
14
12
Fixed filter centre 50Hz
10
Adaptive filter
error
%

8
6
4
2

Required sensitivity

0
42

43

44

45

46

47
f Hz

Figure 4-31

Adaptive negative sequence filters

48

49

50

51

52

53

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4.5

Fault locator

4.5.1

Introduction

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The Optimho fault locator uses an algorithmic method to provide a distance to fault
location feature with metering capabilities. The data input to the algorithm is filtered
using established digital signal processing techniques.
The measuring accuracy of the fault locator is 2% at 2In, fn, 20.
The data processed by the algorithm is first acquired by performing analogue to
digital conversion on signals provided by the relays internal analogue bus and then
performing the necessary calculations.
The metering values are continuously calculated, regularly updated and passed to
the relays microcontroller when requested.
Acquired data is written to a buffer until a fault condition is notified by the
microcontroller. This input buffer data is held pending the fault calculation and input
data is redirected to an alternative buffer.
The fault calculation is initiated by a signal from the relay main microcontroller.
When the fault calculation is complete the output information is stored in non-volatile
memory and made available to the microcontroller for display on the relay front
panel.
Where parallel circuits are hung on opposite sides of a route of towers, mutual flux
coupling alters the impedance seen by the fault locator. In practice the positive and
negative sequence coupling is insignificant and the effect on the fault locator of the
zero sequence mutual coupling can be eliminated by using the mutual compensation
feature provided.
It should be noted however that on versions of Optimho fitted with both a DEF
element and a fault locator the mutual compensation current input terminals are
shared with the DEF zero sequence current polarising input. Thus DEF zero sequence
current polarising cannot be used at the same time as fault locator mutual
compensation.
The fault locator is optional on the underground cable version of the relay (type LFZP
113) where it is recommended that it is used for metering purposes only (see Section
4.5.8) since fault location accuracy cannot be relied upon for this application.

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Basic theory for ground faults


A two-machine equivalent circuit of a faulted power system is shown in Figure 4-32.
From this diagram :
Vp = mIpZr + IfRf

(equation

2.1)
This equation shows that the calculation of m, the distance to fault, based on
measurements of Vp and Ip at the local relay terminals is distorted by the IfRf term.
This term is related to the current infeed from the remote terminal and cannot be
readily measured. However its effect can be minimised as follows:
The real and imaginary components of these vectors (with respect to an arbitrary
vector reference) vary with time as:
Vp[cos(t+s)+jsin(t+s)] = mZrIp[cos(t+e)+jsin(t+e)]
+RfIf [cos(t+d)+jsin(t+d)].
where
and

d is the angle of the fault current.


s is the angle of Vp.
e is the angle of IpZr.

By evaluating equation 2.1 at the instant in time when the fault current passes
through zero and considering only the real components, then the RfIf term
becomes zero i.e. t = ((/2)-d)/ and the equation simplifies to:
Vpcos(((/2)-d) + s) = mZrIpcos(((/2)-d) + e)
Therefore the fault location m can be calculated if the angle of the fault
current d is known.
Estimating d the phase of the fault current If
The fault vector If is obtained from an algorithm which uses superimposed currents,
that is, the change of currents following the instant of fault.
Superimposed currents are indicated with a dash mark ( ' ).
The sequence diagram for superimposed currents for an A-G fault is shown in Figure
4-33.
For an A phase to ground fault:
0.33If

= I1' = I2' = I0'

From which
0.66If

= I1' + I2'

(equation 2.2)

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= Ip1'D1 + Ip2'D2

where:
D1 = I1' / Ip1' and D2 = I2' / Ip2'
and
D2 approximately = D1 (assuming that the power system source and
line positive and negative sequence
impedances are approximately equal)
therefore
0.66If = D1(Ip1' + Ip2')

(equation 2.3)

also
Ip' = Ip1' + Ip2' + Ip0'
therefore
Ip1' + Ip2' = Ip' - Ip0'

(equation 2.4)

from equations 2.3 and 2.4


0.66If = D1 (Ip' - Ip0')
Hence angle If = angle D1 + angle (Ip' - Ip0')
where:
D1

= A SCALAR factor - assuming that the power system is


homogeneous
= (Zsp1 + Zl1 + Zsq1) / ((1-m)Zl1 + Zsq1)

The angle of D1 depends upon the fault position but for the purposes of this
algorithm this angle is assumed to be zero.
Thus:
angle If = d = angle (Ip' - Ip0')

(equation 2.5)

Equation 2.5 shows that the phase angle of the fault current d can be estimated from
the superimposed phase and neutral currents measured at the relay terminals.
therefore for a ground fault:
If(cos(d) + jsin(d))

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= kD1(Ip'-Ip0')
= kD1[(Ia(fault) - Ia(prefault))
- 0.33(In(fault) - In(prefault))]

where:
k is a scalar factor and d is the required phase angle of If at the instant of time that
the faulted vectors are calculated.
similarly for a phase to phase fault:
If(cos(d)+ jsin(d)) = kD1[(Ia(fault) - Ia(prefault))
- (Ib(fault) - Ib(prefault))]
Thus using the calculated pre-fault and faulted vectors the fault locator is able to
calculate the angle of the fault current vector d at the instant of time that the faulted
vectors are calculated.
4.5.3

Data acquisition
The microprocessor commences sampling at a rate of 40 samples per cycle as soon
as initialisation is complete. Sampling is then performed continuously and the
samples stored within a 16 cycle cyclic buffer.
Two interrupts control the sampling system; timer interrupt 1 and interrupt 0.
The whole sampling system is triggered off by timer interrupt 1. This interrupts the
processor and also provides an output signal pulsing at the sample rate to the data
acquisition system. At the start of the interrupt, the 80C186 moves the data from the
last-acquisition temporary buffer into one of five 16 cycle cyclic sample buffers. This
ensures that ample fault data buffering is available under practical fault conditions.
While this is happening, the data acquisition system hardware acquires the next
eight samples (3 voltage, 4 current and 1 unused) and converts them to digital
words. At the end of each conversion the data acquisition system hardware asserts
interrupt 0 which puts the sample into the last-acquisition temporary buffer. Thus for
each sample period, there is one timer interrupt and eight sample interrupts. The
timer interrupt also handles the management of the five cyclic sample buffers. The
sample buffer is changed 6 cycles after the relay has tripped so that the correct set of
data is fed to the fault calculation routines.

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Cyclic buffer processing


The cyclic sample buffer to be processed contains 16 cycles of data, 10 cycles of
pre-trigger and 6 cycles of post-trigger. Fault calculation commences shortly after
this trigger point when a signal is received from the relays microcontroller.
The instant at which a fault calculation is triggered depends upon the STARTS
ENABLED or STARTS DISABLED setting on the relays settings menu.
If STARTS are ENABLED the trigger point corresponds to the relays start and a fault
location will be provided whether or not the event results in a trip.
If STARTS are DISABLED the trigger point corresponds to the relays trip and fault
locations are provided for all relay trips.
The fault locator has five cyclic sample buffers for acquired data. At any moment in
time one buffer must be in use for acquiring new data thus the fault locator can store
raw data for up to four faults. If more than four faults occur within a 20 second
period the fault locator may ignore faults until a fault data buffer is free.
The fault position and the breaker open position are first identified within the data
set, so that the fault duration can be determined. Then the fault type is identified
using a phase selection algorithm - see below - which uses superimposed currents.
(i.e. The change in current caused by the fault.)
The instant of fault is determined by searching the data applicable to the current in
the faulted phase. The routine looks for a significant increase in current over one
cycle. A 'significant increase' is 12.5% or more of the sample value but not less than
a minimum threshold of 20 digital steps.
If no instant of fault can be found this implies that STARTS are disabled and the relay
operating time was greater than 10 cycles. In this case the fault locator assumes pre
fault current to be zero and the fault position to be three quarters of a cycle prior to
the relay trip point. Under these conditions the fault locator output will report "n/a"
for pre fault values.
The breaker open position is determined by first finding at least 10 samples of zero
current (i.e. less than the minimum threshold ) at the end of a data set and then
searching backwards in time to find the point where two successive current samples
exceed the minimum threshold. This point is the breaker open position. In the event
of the breaker open position not being found within the data set the fault locator
reports 'n/a' for the fault duration.

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Faulty phase selection


Superimposed phase to phase currents are first examined to determine if the fault
type is a single phase to ground fault or a multiphase fault.
The maximum superimposed phase to phase current, Ippmax, is found and each
superimposed phase current is compared with it to identify if it is >25% or <25% of
it, then the fault can be identified from the following chart (where superimposed
currents are labelled with a ) :
Fault type

Ia-b Ib-c Ic-a

a-gnd

> 25% < 25% > 25%

b-gnd

> 25% > 25% < 25%

c-gnd

< 25% > 25% > 25%

Multiphase

> 25% > 25% > 25%

If this test identifies a multiphase fault the superimposed phase currents are
examined to identify a phase to phase fault.
The maximum superimposed phase current (Ipmax) is found and each superimposed
phase current is compared with Ipmax to identify the fault type from the following
chart :Fault type

Ia

Ib

Ic

a-b

> 25% > 25% < 25%

b-c

< 25% > 25% > 25%

c-a

> 25% < 25% > 25%

a-b-c

> 25% > 25% > 25%

Identification of a phase to phase to ground fault is not required by the Optimho


fault locator as these are treated as phase to phase faults.
If the fault type is identified as a-b-c then this situation is treated as being equivalent
to 3 separate phase - phase faults occurring simultaneously and ideally the result of
the fault calculation in each case would be the same. However, for lines which are
not fully transposed each calculation produces a slightly different result. Because of
this all 3 fault locations are calculated and the smallest is used as the result.
4.5.5

Fourier filtering

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The real and imaginary components of each of the input signals is evaluated from
data windows around the fault position selected as shown in figure 4-34. Each data
window is 46 samples long. The pre fault data window ends 0.5 cycles prior to the
fault position and the post fault data window ends 1.5 cycles after the fault position.
(see Figure 4-34.)
The real component (or cosine term) of an input signal is obtained by multiplying a
set of 40 samples by a cosine wave of fourier coefficients. These fourier coefficients
are calculated from the formula:
cosine_constant [ n ] = (2 / 40) cos(2 * * n / 40)
Where n is the sample number in the series between 0 and 39.
These constants are calculated by the microprocessor on initialisation.
The imaginary component (or sine term) of an input signal is obtained by first
calculating the real component of a wave 27 degrees prior to the required wave and
also calculating the real component of a wave 27 degrees after the required wave
(see Figure 4-35). These two cosine terms are then used to calculate the required
sine term using the following technique:
cos(t - ) - cos(t + )
= cos(t)cos() + sin(t)sin() - cos(t)cos() + sin(t)sin()
= 2sin(t)sin()
= 0.90798sin(t)
therefore:
in(t) = 1.1013(cos(t - ) - cos(t + ))
This method of obtaining the imaginary component gives maximum rejection of any
exponential component of the input wave-form.
4.5.6

Distance to fault calculation


Vector correction
All of the input voltage and current vectors are phase adjusted to compensate for
sampling skew and any phase shifts present in the relay input circuitry. This is
achieved by individually adjusting the sine and cosine terms of the input vectors to
form a new vector of the same amplitude but adjusted by the required angle.
i.e.
cos(t+) = cos(t)cos() - sin(t)sin()
and

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sin(t+) = sin(t)cos() + cos(t)sin()

Where is the angle of phase adjustment.


Neutral currents
Having calculated the corrected real and imaginary components of the input voltage
and current vectors the microprocessor then calculates the pre-fault and faulted
neutral current vectors.
i.e.
in_cos_term = ia_cos_term + ib_cos_term + ic_cos_term.
and
in_sin_term = ia_sin_term + ib_sin_term + ic_sin_term.
Replica impedance
The fault location calculation needs vectors derived from the line voltage (Vp) and
from the relay's "replica impedance" voltage (IpZr) under fault conditions. (See Figure
4-36)
The replica impedance is derived from the relay settings and is effectively set to the
same value as the total line impedance.
i.e.
Zr = 5 * KZPh * KZF / THETA Ph + 5 * KZN * KZF / THETA N
where:
KZPh, THETA Ph, KZN and THETA N are the distance relay base settings and KZF is
the fault locator reach setting.

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This "replica impedance" is modified using the mutual compensation factor when the
mutual compensation feature is used.
i.e.
Zr

5 * KZPh * KZF / THETA Ph + 5 * KZN * KZF / THETA N +


5 * KZM * KZF / THETA M

where:

KZM and THETA M are the fault locator mutual compensation settings.
The fault location calculation
The fault location calculation works by:
a)

First obtaining the vectors to satisfy equation 2.1 for the fault type
specified by the phase selector.

b)

Then estimating the phase of the fault current If.

c)

Finally solving equation 2.1 for the fault location m at the instant of
time where If = 0.

Obtaining the vectors


Different sets of vectors are chosen depending on the type of fault identified by the
phase selection algorithm. The calculation using equation 2.1 is applied for either a
phase to ground fault or a phase to phase fault.
thus for a A phase to ground fault:
IpZr=Ia(5*KZPh*KZF/THETA Ph)+In(5*KZN*KZF/THETA N)

(equation 6.1)

and Vp=VA
and for a A phase to B phase fault:IpZr=Ia(5*KZPh*KZF/THETA Ph)-Ib(5*KZPh*KZF/THETA Ph)

(equation 6.2)

and Vp = VA - VB
The calculation for a ground fault (Equation 6.1) is modified when mutual
compensation is used :IpZr

=Ia(5*KZPh*KZF/THETA Ph)+In(5*KZN*KZF/THETA N)
+Im(5*KZM*KZF/THETA M)
(Modified equation 6.1)

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Solving the equation for the fault location


For systems with sources of generation connected to both line ends, it is assumed
that D1 is scalar, i.e. the system is homogeneous. It is obvious that the real
component of If becomes zero at a phase angle which lags by (90 - d) the reference
time after the instant of fault. At this later time, just as the sine wave of If passes
through zero, the instantaneous values of the sine waves Vp and Ip can be used to
solve equation (2.1) for the fault location m. (The term IfRf being zero.)
The procedure is to phase lead the calculated vectors of Vp and IpZr by the angle
(90 - d) and then divide the real component of Vp by the real component of
IpZr.(See Figure 4-36.)
i.e.:
Phase advanced vector Vp
= Vp(cos(s) + jsin(s)) * (sin(d) + jcos(d))
= Vp[- sin(s-d) + jcos(s-d)]
Phase advanced vector IpZr
= IpZr(cos (e) + jsin (e)) * (sin (d) + jcos (d))
= IpZr[- sin(e-d) + jcos(e-d)]
therefore from equation 2.1
m = Vp (Ip * Zr) at If = 0
= Vpsin(s-d) / (IpZr * sin(e-d))
Thus the microprocessor evaluates m which is in effect the fault location as a
percentage of the fault locator reach setting and then calculates the output fault
location by multiplying this by the line length setting.

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Mutual compensation
As shown in Section 4.5.6 mutual compensation is achieved by a modification to the
"replica impedance" used within the fault location calculation.
The major disadvantage of this technique is that faults on a line could cause a fault
location from a relay "start" on a healthy parallel line to appear to be on the healthy
line.
This effect is caused by a large mutual compensation signal from the faulted line
providing misleading information to a fault locator on the healthy line.
The Optimho fault locator eliminates this possible problem by limiting the mutual
compensation component of modified equation 6.1 to 150% of the neutral
compensation component. In this way a large amount of mutual compensation
cannot be applied to a fault location on a healthy line.
A second problem on parallel feeders occurs when one circuit is out of service and is
earthed at both ends. In this case an earth fault on the in service system can induce
current in the loop of the earthed line causing a misleading mutual compensation
signal to the fault locator.
It is therefore recommended that the mutual compensation is deselected when a
parallel line is taken out of service.

4.5.8

Metering
The metering calculations are continuously performed using the same fourier
technique used by the fault locator. The results of these calculations are continuously
updated and can be viewed using the relay user interface.

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Ip

mZr

(1-m)Zr

Iq

Zsp

Zsq
Rf

Vp

Eq

Ep
If

Figure 4-32

Two machine equivalent circuit

Line end 'p'

Line end 'q'


I1 '

Ip1 '
Zsp1

mZL1

mZL2

mZL0

Vf '

3Rf

(1-m)ZL2

Zsq2

(1-m)ZL0

Zsq0

I0 '

Ip0 '
Zsp3

Zsq1

I2 '

Ip2 '
Zsp2

(1-m)ZL1

0.33 If

Superimposed currents flow


when the switch is closed
at the instant of fault.

Dash (') indicates


superimposed value
for radial systems.
Zsq1, Zsq2 and Zsq0
represent the load

Figure 4-33

Superimposed symmetrical component sequence diagram for A - N fault

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Pre fault data window

Figure 4-34

Optimho fault locator data selection

Post fault data window

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Sample rate - 40 samples


per cycle

Single cycle data window - angle x-27 degrees


Single cycle data window - angle x degrees
Single cycle data window - angle x+27 degrees

Figure 4-35

Optimho fault locator fourier data windows

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IpZr
Vp
If = 0

Vp

Figure 4-36

IpZr

Optimho fault locator selection of fault current zero

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Section 5. SCHEME FUNCTIONS


5.1

Level detector pole dead logic


Figure 5-1 shows a logic equivalent of the software implementation of the pole dead
logic.
The level detector pole dead logic is used to inhibit the relay comparators during
pole dead conditions and is also utilised for other features, such as VTS, PSB, SOTF,
weak infeed, bandpass filter switching, etc. With saturated CTs the current level
detectors may chatter and cause transient pole dead signals. To prevent possible
slow-down of the relay under these conditions the pole dead signals are delayed by
22.5ms.
When a transmission line is de-energised following a trip it is possible for the
comparators, although inhibited, to remain in an operated state. To over come this a
reset pulse is sent to all distance comparators when the All Poles Dead condition is
detected.
When the Relay Blocked optical isolator is used with miniature circuit breakers (MCB)
(see Section 5.2) the function is to block and inhibit (via pole dead signals) all
comparators. When the MCB is reclosed there is a possible race between the
comparators tripping due to current and no restraining voltage and the restraining
voltage establishing and stabilising the comparators. This possible mal-trip is
prevented by the delay in drop off of the Block Relay signal.

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Figure 5-1

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Pole dead logic

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5.2

Voltage transformer supervision (VTS)

5.2.1

Purpose

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The voltage transformer supervision (VTS) feature is used to detect failure of the ac
voltage supply. Such failure can occur by faults in the primary voltage transformers,
in the secondary wiring, in the fuses or within the distance relay itself. The VTS gives
visual and electrical alarms and can be selected, via the menu, to block the distance
relay comparators, in order to prevent any possible maltrip. The VTS feature can be
used when miniature circuit breakers (MCB) are used to protect the ac supply, in
place of the voltage transformer fuses, by wiring the RELAY BLOCK optical isolator to
an auxiliary contact on the MCB.
5.2.2

Principle of operation
The VTS operates by detecting the zero sequence voltage (V0) that arises when the ac
voltage supply is faulty. It is inhibited by zero sequence current because ground faults
on the transmission line also produce zero sequence voltage.

5.2.3

Outputs
A visual indication of VTS operation is given by the message V~FAIL on the liquid
crystal display (LCD) and the ALARM light emitting diode (LED) on the front of the
relay. Electrical indication is given via a VTS contact.
The VTS feature can be selected via the menu to indicate only or to indicate and
block the comparators. The latter option is used to prevent maltrips.
If the VTS feature operates and blocks tripping the LCD also contains the message
'RELAY BLOCKED', the green RELAY AVAILABLE LED is extinguished and the RELAY
INOPERATIVE ALARM (RIA) contact closed.
When the Block Relay optical isolator is energised the message on the LCD is RELAY
BLOCKED, the ALARM LED will be on and the RELAY AVAILABLE LED extinguished.
The following description assumes the VTS feature is set to block tripping unless
otherwise stated.

5.2.4

Implemetation
The level detectors used to detect zero sequence voltage and current are located on
the level detector board ZJ0136. The VTS feature is implemented in software on the
processor board ZJ0138. Figure 5-2 shows the logic equivalent circuit diagram

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Voltage transformer supervision logic

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Level detector settings


The zero sequence voltage level detector (LDV0) must be set such that it does not
operate for the maximum expected level of zero sequence voltage in a healthy
system (V0 = 10% Vn, where Vn is the rated phase-neutral voltage) but does operate
for an open circuit or a short circuit in the voltage supply (V0 = 33% Vn). A zero
sequence voltage setting of 15% Vn has been used.
The zero sequence current detector (LDLSN) used is the low set neutral which is also
used by the distance relay. This level detector is biased to prevent operation due to
unbalance in load current. As this is the same level detector used by the distance
relay no loss of ground fault sensitivity is incurred. A description of the level detectors
is given in Section 4.3

5.2.6

Speed of operation
The VTS feature is required to respond to the loss of voltage supply faster then the
relay comparators can operate, in order to prevent maltrips. This requires the zero
sequence voltage detector to be faster than the comparators.

5.2.7

Seal-In of block and resetting


If the VTS feature does operate it blocks the relay comparators immediately and thus
prevents a maltrip. If however a subsequent ground fault was to occur on the system,
the resulting zero sequence current would reset the VTS and allow a trip for a fault
not necessarily in the zone of protection. To overcome this the block is sealed in after
a 5.5 second delay. The delay is provided so that the VTS feature can tolerate
temporary faults i.e. momentary shorts, without permanently blocking the relay. A
fault lasting for 5.5 seconds will be permanent and will seal in both the alarms and
the block on the comparators. The visual and electrical alarms are only given after
the 5.5 second.
The VTS feature can be reset by pressing the READ key to accept the alarm and then
pressing the RESET key or by energising the RESET INDICATION optical isolator. The
VTS feature will not reset if the fault persists in the ac supply. In the case of the Block
Relay optical isolator being used the alarms are self resetting when the optical
isolator is de-energised.
A selection on the menu allows the VTS feature to `self reset' when the healthy volts
are restored to the relay. This condition is detected when the three over voltage level
detectors all operate and the zero sequence level detector has reset.

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Operation for indication only


When the VTS is required to give indication and alarms only, a failure of the voltage
supply may cause the relay to give an immediate trip. When the circuit breaker
opened and de-energised the transmission line the zero sequence voltage detector
(LDV0) would reset before the 5.5 second seal-in time and thus not give the
appropriate indications. Under these conditions the indication and alarms are
accelerated and given after 20 milliseconds. This delay is to prevent a transient pulse
from the zero sequence detection circuits causing a false alarm. Such pulses ( typical
up to 2-3 milliseconds ) are the result of transmission line faults causing race
conditions between the zero sequence voltage and current detectors.

5.2.9

Operation with line side voltage transformers


When all three poles of a circuit breaker are open there may be sufficient induced
voltage from an adjacent line to cause the zero sequence voltage detector to
operate. This condition could exist for longer than 5.5 seconds and thus seal-in the
block. To prevent this an All Pole Dead signal derived from internal voltage and
current level detectors, or from the BREAKER OPEN optical isolator, is used to block
the 5.5 second timer and thus prevent the seal-in.
If the pole scatter on opening a circuit breaker is sufficiently long transient operation
of the zero sequence voltage level detector may occur. To prevent this bringing up
the accelerated indication a latch is provided that only allows indications to be
accelerated if the zero sequence voltage detector operated before the comparators.

5.2.10

Operation with busbar voltage transformers


When busbar voltage transformers are used there is no loss of voltage when the
circuit breaker is open. However there may be a transient depression of the voltage
when the circuit breaker is closed, caused by line charging current, magnetising
inrush etc. To overcome this problem the BREAKER OPEN optical isolator (via the any
Pole Dead signal) is used to inhibit the instantaneous output of the VTS.

5.2.11

Operation with single pole tripping


The unbalance in the voltage supply when a single pole of a circuit breaker is open
is likely to cause the zero sequence voltage detector to operate. If this happens the
comparators would be blocked and any subsequent fault on the other phases would
not be cleared. To overcome this the Any Pole Dead signal is used to inhibit the
instantaneous block. The 5.5 second seal-in is not inhibited as the single pole is
unlikely to be open for that length of time. A 240 millisecond delay in drop off is
provided because line charging transients and capacitor voltage transformer
transients may cause the zero sequence voltage detector to remain operated for a
short time after the breaker is closed.

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A side effect is that if a single phase of the voltage supply fails at a time when the
load current is below level detector setting a pole dead will result. This will inhibit the
instantaneous block though the block will occur and be sealed in after 5.5 seconds.
This is not a practical problem since the comparators cannot operate when the
current is below level detector setting and so no maloperation can occur.
5.2.12

Operation during line energisation with a voltage supply fault present


(line VTs)
If the transmission line is energised with one or two voltage transformer fuses missing
the subsequent action depends on the load current flowing in the transmission line
and whether the switch on to fault feature (SOTF) is enabled or not. If SOTF is
enabled and the current is high enough to operate one or more current level
detectors within the first 250 milliseconds of the line energising a SOTF trip will
result. If SOTF is not enabled a distance trip may occur. However if no current
detector operates the VTS will block the relay and give alarms after 5.5 seconds.
If the transmission line is energised with all three fuses missing again the action
depends on whether SOTF is enabled. If SOTF is enabled the VTS will remain
inhibited and SOTF will remain enabled until the load current increases above level
detector setting at which time a SOTF trip will occur. With SOTF disabled the VTS will
again be inhibited and the distance relay may trip.

5.2.13

Operation with weak infeed schemes


For a weak infeed fault condition, the VTS can also operate, hence the instantaneous
output can not be used to block the week infeed logic. However for genuine voltage
supply failure the sealed-in block may be used to inhibit the weak infeed.

5.2.14

Operation with MCB


The VTS feature will not operate correctly when MCBs are used to protect the ac
supply. A fault on one phase will produce zero sequence voltage which will initially
block the comparators. However when the MCB trips the zero sequence voltage
detector will reset and remove the VTS block. By wiring the Block Relay optical
isolator such that it is energised when the MCB trips, the comparators will remain
blocked as described in the section 5.3. When the optical isolator is energised the
relay is totally inhibited from tripping, this includes the SOTF feature as well as
normal distance trips.

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Operation with DEF


When the optional Directional Earth Fault feature (DEF) is fitted the low set zero
sequence level detector (LDLSI0) is used in association with the low set neutral level
detector (LDLSN) to inhibit the VTS. This additional zero sequence current detector is
required because its sensitivity may be higher than the biased neutral detector and
can therefore prevent the VTS feature blocking the DEF for low current ground faults.
When a DEF aided tripping scheme is selected a second zero sequence detector
(LDHSI0) is also included to cover certain system operating conditions were its
sensitivity can be higher than the low set neutral level detector (LDLSN).
The DEF elements are stable at the instant of a voltage supply failure but to prevent
the DEF maloperating on a subsequent fault the sealed-in block is used to inhibit the
DEF.

5.3

Comparator level detector checks


Figure 5-3 shows a logic equivalent of the software implementation of the level
detector gating logic.
As described in Section 4.3, phase current level detectors are used to prevent
spurious operation of the comparator during line de-energisation and when the
current levels are very low (i.e. provides a sensitivity to the comparators).
The high set level detector gating is used in the POR 2 based schemes and the
BLOCKING scheme.

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Comparator CpABZ6

LDLSN

&

LDCpABZ6

&

LDCpAZn

Comparator CpAZn
LDLSA

&
&
CpCZn

LDCpABZn

&
1

CpBCZn

(ZnN)

&

&
VTS Block
Comparators
Block Relay

(ZnC)

CpABZn

&

Comparator

LDCpCZn

&

&

Comparator

(ZnB)

LDLSC

Comparator

LDCpBZn

&

LDLSB

Comparator

(ZnA)

Comparator CpBZn

LDCpBCZn
(Zn P/F)

CpCAZn

LDCpCAZn

&

&

n refers to
zone - 1,2 or 3

1
35ms

LDHSN

&

&

n=1
n=2

n=3

Zn Comp

(Zn G/F)

0V

Low Set

Z1Comp
Z2Comp
Z3Comp

ANY
Z1Z2Z3

Z2A
LDHSA

&

Z2B
LDHSB

&

Z2C
LDHSC

Figure 5-3

&

High Set

Low set & high set level detectors gating of comparators

LDHSZ2

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Switch on to fault logic (SOTF)


Figure 5-4 shows a logic equivalent of the software implementation of the SOTF
logic. The SOTF logic in Optimho is an option which may be enabled or disabled via
the menu.
The SOTF feature is enabled a short time after all three poles of the transmission line
are de-energised, as determined by the "pole dead" logic (Figure 5-1). This time can
be either 200ms or 110s as set via the menu. The normal setting is 200ms, since this
allows the SOTF feature to be available as soon as possible but is long enough to
prevent inadvertent operation of the SOTF feature during transient dips in the ac
voltage supply. With this short time setting, the SOTF feature will be enabled during
auto-reclose dead time, so that upon reclosure a SOTF trip is possible. This is usually
advantageous for most distance schemes, since persistent faults in the remote end of
a protected line section can be cleared instantaneously after reclosure of the local
breaker, rather than after the Zone 2 time delay.
When busbar VTs are used, "pole dead" signals will not be produced, but a normally
closed circuit breaker auxiliary contact can be used via an optical isolator input
(Breaker Open), to inform the relay that the circuit breaker is open. For single pole
tripping applications, the circuit breaker auxiliary contacts of each breaker pole
should be wired in series and connected to the relay, so that the relay is made aware
that all three poles of the breaker are open.
When it is desired that a SOTF trip indication is not given after auto-reclosure, or
when two shot auto-reclose is used, then the 110s SOTF enable timer option should
be used. This will ensure that the SOTF feature is not enabled during the
auto-reclose dead time. If a SOTF trip was allowed to occur on auto-reclosure, the
distance relay would also give a BAR signal to the auto-reclose relay and any second
auto-reclose shot would be prevented.
Once the SOTF feature has been enabled, it remains enabled for 250ms after the
line has been re-energised, or until a SOTF trip has been cleared. This period is long
enough for the synchronous polarising to be established if the line is healthy.
However, if a fault is present, 250ms is ample time for the fault to be detected. The
menu allows for a choice of fault detectors.
The three options available are:
a)

Tripping via the operation of any distance comparator.

b)

Tripping via the operation of any current level detector provided that
its corresponding voltage level detector has not picked up within
20ms.

c)

Tripping via the operation of any distance comparator or any


current level detector provided that its corresponding voltage level
detector has not picked up within 20ms.

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With the relay set to give a SOTF trip for any distance comparator operation, then
any fault existing on the protected line, including a close-up three phase bolted fault
would be cleared. For the latter fault, where line voltage transformers are used, there
would be no voltage memory to allow Zone 1 or Zone 2 distance comparator
operation, but Zone 3 will operate if set forward looking as it has an offset to cover
the busbars. When the Zone 3 is set reverse looking, as a directional mho, the SOTF
should be set to give a trip via comparators or level detectors as the Zone 3
comparators would not operate for a close-up three phase fault on the protected
line. For relay type LFZP114 any comparator or level detectors should also be
selected since the relay does not have Zone 3 elements.
In some situations, it may be possible for the magnetising inrush current of banked
transformers at the end of a line, or particularly of teed-off transformers, to cause
transient operation of the Zone 3 comparators on line energisation, resulting in an
incorrect SOTF trip. In such a situation, the SOTF tripping via level detectors should
be used.
While the SOTF feature is enabled the basic scheme trips and the carrier aided
scheme trips are disabled. When a fault is detected during the SOTF enable time, the
SOTF logic outputs do not reset until the fault is cleared.
If the optional DEF is fitted and the time delayed trip enabled any trip resulting from
this unit during SOTF enable time will result in a SOTF trip.

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Figure 5-4

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SOTF Logic

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Power swing blocking (PSB)


This feature is not available on LFZP114 relays
The Power Swing Blocking (PSB) feature can be selected by means of the relay menu
to any of the following conditions:
a)

PSB feature disabled.

b)

PSB feature set to indication only.

c)

PSB feature set to indication plus blocking of any one or more


elected Zones.

The PSB feature utilises two sets of phase-phase connected comparators with concentric characteristics. The outer characteristic (Zone 6), is an offset mho/lenticular
characteristic produced by a separate A-B comparator with independent forward
reach, reverse reach and aspect ratio settings. The inner characteristic selected via
the menu is either the Zone 3 or Zone 2 phase comparators.
Zone 6 may be set concentric with the Zone 3 characteristic, as shown in Figure 5-5,
when Zone 3 is set as an offset mho/lenticular. When Zone 3 is set reverse looking
as a directional mho, Zone 6 may be set concentric with the Zone 2 mho
characteristic, as shown in Figure 5-6. The zone used for the inner characteristic may
be selected via the user interface menu.
The PSB feature is implemented as software in the main microcontroller, the
equivalent hardware logic diagram is shown in Figure 5-7.
Figure 5-5 shows an example of how a power swing can pass through the
characteristics of the relay. The impedance of the power swing is detected initially by
Zone 6 (LDCPABZ6) and, in the absence of any other comparator operating, a timer
TZ6 is started. When the timer expires a bistable is set. When the power swing
impedance then enters the selected Zone 3 or Zone 2 phase fault characteristic, the
output bistable is set, producing the signal PSB Alarm, which is used to selectively
inhibit Zone 1 and/or Zone 1X and/or Zone 1Y and/or Zone 2 and/or Zone 3 as
required.
Inhibiting the Zone 2/3 comparator has no effect on the inhibit signal produced by
the logic, due to the action of the output bistable.

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The power swing inhibit signal PSB Alarm is only removed when the power swing
impedance passes outside the Zone 6 characteristic. This arrangement ensures that
the PSB cannot produce a blocking signal for fault conditions which appear inside
Zone 6 alone, or inside any Z1/Z2/Z3 comparator before the TZ6 timer expires.
The Power Swing Blocking is inhibited during the following conditions:
1)

When the A or B poles of the circuit breaker are open. This ensures that
the PSB feature does not block tripping if the measurement of the PSB
feature is affected by the A or B phases of the transmission line being
de-energised. This inhibition is brought about by the action of the low set
current level detector LDLSA and LDLSB (see Section 5.3).To extend this
period of non operation to the first 240ms after the line is re-energised,
the Any Pole Dead signal is used. The pole dead A and pole dead B
signals also inhibit the Zone 6 A-B comparator.

2)

When a signal is received from the auto-reclose unit, via the Single Pole
Open optical isolator, signifying that the distance relay has tripped, but the
circuit breaker has not yet reclosed, that is, dead time is in progress. This
inhibition of the PSB feature ensures that if a power swing develops during
the dead time of a single phase auto-reclose cycle, the distance relay can
give an immediate three phase trip.

3)

When the low set neutral current level detector LDLSN operates. This level
detector remains unoperated during balanced power swing conditions, but
can operate to prevent incorrect PSB operation under the following
conditions:

4)

a)

If a ground fault occurs during a power swing.

b)

If a heavy ground fault occurs such that the impedance


seen by the A-B comparators lies between the
boundaries of Zone 6 and Zone 3/2.

c)

If a power swing develops during the dead time of a


single phase auto-reclose cycle.

When the DEF option is fitted operation of the negative sequence current
level detector will inhibit the PSB feature. This allows the distance relay to
operate for phase faults which develop during a power swing. The setting
of this level detector is increased to 100% during detected power swings, to
prevent operation due to spill currents.

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Under conditions of loss of a voltage supply, provided that the voltage
transformer supervision feature has been set to indicate and block the
relay.

It is important to note that when PSB is enabled and the DEF is disabled,
it is essential to set the 3Io (low set) current level detector, which is
ganged to the setting of the I2 current level detector (see Section 4.4.4)
required to override the PSB unit under fault conditions.
Operation of the PSB feature is indicated on the LCD and an output contact is
provided to give a remote alarm of a power swing.
To assist commissioning the PSB feature, the signal TZ6 Timed out is available via a
monitor option (see Section 3.14.3). A PSB test feature is available via the menu
which removes the negative sequence current level detector check and the Any Pole
Dead inhibit check. This is to overcome problems simulating power swings with some
test sets .
Note:

When a Zone is blocked during a power swing the blocking is


performed at the input to the scheme logic, ie. The scheme logic
effectively does not register operation of the blocked zone. As a
consequence, all functions derived from the blocked zones, eg.
Signal send, start contact etc. Will also be inhibited during the swing
condition.

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X
Zone 6
Inhibit signal
PSB Alarm turns off
Zone 3

Inhibit signal
PSB Alarm turns on
Zone 2
Zone 1
POWER SWING
IMPEDANCE
R

Figure 5-5

Characteristic using zone 3

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Inhibit signal
PSB Alarm turns off

Zone 6
Zone 2

Inhibit signal
PSB Alarm turns on

Zone 1
POWER SWING
IMPEDANCE
R

Zone 3

Figure 5-6

PSB characteristic using Zone 2

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&

Block Z1 PSB

PwrSwg to BLOCK Z1 (menu)

&

Block Z1X PSB

PwrSwg to BLOCK Z1X (menu)

&

Block Z1Y PSB

PwrSwg to BLOCK Z1Y (menu)

&

Block Z2 PSB

PwrSwg to BLOCK Z2 (menu)

&

Block Z3 PSB

PwrSwg to BLOCK Z3 (menu)

PSB Alarm

t
4us

0
t

Reset comparators

&

4us

LDLSI2

&
PSB TEST
(menu)
Any Pole
Dead

&

&

240ms
PwrSwg BLOCKED (menu)
Single Pole Open opto

TZ6

&

&

Figure 5-7

R
Q
S

&

R
Q
S

TZ6 Timed Out

Z3 P/F

Z2 P/F

&

T39

LDCpABZ6
Z1 Comp
Z2 Comp

TIMED Z6-Z3 (menu)

&

&
Power swing blocking logic

R
Q
S

LDLSI2
Sensitivity
Control

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Standard schemes in optimho distance


Several schemes are available as standard in Optimho. The schemes are listed in
Table 5-1 and a description of each given in the following sections. All the schemes
can be selected to be single or three pole tripping, or alternatively three pole only
tripping, via the menu.
The basic scheme (BASIC) consists of up to 3 independent zones of protection. SOTF
and Loss of Load accelerated tripping feature are included as options.
The other schemes consist of Zone 1 extension and a number of carrier aided
schemes all of which incorporate the basic scheme. The scheme and other minor
options (i.e. timers) are selected via the menu.
Table 5-1 The standard schemes
BASIC

Zone 1, Zone 1XT, Zone 1YT, Zone 2T & Zone 3T.

Z1 EXTENSION

Zone 1 extension.

PUR

Permissive Underreach.

POR 1

Permissive Overreach using TP & TD for current


reversal guard.

POR 2

Permissive Overreach using reverse Zone 3 for


current reversal guard and including Weak Infeed
Echo.

POR 2 WI TRIP

Permissive Overreach using reverse Zone 3 for


current reversal guard and including Weak Infeed
Trip.

PUR UNBLOCK

Unblocking Permissive Underreach.

POR 1 UNBLOCK Unblocking Permissive Overreach using TP & TD


for current reversal guard.
POR 2 UNBLOCK Unblocking Permissive Overreach using reverse Zone 3
for current reversal guard and including Weak Infeed
Echo.

POR 2 WI TRIP
UNBLOCK

Unblocking Permissive Overreach using reverse Zone 3


for current reversal guard and including Weak Infeed
Trip.

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BLOCKING

Blocking.

BLOCKING 2

Blocking.

Note:

LFZP114 does not have the POR 2 based schemes or the BLOCKING
schemes as they require Zone 3 elements to operate.

5.7

Basic scheme and loss of load accelerated tripping

5.7.1

Basic scheme
The BASIC scheme is shown in a logic equivalent form in Figure 5-8. The scheme
consists of up to three independent zones of protection designated Zone 1, Zone 2
and Zone 3 with Zone 2 and Zone 3 time delayed. (LFZP114 does not have Zone 3).
Additional time delayed zones Zone 1X and Zone 1Y are available by reach stepping
Zone 1. SOTF logic is described in Section 5.4.
Zone 1
The six Zone 1 comparator signals after being gated with the appropriate level
detectors (see Figure 5-3), are used for Zone 1 tripping. Zone 1 tripping can be
blocked via the menu if desired. It is also blocked if SOTF is enabled and active
(SOTF En) or in the event of a power swing detected and set to block Zone 1 (Block
Z1 PSB).
Zone 2 time delayed
The six Zone 2 comparator signals after being gated with the appropriate level
detectors (see Figure 5-3), are used to control the Zone 2 timer (TZ2) and hence
Zone 2 time delayed tripping (Z2T). Zone 2 time delayed tripping can be blocked via
the menu if desired or alternatively all time delayed ground faults can be blocked
again via the menu. If the latter option is selected the Zone 2 ground fault
comparators are not used to initiate the timer. Zone 2 tripping is also blocked if
SOTF is enabled and active or in the event of a power swing detected and set to
block Zone 2 (Block Z2 PSB).

Zone 3 time delayed


The six Zone 3 comparator signals after being gated with the appropriate level
detectors (see Figure 5-3), are used to control the Zone 3 timer (TZ3) and hence
Zone 3 time delayed tripping (Z3T). Zone 3 time delayed tripping can be blocked via
the menu if desired or alternatively all time delayed ground fault trips can be
blocked via the menu. If the latter option is selected the Zone 3 ground fault

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comparators are not used to initiate the timer. Zone 3 tripping is also blocked if
SOTF is enabled and active or in the event of a power swing detected and set to
block Zone 3 (Block Z3 PSB).
Zone 1X and Zone 1Y reach stepped
Zone 1 reach can be changed under software control to either Zone 1X or Zone 1Y
reach. The reach is controlled by Zone 2 and Zone 3 comparators initiating the Zone
1X timer (TZ1X) and Zone 1Y timer (TZ1Y). After the timer has expired the reach is
changed to the appropriate zone. The six Zone 1 comparator signals, after level
detector checking (LDZ1A etc.), are used for tripping. If the second timer expires the
reach will change appropriately. The logic allows for the two reach stepped zone
timers to be set in any order, and the reach to any value, provided either Zone 2 or
Zone 3 reach is larger. If both timers are set the same Zone 1Y will result. Zone 1X
and/or Zone 1Y tripping can be blocked via the menu if desired or alternatively all
time delayed ground faults can be blocked via the menu. If the latter option is
selected the ground fault comparators are not used to initiate the timers or to issue
trips. Both zones are also blocked if SOTF is enabled and active or in the event of a
power swing detected and set to block the appropriate zone. The reach of Zone 1
may be set to Zone 1X via the Zone 1 extension scheme (see Section 5.8) but should
either reach stepped timer run out the reach will be set according to the timer.
5.7.2

Loss of load accelerated trip feature


The loss of load accelerated trip feature is shown in logic equivalent form in Figure
5-8B. This feature if selected is run in addition to the main scheme only if 3 pole only
tripping is also selected. It does not require a signalling channel or any extra input.
Any fault located within the reach of Zone 1 will result in the direct tripping of the
local circuit breaker. For an end zone fault the remote breaker will operate (Zone 1)
and the local relay can recognise this by detecting the loss of load current in the
healthy phases. This, coupled with operation of a Zone 2 comparator causes tripping
of the local circuit breaker.

Load current is detected by either the low set current or the high set current level
detectors as selected on the menu. Before an accelerated trip can occur load current
must have been detected prior to the fault. The loss of load current opens a 40ms
window during which time a trip will occur if a Zone 2 comparator operates. The
accelerated trip is delayed by 18ms to prevent initiation of a loss of load trip due to
circuit breaker pole discrepancy occurring for clearance of an external fault.
For circuits with load tapped off the protected line care must be taken in setting the
load loss feature to ensure that the level detector setting is above the tapped load
current.

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When selected the load loss feature operates together with the main scheme that is
selected. In this way it provides high speed clearance for end zone faults when the
basic scheme is selected or alternatively in aided tripping schemes it provides high
speed back-up clearance for end zone faults if the channel fails.
During SOTF or when a trip as occurred the loss of load accelerated tripping is
disabled.

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Figure 5-8

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Basic scheme logic

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Figure 5-8b

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Loss of load accelerated trip feature

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Zone 1 extension scheme


The Zone 1 extension scheme is shown in a logic equivalent form in Figure 5-9. This
scheme incorporates the basic scheme described in Section 5.7. The scheme does
not require a signalling channel but it does require a signal from the auto-reclose
relay.
The reach of Zone 1 comparators is normally set to Zone 1X reach and is reset to the
Zone 1 reach when the circuit breakers have tripped and are about to be reclosed by
auto-reclose action. The signal to reset from the extended Zone 1 to the normal
Zone 1 is generated by the auto-reclose equipment, via the optical isolator input
Reset Zone 1 Extension. In this scheme, trips issued are classed as Zone 1 and the
normal Zone 1 conditions apply (i.e. PSB etc.). Reach stepped Zone 1XT is normally
blocked when this scheme is used. Reach stepped Zone 1YT may be used with this
scheme and should TZ1Y time out the reach will change to Zone 1Y reach.
The scheme provides fast clearance of most faults. On the basis that most overhead
line faults are transient in duration, the scheme will allow fast clearance of most
faults along the protected section and also those just out of the section. Lack of
discrimination does not matter as auto-reclosure of the protected section circuit
breaker(s) will take place. The operation of the auto-reclose relay is used to reset the
extension facility so that if the fault is permanent, upon reclosure the faulted section
of line will be cleared permanently by its own protection, as in the basic scheme.

5.9

Permissive underreach scheme (PUR)


The PUR scheme is shown in a logic equivalent form in Figure 5-12 and the
communication receive logic is shown in Figure 5-10. This scheme incorporates the
basic scheme described in Section 5.7.
The underreaching directional Zone 1 elements are used to initiate local Zone 1
tripping and to send a carrier signal (CTX) to the remote end of the feeder. Receipt
of the carrier signal (via optical isolator input CRX) plus operation of the
overreaching Zone 2 elements gives an accelerated aided trip for faults occurring in
the end zones of the protected feeder. Once issued, the aided trip is only removed
when the Zone 2 elements reset. This allows time for breaker failure protection to operate in the event of a local breaker failure for a fault near the remote end of the
line. A 100ms delay on reset of the carrier received optical isolator (CRX) is needed
to ensure that the relays at both ends of a single end fed faulted line of a parallel
feeder circuit have time to trip when the fault is close up at one end. Monitor point
labelled Timer 1 is used during commissioning to check various timers.
If reach stepped Zone 1XT or Zone 1YT are used with this scheme the carrier is only
sent when the reach is set to Zone 1. When SOTF is enabled and active (SOTF En)
the PUR scheme is not run. The Channel out of Service optical isolator (COS)
converts single pole trips to three pole and can be used to block auto-reclose (see
Section 5.18). The use of this optical isolator is optional in this scheme.

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Page 175 of 345

Reset Z1 Extension opto

Figure 5-9

Zone 1 extension scheme

CRX opto

Figure 5-10

Z1Xs

CRX1

CRX2

Communication receive logic standard schemes

PSD
150ms

0
t

&

t
0

200ms

TDW

&
LGS opto
CRX opto

Figure 5-11

&

&

t
0

&

Communication receive logic unblocking schemes

CRX1

CRX2

Service Manual
LFZP 11x

Figure 5-12

R5911D
Chaper 2
Page 176 of 345

PUR scheme

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5.10

R5911D
Chaper 2
Page 177 of 345

Permissive overreach scheme (POR 1)


The POR 1 scheme is shown in a logic equivalent form in Figure 5-13 and the
communication receive logic is shown in Figure 5-10. This scheme incorporates the
basic scheme see Section 5.7. For relays with the optional DEF fitted, DEF aided
tripping can be enabled or disabled via the menu. The DEF uses the same
signalling channel as the distance. A duplex (two frequency) channel is essential for
this scheme.
The overreaching directional Zone 2 elements and/or the DEF forward looking
element are used to send a carrier signal (CTX) to the remote end of the feeder.
Receipt of the carrier signal (via optical isolator input CRX) plus operation of the
Zone 2 elements and/or DEF forward looking element permit tripping and in this
way, instantaneous tripping will only occur for internal faults. When single or three
pole tripping is selected the DEF aided trip (three pole) is delayed for 50ms to give
the distance Zone 2 ground fault elements time is issue a single pole trip if
appropriate, and to block the DEF forward looking element (see Section 4.4). This
delay is not required when three pole only tripping is selected. Once issued, the
distance aided trip is only removed when the Zone 2 elements reset and the DEF
aided trip is only removed when the DEF forward looking element reset. This allows
time for breaker failure protection to operate in the event of a local breaker failure
for a fault near the remote end of the line. The carrier signal (CTX) is maintained
for 100ms following a Zone 1 or aided trip to ensure correct scheme operation for
various faults and system configurations.
When SOTF is enabled and active (SOTF En) the POR 1 scheme is not run. The
Channel out of Service optical isolator (COS) converts single pole trips to three pole
and can be used to block auto-reclose (see Section 5.18). The use of this optical
isolator is optional in this scheme.
There is a requirement with the overreaching scheme for a current reversal guard
feature (see Section 5.15.1) to prevent inadvertent tripping of the circuit breaker
associated with the healthy line of a faulted parallel feeder circuit. Such a feature
using timers TP and TD for the distance elements and the DEF reverse looking
element and timer TDG forms part of the scheme (see Section 5.15.5). Should this
feature not be required it is easily disabled by setting TP = 98ms, TD = 0ms and
TDG = 0ms. Monitor points labelled Timer 1 and Timer 2 are used during
commissioning to check various timers.
A feature is provided which enables fast tripping to be maintained along the whole
length of the protected line, ever when one terminal is open. This is the "ECHO"
feature and it is initiated 250ms after the Breaker Open optical isolator has been
energised. The 250ms time delay is provided to prevent superfluous open terminal
echo due to the delay in drop off of the signal send following a trip. However, there
will be no time delay introduced in echoing the signal when the breaker is already
open.

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PSD

Channel Not In Service

COS opto
DEF_F
3 POLE ONLY (menu)

&

CRX2
Any Trip

DEF Delay Trip

50ms
Basic Scheme Trip

DEF Aided Trip

&

SOTF En

&

CRX1

DEF AIDED En
(menu)
DEF_F

&

DEF_R

&

Timer 1

t
TDG
TP

Z2 Comp

&

t
100ms

TD

250ms
Breaker
Open opto

Timer 2

&

&

&
1

&
Z1 Trip
DEF Aided Trip
Dist Aided Trip

CTX

0
t
100ms

Z2A

&

S
Q

Aided Trip A

Z2B

&

S
Q

Aided Trip B

Z2C

&

S
Q

Aided Trip C

Aided Trip N

Z2N

&

S
R

Figure 5-13

Dist Aided Trip

POR 1 scheme

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Permissive overreach scheme (POR 2)


The POR 2 scheme is shown in a logic equivalent form in Figure 5-14 and the
communication receive logic is shown in Figure 5-10. This scheme incorporates the
basic scheme see Section 5.7. For relays with the optional DEF fitted, DEF aided
tripping can be enabled or disabled via the menu. The DEF uses the same
signalling channel as the distance. A duplex (two frequency) channel is essential for
this scheme. A requirement of this scheme is that the Zone 3 elements are set
reverse looking (directional).
The overreaching directional Zone 2 elements and/or the DEF forward looking
element gated with additional high set level detectors (see later) are used to send a
carrier signal (CRX) to the remote end of the feeder. Receipt of the carrier signal
(via optical isolator input CRX) plus operation of the Zone 2 elements and/or DEF
forward looking element permit tripping and in this way, instantaneous tripping will
only occur for internal faults. When single or three pole tripping is selected the DEF
aided trip (three pole) is delayed for 50ms to give the distance Zone 2 ground fault
elements time to issue a single pole trip if appropriate, and to block the DEF
forward looking element (see Section 4.4). The delay is not required when three
pole only tripping is selected. Once issued, the distance aided trip is only removed
when the Zone 2 elements reset and the DEF aided trip is only removed when the
DEF forward looking element reset. This allows time for breaker failure protection
to operate in the event of a local breaker failure for a fault near the remote end of
the line. The carrier signal (CTX) is maintained for 100ms following a Zone 1 or
aided trip to ensure correct scheme operation for various faults and system
configurations.
When SOTF is enabled and active (SOTF En) the POR 2 scheme is not run. The
Channel out of Service optical isolator (COS) converts single pole trips to three pole
and can be used to block auto-reclose (see Section 5.18). The use of this optical
isolator is optional in this scheme.
There is a requirement with the overreaching scheme for a current reversal guard
feature (see Section 5.15.1) to prevent inadvertent tripping of the circuit breaker
associated with the healthy line of a faulted parallel feeder circuit. Such a feature
using reverse looking Zone 3 elements, reverse looking DEF element and timers TD
and TDG forms part of the scheme (see Sections 5.15.2 & 5.15.5). Monitor points
labelled Timer 1 and Timer 2 are used during commissioning to check various
timers. If the Zone 3 comparators are faulty there is a chance that the scheme can
mal trip for faults on parallel lines. For this reason if faulty Zone 3 comparators are
detected the scheme reverts to BASIC.

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A feature is provided which enables fast tripping to be maintained along the whole
length of the protected line, even when one terminal is open. This is the "ECHO"
feature and it is initiated 250ms after the Breaker Open optical isolator has been
energised. The 250ms time delay is provided to prevent superfluous open terminal
echo due to the delay in drop off of the signal send following a trip. However, there
will be no time delay introduced in echoing the signal when the breaker is already
open.
A further feature of this scheme is the Weak infeed echo. When one end of the line
is connected to a weak infeed terminal, the distance or DEF measuring elements at
the weak infeed end would not be able to operate for a forward fault.
Consequently the relay at the strong infeed end terminal would not be able to
operate instantaneously for end zone faults, in the absence of carrier signal from
the weak infeed end terminal. However, with certain additional logic in this scheme
it is possible to achieve rapid tripping for end zone faults at the weak infeed end.
A requirement of the scheme is that the Zone 3 measuring elements are set reverse
looking to cover the reach of the Zone 2 elements of the relay at the other end of
the feeder.
The weak infeed condition is detected by the receipt of a carrier signal and the
failure of operation of Zone 3 and DEF reverse looking measuring elements. For an
external fault, behind the weak infeed terminal, when the fault infeed is from the
strong infeed terminal source, the reverse looking Zone 3 would operate and block
the operation of the weak infeed circuit. However, for an internal fault, the distance
or DEF measuring elements at the weak infeed terminal would not operate, thus
enabling the weak infeed circuit.
When a carrier signal is received by the relay at the weak infeed end, a 10ms timer
is started, provided that:
a)
b)
c)
d)
e)

There has been no operation of any distance or DEF


measuring units.
The breaker is closed.
VTS alarm has not blocked the DEF/WI (see Section 5.2).
A single pole is not open (Single Pole Open optical isolator).
The relay is not blocked via Block Relay optical isolator.

After the 10ms time delay, a carrier signal (CTX) is sent for up to 100ms allowing
the relay at the strong infeed end to trip.
If the distance relays operate normally at both ends, the signal receive signal will
still be available even after the relay reset subsequent to fault clearance, due to the
delay in the reset of the carrier signal. This condition can operate the weak infeed
circuit causing weak infeed Signal Send (CTX), unless further action is taken.

To prevent this, a latch circuit is provided to inhibit the weak infeed feature, if any
of the Zone 1, Zone 2 distance elements or DEF forward looking element operate
and trip the breaker. Before the carrier signal is received from the other end, the
comparators may reset after a fault clearance, and hence a time delay on drop off

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of 100ms is provided in the inhibit circuit. The latch resets only after the carrier
signal resets.
When high source impedance's are present, there is the possibility of inadvertent
operation of the weak infeed circuit for external faults due to the reverse looking
Zone 3 or DEF elements failing to operate to generate the required inhibit signal.
To safeguard against this problem high set current level detectors of the same
phase as any Zone 2 element or DEF forward looking element must have also
operated before the carrier signal is sent to the other end.

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PSD
COS opto

Channel Not In Service

3 POLE ONLY (menu)


CRX2
SOTF En
Z3 Watchdog

DEF Delay Trip

50ms

Any Trip
DEF AIDED En
(menu)
DEF_F

&

Basic Scheme Trip

&

DEF Aided Trip

R
DEF_F

&
1

&

CRX1

&

Z2A

Aided Trip A

Q
R

&

Z2B

Aided Trip B

Q
R

&

Z2C

Aided Trip C

Q
R

&

Z2N

Aided Trip N

Q
R

TIMER 2
TIMER 1

Z2 Comp

&
DEF_R
Z3 NOT Z2

&

&

Dist Aided
Trip

t
TDG =TD

TD

t
TDG

LDHSI0

&

&

&

LDHSZ2
250ms
Breaker Open

100ms

&

opto

t
0

&

R
Z1 Comp
Z2 Comp

0
t

&

Q
S

10ms

100ms
Z3 Watchdog
Z3 Comp
Block Relay
Single Pole Open opto
VTS Block WI/DEF
Z1 Trip
DEF Aided Trip
Dist Aided Trip

1
1

0
t
100ms

Note Timer TDG is set equal to Timer TD

Figure 5-14

POR 2 scheme

&

&

t
0

CTX

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Chaper 2
Page 183 of 345

Permissive overreach scheme with weak infeed tripping


(POR 2 WI TRIP)
The POR 2 WI TRIP scheme is shown in a logic equivalent form in Figure 5-15 and
the communication receive logic is shown in Figure 5-10. This scheme incorporates
the basic scheme described in Section 5.7. For relays with the optional DEF fitted,
DEF aided tripping can be enabled or disabled via the menu. The DEF uses the
same signalling channel as the distance. A duplex (two frequency) channel is
essential for this scheme. A requirement of this scheme is that the Zone 3 elements
are set reverse looking (directional).
The overreaching directional Zone 2 elements and/or the DEF forward looking
element gated with additional high set level detectors (see later) are used to send a
carrier signal (CRX) to the remote end of the feeder. Receipt of the carrier signal
(via optical isolator input CRX) plus operation of the Zone 2 elements and/or DEF
forward looking element permit tripping and in this way, instantaneous tripping will
only occur for internal faults. When single or three pole tripping is selected the DEF
aided trip (three pole) is delayed for 50ms to give the distance Zone 2 ground fault
elements time to issue a single pole trip if appropriate, and to block the DEF
forward looking element (see Section 4.4). The delay is not required when three
pole only tripping is selected.
Once issued, the distance aided trip is only removed when the Zone 2 elements
reset and the DEF aided trip is only removed when the DEF forward looking
element reset. This allows time for breaker failure protection to operate in the event
of a local breaker failure for a fault near the remote end of the line. The carrier
signal (CTX) is maintained for 100ms following a Zone 1 or aided trip to ensure
correct scheme operation for various faults and system configurations.
When SOTF is enabled and active (SOTF En) the POR 2 scheme is not run. The
Channel out of Service optical isolator (COS) converts single pole trips to three pole
and can be used to block auto-reclose (see Section 5.18). The use of this optical
isolator is optional in this scheme.
There is a requirement with the overreaching scheme for a current reversal guard
feature (see Section 5.15.1) to prevent inadvertent tripping of the circuit breaker
associated with the healthy line of a faulted parallel feeder circuit. Such a feature
using reverse looking Zone 3 elements, reverse looking DEF element and timers TD
and TDG forms part of the scheme (see Section 5.15.2 & 5.15.5). Monitor points
labelled Timer 1 and Timer 2 are used during commissioning to check various
timers. If the Zone 3 comparators are faulty there is a chance that the scheme can
mal trip for faults on parallel lines. For this reason if faulty Zone 3 comparators are
detected the scheme reverts to BASIC.

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R5911D
Chaper 2
Page 184 of 345

PSD

3 POLE ONLY (menu)

Channel Not In Service

COS opto

CRX2
SOTF En
Z3 Watchdog

DEF Delay Trip

50ms

S
R

&

Any Trip
DEF AIDED En
(menu)
DEF_F

&

Basic Scheme Trip

DEF Aided Trip

R
DEF_F

&
1

&

CRX1

&

Z2A

S
Q
R

&

Z2B

&

Aided Trip B

Aided Trip C

S
Q
R

&

Z2N

Aided Trip A

S
R

Z2C

Aided Trip N

Q
R

TIMER 2
TIMER 1
Z2 Comp

DEF_R
Z3 NOT Z2

&

&

&

Dist Aided
Trip

t
TDG =TD

TD

t
TDG

LDHSI0

&

&

&

LDHSZ2
250ms
Breaker Open
opto

100ms

&

CTX

t
0

&

R
Z1 Comp
Z2 Comp

0
t

&

Q
S

10ms

100ms
Z3 Watchdog
Z3 Comp
Block Relay
Single Pole Open opto
VTS Block WI/DEF
Z1 Trip
DEF Aided Trip
Dist Aided Trip

&

1
1

&

t
0

0
t
100ms
60ms

LDOVA
LDOVB
LDOVC

&

&

t
0

4us

&

WI Ind

=1

WI N Ind

&
&
&
Note Timer TDG is set equal to Timer TD

Figure 5-15

POR 2 weak infeed tripping scheme

&

S
Q

WI A Ind

&

S
Q

WI B Ind

&

S
Q
R

WI C Ind

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LFZP 11x

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Chaper 2
Page 185 of 345

A feature is provided which enables fast tripping to be maintained along the whole
length of the protected line, even when one terminal is open. This is the "ECHO"
feature and it is initiated 250ms after the Breaker Open optical isolator has been
energised. The 250ms time delay is provided to prevent superfluous open terminal
echo
due to the delay in drop off of the signal send following a trip. However, there will
be no time delay introduced in echoing the signal when the breaker is already
open.
A further feature of this scheme is the Weak Infeed Echo and Tripping. When one
end of the line is connected to a weak infeed terminal, the distance or DEF
measuring elements at the weak infeed end would not be able to operate for a
forward fault. Consequently the relay at the strong infeed end terminal would not
be able to operate instantaneously for end zone faults, in the absence of carrier
signal from the weak infeed end terminal, and the weak infeed end would fail to
trip during these conditions. However, with certain additional scheme logic, it is
possible to achieve rapid tripping of both ends for any internal faults.
A requirement of the scheme is that the Zone 3 measuring elements are set reverse
looking to cover the reach of the Zone 2 elements.
The weak infeed condition is detected by the receipt of a carrier signal and the
failure of operation of Zone 3 and DEF reverse looking measuring elements. For an
external fault, behind the weak infeed terminal, when the fault infeed is from the
strong infeed terminal source, the reverse looking Zone 3 would operate and block
the operation of the weak infeed circuit. However, for an internal fault, the distance
or DEF measuring elements at the weak infeed terminal would not operate, thus
enabling the weak infeed circuit.
When a carrier signal is received by the relay at the weak infeed end, a 10ms timer
is started, provided that:
a)
b)
c)
d)
e)

There has been no operation of any distance or DEF


measuring units.
The breaker is closed.
VTS alarm has not blocked the DEF/WI (see Section 5.2).
A single pole is not open (Single Pole Open optical isolator).
The relay is not blocked via Block Relay optical isolator.

At the same time a 60ms timer is started provided one or more voltage level
detectors have reset. After the 10ms time delay, a carrier signal (CTX) is sent
allowing the relay at the strong infeed end to trip. The 60ms delay before issuing a
weak infeed aided trip is to provide stability during current reversals in a parallel
line.

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If the distance relays operate normally at both ends, the signal receive signal will
still be available even after the relay reset subsequent to fault clearance, due to the
delay in the reset of the carrier signal. This condition can operate the weak infeed
circuit causing weak infeed trip and Signal Send (CTX), unless further action is
taken.
To prevent this, a latch circuit is provided to inhibit the weak infeed feature, if any
of the Zone 1, Zone 2 distance elements or DEF forward looking element operate
and trip the breaker. Before the carrier signal is received from the other end, the
comparators may reset after a fault clearance, and hence a time delay on drop off
of 100ms is provided in the inhibit circuit. The latch resets only after the carrier
signal resets.
When high source impedance's are present, there is the possibility of inadvertent
operation of the weak infeed circuit for external faults due to the reverse looking
Zone 3 or DEF elements failing to operate to generate the required inhibit signal.
To safeguard against this problem high set current level detectors of the same
phase as any Zone 2 element or DEF forward looking element must have also
operated before the carrier signal is sent to the other end.
5.13

Unblocking permissive trip schemes


The permissive tripping schemes (PUR, POR 1, POR 2 and POR 2 WI TRIP) used
with power line carrier may be required to transmit the trip signal via a fault on the
power line. The signal will therefore be attenuated or shorted out altogether by the
fault. This problem can be over come by using frequency shift communication
channel with the permissive schemes operating in the unblocking mode.
The frequency shift communication equipment transmits a guard (or block)
frequency continuously in the stand-by condition. The transmitter is keyed to trip (or
unblocking) frequency whenever the distance relay CTX output is given.
The permissive tripping schemes are converted to unblocking mode of operation by
adding the communication receive logic shown in Figure 5-11. This logic requires a
trip signal receive optical isolator input (CRX) and a loss of guard signal optical
isolator input (LGS). These signals are sent from the communications equipment.

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If during fault conditions the trip signal is not shorted out the communication
equipment will issue LGS and CRX signals. The communication receive logic in this
case behaves as in the standard schemes. However if the trip signal is shorted out
the communications equipment will issue LGS only. Under these conditions the
unblocking schemes can issue distance aided trips for a short duration up to
150ms. A delay TDW is necessary to prevent over tripping during transient loss of
guard signal.
All four permissive schemes have their unblocking counterparts namely, PUR
UNBLOCK, POR 1 UNBLOCK, POR 2 UNBLOCK and POR 2 WI TRIP UNBLOCK.
5.14

Blocking schemes
Optimho contains 2 blocking schemes labelled BLOCKING and BLOCKING 2.

5.14.1

Blocking Scheme
The BLOCKING scheme is shown in a logic equivalent form in Figure 5-16. The
scheme incorporates the basic scheme described in Section 5.7. For relays with the
optional DEF fitted, DEF aided tripping can be enabled or disabled via the menu.
The DEF uses the same signalling channel as the distance.
The directional Zone 2 and/or the DEF forward looking elements, gated with
additional high set level detectors (see later) are required to trip the circuit breakers
provided a blocking signal optical isolator input (CRX) has not been received from
the remote end of the feeder, indicating that the fault is beyond the remote
busbars. The reverse looking Zone 3 and/or DEF reverse looking elements are
required to send the blocking signal (CTX) for all external faults. However, since the
Zone 3 comparators may have a forward offset, a blocking signal could be sent for
some internal faults. The directional forward looking Zone 2 elements are thus
used to cancel the blocking signal for these cases.
When single or three pole tripping is selected the DEF aided trip (three pole) is
delayed for 20ms to give the distance Zone 2 ground fault elements time to issue a
single pole trip if appropriate, and to block the DEF forward looking element (see
Section 4.4). The delay is not required when three pole only tripping is selected.
Once issued, the distance aided trip is only removed when the Zone 2 elements
reset and the DEF aided trip is only removed when the DEF forward looking
element reset. This allows time for breaker failure protection to operate in the event
of a local breaker failure for a fault near the remote end of the line.
When SOTF is enabled and active (SOTF En) the BLOCKING scheme is prevented
from issuing aided trips but the carrier send logic is run. The Channel out of Service
optical isolator (COS) converts the BLOCKING scheme to BASIC and also converts
any Zone 1 single pole trips to three pole and can be used to block auto-reclose
(see Section 5.18). This optical isolator is required for the correct operation of the
scheme.
In practice a time delay on pick up for the tripping signal TP is required for faults
detected by the Zone 2 elements. This is to allow time for a blocking signal to be
sent from the remote end, should it prove necessary, and to be received at the local
end. A similar timer TPG is provided for the DEF forward element.

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A delay on drop off for the signal received (CRX) is also provided in the blocking
scheme (TD and TDG), to safeguard against inadvertent tripping out of the healthy
section of a faulted double circuit line, during a possible reversing current situation
(see Section 5.15.3). Monitor points labelled Timer 1 and Timer 2 are used during
commissioning to check various timers.
When very high source impedance's are present, there is the possibility of
inadvertent tripping occurring for external faults due to the overreaching elements
failing to operate to generate the required blocking signal. To safeguard against
this problem the Zone 2 and/or DEF forward looking elements are gated with the
appropriate high set current level detectors (LDHS) before an accelerated aided trip
can be initiated. (see Figure 5-3)
5.14.2

Blocking 2 scheme
The BLOCKING 2 scheme is shown in a logic equivalent form in Figure 5-16B. The
scheme incorporates the basic scheme described in Section 5.7. For relays with the
optional DEF fitted, DEF aided tripping can be enabled or disabled via the menu.
The DEF uses the same signalling channel as the distance. The scheme is designed
for use with signalling equipment that requires a normally open signal start contact
and a normally open signal stop contact but it will work with just signal start contact
if required.
The directional Zone 2 and/or the DEF forward looking elements, gated with
additional high set level detectors (see later) are required to trip the circuit breakers
provided a blocking signal optical isolator input (CRX) has not been received from
the remote end of the feeder, indicating that the fault is beyond the remote
busbars. The reverse looking Zone 3 and/or the Low Set Zero Sequence current
level detector (LDLSI0) are required to send the blocking signal (SIGNAL SEND) for
all external faults. However, since the level detector sees faults in either direction,
the blocking signal is removed by operation of the SIGNAL STOP contact controlled
by the directional forward looking Zone 2 elements and/or the forward looking
DEF comparator.
When single or three pole tripping is selected the DEF aided trip (three pole) is
delayed for 40ms to give the distance Zone 2 ground fault elements time to issue a
single pole trip if appropriate, and to block the DEF forward looking element (see
Section 4.4). The delay is not required when three pole only tripping is selected.
Once issued, the distance aided trip is only removed when the Zone 2 elements
reset and the DEF aided trip is only removed when the DEF forward looking
element reset. This allows time for breaker failure protection to operate in the event
of a local breaker failure for a fault near the remote end of the line.

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When SOTF is enabled and active (SOTF En) the BLOCKING 2 scheme is
prevented from issuing aided trips but the carrier send logic is run. The Channel
out of Service optical isolator (COS) converts the BLOCKING 2 scheme to BASIC
and also converts any Zone 1 single pole trips to three pole and can be used to
block auto-reclose (see Section 5.18). This optical isolator is required for the correct
operation of the scheme.
In practice a time delay on pick up for the tripping signal TP is required for faults
detected by the Zone 2 elements. This is to allow time for a blocking signal to be
sent from the remote end, should it prove necessary, and to be received at the local
end. A similar timer TPG is provided for the DEF forward element.
A delay on drop off of the SIGNAL START contact is also provided in the blocking 2
scheme (TD and TDG) to maintain the blocking signal, to safeguard against
inadvertent tripping out of the healthy section of a faulted double circuit line, during
a possible reversing current situation (see Section 5.15.3). Monitor points labelled
Timer 1 and Timer 2 are used during commissioning to check various timers.
To prevent false operation of the scheme due to short interruption of the blocking
signal a 2ms/5ms timer is included in the signal receive logic.
During marginal external faults with low fault currents there is the possibility of the
reverse looking elements failing to operate and therefore not sending the block
signal, whilst the forward overreaching elements at the other end of the line
operate and trip. To safeguard against this problem the Zone 2 and/or DEF
forward looking elements are gated with the appropriate high set current level
detectors (LDHS) before an accelerated aided trip can be initiated thus ensuring the
external fault will be seen at both ends of the line. (see Figure 5-3)

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Z3 NOT Z2
DEF_F
DEF AIDED En (menu)

&

&

Z2

CTX

&
&

DEF_R

TPG

&

LDHS I0

t
0

DEF Aided Trip

3 POLE ONLY (menu)

&
&

COS opto

&

20ms

0
SOTF En
Basic Scheme
Trip
DEF Delay Trip
Any Trip

CRX opto

1
1

Q
R

Timer 1

t
TDG

Timer 2

t
TD
TP
LDHSZ2

&

&

Channel Not In Service

Dist Aided
Trip

Z2A

&

Z2B

&

Aided Trip A

Aided Trip B

Aided Trip C

Aided Trip N

S
R

Z2C

&

S
R

Z2N

&

S
R

Figure 5-16

Q
R

Blocking scheme

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Z3 NOT Z2
LDLSI0
DEF En (menu)
Z2

&

&

1
t

DEF_F

&

&
t

TDG

SIGNAL STOP

TIMER 2
TIMER 1

t
TPG

100ms

&

LDHSI0

t
0

R
S

&
&

COS opto

&

40ms

SIGNAL START
SOTF En
Basic SchemeTrip

1
1

Q
R

Test Point

t
t

TP
LDHSZ2

2ms
CRX opto

DEF Aided Trip

3 POLE ONLY (menu)

DEF Delay Trip


Any Trip

(CTX)

&

&

Z1 Trip
DEF Aided Trip
Dist Aided Trip

SIGNAL START

TD

DEF_R
DEF AIDED En (menu)

&

5ms

&

&

Channel Not In Service

Dist Aided
Trip

Z2A

&

Z2B

&

Aided Trip A

Aided Trip B

Aided Trip C

S
R

Z2C

&

S
R

Z2N

&

S
Q
R

Figure 5-16b

Q
R

Blocking 2 scheme

Aided Trip N

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Page 192 of 345

Current reversal logic


In double circuit lines, the fault current distribution changes when circuit breakers
open sequentially to clear the fault. With one terminal line open, the change in
current distribution can cause the directional looking distance comparators to see
the fault in the opposite direction to the direction in which the fault was initially
detected. This can cause the Permissive Overreach, the Blocking and the DEF
schemes to trip the healthy line due to the contact race between one set of
directional comparators resetting and the other set operating.
A typical system configuration that could result in current reversals is shown in
Figure 5-17 for a fault on line L1 close to circuit breaker B with all the circuit
breakers closed, which after circuit breaker B has opened, causes the direction of
current flow in line L2 to be reversed.

5.15.1

Current reversal POR 1 scheme

Forward looking Zone 3 (Figure 5-18)


The current reversal guard incorporated in the scheme logic is initiated when a
healthy line relay receives a permissive trip signal, but does not have a Zone 2
comparator operated. A delay on pick up TP in the current reversal guard timer is
necessary in order to allow time for the Zone 2 comparators to operate, if they are
going to do so for an internal fault.
Recommended TP setting = 30ms - minimum signalling channel operating time
ms.
Once the current reversal guard timer has operated, the healthy line relay D
transfer tripping is inhibited. The reset of the guard timer is initiated by either the
loss of the permissive trip signal or by the operation of the Zone 2 comparators. A
time delay TD for the reset of the current reversal guard timer is required in case
the Zone 2 comparator at end D operate before the permissive trip signal from the
relay at end C has reset, which could cause the relays on the healthy line to
maloperate.
Recommended TD setting = maximum signalling channel reset time ms + 35ms.

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The current reversal sequence diagram shows how the relays in the healthy line are
prevented from maloperation due to the sequential opening of the circuit breakers
in the faulted line and the instance in the cycle at which it takes place. After current
reversal, the Zone 2 comparators of the relay at D will initiate the transmission of
the permissive trip signal from substation D to substation C and the relay at C will
be similarly prevented from maloperation. The relays at both D and C substations
being enabled once again when the faulted line is isolated and the current reversal
guard timer setting TD has expired.
5.15.2

Current reversal POR 2 schemes

Reversed looking Zone 3 Figure 5-19)


The current reversal guard incorporated in the scheme logic is initiated when the
reversed looking Zone 3 comparators operate on a healthy line. No time delay TP
is necessary with this scheme as the Zone 3 comparators will operate well before
the arrival of the permissive trip signal initiated by the Zone 2 comparators at the
opposite end of the line.
Once the reversed looking Zone 3 comparators have operated, the relay D transfer
tripping and weak infeed tripping is inhibited. The reset of the current reversal
guard timer is initiated when the reversed looking Zone 3 resets. A time delay TD is
required in case the Zone 2 comparators at end D operate before the permissive
trip signal from the relay at end C has reset, which could cause the relays at D to
maloperate.
When the reverse looking Zone 3 comparators at end D reset the weak infeed
tripping timer is enabled, due to the delay in the reset of carrier receive. The weak
infeed is only inhibited after end A trips and the voltage level detectors at end D
operate. To prevent the weak infeed trip under these conditions a 60ms delay
before issuing a weak infeed trip is provided.
Recommended TD setting = maximum signalling channel reset time ms + 35ms.
The current reversal sequence diagram shows how the relays in the healthy line are
prevented from maloperation due to the sequential opening of the circuit breakers
in the faulted line and the instance in the cycle at which it takes place. After current
reversal, the reversed looking Zone 3 comparators at substation C will operate to
inhibit the relays at substation C before the permissive trip signal is received from
substation D. The relays at D and C substations being enabled once again, when
the faulted line is isolated and the current reversal guard timer setting TD has
expired.

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Current reversal blocking scheme

(Figure 5-20)
The current reversal guard incorporated in the scheme logic is initiated when the
blocking signal transmission started by the reversed looking Zone 3 comparators is
received on a healthy line to inhibit the aided trip. A time delay TP is needed with
the Zone 2 comparators in order to allow for the blocking signal transmission to be
received in case the reversed looking Zone 3 comparators had operated for an
external fault.
Recommended TP setting = maximum signalling channel operating time ms +
16ms.
When the current reverses and the reversed looking Zone 3 comparators reset, the
blocking signal transmission is stopped and the timer TD is started. After time TD,
the scheme resets and the relay aided trip is enabled once again.
Recommended TD setting = 20ms - minimum signalling channel reset time ms.
The current reversal sequence diagram shows how the relays in the healthy line are
prevented from maloperation due to the sequential opening of the circuit breakers
in the faulted line and the instance in the cycle at which it takes place. After current
reversal, the reversed looking Zone 3 comparators at substation D reset, but those
at substation C operate to send the blocking signal to substation D and inhibit the
aided trip. After the faulty line is isolated, the reversed looking Zone 3 comparators
will reset and the scheme aided trip restored when the timer setting TD has expired.
5.15.4

Current reversal blocking 2 Scheme (Figure 5-20B)


The current reversal guard incorporated in the scheme logic is initiated when the
blocking signal transmission, started by the reversed looking Zone 3 comparators,
is received to inhibit the aided trip. A time delay TP is needed with the Zone 2
comparators in order to allow time for the blocking signal transmission to be
received in case the reversed looking Zone 3 comparators had operated for an
external fault.
Recommended TP setting = maximum signalling channel operating time ms +
14ms.
When the current reverses and the reversed looking Zone 3 comparators reset, the
blocking signal transmission is maintained by the timer TD.
Recommended TD setting = maximum signalling channel operating time ms
+14ms.
Note:

If a simplex channel is used


TD setting= maximum signalling channel operating time ms
- minimum signalling channel reset time ms + 14ms.

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The current reversal sequence diagram shows how the relays in the healthy line are
prevented from maloperation due to the sequential opening of the circuit breakers
in the faulted line and the instance in the cycle at which it takes place. After current
reversal, the reversed looking Zone 3 comparators at substation D reset but the
block is maintained for time TD, in order to allow the relays at substation C to send
the blocking signal to substation D and inhibit the aided trip. After the faulty line is
isolated, the reversed looking Zone 3 comparators at subsation C and the forward
looking comparators at subsation D will reset.
5.15.5

Current reversal DEF POR 1, POR 2 schemes

(Figure 5-21)
The current reversal guard incorporated in this DEF Permissive Overreach scheme
logic is similar to the distance scheme with reversed looking Zone 3 comparators
POR 2, except that the operation of the scheme is controlled by the reversed
looking directional earth fault comparator instead of the distance reversed looking
Zone 3 comparators. It uses a separate current reversal guard timer TDG, but it
shares a common signalling channel.
Recommended TDG setting = maximum signalling channel reset time ms + 35ms.
Note:
5.15.6

In the POR 2 schemes TDG is automatically set to the same value as TD


and does not appear on the menu.

Current reversal DEF blocking scheme


(Figure 5-22)
The current reversal guard incorporated in this DEF Blocking scheme logic is similar
to the distance blocking scheme, except that the operation of the scheme is
controlled by the reversed looking directional earth fault comparator instead of the
distance reversed looking Zone 3 comparators. It uses a separate current reversal
guard timer TPG to allow time for the blocking signal to be received in the event of
an external fault, and a second timer TDG to maintain the aided trip inhibition until
the forward looking directional comparator at the opposite end has reset.

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Recommended TPG setting = maximum signalling channel operating time ms


+26ms.
Recommended TPG setting = 20ms - minimum signalling channel reset time ms.
5.15.7

Current reversal DEF blocking 2 scheme

(Figure 5-22B)
The current reversal guard incorporated in this DEF Blocking 2 scheme logic is
similar to the distance blocking scheme, except that the operation of the scheme is
controlled by both the low set current zero sequence level detector (LDLSI0) and the
reverse looking directional element (DEF_R) instead of the distance Zone 3
comparators. It uses a separate current reversal guard timer TPG to allow time for
the blocking signal to be received in the event of an external fault, and a second
timer TDG to maintain the blocking signal until the forward looking directional
comparator (DEF_F) at the opposite end has reset.
Recommended TPG setting = maximum signalling channel operating time ms
+4ms.
Recommended TDG setting = maximum signalling channel operate time ms
+14ms.
Note:

If a simplex channel is used:


TDG setting

= maximum signalling channel operating time ms


- minimum signalling channel reset time ms + 14ms.

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Page 197 of 345

Fault
A

L1

C
Strong
Source

Weak
Source

L2
BEFORE CURRENT REVERSAL

Fault
A

L1

C
Strong
Source

L2

Weak
Source

AFTER CURRENT REVERSAL

NOTE HOW AFTER CIRCUIT BREAKER B ON LINE L1 OPENS


THE DIRECTION OF CURRENT FLOW IN LINE L2 IS REVERSED

Figure 5-17

Current reversal in double circuit lines

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Fault

Fault

Current reversal system configuration

&

CRX
TP

&

Z2

Aided trip

TD
CTX

&
Current reversal logic

Z1B
R
E
L
A
y
L
O
C
A
T
I
O
N

CB Operating time

TP

Z2D

D
Z2C

CTX

Z2C Reset

TD
Reset
CTX
Reset

Time
Fault
Inception

Current
Reversal
Relay D
Disabled
Current reversal sequence diagram

Figure 5-18

Current reversal POR 1 scheme

Relay D
Enabled

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Page 199 of 345

Fault

Fault

Current reversal configuration


CRX
Aided trip
&

Z2
0

&

Z3R

CTX

TD
&

Current reversal logic

CB Operating time

Z1B
R
E
L
A
Y
L
O
C
A
T
I
O
N

Z3RD

TD

Z3RD
Reset

D
Z2C

CTX

Z2C Reset

Reset
CTX
Reset

Time
Fault
Inception

Current
Reversal
Relay D
Disabled
Current reversal sequence

Figure 5-19

Current reversal POR 2 & POR 2WI trip schemes

Relay D
Enabled

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Fault

Fault

Current reversal system configuration


COS
Aided trip

CRX

&

TD

TP

Z2

0
CTX
&
Z3R
Current reversal logic
Z1B
R
E
L
A
Y
L
O
C
A
T
I
O
N

CB Operating logic

Z3RD

Z3RD
Reset
CTX

Z2C
C

TP

Z2C Reset

CTX
Reset
TD
Reset

Time
Fault
Inception

Current
Reversal
Relay C
Disabled
Current reversal sequence diagram

Figure 5-20

Current reversal blocking scheme

Relay C
Enabled

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Fault

Fault

Current reversal system configuration


COS
Aided trip

CRX
&
TP

Z2

Stop CTX
&
Start CTX

0
Z3R

&

TD
Current reversal logic
Z1B

R
E
L
A
Y
L
O
C
A
T
I
O
N

CB Operating time

B
Z3RD

TD
Z3RD
Reset Reset

D
CTX
Z2C

TP

CTX
Reset

Z2C Reset

Time
Fault
Inception

Current
Reversal
Relay C
Disabled
Current reversal sequence diagram

Figure 5-20b

Current reversal blocking 2 scheme

Relay C
Enabled

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Fault

Fault

Current reversal system configuration


CRX

Aided trip

DEF F

&
0

DEF R

&

CTX

TDG
&

Current reversal logic


Z1B
R
E
L
A
Y
L
O
C
A
T
I
O
N

CB Operating time

DEF RD
Reset

DEF RD

DEF FC

CTX

DEF FC
Reset

TDG
Reset
CTX
Reset

Time
Current
Reversal

Fault
Inception

Relay D
Enabled

Relay D
Disabled
Current reversal sequence diagram

Figure 5-21

Current reversal DEF POR 1, POR 2& POR 2 WI trip schemes

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Fault

Fault

Current reversal system configuration


COS
Aided trip

CRX

&

TDG

TPG

DEF F

0
CTX
DEF R

&
Current reversal logic
CB Operating time

Z1B
R
E
L
A
Y
L
O
C
A
T
I
O
N

DEF RD
Reset
CTX

DEF FC

TPG

DEF FC
Reset

CTX
Reset
TDG
Reset

Time
Current
Reversal

Fault
Inception
Relay C
Disabled

Current reversal sequence diagram

Figure 5-22

Current reversal DEF blocking scheme

Relay C
Enabled

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Fault

Fault

Current reversal sysytem configuration


COS
Aided trip

CRX
&

TPG

DEF F

Stop CTX
&

0
DEF R

&

Start CTX
1

TDG

LDLDI0
Current reversal logic
Z1B
R
E
L
A
Y
L
O
C
A
T
I
O
N

CB Operating time

DEF RD
LDLSI0D

DEF FD
TPG
DEF RD TDG
Reset Reset

CTX
C

DEF FC
LDLSI0D

TPG

DEF RC
DEF FC
Reset

CTX

CTX
Reset

Time
Fault
Inception

Current
Reversal
Relay C
Disabled
Current reversal sequence diagram

Figure 5-22b

Current reversal DEF bocking 2 scheme

Relay C
Enabled
Relay D
Disabled

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5.16

R5911D
Chaper 2
Page 205 of 345

Bandpass filter, memory and comparator count control logic


Figure 5-23 shows a logic equivalent of the software implementation of this
function.
The voltage bandpass filters are switched in 30ms after any voltage level detector
has reset, any distance comparator has operated or the zero sequence current level
detector has operated. The filters remove dc offsets in the voltage signal (see
Section 6.7). At the instance of switching in the voltage bandpass filters, a step in
the voltage waveform may arise and to ensure that this causes no confusion to the
comparators a momentary inhibit pulse is sent to all the comparators.
The current bandpass filters, which attenuate the higher frequencies caused by
travelling waves, are switched in 10ms later. The times were chosen to optimise the
relay performance under the different system conditions.
When the current bandpass filters are switched in the distance and DEF
comparators are switched to operate on count 4. This action prevents stability
problems when the line is de-energised. Count 4 is also selected while SOTF is
enabled and during any time delayed reach stepping. This action ensures that any
discontinuities, in the voltage signals caused by the change in reach, will not cause
a mal trip.
The synchronous memory is instructed to run out on detecting any possible fault
condition (see Section 4.2.2).

5.17

Trip latching logic


Figure 5-24 shows a logic equivalent of the software implementation of this
function.
This logic controls the output trip contacts Trip A, Trip B, Trip C, 3 Pole Trip and
Any Trip. When single or three pole tripping is selected via the menu single pole
trips are allowed for single ground faults detected as Zone 1 or Aided including
week infeed. All other faults including phase to phase, time delayed, SOTF and
DEF are converted to three pole trips. All trips are latched in for a minimum of
60ms and maintained until the appropriate current level detectors reset. When
three pole tripping only is selected via the menu all trips are converted to three pole
trips and are maintained until the last level detector resets. This action ensures that
the trip signals remain until the circuit breaker opens. With evolving faults single
pole trips can change to three pole but not vice versa. Weak infeed trips reset when
the Breaker Open optical isolator is energised.
To prevent comparator chatter on the boundary of operation amplitude hysteresis is
used (see Section 6.7.2). When a trip is issued a signal is sent to the input module
which decreases the gain of the voltage signals by 5%, thereby increasing the relay
reach (see Section 6.7).

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Figure 5-23

R5911D
Chaper 2
Page 206 of 345

Bandpass filter, memory & count 4 control

Service Manual
LFZP 11x

Figure 5-24

R5911D
Chaper 2
Page 207 of 345

Trip latching logic

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5.18

R5911D
Chaper 2
Page 208 of 345

Block auto-reclose logic


Figure 5-25 shows a logic equivalent of the software implementation of this
function.
Any Zone 3 time delayed trip or SOTF trip will cause Optimho to close the BLOCK
AUTO-RECLOSE contact (BAR). A number of other conditions which can be selected
via the menu can also cause BAR. These include Zone 1X time delay, Zone 1Y time
delay, Zone 2 time delay, DEF Aided, DEF Delay, Channel out of Service, 2 or 3Ph
fault in Zone 1 or Aided and 3Ph fault Zone 1 or Aided.

5.19

External fault locator start logic


Figure 5-26 shows a logic equivalent of the software implementation of this
function.
These contacts are provided for data logging functions, such as phase selection,
starting of external fault locators, fault recorders etc. Two or more contacts close for
a fault condition, e.g.
A - G fault closes Start A and Start N
A - B fault closes Start A and Start B
A - B - G fault closes Start A, Start B and Start N
A - B - C fault closes Start A, Start B and Start C
If a fault is detected by Zone 1 comparators, the phase information of Zone 1 takes
preference over phase information from Zone 2. Similarly Zone 2 takes preference
over Zone 3. This action ensures that the closest forward fault condition detected
during any simultaneous fault situation is used for phase selection purposes. The
smaller distance relay zones also offer the best phase discrimination.
The phase information during SOTF trips is derived from either the comparators or
the level detectors depending on which is selected, via the menu, for SOTF tripping.

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BAR on Z1X(T) TRIP (menu)


&

Z1X(T)
BAR on Z1Y(T) TRIP (menu)

&

Z1YT

BAR on Z2(T) TRIP (menu)


&

Z2T
BAR on DEF AIDED TRIP (menu)

&

DEF Aided Trip

1
BAR on DEF DELAY TRIP (menu)
&

DEF Delay Trip

1
BAR on CHANNEL OUT (menu)

BAR

0
t
100ms

COS BAR (Initiated upon Trip)

&

BAR on Z1+AT 2&3Ph/F (menu)


&

2/3 Phase fault


BAR on Z1+AT 3Ph/F (menu)
3 Phase fault

&

SOTF Trip
Z3T

Figure 5-25

Block autoreclose logic

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Z3A

&

Z2 Comp
Z2A
Z1 Comp

&

Z1A
Z1A'
WI A Ind

LDLSA
LDOVA

&
1

&

Start A

&

Z3B

&
Z2B

&

Z1B
Z1B'
WI B Ind

LDLSB
LDOVB

&
1

&

Start B

&

Z3C

&
Z2C

&

Z1C
Z1C'
WI C Ind

LDLSC
LDOVC

&
1

&

Start C

&

Z3N

&
1

Z2N

Z1N
Z1N'
WI N Ind
DEF_F/R

1
&

Any Z1Z2Z3
SOTF Trip
LDLSN

1
1

LDLSI0
SOTF COMPARATOR (menu)
SOTF En

&

SOTF CNV (menu)

&

Figure 5-26

&

External fault locator start logic

&

&

Start N

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Section 6. MODULE AND BOARD DESCRIPTIONS


6.1

Self monitoring

6.1.1

Introduction
Optimho relays have continuous self-monitoring. If a failure is detected an alarm is
issued by extinguishing the "Relay Available" LED and closing the "Relay Inoperative
Alarm" contact.
Diagnostic information is automatically displayed if the failure is such that it does
not disable the main microcontroller or the Liquid Crystal Display (LCD).
Monitoring of the analogue circuits includes :
a)
b)

The dc supply and all internal dc supply rails.


The ac supplies and internal analogue current and voltage
circuits.

Monitoring of the digital circuits includes :


a)
b)
c)

Digital bus integrity.


Checking of RAM and EEPROM used by the main
microcontroller.
Watch-dog circuit outputs for each microcontroller.

Figure 6-1 shows a schematic of the monitoring arrangement.


6.1.2

Analogue circuits
The internal voltage rails +5V, +12V, -12V and +12V (relays) are constantly
monitored. In the event of any of the voltages dropping below specified tolerance
limits, or failure of the external dc supply, then the "Relay Inoperative Alarm"
contact will be closed and the "Relay Available" LED extinguished. Also, should the
+5V rail fail, the main microcontroller will be held reset.
Voltage Transformer Supervision logic (see Section 5.2) can be set to block the
operation of the relay in the event of the failure of a VT fuse. All models have an
optically coupled isolator to monitor the auxiliary contact of a miniature circuit
breaker for applications were the VT supplies are protected by a Miniature Circuit
Breaker (MCB) instead of fuses.

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Current Transformer supervision logic (see Figure 6-2), is used to examine the
status of the current input circuits. The logic is based on the premise that for healthy
line conditions, when the three phase currents are well balanced, the biased low-set
neutral level detector (see Section 4.3) will not be operated.
If the biased neutral low-set level detector operates, for a period of five seconds
continuously, without the operation of one of the following :
a)
b)
c)
d)
e)

Any Pole Dead.


Any zone comparator.
The Vo level detector.
Any DEF comparator (if DEF fitted).
Single Pole Open opto-isolator.

then the relay will respond by closing the "Relay Inoperative Alarm" contact and
extinguishing the "Relay Available" LED. The main microcontroller writes the
message:
'ERROR# I~FAIL
'
'

'

to the default diagnostic page on the LCD.


Figure 6-2 also shows the logic used to monitor the status of the High-set and
Low-set current level detectors. If any High-set level detector operates for a
continuous period of five seconds, without operation of the corresponding Low-set
level detector, the relay will close the "Relay Inoperative Alarm" contact and
extinguish the "Relay Available" LED.
6.1.3

Digital bus intergrity


In bus structured equipment the integrity of the address and data buses is of
paramount importance. In the Optimho relay the integrity of the address and data
bus lines is checked, on a cyclic basis, each loop of the main microcontroller
software. Furthermore, to ensure that any trip commands perceived to be from
Zone comparator circuits are legitimate (i.e. are not the result of a false READ due
to an address or data bus failure), a full check of the address and data buses is
performed by the main microcontroller before any trip command to the output
relays is issued.
The bus check feature incorporates both hardware and software in its
implementation. The hardware arrangement is shown in Figure 6-3. This hardware
is located on the front panel PCB.
The bus check ensures that no address or data line is tied to a logic high or low, or
shorted to any other line, and that there is no break in the connections between the
main microcontroller and the bus check hardware.

The digital bus structure consists of eight address lines, eight data lines, a READ
line and a WRITE line. During normal operation the software cycles through

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checking one line from the address bus and data bus each loop of the main
microcontroller program.
The check consists of reading an address (1,2,4,8,16,32,64, or 128), which will
individually put an address line to a logic 1. The individual reads of these
addresses is immediately followed by a READ of address 255, which results in the
previous address being output as data from the address latch in the bus checking
hardware. This results in the corresponding data lines being individually set to a
logic 1. By cycling through the addresses listed above, and following each with a
READ to address 255, then each line on the address bus and data bus will be
individually set to a logic one.
The complete cycle is as listed below :
Operation
READ
READ
READ
READ
READ
READ
READ
READ
READ
READ
READ
READ
READ
READ
READ
READ
WRITE
READ
Note:

X = do not care

Address bus lines


(1)
00000001
(255) 11111111
(2)
00000010
(255) 11111111
(4)
00000100
(255) 11111111
(8)
00001000
(255) 11111111
(16)
00010000
(255) 11111111
(32)
00100000
(255) 11111111
(64)
01000000
(255) 11111111
(128) 10000000
(255) 11111111
(255) 11111111
(255) 11111111

Data bus lines


XXXXX
00000001
XXXXX
00000010
XXXXX
00000100
XXXXX
00001000
XXXXX
00010000
XXXXX
00100000
XXXXX
01000000
XXXXX
10000000
XXXXX
11111111

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If the WRITE line is stuck at logic 0 (on):


During the READ of addresses < 255 the latch becomes 'transparent', i.e. the
internal data lines of the latch simply reflect the status of the address lines. At the
end of the READ cycle the address is latched on the trailing edge of the READ
pulse. The address bus will subsequently return to 255 (due to action of passive
pull-up resistors on the bus lines), this will make the latch become 'transparent'
again (due to WRITE line being stuck at logic 0), resulting in the latched address
being erased and replaced with 255. When the READ of address 255 occurs this
will result in 255 being output - wrong answer, and so the fault will be detected.
If the WRITE line is stuck at a logic 1 (off) :
The WRITE to 255 test will fail (since the WRITE line cannot pulse low) and so the
fault will be detected.
If the READ line is stuck at logic 0 (on) :
During the READ of addresses < 255 the latch will become 'transparent'. At the end
of the READ cycle the latch will remain 'transparent' (due to READ line being stuck
at logic 0), until the address decoder logic detects the address 255 (the quiescent
state of the address bus). At this time, due to propagation delays in the address
decoding logic, the address 255 will be held by the latch. When the bus check
software performs a READ of address 255 in the cyclic sequence it will always get
the same answer on the data bus - 255, which is only valid for one of the steps in
the cycle.
The fault on the READ line will therefore be detected.
If the READ line is stuck at logic 1 (off) - The sequence will fail at all READ tests.
Should a failure of the address or data bus lines be detected then the main
microcontroller responds, after 60mS, by extinguishing the "Relay Available" LED on
the front panel, closing the "Relay Inoperative Alarm" contact, and opening all other
relay contacts. The main microcontroller will then solely perform continuous bus
checking. Should the bus structure recover from the fault condition, the main
microcontroller will respond by running the power up initialisation routine to restore
all settings, before resuming normal operation.
A temporary fault on the bus lines may have been caused by the failure of an
address decoder or data input / output latch. Such a failure can also be detected
by the onboard watch-dog feature. (See later)

6.1.4

Memory checks - RAM and EEPROM


The main microcontroller uses both internal and external RAM (Random Access
Memory) for processing data. Directly after power up, both internal and external

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RAM are tested and cleared. If any locations cannot be written to or read from
correctly, then an error condition exists.
The main microcontroller board uses EEPROM (Electrically Eraseable
Programmable Read Only Memory) to provide non-volatile storage of relay settings
and fault records. Whenever data is written to the EEPROM a checksum value for
the data is computed and also stored. The data is then read back from the
EEPROM and a further checksum calculated. Provided this checksum matches the
one stored with the data originally, then the data is intact. If the checksums do not
match then an error condition exists.
Should an error condition be detected in either the RAM or EEPROM, then a default
diagnostics page is written to the LCD, indicating an error on the main
microcontroller board in slot 11. An alarm is also issued by extinguishing the "Relay
Available" LED, and closing the "Relay Inoperative Alarm" contact. Monitor option
24 (see Section 3.14.4) may be used to determine whether the error is in internal
RAM, external RAM, or the EEPROM.
6.1.5

Watch-dog monitoring
Optimho relays use several 80C51 microcontrollers in the hardware
implementation. These microcontrollers perform the various functions required, e.g.
level detectors, sequence comparators, voltage memory feature, frequency
tracking, combinatorial logic, etc. These various functions are performed by an
80C51 microcontroller that has been "masked" with the software required for all
the features.
On dc energisation, each microcontroller "identifies" its required function by
energising a control line and reading the resultant information from one of its input
ports. The microcontroller then releases the control line and, based on the
information returned to the input port, runs the required software. According to the
software function required, the microcontroller assigns one of the output pins as its
"watch-dog" output. The output pin used for this purpose is unique for each
software application.
Each loop of the software the microcontroller toggles the status of the watch-dog
pin. This produces a square wave output, the frequency of which is determined by
the loop time of the software that is being run (typically 100us - 200us). The output
from the watch-dog pin is used to trigger a re-triggerable monostable
multivibrator, the output of which will be at a logic low (0) provided that the
microcontroller keeps re-triggering the monostable input.

Should the microcontroller fail to output the watch-dog signal the monostable
circuit will respond by taking its output signal to a logic high (1). The CR circuit on
the output of the monostable will transfer the logic high as a pulse to the reset pin
of the microcontroller, thus re-starting it.

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If the microcontroller fails to re-start correctly the output from the monostable will
stay high. Figure 6-5 shows a schematic representation of the watch-dog feature.
The monostable output is also connected to the output data latch.
Each time the main microcontroller loops through its software program it reads the
data from all the processing boards output data latches. The status of the data bits
representing watch-dog outputs are examined and should any watch-dog bit be
high (1) then the data from that latch will be declared void for that loop of the
main microcontroller program.
Before issuing a trip signal, the main microcontroller again reads the status of the
watch-dog signals. If any have operated since the last read of the watch-dogs then
the main microcontroller does not issue the trip signal and re-starts its program
loop.
Should any watch-dog circuit operate then the main microcontroller writes a
message to the default diagnostic page on the LCD, indicating which board slot the
error has been detected. An alarm is also issued by extinguishing the "Relay
Available" LED and closing the "Relay Inoperative Alarm" contact.
A further advantage of the watch-dog feature is that it is also capable of detecting
other board failures. The "quiescent" state of the digital data bus is for all lines to
be at a logic high (1). When the main microcontroller reads the output data from
the latch, the watch-dog "bit" will be low provided that:
a)
b)
c)

The circuit being monitored by the watch-dog is healthy.


The onboard address decoding circuitry is functioning
correctly.
The output data latch is functioning correctly.

In the LFZP 111 model, equipped with both Quadrilateral and Mho ground fault
characteristics, remedial action is taken if a watch-dog operation on the
Quadrilateral comparator board occurs and the Quadrilateral characteristic had
been selected via the menu. If the Zone 3 quadrilateral ground fault watch-dog
operates, then the alternative Zone 3 lenticular ground fault elements are used. If
the Zone 1 / Zone 2 quadrilateral watch-dog operates, then the alternative Zone 1
/ Zone 2 shaped mho ground fault elements are used. Since most system faults are
ground faults, this capability considerably increases the overall availability of the
relay. The error associated with the Quadrilateral board will be alarmed in the
usual manner.

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In Models of Optimho equipped with Zone 3 elements, if the scheme selected is


any POR 2 scheme, and a fault is detected on the Zone 3 comparator board, there
will be a danger of the relay mal tripping for a fault on a parallel line (refer to
Section 5.11 and Section 5.12). To prevent this occurring, the scheme will revert
back to the Basic scheme for this condition.
If the clock signal for the polarising phase shift circuits (located on the Zone 1 /
Zone 2 shaped mho comparator board) fails, the clock circuit watch-dog will
operate. Should this occur, the Zone 1 and Zone 2 data is ignored. Also, if the
Zone 3 elements are set reverse only, then the data from the Zone 3 reverse
shaped mho elements is also ignored.

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Figure 6-1

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Self monitoring

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Any pole dead


Single pole open opto
Any Z1, Z2, Z3

&

LDVO
LDLSN

DEF_F/R

Current transformer supervision

LDHSA
LDLSA

&

LDHSB
LDLSB

&
1

LDHSC
LDLSC

&

LDHSN
LDLSN

&

Current level detector anomalies

Figure 6-2

Relay
Fail

5s

Monitoring of anomalous conditions

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Figure 6-3

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Digital bus check hardware

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RD
WR
Ad0
Ad1
Ad2
Ad3
Ad4
Ad5
Ad6
Ad7
take in Adr

take in Adr

LE
latch Adr
output
Adr to
Data bus

OE
D0
D1
D2
D3
D4
D5
D6
D7
high impedance output
pulled up
Ad0
Ad1
Ad2
Ad3
Ad4
Ad5
Ad6
Ad7

1
0
0
0
0
0
0
0

COMPARE
FAILS

1
1
1
1
1
1
1
1

D0
D1
D2
D3
D4
D5
D6
D7

Example WR line stuck at logic 0 (on)


Figure 6-4

Digital bus check cycle

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Figure 6-5

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Watchdog monitoring

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6.2
6.2.1

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Main microcontroller software


Introduction
The scheme logic software for Optimho is contained in a 64k * 8 bit CMOS
EPROM and is run in a CMOS 80C51 masked microcontroller. Details of the
hardware are given in Section 6.4.
Each relay version in the Optimho range requires different software. This software
has been broken down into smaller modules each doing a specific function. In this
way many of the modules are common to all the relays in the range. Where
differences do occur (i.e. input/output routines) specific modules have been written.
The appropriate modules are then linked together to form the overall software for
each relay type.
The software structure is shown in Figure 6-6. Much of the software is described,
with the aid of logic equivalent circuit diagrams, in other sections of this manual
and a cross reference is given in Figure 6-6.

6.2.2

Initialisation
On power up or after a reset the main microcontroller performs the following
functions:
a)

A full bus check as described in Section 6.1.3.

b)

Flashes the ALARM and TRIP LED's.

c)

Checks the internal and external RAM as described in Section


6.1.4.

d)

Resets all the other micro controllers in the relay.

e)

Reads the settings from E2PROM.

f)

Translates the settings and initialises the relay internal circuits


including the DEF and fault locator when fitted.

g)

Initialises the LCD.

h)

Sends the menu and software variable timer settings to the


slave timer microcontroller.

i)

Preloads internal registers ready for the main loop.

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Main loop
After the initialisation the software enters the main program loop as shown in
Figure 6-6. This loop consists of a number of modules which are run in sequence.
The loop takes approximately 2 to 3ms to run.
The user interface and serial communication modules handle the display,
keyboard, printer and RS232 serial communication functions. The remaining
modules handle the distance and DEF relay functions.
The internal registers used for storing data are cleared and the data is read from
all the latches on the boards. This data is sorted and stored in the microcontroller's
internal registers.
The other software modules process this data storing the results in internal registers.
Finally the appropriate data is outputted to the various boards in the relay.

6.2.4

Timers
Extensive use is made of software timers. These are run in a separate
microcontroller under the control of the main microcontroller.
Three types of timers are required. The simplest are fixed length timers whose
length is defined in the timer microcontroller (Table 6-1).
The second type are variable length timers whose length is defined by the
initialisation software (Table 6-2).
The third type are variable length timers whose length is defined by the menu
settings (Table 6-3). The actual timer lengths are passed to the timer
microcontroller as part of the initialisation.

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INITIALISATION

TOGGLE WATCHDOG

CLEAR OPTO
REGISTERS

USER
INTERFACE

SERIAL
COMMUNICATIONS

BASIC SCHEME

Section

3.1-3.12

Section

3.13

CLEAR
REGISTERS

BUS CHECK

VTS LOGIC

5.8

SELECTED SCHEME

Section

5.9-5.15

TRIP LATCHING
LOGIC

Section

5.18

COMBINING LOGIC

YES

BASIC SCHEME

NO

Section

6.1

INPUT ALL DATA

POLE DEAD LOGIC

Section

Section

5.1

FILTER SWITCHING
MEMORY COUNT

Section

5.17

Section

5.2

EXTERNAL
FAULT LOCATOR
STARTS

Section

5.20

BAR LOGIC

Section

5.19

Section

6.1

OUTPUT CONTACT
INFORMATION

Section

8.6

MONITOR
TEST OPTIONS

Section

3.14

LEVEL
DETECTOR

Section

DEF LOGIC

Section

4.4

INDICATION

Section

5.5

ANOMALOUS
CONDITIONS

Section

5.6

SOTF LOGIC

PSB LOGIC

5.3

OUTPUT INTERNAL
DATA

Figure 6-6

Main software loop

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Table 6-1 Timers with fixed lengths


Timer ref.
T2
T3
T4
T5
T6
T7
T9
T10
T11
T13
T14
T15
T16
T17
T18
T20
T21
T22
T23
T25
T26
T28
T29
T30
T33
T34
T45

Timer name
Pole Dead A Ph DO
Pole Dead B Ph DO
Pole Dead C Ph DO
VTS Accelerated
Indication PU
SOFT Current no
Volts Pick Up
LDLSI2 Drop Off
Z1 Ph Comparator
Block
Z2 Ph Comparator
Block
Weak Infeed PU
Trip Drop Off
Loss of Guard
Drop Off
Signal Received DO
Block Auto-reclose
Drop Off
Weak Infeed any
Comparator DO
POR/Weak Infeed
Carrier Echo
DEF Reset
SOTF Dead Time
Any Pole Dead DO
All Poles Dead DO
ALARM LED flash
VTS Pick Up
SOTF Dead Time
Home Key Delay
Weak Infeed PU
POR Carrier Delay
Permissive scheme
Disable
Real time clock
Timer

Setting ms
22.5
22.5
22.5
20
20
20
35
35
60
60
200
100
100
100
100
22.5
200
240
250
750
5500
110 000
900 000
10
100
150
1000

Table 6-2 Timers whose length are fixed in the software

Timer ref.

Timer name

Setting ms

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T8

Bandpass filter
(volts)
POR Circuit
Breaker Open PU
Distance
Preference
Relay blocked
opto drop off
Reset key repeat
Bandpass filter
(current)
Anomalous
conditions

T12
T19
T24
T27
T32
T44

30
250
50
or 20
20
2000
40
5000

Table 6-3 Timers whose length are set via the menu

Timer ref.

Timer name

T1
T35
T36
T37
T38
T39
T40
T41
T42
T43

TDW
TZ2
TZ1X
TZ1Y
TZ3
TZ6
TD
TP
TDG
TPG

Minimum
ms
0
100
100
100
100
20
0
0
0
0

Maximum
ms
98
9980
9980
9980
9980
90
98
98
98
98

Step
ms
2
20
20
20
20
5
2
2
2
2

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Input routine
The input routine reads the status of all the comparators, level detectors, optical
isolators and the DEF if fitted. It checks the validity of the data by testing the
watchdog bit, as described in Section 6.1.5 and stores the data in internal RAM for
use later in the loop.
The following is a list of all the input signals and the action taken on testing the
various check bits. In all cases if the watchdog bit (WD D7) is a 1 data from that
particular latch is ignored.
Distance comparators
If the quadrilateral (QUAD) characteristic is selected ground fault data from the
Quad latches is used instead of the ground fault data from the mho/lenticular
latches.
BOARD
ZJ0130
ZJ0130
ZJ0131
ZJ0132
ZJ0132

ADDRESS
62H
63H
44H
51H
52H

ADDRESS

D7

D6

D5

D4

D3

D2

D1

D0

62H

WD

CpCAZ1

CpBCZ1

CpABZ1

CpCZ1

CpBZ1

CpAZ1

63H

WD

WD
MEM
WD CLK

CpCAZ2

CpBCZ2

CpABZ2

CpCZ2

CpBZ2

CpAZ2

44H

WD

CpABZ6

CpCAZ3

CpBCZ3

CpABZ3

CpCZ3

CpBZ3

CpAZ3

51H

WD

CpCZ2

CpBZ2

CpAZ2

CpCZ1

CpBZ1

CpAZ1

52H

WD

CpCZ3R

CpBZ3R

CpAZ3R

CpCZ3F

CpBZ3
F

CpAZ3
F

If WD MEM = 1 data is accepted


If WD CLK = 1 Zone 1 & Zone 2 data is ignored.
If WD CLK = 1 and Zone 3 set reverse Zone 3 data is ignored.
If WD CLK = 1 and Zone 3 set offset Zone 3 data accepted from ZJ0131
If Quad selected and Zone 3 quad WD fails for 24 loops Zone 3 Lent G/F data is
used.
If Quad selected and Zone 1/2 quad WD fails for 24 loops Zone 1 & Zone 2 Mho
G/F data is used.

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Level detectors

BOARD
ZJ0136
ZJ0136

ADDRESS
1BH
1CH

ADDRESS

D7

1BH

WD

1CH

D6

D5

LDHSI0 LDLSI2

D4
LDV0

D3

D2

D1

D0

LDLSI0 LDOVC LDOVB LDOVA

LDHSN LDLSN LDHSB LDHSB LDHSA LDLSC

LDLSB

LDLSA

D1

D0

If WD = 1 data from both latches is ignored.


Optical isolators

BOARD
ZJ0133

ADDRESS
12H

ADDRESS

D7

D6

D5

D4

D3

12H

WD

Reset
Ind

Relay
Blocked

CRX

COS

D5

D4

D3

D2

Breaker Single
Open
Pole
Open

Reset
Z1Ext
/LGS

DEF (if fitted)

6.2.6

BOARD
ZJ0139

ADDRESS
09H

ADDRESS

D7

09H

WD

D6

CpDEFR CpDEF

D2

D1

D0

Not DEF Not DEF MAG


T BU
Start INRUSH

Output routine
As the loop is run the various control signals such as pole dead A, bandpass filter
switching etc. are built up in internal registers. At the end of each loop the output
routine sends this data to the appropriate latches on the boards in order to control
the relay circuits.

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Distance comparators

BOARD
ZJ0130
ZJ0131
ZJ0132

ADDRESS
64H
45H
53H

ADDRESS

D7

REGISTER
O_P_COMPA
O_P_COMPC
O_P_COMPB
D4

D3

D2

PDA

PDB

PDC

Reset C Count 4

45H

Vmemru Count 3 Reset M


n
Z3 a/b Z3 a/b Count 3

PDA

PDB

PDC

Reset C Count 4

53H

Count 3 Reverse

PDA

PDB

PDC

Reset C Count 4

D4

D3

D2

64H

D6

D5

D1

D0

AC input

BOARD
ZJ0134
ZJ0135

ADDRESS
03H
07H

ADDRESS

D7

D6

D5

03H

Filter
Volt
Filter
Volt

AMP
hyst
AMP
Hyst

Filter
Current

07H

REGISTER
O_P_AC1
O_P_AC2
D1

D0

THETA Ph
THETA N

Level detectors

BOARD
ZJ0136

ADDRESS
1DH

ADDRESS

D7

D6

D5

D4

D3

D2

1DH

D1

D0

Reset

DEF (if fitted)

BOARD
ZJ0139

ADDRESS
0AH

ADDRESS

D7

0AH

D6

Filter Count 3
Current

Output relays

REGISTER
O_P_DEF
D5

D4

D3
Reset
All

D2

D1

D0

Inhibit Reset C Count 4

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BOARD
ZJ0140
ZJ0140
ZJ0140

ADDRESS
05H
04H
06H

REGISTER
OUTPUT1
OUTPUT2
OUTPUT3

ADDRESS

D7

D6

D5

D4

D3

D2

D1

D0

05H

53-55

49-51

45-47

41-43

37-39

29-35

29-33

29-31

04H

54-56

50-52

46-48

42-44

38-40

30-36

30-34

30-32

06H

81-83

77-79

73-75

69-71

65-67

57-63

57-61

57-59

(e.g. 50-52 refers to the contact connected across the external connector terminal
numbers 50 and 52)
The data in OUTPUT1, OUTPUT2 and OUTPUT3 is dependent on the contact
configuration selected via the menu. See Section 8.0 for output configurations.

6.3

Power supply unit GJ0236

6.3.1

Introduction
See Fig. 6-7
The single PCB (ZJ0143) power supply unit is contained within a solid enclosure
which is mounted on the back of the Optimho. It can be detached from the main
relay case by removing four retaining nuts and withdrawing the push-on power
leads from the terminal block.
Three versions of the power supply are available, for nominal input voltage ratings
48/54, 110/125, 220/250 volts dc. These versions have operating ranges 37.5 to
64.8, 87.5 to 150, 175 to 300 volts d.c. respectively, each version produces
regulated output voltage rails with maximum load current capabilities of +12V @
1A, +12V @ 0.5A, +5V @ 0.5A, and -12V @ 0.5A. Any output can be
short-circuited for a brief time with no resultant power supply damage.

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Operation
As can be seen by reference to Fig.6-7, the dc supply from the secure station
battery is used as a power source for the production of the isolated smooth and
regulated internal supply rails. The dc is firstly passed through a filtering section
which attenuates electrical noise and voltage spikes and ensures that the Optimho
is immune to interference generated by other equipment connected to the station
battery. It also prevents the power supply from transmitting interference to this
same equipment.
The filtered voltage is sensed by the voltage detector and when this exceeds a
minimum value the internal voltage rail of the power supply electronics is
energised. This eliminates the danger of power supply maloperation for input
voltages less than the minimum operating voltages given above.
The "feed forward" principle is used in the pulse width modulator section to produce
a 40kHz square wave with a mark to space ratio (duty factor) which varies inversely
with the filtered supply voltage. This ensures that the power supply output voltages
remain relatively constant despite differing or changing input supply voltages. The
switching transistor is driven "on" and "off" by the pulse width modulator to energise
the primary of the transformer with current from the filtered voltage supply. The
transformer electrically isolates the station supply from the relay electronics (2kV for
1 minute) and transforms the primary voltage to a level suitable for the outputs.
Screens are incorporated on the transformer to render the relay insensitive to
common mode interference between the station battery supply and the relay
case/ground.
A pulsed voltage waveform is produced at each of the transformer secondaries
which are smoothed by L - C low pass filters to produce near constant dc voltages.
It is then necessary to regulate these voltages since small variations in them occur
due to ripple, input voltage variation and load regulation. This is accomplished by
the use of solid state regulator devices which also feature overcurrent and thermal
overload protection.
If some part of the power supply fails such that a large current is drawn
from the station battery then a fusible resistor, connected in series with
the station battery voltage supply, operates and disconnects the battery
voltage. Before resetting this device the fault resulting in its operation
must be investigated.

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Figure 6-7

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Power supply GJ236

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6.4

Main microcontroller board ZJ0138

6.4.1

Versions
There are two versions of the main microcontroller board :
ZJ0138 001
ZJ0138 002

6.4.2

for 50Hz relays,


for 60Hz relays.

Introduction
This board contains the main 80C51 microcontroller integrated circuit (sometimes
referred to as main processor) which together with peripheral components forms a
computer based system which controls operation of the relay. The main elements of
this system are :
a)
b)
c)
d)
e)
f)

Main 80C51 microcontroller.


64K EPROM (Contains relay software program code).
32K RAM (Used to store information generated by program
execution).
EEPROM (Non-volatile memory used to store relay settings and fault
records).
Address Latch (Used to latch lower address code during read or write
instructions to external EPROM or external RAM).
Address and Data busses

Additional elements include :


g)
h)
i)
j)
k)
l)
m)
n)
o)
p)

Address decoding logic.


Slave 80C51 microcontroller.
Identifier circuit.
DC rail monitoring circuit.
Watchdog circuits.
Transceiver and Latch circuits (Used to control the flow of information
external to the Main Microcontroller board).
RS232 buffers (Used for serial communications).
Buffer circuits (Used to buffer external Read (RD), Write (WR) and LCD
control lines).
Logic circuits (Used for RELAY FAIL and CONTACT CLEAR
signals).
Buffer/squaring circuit (Used for synchronising calendar clock to
system frequency).

Each of the above elements are explained in the text following.

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Operation - computer system


What follows is just a brief summary of some fundamental aspects of a bus
orientated computer system, a detailed explanation would run for volumes. A block
diagram illustration of the Main Microcontroller board circuit is shown in Figure 6-8.
Bus architecture and timing
To address up to 64K of external program memory a 16 bit wide address bus is
required. For data transmission an 8 bit wide data bus is used. In order to reduce the
total number of bus lines required the Intel 80C51 microcontroller time multiplexes
the 8 lower address lines (A0 to A7) for joint use as data bus lines (D0 to D7). When
the main microcontroller executes a program instruction from external EPROM or
reads data from external RAM it first asserts the 16 bit wide address of the location in
EPROM or RAM where the instruction or data is stored, it then removes the asserted
address code from the lower address/data bus lines to allow the EPROM or RAM
device to assert an instruction or data. The instruction or data is then read by the
main microcontroller.
An address latching circuit is used to latch and maintain the lower address code
applied to the external EPROM or RAM devices whilst these devices are outputting
information on the data bus. Timing control of signals used to execute instructions or
read and write data is derived from an external crystal, this ensures that the control
signals generated by the main microcontroller occur in the correct sequence and are
established for a sufficient period of time.
The 80C51 main microcontroller uses three control lines, namely RD (read), WR
(write) and PSEN (program store enable). To address external RAM the RD and WR
lines are used. To address external EPROM (program memory) the PSEN line is used
as a read strobe (only read instructions are required for EPROM).
Figures 6-9 illustrate control signal timing required for a read (RD) and write (WR)
from external RAM, and a read from external EPROM. The waveforms are described
in Section 6.4.13 Accessing External Memory.
Tri-state condition
The ability to tri-state the outputs of devices connected to the data bus is
fundamental for operation of a bus configured system. When the output of a device
is in a tri-state condition it appears as a high impedance (effectively open circuit) to
any other device driving the data bus. The driving device is thus free to force the bus
lines either high or low. No conflict or contention occurs since only one device is
allowed to drive the bus lines at any particular instant in time.

6.4.4

Main microcontroller
The main microcontroller is referred to as a microcontroller rather than a
microprocessor because the device is actually a self contained micro computer

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system fabricated as a single integrated circuit. The device contains; a CPU (Central
processing Unit) comprising an Arithmetic and Logic Unit (ALU), 128 bytes of RAM
and 4K bytes of masked ROM, 4 Bi-directional 8 bit Ports (P0 to P3), two 16 bit
timer/counters and a UART (Universal Asynchronous Receive and Transmit) for serial
communication.
The CPU is responsible for executing software instructions and also provides a
powerful boolean processor which is used extensively to implement the relay scheme
logic. The device is configured to run software code residing in both internal masked
ROM and external EPROM. The internal ROM is referred to as masked because this
code is pre-programmed during manufacture and cannot be changed.
6.4.5

Slave microcontroller - timers


In order to implement software timers and the real time calendar clock a separate
SLAVE microcontroller is used. Information is transferred between the SLAVE and the
MAIN micro controllers via the external 32k RAM. Since only one microcontroller is
allowed to access the external address and data busses at any one time, the other
microcontroller is forced to run code residing within its internal ROM. External
interrupts are used to ensure that only one microcontroller has control of the external
busses at any one time. An external logic circuit is used to switch the ALE (Address
Latch Enable) control signals from each microcontroller.

6.4.6

Identifier circuit
The 4k of masked program code within each 80C51 microcontroller comprises
several distinct programs. The function implemented by a particular microcontroller
(i.e. main microcontroller, comparator, level detector etc.) is dependant on the
program code selected. In order for the 80C51 to know which function is required
an external identify circuit is used. The identifier circuit utilises a transistor which is
configured to ground a port pin of the 80C51. The particular port pin grounded
uniquely identifies the program code required. This principle is used for all 80C51
devices with the exception of the SLAVE microcontroller, this device is identified by a
unique code issued by the main microcontroller. Refer to Section 6.1.5 for a detailed
explanation.

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Transceiver and latch circuits - external bus control


Communication with devices on other boards, external to the main microcontroller
board, occupies only a small amount of the overall program loop. The majority of
instructions in the program loop affect only components located on the main
microcontroller board. Since bus communications are mainly confined to the main
microcontroller board the address and data busses external to this board are
tri-stated when no external communication is required. This arrangement
considerably reduces any possible cross talk from the digital to the analogue bus. A
bidirectional transceiver circuit is used to control the flow of data on the external data
bus and a latch circuit is used to control the external address bus. These devices are
controlled by an address decoding circuit which monitors upper address lines A11 to
A15. The external busses are only activated when a read instruction from an address
F8xxH or a write instruction from an address F0xxH is made (xx is a unique address
allocated to an external device).
Figure 6-10 shows the logic circuit used to control the transceiver and latch circuits.
In order to avoid bus contention between the 32K RAM and external devices, when
external communication is in progress, the 32k RAM chip select (CS) input is
controlled from address line A15. As a consequence of decoding the top address
lines and also utilising the 4k of internal masked code, the EPROM code memory
maps from 1000H to EFFFH.

6.4.8

External control lines - RD, WR, RS and R/W


The read (RD), write (WR), LCD select (RS) and LCD read/write (R/W) signals are
buffered from external boards by a tri-state buffer circuit. In line with the general
philosophy of maintaining external bus lines as quiet as possible, to minimise any
possible cross talk from external digital bus signals to external analogue bus signals,
the above control lines are only applied to external boards when they are required.
The tri-state buffer is controlled by an address decoding circuit which monitors upper
address lines A12 to A15. The four control signals are only activated, as appropriate,
when a read instruction from an address F8xxH or a write instruction from an
address F0xxH is made (xx is a unique address allocated to an external device).
Figure 6-10 shows the logic circuit used to control the tri-state buffer.

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EEPROM - non-volatile memory


This area of memory is non-volatile, that is, it maintains the information stored within
it even if the dc supply is removed.
All settings and fault records are stored in an 8k parallel EEPROM. Control signal
WR and RD timing is similar to that used for external RAM. Address lines A15 and
A14 are decoded and used to chip enable the device, effectively mapping EEPROM
data storage to the 32k to 40k region. An inbuilt software protection algorithm
ensures that inadvertent data writes cannot occur during dc power on/off or when
the relay is subjected to external electrical noise.

6.4.10

Serial communication
80C51 UART
All serial communications are handled by a UART (Universal Asynchronous Receive
and Transmit) device within the main microcontroller. This device enables full duplex
communication (transmit and receive simultaneously) at several baud rates with
various protocols, refer to Section 3.13. The UART is controlled from software stored
in EPROM.
RS232
Two separate RS232 buffer/converter circuits are provided, one for the front (LOCAL)
serial port and one for the rear (MODEM) serial port. The function of these circuits is
to convert TTL logic signals used by the main microcontroller to corresponding signal
levels required for serial communications and visa versa. A TTL logic 1 output is
transformed to a voltage level in the range +5V to +15V. A TTL logic 1 input is
transformed from a voltage in the range +3V to +15V. A TTL logic 0 output is
transformed to a voltage in the range -5V to -15V. A TTL logic 0 input is transformed
from a voltage in the range -3V to -15V.
Each RS232 device is enabled from data bus line D5 ( 1 for LOCAL, 0 for MODEM)
via a latch circuit connected to the internal data bus. The latch circuit is in turn
controlled by an output signal from the main microcontroller and the external write
(WR) signal. Data is read and written serially to the RS232 devices using the TX
(Transmit) and RX (Receive) port connections from the main microcontroller. Modem
control lines RTS (output) and DTR (output) are derived from data lines D3 and D4
respectively, and applied to the modem RS232 buffer via a latch circuit. The latch
circuit is controlled by an output signal from the main microcontroller and the
external write (WR) signal. Modem control lines CTS (input) and DSR (input) are
connected from the RS232 modem buffer to appropriate port pins on the main
microcontroller.

6.4.11

Monitor circuits
DC rail monitor

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Circuits are provided to monitor the 5V, 12V and -12V dc rail voltages. If the 5V dc
rail drops by more than 10% a reset is applied to the main microcontroller. The reset
is only removed when the 5V rail is within 10% of nominal 5V. Similarly, a reset is
applied if either the +12V or -12V dc rails are lost. In addition to resetting the main
microcontroller the CONTACT CLEAR and RELAY FAIL signals are pulled low when a
reset is issued. The CONTACT CLEAR signal is applied to all output auxiliary relay
boards (ZJ0140) to prevent operation of any output auxiliary relay. The Relay
Inoperative Alarm contact closes and the Relay Available LED is extinguish when the
RELAY FAIL signal goes low.
Watchdog monitor
Both the main and slave micro controllers are monitored by separate watchdog
circuits. The function of a watchdog circuit is to initiate a reset in the unlikely event of
a software upset. The operating principle of the watchdog circuit relies on the
software code executing a periodic toggling of an output port connected to an
external monostable circuit. The periodic signal is used to hold off the output from
the monostable circuit which is ac coupled to the reset pin of the main
microcontroller. Should a software upset occur, the periodic signal will be lost and
consequently a reset will be issued. The slave microcontroller reset pin is controlled
from the main microcontroller.
6.4.12

Clock reference circuit


When the menu option to reference the CALENDAR CLOCK to the system voltage
frequency is selected the SLAVE microcontroller uses an input derived from the
analogue VB signal to reference the clock. The 'V MEM IN' sine wave signal is
squared up to a uni-polar (+5V, -0.5V) signal using an open loop operational
amplifier and zener diode circuit. The SLAVE microcontroller counts edge changes
from the squaring circuit, 100 (50Hz version) or 120 (60Hz version) changes
constituting a 1 second period. The Level Detector Overvoltage B signal (LDOVB) is
monitored by the SLAVE microcontroller. Should the system voltage fall to less than
70% of nominal the LD0VB signal is pulled high. In this event the CALENDAR
CLOCK is automatically referenced to the relay crystal until the system voltage rises
to above 70% of nominal.

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Accessing external memory -- bus cycle timing


Program memory read sequence (Figure 6-9a)
Each Program Memory bus cycle consists of six oscillator periods. These are referred
to as T1, T2, T3, T4, T5 and T6 on Figure 6-9a. The address is emitted from the
microcontroller during T3. Data transfer occurs on the bus during T5, T6 and the
following bus cycle's T1. The read cycle begins during T2, with the assertion of
address latch enable signal ALE '1'. The falling edge of ALE '2' is used to latch the
address information, which is present on the bus at this time '3'. At T5, the address is
removed from the Port 0 bus and the microcontroller's bus drivers go to the high
impedance state '4'. The program memory read signal PSEN '5' is also asserted
during T5. PSEN causes the addressed device to enable its bus drivers to the
now-released bus. At some later time, valid instruction data will become available on
the bus '6'. When the 80C51 subsequently returns PSEN to the high level '7', the
addressed device will then float its bus drivers, relinquishing the bus again '8'.
Data memory read sequence (Figure 6-9b)
Each External Data Memory bus cycle consists of twelve oscillator periods. These are
shown as T1 through T12 on Figure 6-9b. The twelve period External Data Memory
cycle allows the 80C51 to use peripherals that are relatively slower than its program
memories. Data transfer occurs on the bus during T7 through T12. T5 and T6 is the
period during which the direction of the bus is changed for the read operation. The
read cycle begins during T2, with the assertion of address latch enable signal ALE '1'.
The falling edge of ALE '2' is used to latch the address information, which is present
on the bus at this time '3'. At T5, the address is removed from Port 0 bus and the
microcontroller's bus drivers go to the high-impedance state '4'. The data memory
read control signal RD '5', is asserted during T7. RD causes the addressed device to
enable its bus drivers to the now-released bus. At some later time, valid data will
become available on the bus '6'. When the 80C51 subsequently returns RD to the
high level '7', the addressed device will then float its bus drivers, relinquishing the bus
again '8'.
Data memory write sequence (Figure 6-9c)
The write cycle, like the read cycle, begins with the assertion of ALE '1' and the
emission of an address '2'. In T6, the microcontroller emits the data to be written into
the addressed data memory location '3'. This data remains valid on the bus until the
end of the following bus cycle's T2 '4'. The write signal WR goes low at T6 '5' and
remains active through T12 '6'.

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Figure 6-8

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Main microcontroller ZJ0138

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T2

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T3

T4

T5

T6

T8

T7

T9

T10

T11

T1

T12

T2

OSC

ALE

PSEN

RD, WR
3
ADDRESS A15 - A8

PORT 2
3
PORT 0

FLOAT

A7 - A0

ADDRESS A15 - A8
8

6
INST IN

FLOAT

FLOAT

A7 - A0

FLOAT

INST IN

FLOAT

Program Memory Read Cycle Timing (a)

ALE

PSEN

RD
7

5
3
PORT 2

ADDRESS A15 - A8
3

PORT 0

INST IN

FLOAT

A7 - A0

6
FLOAT

ADDRESS
OR FLOAT

FLOAT

DATA IN

Data Memory Read Cycle Timing (b)

ALE

PSEN

WR
6

5
2
PORT 2

ADDRESS A15 - A8
2

PORT 0

INST IN

FLOAT

A7 - A0

3
DATA OUT

Data Memory Write Cycle Timing (c)

Figure 6-9

Program memory read cycle timing

ADDRESS
OR FLOAT

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TRI-STATE CONTROL
FOR RD, WR, RS & R/W
BUFFER
A15
A14
A13
A12

TRI-STATE CONTROL
FOR ADDRESS BUS
LATCH

AND

A11

RD

Figure 6-10

AND

OR

DIRECTIONAL CONTROL
FOR DATA BUS
TRANSCEIVER

OR

TRI-STATE CONTROL
FOR DATA BUS
TRANCEIVER

Address decoding circuit for external bus control

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Front module GJ0240 (Board ZJ0137 / ZJ0166)


The Front Module GJ0240 consists of a hinged front panel assembly which houses
the front panel board ZJ0137 or ZJ0166. Figure 3-1 shows the horizontal aspect
front panel layout arrangement. Figure 6-11 is a block diagram illustration of the
front panel circuit.

6.5.1

Versions
There are two versions of the front panel module, these are :GJ0240 001 (Board ZJ0137 001) for horizontal aspect,
GJ0240 002 (Board ZJ0166 001) for vertical aspect.

6.5.2

Mechanical
The front panel board is mounted on the hinged front panel assembly. Connections
are made to the main microcontroller board (ZJ0138) via a 64 way plug/socket
connector. Connections are made to the opto-isolator board (ZJ0133) and output
relay boards (ZJ0140) via a 64 way ribbon cable connector mounted on the side of
the front board. A special hinge alignment mechanism ensures that the front panel
board connector locates accurately with the main microcontroller board connector
when the front panel is closed. A spring loaded support arm is provided to hold the
front panel open when withdrawing or inserting circuit boards.

6.5.3

Liquid crystal display


A 2 line by 16 character dot matrix liquid crystal module is used. This display module
consists of a liquid crystal panel with CMOS drive/control, character generator ROM
and display data RAM circuitry.
LCD operation
Three control lines, namely RS, R/W and E are used to control the writing and
reading of information to and from the LCD. Information written to the LCD module
may be either control instructions or data for display. Before any information is
written to the LCD module the data line D7 (BUSY line) is tested and information is
only written provided the LCD is ready to action it. The BUSY line is routed through a
buffer circuit and connected to external data bus line D7. Note, the address and
data buses external to the main microcontroller board are referred to as external
address and external data bus. These buses are only activated when the main
microcontroller reads or writes to devices external to the main microcontroller board
(ZJ0138). Display data or control commands are written to the LCD module via a
latch circuit connected to the external data bus.
The latch and buffer circuits are controlled by separate outputs from an address
decoding circuit connected to the external address bus. Unique addresses are
allocated for the control of the buffer and latch circuits. The BUSY line is read on
external data bus line D7 whenever the main microcontroller executes a read (RD)
instruction from the LCD buffer address (3AH). Display data or control instructions

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applied to the external data bus, are written to the LCD latch circuit whenever a write
(WR) instruction to the LCD latch address (39H) is executed by the main
microcontroller.
6.5.4

Keypad operation
The keypad consists of four cursor (arrow) keys mounted in a cruciform pattern, a
RESET key, a SET key and a ACCEPT/READ key. One side of each key is connected
to 0V, the other side is connected to a data line. When a key is pressed the
connected data line is grounded. When a key is not pressed, the connected data line
is pulled high (5V) via a pull up resistor. The table below shows data line key
connections and the corresponding code present on the data bus when each key is
pressed in turn.

KEY

DATA BUS LINE


CONNECTED

UP
RIGHT
DOWN
LEFT
SET
ACCEPT/READ
RESET
No Key

D0
D1
D2
D3
D4
D5
D6

DATA BUS CODE


WHEN KEY
PRESSED
FEH
FDH
FBH
F7H
EFH
DFH
BFH
FFH

PARALLEL PORT
PIN CONNECTED
17
16
15
14
13
12
10

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A latch circuit is used to buffer the external data bus from the keypad keys. The latch
circuit is controlled by the output of an address decoding circuit connected to the
external address bus. A unique address (38H) is allocated for the control of the latch
circuit. The main microcontroller reads the keypad status by executing a read (RD)
instruction from address 38H. Software code run by the main microcontroller is used
to de-bounce a key by only actioning it if its status has remained constant for more
than about 20ms. The keypad connected data lines are also connected to the
PARALLEL port pins, as indicated in the table above, this allows key presses to be
mimicked by grounding the appropriate PARALLEL port pin using external test
equipment connected to the PARALLEL port. Note, pins 22 to 25 on the PARALLEL
port are connected to 0V.
6.5.5

Address/data bus checking circuit


The electrical integrity of the address bus, data bus, READ (RD) line and WRITE (WR)
line, is continually monitored by the main microcontroller using circuitry located on
the front panel board. The bus check circuitry consists of an address decoding circuit
which controls a latch circuit connected between the address and data buses. A full
explanation of the circuit operation and method used to implement bus checking is
given in Section 6.1.3.

6.5.6

Parallel port
Output signals - printer strobe
The Printer Strobe signal is used in conjunction with the Printer Busy signal to
implement handshaking between the relay and a connected parallel printer. Print
data sent to the PARALLEL port is only acknowledged and read by a parallel printer
when the Printer Strobe signal is low. The Printer Strobe signal is controlled by the
data line output D3 of a latch circuit connected to the external data bus. The latch
circuit is controlled by the output from an address decoding circuit connected to the
external address bus. A unique address (3BH) is allocated to control the latch circuit.
Output signals - DC
For monitoring purposes the 5V, 12V, -12V and 12V(Relay) dc rail voltages are
brought out to PARALLEL port pins 18, 19, 20 and 21 respectively via 10 kohm
resistors.

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Output signals - for parallel printer and monitor options


Eight npn transistor circuits are used to provided 8 TTL compatible outputs. These
outputs are suitable for direct connection to a parallel printer or can be used by
external test equipment to monitor the logical status of various internal signals, refer
to Monitor Option Section 3.14.4. The TTL compatible outputs are controlled by the
data line outputs D0 to D7 of a latch circuit connected to the external data bus. The
latch circuit is controlled by the output from an address decoding circuit connected to
the external address bus. A unique address (3CH) is allocated to control the latch
circuit. The logic inversion introduced by the transistor circuits is reversed by
complementing (inverting) data before writing it to the output latch.
Input signals - keypad mimic
Key presses can be mimicked by grounding appropriate pins on the PARALLEL port,
see KEYPAD OPERATION section above.
Input signals - printer busy
The Printer Busy signal is used in conjunction with the Printer Strobe signal to
implement handshaking between the relay and a connected parallel printer. Print
data is only sent to the PARALLEL port when the printer pulls its Printer Busy line low
to indicate that it is ready to receive data. The Printer Busy line, connected to data
line D7, utilises the keypad latch circuit. The main microcontroller reads the Printer
Busy line by addressing the latch using the same method as used for reading the
keypad status, as described in KEYPAD OPERATION above.
Isolation
This port is intended for local connection only and as such has only limited protection
against high voltage interference. Precautions should be taken to isolate external
connections made to this port if excessive noise voltages are possible.

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Summary Table of PARALLEL Port Pin Connections

PARALLEL
PORT PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Note:

6.5.7

PRINTER
CONNECTIONS
STB (Pin 1)
D0 (Pin 2)
D1 (Pin 3)
D2 (Pin 4)
D3 (Pin 5)
D4 (Pin 6)
D5 (Pin 7)
D6 (Pin 8)
D7 (Pin 9)
Do not connect
BUSY (Pin 11)
Do not connect
Do not connect
Do not connect
Do not connect
Do not connect
Do not connect
Do not connect
Do not connect
Do not connect
Do not connect
0v (Pin 22)
0v (Pin 23)
0v (Pin 24)
0v (Pin 25)

FUNCTION NAME
Printer strobe
(Output)
Data line D0
(Output)
Data line D1
(Output)
Data line D2
(Output)
Data line D3
(Output)
Data line D4
(Output)
Data line D5
(Output)
Data line D6
(Output)
Data line D7
(Output)
Data line D6 RESET key
(Input)
Data line D7 Printer Busy (Input)
Data line D5 READ key
(Input)
Data line D4 SET key
(Input)
Data line D3 LEFT key
(Input)
Data line D2 DOWN key (Input)
Data line D1 RIGHT key
(Input)
Data line D0 UP key
(Input)
5v
Monitor
(Output)
12v
Monitor
(Output)
-12v
Monitor
(Output)
12v(Relay) Monitor
(Output)
0v
0v
(Note: All are commoned,
0v
only 1 connection
0v
necessary)

for correct printer operation pin 10 and pins 12 to 21 should not be


connected.

Indication LED's
Three indication light emitting diodes (LED) designated TRIP (red), ALARM (yellow)
and RELAY AVAILABLE (green) are provided. The TRIP and ALARM LED's are
controlled by the data line outputs D0 (for TRIP LED) and D2 (for ALARM LED) of a
latch circuit connected to the external data bus. The latch circuit is controlled by the
output from an address decoding circuit connected to the external address bus. A

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unique address (3BH) is allocated to control the latch circuit. In order to turn ON the
TRIP LED a data byte having bit D0 set is written to the data bus at address 3BH. To
turn OFF the TRIP LED a data byte having bit D0 cleared is written to the data bus at
address 3BH. The ALARM LED is similarly controlled using data bit D2. The RELAY
AVAILABLE LED is operated from the normally open contact of the Relay Inoperative
Alarm auxiliary relay mounted on output relay board ZJ0140 002. Under normal
working conditions the RIA auxiliary relay is picked up and the RELAY AVAILABLE LED
is turned on.
6.5.8

Serial Port
Relevant connections made to the 25 way D type front mounted (LOCAL) SERIAL port
are routed directly to the main microcontroller board (ZJ0138) via the 64 way
front/main microcontroller plug/socket.
Note, this port is intended for local connection only and as such has only limited
protection against high voltage interference. Precautions should be taken to isolate
external connections made to this port if excessive noise voltages are possible, refer
to Section 3.13.
Summary Table - SERIAL port pin connections for front (local) socket

SERIAL
PORT PIN
1
2
3
4
5
6
7
8 to 24
25

FUNCTION NAME
0V (Ground)
TXD (Transmit)
RXD (Receive)
Not connected
Reserved, do not connect
Not connected
0V (Signal ground)
Not connected
Reserved, do not connect

Refer to Figure 3-7 for appropriate connections.

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Figure 6-11

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Front Panel ZJ137 / ZJ166

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6.6

Optical isolator board ZJ0133

6.6.1

Introduction
The board contains seven optical isolators as shown in block diagram form in Figure
6-12. These allow the scheme logic to access information from external equipment
and take appropriate action, as described in Section 5.0.
The main microcontroller reads the status of the optical isolators via the address and
data bus.

6.6.2

Voltage rating
There are two different voltage ratings (Vx2) as shown in the table.

Vx2
48/54V
110/125V

Operative Range
37.5 to 60V
87.5 to 137.5V

Maximum Withstand
64.8V
150V

For Vx2 = 220/250V the 110/125V option is used with an external resistor box
GJ0229 002.
6.6.3

Implementation
The PCB plugs directly into the rear Midos terminal block and communicates with the
main microcontroller through the ribbon cable at the front of the relay. The rear
connection and function of each optical isolator are shown in the following table.

CASE TERMINAL
+ve
-ve
58
60
62
64
66
68
70
72
74
76
78
80
82
84

NAME
Reset Zone 1 Extension / Loss of Guard
Single Pole Open
Breaker Open
Channel Out of Service
CRX
Relay Blocked
Reset Indications

The optical isolators have a defined minimum operating voltage of greater than 10V.
Transient operation is prevented by filtering the output of each optical isolator.
Transient suppressers are fitted across the inputs to prevent damage to the optical
isolators. A screen, connected to the case, diverts interference to the case, thus
preventing coupling into the secondary circuits.

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Figure 6-12

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ZJ0133 Optical Isolator Board

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6.7

Input Module GJ0233

6.7.1

Introduction

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The input module provides the electrical isolation between the relay and substation
equipment for the ac voltage and current inputs. The module contains three voltage
transformers, five current transactors and 2 printed circuit boards (ZJ0134 &
ZJ0135) which contain calibration and filter circuits. The transformers are mounted
on a metal plate with their primaries wired to a Midos terminal block. The
secondaries are wired to a small backplane on the rear of the module. The
backplane has edge connectors for two PCBs and a connector to couple it to the
main backplane.
The module connects to the rear terminal block for external connections and to the
main backplane for internal connections.
Block diagrams of the 2 PCBs are shown in Figures 6-13 and 6-14.
The main microcontroller controls setting etc. via the digital address and data bus.
The analogue signals are transferred to the measuring boards located in the central
section of the case via the analogue bus. The voltage and current circuits will be
described separately.
6.7.2

Voltage input circuits


The input module isolates and filters the ac inputs from the transmission line voltage
transformers. The module has three phase-neutral connected isolating transformers
insulated to 5kV peak. These have interwinding screens to attenuate common-mode
high frequency interference.
Figure 6-15 shows a simplified block diagram of one phase of the voltage circuit.
The output from each transformer is passed to the backplane and on to the PCB
where it passes through an overvoltage surge protection circuit which limits
overvoltages due to lightning strikes, cross country faults and other high voltage
transients to within limits which are safe for the electronic circuitry contained within
the relay.
The signals are calibrated and filtered by low pass filters with cut-off frequencies of
300Hz. The purpose of the filters is to remove unwanted high frequency signals such
as line reflections following the incidence of a fault or interference induced on
substation wiring by switching operations. Each output is then passed to a bandpass
filter. The filters are of second order with centre frequencies equal to the nominal
supply frequency and Q values of 0.5. This type of filter is very effective in
eliminating unwanted exponential and high frequency components of the input
voltage.

Under normal conditions the distance measuring elements use the voltage signal
produced by the low pass filter. However, the measuring elements are automatically
switched to the filtered output of the bandpass circuits after a predetermined interval

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of time from the incidence of a fault. This ensures that, if the comparator operating
time has been extended by abnormally severe exponential or high frequency
components of the voltage signal, the comparators have the opportunity of
remeasuring on a relatively uncontaminated voltage signal.
This arrangement prevents any possibility of excessively long comparator operating
times which might otherwise occur under certain extreme conditions, such as:
a)
b)
c)

Severe CVT transient errors with high SIR and high fault
position.
Severe travelling wave distortion on a long line at high
fault position.
Large mismatch between source and line time constants with
high SIR and high fault position. An example is shown in
Figure 6-16.

The voltage level detectors, distance comparators and the zero sequence current
level detector are used as fault detectors for the purpose of controlling the transfer
from normal to bandpass filtered voltage signals (see Section 5.16). Solid state
switches are used under the control of the main microcontroller.
The reset time of the voltage level detectors is 0 to 5.5ms depending on
point-on-wave of fault incidence, and a further delay of 30ms is introduced by a
software timer. Resetting of any voltage level detector causes all three phases of
voltage signal to be transferred to the bandpass filter outputs. The time delay of 30
to 35.5ms between fault inception and signal transfer is sufficient to allow fast
tripping to occur, if electrical conditions permit, before the intervention of the filters.
If fast tripping does not occur, the delay is long enough for the transient errors of the
bandpass filters caused by the collapsing voltage to have decayed away before
signal transfer to the bandpass outputs. At the instance of switching in the voltage
bandpass filters, a step in the voltage waveform may arise and to ensure that this
causes no confusion to the comparators a momentary inhibit pulse is sent to all the
comparators.
The voltage supply is switched back to normal when:
a)
b)

The fault is removed by a remote breaker so that the voltage is


restored to normal and the voltage level detectors pick up again.
The fault is cleared by de-energising the line such that one or
more pole dead conditions exist.

This control logic is performed by software in the main microcontroller described in


Section 5.16.

When the relay trips the circuit breaker the relay reach is increased by 5%. This is
achieved by reducing the gain of the voltage buffer amplifiers, which reduce the
outputs VA, VB and VC, by 5%. This hysteresis under control of the main
microcontroller defines the reset ratio of the relay and prevents chatter of relay
output contacts for faults on the boundary of operation.
The B phase output from the bandpass filter (VMEM IN) is used to generate the
synchronous memory facility on the Zone 1/2 comparator board (ZJ0130).

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The overall transfer functions for the voltage input signals at the nominal power
system frequencies are:
Vout/Vin = 0.066299 /-10 (50 Hz models)
Vout/Vin = 0.065874 /-12 (60 Hz models)
6.7.3

Current input circuits


The input module isolates and filters the ac current transformers. The standard relay
requires the use of only four current transactors, the fifth is fitted for use by either the
DEF and/or fault locator features when fitted.
Figure 6-17 shows a simplified block diagram of one phase of the current circuit.
All the current transactor primaries are electrically isolated, to a level of 5kV peak
from their corresponding secondaries and the relay case. In addition each device is
fitted with a screen which helps to couple any common mode electrical noise present
on the relay current input terminals to ground.
The output from each transactor, at approximately 0.3*I/In V /-90, is wired to the
backplane and then to the PCBs. Any noise is further reduced by the capacitors
labelled C, which couple the noise to ground. These capacitors also attenuate high
frequency transverse noise present on the transactor secondaries. Zener diodes,
labelled D on the diagram, limit the transactor output voltages, following heavy
surges of current flowing in the transmission line, to a level which is safe for the
electronic circuits in the module.
The output signals from the three phase current transactors are attenuated by DACs,
under the control of the main microcontroller, to produce the relay base setting KZPh
(same for phases A,B and C). Similarly the output from the neutral transactor is
attenuated by a DAC, again under the control of the main microcontroller, to
produce the relay base setting KZN.
Each of the attenuated signals is passed through a calibrated low pass filter which
has a cut-off frequency of 300Hz. Each output is then passed to a second order
bandpass filter with centre frequency equal to the nominal supply frequency and Q
value of 0.5. The output from the low pass filter is normally used but 10ms after the
voltage bandpass filters are switched in the current bandpass filters are also switched
in.
The filters reduce the harmonic and travelling wave distortion in the current signals.
The resulting signals, LDIA, LDIB and LDIC are used by the level detectors. These
signals are also phase shifted by programmable all pass filters which gives the
necessary phase shift to form the replica impedance signals IAZPH, IBZPH, ICZPH
and -INZN. The phase shifts produced are determined by the setting THETA Ph &
THETA N.
The respective output signals are:
IAZPH = (I * 0.3348)/(In * KZPh) V /(THETA Ph - 10) (50 Hz)
IAZPH = (I * 0.3325)/(In * KZPh) V /(THETA Ph - 12) (60 Hz)
-INZN = (I * 0.3348)/(In * KZN) V /-(THETA N - 10) (50 Hz)

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-INZN = (I * 0.3325)/(In * KZN) V /-(THETA N - 12) (60 Hz)

Note: Phases B and C output signals are derived similarly.


6.7.4

Optional current circuits


Relay type LFZP111, which has quadrilateral characteristics, and relays with the
optional DEF or Fault Locator, require additional circuits. Signals which are 90 in
advance of the primary current, i.e. equivalent to a characteristic angle of 90, are
required. The output signal from each transactor is passed through a calibrated low
pass filter to produce signals labelled -IAX, -IBX, -ICX and INX.
The respective output signals are:-IAX = (I * 0.2678)/In V /(-90 - 10) (50 Hz models)
-IAX = (I * 0.2660)/In V /(-90 - 12) (60 Hz models)
INX = (I * 0.2678)/In V /(90 - 10) (50 Hz models)
INX = (I * 0.2660)/In V /(90 - 12) (60 Hz models)
Note: Phases B and C output signals are derived similarly.
For relays with DEF and/or Fault Locator a fifth transactor is fitted in the module. The
output of this transactor is fed through a circuit similar to the INX circuit to produce a
signal labelled IPX.
In relay type LFZP111 the quadrilateral characteristic requires signals in phase with
the primary current. The -IAX, -IBX and -ICX signals are passed through a bandpass
filter which is similar to those previously described. The signals are then phase
retarded to bring them back in phase with the input currents i.e. signals -IAR, -IBR
and -ICR. These signals are then summed to provide INR.

The respective output signals are:-IAR = (I * 0.3273)/In V /(-180 - 13) (50 Hz models)
-IAR = (I * 0.3250)/In V /(-180 - 15) (60 Hz models)
INR = (IAR + IBR + ICR)
Note: Phases B and C output signals are derived similarly.
6.7.5

Input module calibration


The calibration of the boards in the input module is related to the
specific current and voltage transformers in that module. Therefore,
under no circumstances should the boards be replaced with boards from
another module without the module being recalibrated.

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D0 - D7

Address &
RD / WR
decoding
logic

Ad0 - Ad7
RD WR

Latch

Latch

I1

DAC to set
KZPH mag

Low Pass
Filter

Switched
Bandpass
Filter

THETA PH
Angle Set

IAZPH
LDIA

I2

4 Ohm
Setting

Low Pass
Filter

DAC to set
KZPH mag

Low Pass
Filter

-IAX

Switched
Bandpass
Filter

THETA PH
Angle Set

IBZPH
LDIB

I3

4 Ohm
Setting

Low Pass
Filter

DAC to set
KZPH mag

Low Pass
Filter

-IBX

Switched
Bandpass
Filter

THETA PH
Angle Set

ICZPH
LDIC

I4

I5

Figure 6-13

-ICX

4 Ohm
Setting

Low Pass
Filter

DAC to set
KZN mag

Low Pass
Filter

4 Ohm
Setting

Low Pass
Filter

INX

4 Ohm
Setting

Low Pass
Filter

IPX

Input Board 1 ZJ134

Switched
Bandpass
Filter

-IN

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D0 - D7

Address &
RD / WR
decoding
logic

Ad0 - Ad7
RD WR

Latch

THETA N
Angle Set

-IN

E1

Low Pass
Filter

Amplitude
Hysteresis

Switched
Bandpass
Filter

E2

Low Pass
Filter

Amplitude
Hysteresis

Switched
Bandpass
Filter

E3

Low Pass
Filter

Amplitude
Hysteresis

Switched
Bandpass
Filter

-IAX

Bandpass
Filter

93 DEG LAG

-IBX

Bandpass
Filter

93 DEG LAG

-ICX

Bandpass
Filter

93 DEG LAG

-INZN

VA

VB

VC

-IAR

-IBR

-ICR

INR

Figure 6-14

Input Board 2 ZJ135

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Voltage Input Circuits

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WAVEFORMS REPRESENT FAULT IN ZONE 1 CLOSE TO BOUNDARY


OF OPERATION WITH A LARGE OFFSET IN VOLTAGE

V-IZ

NO ZERO CROSSINGS
COMPARATOR CANNOT OPERATE

BANDPASS FILTER SWITCHED IN

V-IZ

30-35.5ms

ZERO CROSSINGS RESTORED


COMPARATOR CAN OPERATE

INHIBIT PULSE SENT


TO ALL COMPARATORS

Figure 6-16

Action of switched bandpass filter

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Figure 6-17

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Current input circuits

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6.8

Level detector board ZJ0136

6.8.1

Introduction
Optimho requires various voltage and current level detectors for its operation. These
level detectors are located on this PCB, a block diagram is shown in Figure 6-18.
Twelve level detectors are required in the standard relay with an additional three if
the DEF option is fitted.
The main microcontroller communicates with the PCB via the address and data bus.
It reads the status of the level detectors, controls the settings for the DEF level
detectors when fitted and sends resets when required.

6.8.2

Implementation
The principle of operation of a level detector is described in Section 4.3. The
hardware consists of an analogue comparison circuit where the input signal is
compared with positive and negative reference levels producing a logic signal and a
80C51 masked programmed microprocessor running an algorithm. The reference
levels were chosen so that the pick up level is 70% of Vn or 2.932V, the required
level for the voltage level detectors. Other lower pick up levels are obtained by
amplifying the input signal.
As part of the continuous monitoring the negative reference is monitored and an
alarm given if it is not within the required tolerance. Both the 80C51s have
watchdog circuitry to monitor the software. A local reset is given should a failure
occur and an alarm is also given.
To prevent chatter each level detector has approximately 15% hysteresis. This is
achieved by reducing the reference on individual level detectors when they operate.
The table below lists each level detector with its corresponding T1 and T2 timer
settings and its pick up level in terms of percent of rating and voltage level on the
PCB.
Table 6-4 Level Detectors
IC6

NAME

T1 (cycles)

T2 (cycles)

D0
D1
D2
D3
D4
D5
D6

LDOVA
LDOVB
LDOVC
LDLSIO
LDVO
LDLSI2
LDHSI0

0.275
0.275
0.275
0.275
0.15
0.275
0.275

0.275
0.275
0.275
0.275
1.1
0.275
0.275

*
*
*

PICK UP
% OF RATING
70%
70%
70%
5%
45%
3.5%
5%

PICK UP
VOLTS
2.932V
2.932V
2.932V
13.39mV
1.8945V
9.37mV
13.39mV

PICK UP
% OF RATING
5%

PICK UP
VOLTS
16.74mV

* only if DEF option fitted.


Table 6-4 level detectors (cont.)
IC7

NAME

T1 (cycles)

T2 (cycles)

D0

LDLSA

0.275

0.275

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D1
D2
D3
D4
D5
D6
D7

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LDLSB
LDLSC
LDHSA
LDHSB
LDHSC
LDLSN
LDHSN

0.275
0.275
0.275
0.275
0.275
0.15
0.15

0.275
0.275
0.275
0.275
0.275
1.1
1.1

5%
5%
7.5%
7.5%
7.5%
5%
16%

16.74mV
16.74mV
25.11mV
25.11mV
25.11mV
16.74mV
51.36mV

Voltage level detectors


The voltage level detectors LDOVA, LDOVB, LDOVC and the zero sequence voltage
level detector LDV0 all have a fixed pick up level as given in the table.

6.8.4

Phase current level detectors


The three low set LDLSA, LDLSB and LDLSC and the three high set LDHSA, LDHSB
and LDHSC phase current level detectors have pick up levels which are dependent
on the KZPh settings. The values given in the table refer to a KZPh setting of 1. The
actual setting are as follows:
Low set = 0.05 * In / KZPh A
High set = 0.075 * In / KZPh A

6.8.5

Neutral current level detectors


The low set neutral LDLSN and the high set neutral LDHSN are slightly different to
the other level detectors in that the reference level is not fixed. This is described in
Section 4.3.4. The reference is formed by the largest instantaneous value of the three
precision rectified phase to phase currents. The signal, smoothed by a resistor
capacitor network and limited by a zener diode is buffered and split into two signals
for the high set and low set level detectors. In each case the negative reference is
obtained by inverting the positive.
The base pick up level is dependent on the KZPh setting in the same way as the
phase current level detectors. This is achieved by summing the three phase currents
to give the neutral current. This gives the pick up levels as given in the table at
KZPh = 1.0.

6.8.6

DEF level detectors (If DEF fitted)


The three level detectors required by the DEF feature LDLSI0, LDHSI0 and LDLSI2
have adjustable pick up levels. The actual pick up level is determined by settings on
the menu and implemented by DACs controlled via the main microcontroller. The
pick up levels in the table refer to maximum setting on the DACs i.e. maximum
sensitivity.

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RELAY FAIL

D0 - D7

Address &
RD / WR
decoding
logic

Ad0 - Ad7
RD WR

Latch
VA
VB
VC

3I0

3I2B

3 DAC's
To set
Level
Detector
Pickup
Levels

Amplitude
Comparators
& level
shifting
circuits

LDOVA
LDOVB
LDOVC
LDLSI0
LDV0
LDLSI2
LDHSI0

D7

-ve reference
level monitor

+ve
-ve

Detector
output
Latch

LEVEL
DETECTORS
in 80C51
WD

+ & - voltage
Reference level
Circuit

D0
Level

Watchdog
Monitor &
Reset
Control
Circuits

reset
Reset
Latch

LDIA
LDIB
LDIC

G
G
G

WD

Amplitude
Comparators
& level
shifting
circuits

LDLSA
LDLSB
LDLSC
LDHSA
LDHSB
LDHSC
LDLSN
LDHSN

G
LEVEL
DETECTORS
in 80C51

G
G

Amplitude
Comparators
& level
shifting
circuits

Variable Reference
Level formed by
Full Wave Rectifying
Ph-Ph currents &
Peak smoothing

Figure 6-18

Level detectors ZJ136

D0
Level
Detector
output
Latch
D7

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6.9

Zone 1 / Zone 2 mho comparator board (ZJ0130)

6.9.1

Introduction

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See Figure (6-19), Figure (6-20)


This board provides the reach settings, polarising signals and comparators for Zone
1, Zone 1X, Zone 1Y and Zone 2 shaped mho phase and ground fault protection.
The board is power system frequency dependent and 50 or 60Hz versions are
available.
6.9.2

Operation
Zone reach settings
The voltage vectors from the analogue bus (see Section 6.7) are attenuated by the
12 bit Digital to Analogue converters, and buffered to provide the required zone
reach multiplication. These attenuated sine wave voltage signals are then mixed with
the IZ base setting vectors from the analogue bus, squared up and level shifted to
generate the V-IZ vectors. These form the `A` input to the main comparator
processor. The sine wave IZ vectors are also squared up to be used in the directional
line inhibits and memory sensitivity.
The V-IZ vectors for Zone 1/1X/1Y and Zone 2 Quadrilateral forward reactance
reach are also supplied, via the backplane bus, to the Quadrilateral ground fault
comparator board (ZJ0132). The quadrilateral Zone 1 guard zone requires a
forward setting which is ten times that of the Zone 1 ground fault setting (see Section
4.2.6). This is obtained by further attenuating the Zone 1 voltages, after the Zone
1/1X/1Y attenuation, by a factor of ten, mixing these with the appropriate IZ signals
and squaring to produce the (V-IZ)GZ1 square waves.
For underground cable protection the phase and ground reaches are halved. This is
accomplished by altering the mix ratio of the voltage vector with the IZ base setting
vector, to effectively double the voltage vector and hence halve the reach.

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Polarising circuits
The polarising signals required for the shaped mho characteristics (see Section 4.2)
form the `B` input to the main comparator. They consist of mixing the three
phase-neutral voltages and the memory signals, squaring and digitally phase
shifting. The voltage memory signals VMEM A, VMEM B, VMEM C are produced
within the inhibit/voltage memory processor using VMEM IN [VB (bandpassed)] as
the phase-neutral reference vector for the voltage memory. This permanently
bandpassed filtered voltage is used to prevent high frequency interference signals
corrupting the voltage memory. When the memory is not available it is replaced with
a small percentage of -IZ signal. This provides a restraining influence in the
polarising for close up three phase faults after the memory has expired. This prevents
operation of Zone 1 and Zone 2 main comparator for close up 3 phase reverse
faults.
The polarising signals are also used in forming the directional line inhibits for Zone 1
and Zone 2 and are provided for the reverse Zone 3 shaped mho, and the
quadrilateral directional line.
Comparators
The main comparator treats the input square waves `A` and `B` as logic variables
which can each have a high or low logic state at any time (see Section 4.1). Basically
if signal `A` lags `B` and no directional or external pole dead inhibits are present
the comparator will issue a trip (high logic ) to the appropriate output data latch.
The main comparators for Zone 1 and Zone 2 are implemented in 80C51 micro
controllers. One 80C51 is used for Zone 1/1X/1Y phase-neutral and phase-phase
faults and one for Zone 2 phase-neutral and phase-phase faults. Each main
comparator has directional inhibit inputs which when active force it to restrain. The
inhibit comparator is implemented in a 80C51 microcontroller (clocked at 12MHz),
and provides the directional inhibits operating on Zone 1 and Zone 2. The main
comparator clocks are 10MHz for 50Hz power system frequency and 12MHz for
60Hz. This clock is divided down by a factor of 800 and used for digital phase
shifting in the polarising circuits to provide the required phase shifts appropriate to
the nominal system frequency.

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External controls
External controls from the main microcontroller board are written to the input data
latch, these include:
1.
2.
3.
4.

memory run-out control.


power-up resets.
comparator resets to be OR-ed with watch-dog resets.
main comparator trip count control.

Monitoring
All comparators and polarising clock are monitored by watch-dog circuits. In the
event of failure an alarm will be read from the appropriate output data latch by the
main microcontroller board. The technique used will only allow a trip from the output
data latch if it is followed by a successful bus check (see Section 6.1). A watch-dog
failure may indicate a failure of the micro controllers, clock circuitry, address
decoding logic or output latch.
Data transfer
Digital inputs to and from the board are controlled by address decoding and data
latches. When the appropriate address is placed on the address bus and the read
RD or write WR signal is activated then the information will be written into the
required data latch or read from the required data latch.

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Figure 6-19

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Zone 1 / Zone 2 shaped mho ZJ0130

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Vpol A Z1

IAZph + INZn

Inh A
Vpol B Z1

Z1 A Directional Inh

Z1 B Directional Inh

Z1 C Directional Inh

Z1 AB Directional Inh

Z1 BC Directional Inh

Z1 CA Directional Inh

IBZph + INZn

Inh B
Vpol C Z1

ICZph + INZn

Inh C
Vpol AB Z1

A
IABZph

Vpol BC Z1

A
IBCZph

Vpol CA Z1

A
ICAZph

Watchdog

CK

Vmem-in
Synchronous Polarising
Vmem-run Control

Figure 6-20

Directional Inhibits and Voltage Memory Processor ZJ0130

Vmem A
Vmem B
Vmem C

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6.10

Zone 3 / Zone 6 Offset Lenticular Comparator Board (ZJ0131)

6.10.1

Introduction

See Figure 6-21


See Figure 6-22
(Not used on LFZP114)
This board provides the forward and reverse reach settings, polarising signals and
lenticular aspect ratio control for the offset mho/lenticular characteristic (see Fig.417). For the selectable reverse shaped mho the cross polarising vectors are obtained
from the Zone 1 / Zone 2 board, ZJ0130, via the backplane bus. The board is
power system frequency dependent and 50 or 60Hz versions are available.
6.10.2

Operation
Zone reach settings
The forward Zone 3 reach is obtained by attenuating the voltage vectors with the 12
bit DACs (digital to analogue conversion) and buffering to provide the required zone
reach multiplication. These attenuated sinewave voltage signals are then mixed with
the IZ base setting vectors from the analogue bus, squared up and level shifted to
generate the (V-IZ) vectors.
The reverse Zone 3 reach is similarly obtained, the fractional settings being obtained
by an amplifier on the voltage signals. The (V+IZ) vectors are obtained by mixing the
voltage signals with the IZ vectors, squaring and level shifting. The (V+IZ) and (V-IZ)
signals form the `A` inputs to the main comparator processor and inhibit processor
respectively.
For underground cable protection the phase and ground reaches are halved. This is
accomplished by altering the mix ratio of the voltage vector with the IZ base setting
vector, to effectively double the voltage vector and hence halve the reach.
The Power Swing Blocking zone (Zone 6) operates only on the A-B phase-phase
element. The forward and reverse reaches are set in a similar manner to the Zone 3,
but using the AB phase-phase voltage and IZ quantities to obtain the Zone 6 (VIZ)AB and (V+IZ)AB vectors. Zone 6 has the same range of forward and reverse
reach settings as Zone 3.

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Polarising circuits
The polarising signals required to produce the offset lenticular are described as
follows. The (V-IZ) and (V+IZ) vectors are phase shifted by the appropriate angles
using digital shift registers. Digital multiplexers are then used to select the
appropriate signals for the a/b aspect ratio selected. The resulting vectors (V-IZ)/-o
and (V+IZ)/-o form the `B` inputs to the main comparator and inhibit comparator.
The partially cross polarised vectors to produce the reverse Zone 3 shaped mho are
obtained from the Zone 1 / Zone 2 board ZJ0130, and when selected form the `B`
input to the main comparator.
Comparators
The main comparator treats the input square waves `A` and `B` as logic variables
which can each have a high or low logic state at any time, (see section 4.1). Basically
if `A` lags `B` and no inhibits are present the comparator will issue a trip (logic
high) to the appropriate output data latch.
The inhibit for the reverse shaped mho is the external pole dead signal.
The lenticular characteristic is produced by the intersection of two circles generated
by the main and inhibit comparators. The inhibit characteristic together with the pole
dead inputs now form the inhibit signal to the main comparator.
The main comparators for Zone 3 phase-phase and phase-ground, and Zone 6
phase-phase faults are implemented in a 80C51 microcontroller. The inhibit
comparator is implemented in a 80C51 microcontroller. The main comparator clock
is 10MHz for a 50Hz power system frequency and 12MHz for 60Hz, the clock for the
digital phase shift registers is divided down from this to give the required phase shifts
appropriate to the nominal frequency. The inhibit comparator clock is 12MHz.
External controls
External controls from the main processor board are written to the input data latch,
these include;
1.
2.
3.
4.

Monitoring

main and inhibit comparator resets to be OR-ed


with on board watch-dog resets.
power-up resets.
Zone 3 / Zone 6 aspect ratio control.
main comparator trip count control.

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All comparators and aspect shift registers are monitored by watch-dog circuits so
that in the event of failure an alarm will be read from the appropriate output data
latch by the main processor board. The technique used will only allow a trip from the
output data latch if it is followed by a successful bus check (see Section 6.1). A
watch-dog failure may indicate a failure of the microcontrollers, clock circuitry,
address decoding logic or output latch.
Data transfer
Digital inputs to and outputs from the board are controlled by address decoding
logic and data latches. When the appropriate address is placed on the address bus
and the read RD or write WR signal is activated then the information will be written
into the required data latch, or read from the required data latch.

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Figure 6-21

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Zone 3/ Zone 6 Offset Mho / Lenticular Selectable Zone 3 Reverse Shaped


Mho ZJ0131

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a/b Code bit Z6

=1

a/b Code bit Z6


a/b Code bit Z3

=1

a/b Code bit Z3


(V-IZ)A Z3
(V+IZ`)A Z3

A
B

Inh A
(V-IZ)B Z3
(V+IZ`)B Z3

(V+IZ`)C Z3

(V+IZ`)AB Z6

(V-IZ)AB Z3
(V+IZ`)AB Z3

(V-IZ)BC Z3
(V+IZ`)BC Z3

(V-IZ)CA Z3
(V+IZ`)CA Z3

&

Z3 B Inh

&

Z3 C Inh

&

Z6 AB Inh

&

Z3 AB Inh

&

Z3 BC Inh

Z3 CA Inh

A
B

Inh C
(V-IZ)AB Z6

A
B

A
B

A
B

&

D
CK

Figure 6-22

Z3 A Inh

Inh B
(V-IZ)C Z3

&

Q
C

Inhibit comparator controller ZJ0131

Watchdog

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6.11

Zone 1 / Zone 2 / Zone 3 Quadrilateral Comparator Board

6.11.1

Introduction

(ZJ0132)

See Figure 6-23, Figure 6-24 and Figure 6-25


(LFZP111 only)
This board sets the resistive reach for Zone 1, Zone 2 and Zone 3 and combines with
vectors inputted from the Zone 1 / Zone 2 (ZJ0130) and Zone 3 (ZJ0131) boards,
which set the forward and reverse "reactance" line reach, to provide the overall
quadrilateral characteristic for Zone 1, Zone 2, Zone 3 offset, and Zone 3 reverse
(see Figure4-18 and 4-21). The board is power system frequency dependent and 50
or 60Hz versions are available.
6.11.2

Operation
Producing the quadrilateral characteristics
Zone 1 characteristic
The main comparator of Zone 1 produces the top or "reactance" line of the
quadrilateral from:
`A` input = ( V-IZ )
`B` input = INR

ground fault vectors inputted from the


ZJ0130 board,
where INR = (IAR+IBR+ICR) /-3

The polarising vector INR is obtained by summing the three calibrated -IAR, -IBR,
-ICR signals provided from the input module (see Section 6.7). The top line moves
with active power-flow to avoid the overreach or underreach problems associated
with phase-current-polarised reactance characteristics.
The other three sides of the Zone 1 quadrilateral are formed by two inhibit
comparators arranged to inhibit the main comparator. The main comparator can
only count up when the two inhibit comparators agree that the impedance is within
the operating zone. The signals used are as follows:

"Directional" line
`A` = Vpol

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`B` = IZ
Right-hand "resistance" line
`A` = IZ
`B` = V-IR
Left-hand "resistance" line
`A` = V+IR
`B` = IZ
Throughout, V is the faulty phase voltage, the voltage vectors from the analogue bus
are attenuated by the 12 bit Digital to Analogue converters, and buffered to provide
the required Right-hand and Left-hand resistive reach.
Vpol is the ground fault cross polarising vector inputted from the ZJ0130 board and
IZ is the residually compensated vector (IPHZPH+INZn) provided from the input
module (see Section 6.7).
The IR signal for the resistance lines is derived from the phase current only, the
absence of residual compensation permitting good phase selection for
single-pole-tripping purposes.
Zone 1 Guard Zone
The three Zone 1 ground fault comparators each have a corresponding "guard" zone
(see Section 4.2.6), whose characteristic shape comprises the same side and
directional lines as Zone 1, the signals used are as follows:`A` = Z1 guard zone (V-IZ)
`B` = IZ-10
The top line of the "guard" zone has ten times the reach of Zone 1. The Zone 1
Guard zone (V-IZ) vectors are set and inputted from the ZJ0130 board, also due to
the different polarisation (IPhR+INR), under two-phase-to-ground fault conditions the
reactance lines of the Zone 1 and corresponding "guard" zone tilt with respect to
each other. This action is used to prevent operation of the ground fault comparators
for two-phase-to-ground faults
(see Section 4.2.6).

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Zone 2 Characteristic
The main comparator of Zone 2 produces the top or "reactance" line of the
quadrilateral from the following vectors:`A` input = ( V-IZ ) ground fault vectors inputted from the ZJ0130
board
`B` input = IPhR+INR
To avoid having to provide guard zones for Zone 2 and 3, the polarising signal
(IPhR+INR) for these two zones provides a compromise between single phase and
two-phase to ground fault requirements.
The other three sides of the Zone 2 quadrilateral are formed in a similar manner to
Zone 1.
Zone 3 Characteristic
Zone 3 Forward and reverse offset
The forward and reverse offset quadrilateral characteristics of Zone 3 are produced
in a similar way to that of Zones 1 and Zone 2. The main comparator producing the
forward top or "reactance" line from:`A` input = ( V-IZ )
`B` input = IPhR+INR
and the reverse offset "reactance" line from:`A` input = IPhR+INR
`B` input = ( V+IZ )
The other three sides of the Zone 3 forward and reverse offset are formed in a
similar manner to Zone 1 acting as the inhibit to the main comparator.
Zone 3 Reverse
The quadrilateral Zone 3 reverse is selected from the menu and will then only
monitor the Zone 3 reverse quad, output from the main comparator.

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Comparators
The main comparators treat the input square waves `A` and `B` as logic variables
which can each have a high or low logic state at any time (see Section 4.1). Basically
if signal `A` lags `B` and no sideline/directional inhibit is present then the
comparator will issue a trip ( high logic ) to the appropriate output data latch.
The main comparators for Zone 1, Zone 2 and Zone 3 are implemented in 80C51
micro controllers which have inhibit inputs that are composite signals from the
directional and sideline vectors, which when active force it to restrain. The inhibit
comparators are also implemented in 80C51 micro controllers. The main
comparator clocks are 10MHz for 50Hz power system frequency and 12MHz for
60Hz. The inhibit comparator clock is 12MHz.
External Controls
External controls from the main processor board are written to the input data latch,
these include:
1.
2.
3.
4.

main and inhibit comparator resets to be OR-ed with on


board watchdog resets
power-up resets
pole dead inhibit
comparator trip count control.

Monitoring
The main and inhibit comparators are monitored by watchdog circuits. In the event
of failure an alarm will be read from the appropriate output data latch by the main
processor board. The technique used will only allow a trip from the output data latch
if it is followed by a successful bus check. A watch-dog failure may indicate a failure
of the micro controllers, clock circuitry, address decoding logic or output latch.
Data transfer
Digital inputs to and outputs from the board are controlled by address decoding
logic and data latches. When the appropriate address is placed on the address bus
and the read RD or write WR signal is activated then the required information will be
written into, or read from, the required data latch.

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Figure 6-23

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Zone 1 / Zone 2 / Zone 3 quadrilateral ZJ0132

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Vpol A

IAZph+INZn

Directional A

Vpol B

IBZph+INZn

Directional B

Vpol C

ICZph+INZn

Directional C

&

Side A (fwd)
Side A (rev)

&

Fwd / Rev

&

Side B (fwd)
Side B (rev)

&

Side C (fwd)
Side C (rev)

(V-IZ) B GZ1
IBR+INR
(V-IZ) C GZ1
ICR+INR

&

Z1A Quad Inh

&

Z1B Quad Inh

&

Z1C Quad Inh

=1

B
A
B
A

Z2C Inh

&

IAR+INR

Z2B Inh

&

(V-IZ) A GZ1

Z2A Inh

B
D

CK

Figure 6-24

Q
C

Directional inhibit and Z1 guard zone logic ZJ0132

Watchdog

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Inh A
(V+IR)A
IAZph+INZn

A
B
A

(V-IR)A

Side A (rev)

Side A (fwd)

Side B (rev)

Side B (fwd)

Side C (rev)

Side C (fwd)

Directional A
Inh B
(V+IR)B
IBZph+INZn

A
B
A

(V-IR)B

Directional B
Inh C
(V+IR)C
ICZph+INZn

A
B
A

(V-IR)C

Directional C

D
CK

Figure 6-25

Q
C

Sidelines & pole dead inhibits forward & reverse inhibits ZJ0132

Watchdog

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6.12

Directional overcurrent ground fault protection board ZJ0139

6.12.1

Introduction
The Directional Earth Fault (DEF) feature, (optional on LFZP111, 112 and 114) is
used to cover high resistance ground faults. See Section 4.4 for a description. The
board contains circuits to produce the signals for the four types of polarising
required, the comparators for forward and reverse looking directional elements, an
overcurrent unit and a mag-inrush circuit. A block diagram of the board is shown in
Figure 6-26.
The main microcontroller communicates with the PCB via the address and data bus.
It reads the status of the comparators, controls the settings for the DEF, the switched
filters etc. and sends resets when required.

6.12.2

Comparators
The principle of operation of the comparator is described in Section 4.1. The
directional elements employ two sequence comparators, one forward looking, the
other reverse looking, both contained in an 80C51 microcontroller. The A and B
input signals are swapped over for the reverse looking element. The directional
element inhibit is controlled by the main microcontroller. The comparator has a
watch dog circuit to monitor it as described in Section 6.1.5.

6.12.3

Comparator input signals


There are four types of polarising, selected via the menu, allowing a choice of zero
sequence voltage, zero sequence current, dual zero sequence current and voltage
and negative sequence voltage.
Table 6-5 DEF Forward looking comparator input signals

POLARISING
ZERO SEQUENCE
VOLTAGE
ZERO SEQUENCE
CURRENT
ZERO SEQ. VOLTAGE &
CURRENT
NEGATIVE SEQUENCE
VOLTAGE

A INPUT

B INPUT

3VO /-THETA G

3IO /-90

IP

3IO /-90

3VO /-THETA G + kIP

3IO /-90

3V2B /-THETA G

3I2B /-90

The appropriate signals are connected to the comparator via analogue solid state
switches controlled by the main microcontroller.

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The zero sequence voltage (3V0) is derived internally by summing the three phase neutral voltages VA, VB and VC. The resulting signal is phase lagged by the DEF
characteristic angle THETA G and converted to a square wave (3VO /-THETA G) to
produce one input to the comparator.
The signal 3I0 /-90 is derived from INX. This signal is filtered by a second order
bandpass filter with centre frequencies equal to the nominal supply frequency and Q
values of 0.5. This filter reduces the harmonic and travelling wave distortion in the
current signals. The unfiltered signal is normally used being switched to the filtered
signal under the control of the main microcontroller (see Section 5.16). The signal,
3I0, is converted to a square wave suitable for the comparator input.
The signal IPX derived from a current transactor is filtered by a second order
bandpass filter with centre frequencies equal to the nominal supply frequency and Q
values of 0.5. This filter reduces the harmonic and travelling wave distortion in the
current signals. The signal is then phase lagged 90 and converted to a square wave
to produce an appropriate signal (IP) for the comparator.
Zero sequence voltage and current polarising is obtained by mixing the signals 3VO
/-THETA G and IP. The ratio is chosen such that the resultant signal level caused by
rated 3V0 is the same as that caused by rated IP. The factor k in Table 6-5 = 16.
Negative sequence polarising requires negative sequence voltage for the polarising
quantity and negative sequence current for the operate quantity.
The negative sequence voltage signal is produced from signals VA, VB and VC
according to the following formula:
3V2B = -(VAB + VCA /60)
The resulting signal is phase lagged by the DEF characteristic angle THETA G and
converted to a square wave (3V2B /-THETA G) to produce one input to the
comparator.
The negative sequence current signal is produced from signals -IAX, -IBX and -ICX
according to the following formula:
3I2B = -(IAB + ICA /60)

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The resulting signal is filtered by a second order bandpass filter with centre
frequencies equal to the nominal supply frequency and Q values of 0.5. This filter
reduce the harmonic and travelling wave distortion in the current signals. The
unfiltered signal is normally used being switched to the filtered signal under the
control of the main microcontroller (see Section 5.16). The signal, 3I2B, is converted
to a square wave suitable for the comparator input.
Negative sequence voltage and currents are derived using filters to mix and phase
shift the input signals. Most filters are prone to unacceptable errors as the frequency
drifts away from the nominal thus limiting the sensitivity. These errors are caused
because the filter produces a fixed time shift (CR time constant) rather than a fixed
phase shift, in this case +60, as the input frequency varies. These errors are
overcome by a filter which has 8 selectable centre frequencies and which is
automatically adjusted to the appropriate one thus maintaining errors below the
required sensitivity level. See Figure 4-31. The adjustment is made by an 80C51
microcontroller measuring the system frequency and controlling the filter. The
microcontroller has a watch-dog circuit to monitor it as described in Section 6.1.5.
6.12.4

Directional overcurrent backup protection


The overcurrent backup protection consists of a 6805 microcontroller, similar to that
used in the MCGG range of overcurrent relays, a multiplying digital to analogue
converter (DAC), a rectifying circuit and some control latches.
The permanently bandpass filtered INX signal is attenuated via a DAC, rectified and
fed to a 6805 microcontroller which runs the overcurrent algorithm. The choice of
definite time, inverse IEC or American curves, selected via the menu, are passed to
the 6805 by the main microcontroller. The DAC setting, again controlled via the
main microcontroller is used to directionalise the over current unit and to control the
sensitivity. The INX signal is inhibited (via maximum attenuation) until the software in
the main microcontroller, using the DEF forward looking element identifies the fault
as forward and changes the attenuation to give the appropriate setting. Details of
the controlling software are given in Section 4.4.

6.12.5

Magnetising inrush current detector


A magnetising current inrush detector is used to prevent maloperation when
energising multiple in-zone transformers. The circuit uses the principle of detecting
zeros in the current lasting for a quarter cycle or more. See Section 4.4.7 for details.
Two detectors are used, one working on signal IAB the other on IAC. Each signal is
rectified and compared with a signal representative of 1/3 of its peak. The resulting
2 signals are analysed via an algorithm running in the 80C51. The 80C51 also does
the frequency tracking. The algorithm detects the gaps in the mag-inrush current
waveform and passes the information to the main microcontroller.

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Figure 6-26

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DEF ZJ0139

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6.13

Fault locator module GJ0277

6.13.1

Introduction
The Optimho distance relay fault locator is optional on relay types LFZP111, 112,
113 (but see section 4.5.1) and 114. The fault locator module consists of a printed
circuit board ZJ0165 and an attached electromagnetic screen. The board plugs into
the bus system of the relay. Data is exchanged between the main microcontroller in
the relay and the locator, and the locator also measures line voltages and currents
digitally. The outputs to the main microcontroller include accurate fault location
measurements.
The fault locator board for the Optimho Distance Relay makes use of the 80C186
16 bit microprocessor. The following features are incorporated on the board:a.
b.
c.
d.
e.
f.
g.
h.
i.
j.

80C186 Processor
8k or 32k 16 bit Non Volatile Memory
32k,64k or 128k 16 bit Read Only Memory
32k or 128k 16 bit Random Access Memory
8 Channel 12 Bit Data Acquisition System
Watch-dog Timer
8 bit Parallel Communication to Protection
Mode Link Connections
Test Serial I/O Port
Test 8 Bit Parallel Output Port

Refer to figure 6-27 which is a block diagram of the complete system.


6.13.2

80C186 Processor
The 80C186 processor is a 16 bit device constructed in CMOS. A high level of
integration is incorporated in the IC so many functions are resident on-chip,
reducing the chip count for such a versatile processing unit. Many of the on-chip
functions including the timers, interrupts and memory management unit have been
used to produce a minimal hardware board which requires minimal system software.

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Memory
The memory is arranged in three blocks; static, read only and non-volatile. Since the
80C186 has programmable memory select outputs, three of these are used solely to
decode the addresses. The start address and size of these three blocks are set by
writing to memory locations in the 80C186 control block.
The following memory sizes are used on the fault locator:

6.13.4

Memory Type

Size

Static RAM
Erasable
Programmable ROM
Electrically
Erasable PROM

32k words
32 k words
8 k words

Data and address line buffering


The address lines must be latched because the 80C186 bus is multiplexed. Three
octal D-Type flip flops are used with a common latching signal, ALE, provided by the
80C186.
The data lines are buffered with bi-directional tri-state transceivers, controlled directly
by the microprocessor.

6.13.5

Eight channel 12 bit data acquisition system


This section describes the input filters, acquisition components and control circuit of
the data acquisition system.
General discussion
A single sample/hold circuit and analogue to digital converter is fed with input
signals from a multiplexer. Up to eight channels need to be sampled and converted
at a rate of 40 samples per cycle. This corresponds to a conversion rate of 19.2kHz
for a 60Hz device or 16kHz for a 50Hz device. The multiplexer, sample/hold and
ADC must convert at this rate. The system has been designed to sample at rates up
to 25kHz which is about 52 samples per cycle at 60Hz and 62 samples per cycle at
50Hz. If less than 8 channels are sampled, the conversion rate can be higher.

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In order to free the 80C186 processor from as much control of the sampling system
as possible, a circuit which handles the sampling of several channels automatically
has been designed. The system is started by a single pulse from a timer pin on the
80C186. Successive channels are fed through the multiplexer, sampled and
converted. The 80C186 is interrupted after each conversion and reads the value. The
timer pins on the 80C186 can be configured to pulse at a defined frequency
indefinitely, also interrupting the processor to inform it of the beginning of a sample
set.
Input filters
The input filters are two stage single pole types with a voltage 3db point at 320Hz.
An operational amplifier is used as a buffer between the two stages.
Multiplexer
An 8 channel multiplexer is provided and this device has a low channel resistance.
The output of this is fed into the high input impedance of the sample/hold circuit.
Thus each of the inputs are passed in turn to the A/D converter via the sample/hold
circuit for conversion to a digital level.
Sample/hold
The sample/hold circuit is a precision device which holds the instantaneous input
level for the duration of time which the following A/D converter requires to perform
its function.
Analogue to digital converter
The A/D converter which converts an input analogue signal to 12 bits of digital data
in less than 25s. The device is configured to output data to a 16 bit bus. Tri-state
buffers are used between the converter and the 80C186 data bus. The top bit of the
ADC output is inverted and fed to each of the top four bits of the 80C186 bus. This
converts the output into a 16 bit signed integer which is presented onto the data bus
when the device is read as a peripheral.
Control circuit
The control circuit sends signals to the multiplexer, sample/hold, A/D converter and
80C186, making the software processing overhead on the 80C186 minimal. The
system's major component is a decade counter. Successive pins on the counter
become active as it is clocked, and some of these pins control the sequence and
timing of the data acquisition components. Once every pin has pulsed, one channel
has been selected, sampled and converted. This counter is clocked from the output
of a programmable divider which is factory set to suit the system clock frequency.

6.13.6

Watch-dog timer and reset circuit


Power up reset

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The reset circuit ensures that the reset pin on the 80C186 is held low for a period of
approximately 11ms after power is applied.
This ensures that the microprocessor does not attempt to execute its program until
the power supply rails on the board are fully established.
Watch-dog
The watch-dog circuit is formed by a dual monostable circuit. Once the first
monostable is triggered by accessing it as a peripheral its output goes high for
84ms. The output will continue to stay high if the monostable is re-triggered before
84ms has expired. If, however, the monostable is not re-triggered, the output will go
low, causing the second monostable to trigger. The second monostable pulses the
reset pin low for 7ms. The relay fail line is pulled low when the watch-dog times out.
This line triggers the "Relay Inoperative Alarm".
6.13.7

Eight bit parallel communication to protection


Three 8 bit memory locations are provided between the 80C51 relay main
microcontroller and the fault locator 80C186 microprocessor. These are
uni-directional buffers and form data,response and command bytes.
When the 80C51 writes to the command location, the 80C186 is interrupted so that
the fault locator board can be made to respond quickly to power system faults.

6.13.8

Mode link connections


Three links control the mode of the board and are normally factory set. The links
control frequency setting, relay rated current and test mode as follows:-

Pins
1,4
2,5
3,6
Note:

6.13.9

Bit No
0
1
2

Link On (Bit = 0)
60 Hz
1A relay
Test Mode

No Link (Bit = 1)
50 Hz
5A relay
Locator Mode

The test mode is only used as a factory test feature and requires
specialised equipment.

Test serial I/O port


The test serial I/O port uses an 82C51 serial I/O controller. Also a D type flip flop
and a TTL to RS232 level converter are used. This port is only used during factory test
procedures and no communication features are provided.

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Serial fault locator output information is available however from the relay serial
output ports at the front and rear of the relay. These ports use the relays main
microcontroller to communicate with the fault locator.
6.13.10 Test eight bit parallel output port
An 8 bit output latch is provided on the board and this is used for factory test
purposes. The output pins of the latch are brought out onto a 10 way single in line
header.

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Figure 6-27

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Fault Locator ZJ0165

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Output relay board ZJ0140


Relay versions LFZP 11x have a total of 24 separate output contacts. All contacts
are normally open except for the Relay Inoperative Alarm (RIA) contact which is
normally closed.

6.14.1

Mechanical arrangement
Three printed circuit boards (PCBs), each with eight auxiliary relays plus their
associated drive circuits, are used to provide a total of 24 auxiliary relay circuits.
Parts 001, 002 and 003 of a common PCB type ZJ0140 are used, these are
located in slot position numbers 3, 4 and 2 respectively.
In order to minimise the effects of external electrical interference the three output
PCBs are mounted within a screened area of the relay case, separate from the relay
measuring circuits, as shown in Figure 2-1.
A special connector, mounted on the output PCB, enables the PCB to plug directly
into the terminal block/s mounted at the back of the relay case. This arrangement
provides a compact design and eliminates hand wired connections with a
consequent improvement in reliability.
A standard 64 way ribbon cable connector mounted on the adjacent (input) side of
the output PCB facilitates connection to the relay circuitry via a 64 way ribbon cable
connected to the front panel board.

6.14.2

Circuit operation description


Versions ZJ0140 001 & ZJ0140 003
Refer to Figure 6-28 for block diagram illustration of the above output PCBs.
When addressed by the main microcontroller, each auxiliary output relay, RL1 to
RL8, is controlled by a data line D0 to D7 respectively, ie., data line D0 controls
RL1 and data line D7 controls RL8. Each output PCB has an address decoder circuit
which monitors the external address bus and issues an output whenever it sees a
unique eight bit address code.
Each output PCB has a unique address code allocated to it. Instructions issued from
the main microcontroller to turn auxiliary relays ON or OFF are latched by a
latching circuit which is controlled by the output from the address decoder and the
write (WR) line from the main microcontroller. For example, in order to only turn
ON auxiliary relay RL2 on output board ZJ0140 003 the main microcontroller
sends out (writes) the address code for this board (06) on the external address bus
and also writes 00000010 (binary) to the external data bus. To turn OFF all
auxiliary relays on this board the data 00000000 is written to the same external
address (06).

Each auxiliary output relay is driven from a simple two stage npn/pnp transistor
switching circuit. The drive circuits for all auxiliary relays are identical. For all except

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the RIA circuit (version 002 only), a capacitor discharge assist is used on each drive
circuit to speed up the pick up time of the auxiliary relay. Since the nominal rating
of the auxiliary relay is approximately half (5V) the Vcc (12V) voltage applied to the
driving circuit, the auxiliary relay is initially energised, via the charged capacitor, at
approximately twice its nominal rating when the pnp transistor turns on. The
discharge from the capacitor provides additional amp turns which speeds up pick
up of the auxiliary relay. A resistor in series with the pnp transistor drops about 7V,
leaving 5V across the auxiliary relay.
Version ZJ0140 002
Refer to Figure 6-29 for block diagram illustration of the above output PCB.
This version is basically identical to versions 001 and 003 with some additional
circuitry to control the Relay Inoperative Alarm (RIA) RL1.
Operation of RL2 to RL7 is as described above for versions 001 and 003.
No capacitor assist is required for the RIA auxiliary relay since very fast operating
speed is not required, a 12V rated auxiliary relay is therefore used.
The Relay Inoperative Alarm contact is normally closed when the auxiliary relay is
de-energised.
Under normal working conditions, when the relay is available for protection
operation, the RIA auxiliary relay is energised and its output contact is open. The
RIA auxiliary relay also has a separate normally open contact which is connected to
operate the Relay Available LED on the front panel board.
Contact clear
This signal line is controlled by the main microcontroller. Its function is to prevent
operation of any output auxiliary relay (except Relay Inoperative Alarm on version
002) if certain error conditions are detected. Refer to Sections 6.1 and 6.2 for a
description of diagnostics and action taken. When pulled low, this control line
clears the latching circuit outputs and thereby turns OFF all (except RIA) auxiliary
relays.

During dc power up, a capacitor/resistor circuit holds the latching circuit clear line
low. This resets the outputs from the latching circuit and thus prevents operation of
any output auxiliary relay whilst power up initialisation is in progress.
Relay fail and time delay circuit (Version 002 only)

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The Relay Inoperative Alarm circuit on version 002 is controlled by the D0 output
from the latching circuit and also the RELAY FAIL line. This line, which is normally
held high when the relay is available for protection operation, is pulled low for
various conditions as described in Section 6.1.
A time delay circuit delays de-energisation of the Relay Inoperative Alarm auxiliary
relay by approximately 0.5s when the RELAY FAIL line is pulled low.
In the event of any transiently initiated watchdog reset signals issued locally to any
board other than the main microcontroller board, the RELAY FAIL line is pulled low.
If a local board reset is accomplished successfully within a 0.5s interval the RELAY
FAIL line is taken high again and the reset event is not annunciated by closure of
the Relay Inoperative Alarm contact.
Any persistent fault condition will be detected by the main microcontroller which will
de-energise the RIA circuit by setting the D0 data output of the latch circuit, this will
cause the RIA contact to close and will extinguish the Relay Available LED.
6.14.3

Noise suppression
To minimise the effects of external electrical interference and interference
generated when switching inductive loads, special consideration has been given to
screening and PCB layout. The layout of the PCB ground plane, earthing, power
rails and auxiliary relays are particularly important.
Ground plane and earthing
A 0V ground plane, extending below the 8 auxiliary relays, and connected to the
0V side of the auxiliary relay coil (OV(1), see Figures 6-28 & 6-29) is connected to
case earth via the extreme top and bottom terminals of the special PCB mounted
terminal strip.
Each output auxiliary relay has two contacts but only one contact is used (except the
RIA auxiliary relay which uses its other contact to operate the internal Relay
Available LED). The unused contact from each auxiliary relay is connected to the
0V(1) ground plane. All other remaining circuitry utilises 0V, which is connected to
the relay back plane via the 64 way ribbon cable. For a general description of
grounding arrangements refer to Section 2.0.

Power rails
A separate 12V (Relay) power rail is provided to supply the output auxiliary relays
only. Any noise induced onto this rail is shunted directly back to the relay power
supply unit.
Position of auxiliary relays
The output auxiliary relays are positioned as far away from the control and drive
circuits as is possible, this arrangement reduces the affects of radiated interference

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generated when switching inductive loads and attenuates interference produce by


high frequency disturbances applied to auxiliary contacts.
6.14.4

Contact connections to terminal block


Auxiliary relay contacts are connected as shown in Figures 6-28 and 6-29. Notice
that one side of the contacts of RL1, RL2 and RL3 are commoned. Figure 6-30
shows contact connections made from output boards to external terminal blocks.
The assignment of specific names and functions to each contact is dependant on
the contact configuration number menu option selected. Output contact
configurations are detailed in Section 8.0.

6.14.5

Operating time and power dissipation


The average pick up time for a capacitor assisted auxiliary relay is 4ms.
The average pick up time for the RIA auxiliary relay is 10ms.
The average drop off time for a capacitor assisted auxiliary is 5ms.
Power dissipation per output auxiliary relay when picked up (energised) = 240mW.

6.14.6

Output option
A commission option menu test facility is available to allow operation of all output
contacts, refer to Section 3.5.5.

6.14.7

Monitor option
The status of all output contacts can be viewed using the monitor option test facility
in the commission tests section of the menu, refer to Section 3.5.4.

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Figure 6-28

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Output relay board for ZJ0140 001 & ZJ0140 003

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Figure 6-29

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Output relay board ZJ0140 002

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ZJ 0140 002

ZJ 0140 001
32

31
RL1

RL2

35
RL3

36
RL3

63
RL3

29

30

57

37

38

65

RL4

RL4

RL4

39

40

67

41

42

69

RL5

RL5

RL5

43

44

71

45

46

73

RL6

RL6

RL6

47

48

75

49

50

77

RL7

RL7

RL7

51

52

79

53

54

81

RL8

RL8

RL8
56

55
SLOT 4

61

34
RL2

RL2

59
RL1

RL1

33

Figure 6-30

ZJ 0140 003

SLOT 3

Output contact connections to terminal blocks

83
SLOT 2

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Section 7. TECHNICAL DATA


7.1

Input ratings
AC voltage Vn:

100 to 120V rms phase-phase.

AC current In:

1A or 5A rms per phase.

Frequency fn:

50Hz or 60Hz.

Operative frequency
range:

47 to 51Hz or 56.4 to 61.2Hz.

DC supply Vx1:

For power supply, available in 3 versions.

Vx1
48/54V
110/125V
220/250V

Operative Range
37.5 to 60V
87.5 to 137.5V
175 to 275V

Maximum Withstand
64.8V
150V
300V

There is negligible change of accuracy with change of voltage within the operative
range.
DC supply Vx2:

7.2

For optical isolators, available in the same options as Vx1. For


220/250V option the 110/125V version is used with an
external resister box GJ0229 002.

Maximum overload ratings


AC voltage:

1.5Vn continuous withstand.


2.5Vn withstand for 10s.

AC current:

2.4In continuous withstand.


100In withstand for 1s (In = 1A).
80In withstand for 1s (In = 5A).

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Burdens
AC voltage circuits: 0.1VA per phase at Vn.
AC current circuits: 0.08VA per phase (In = 1A).
0.5VA per phase (In = 5A).
DC supply 1:

18W under healthy live line conditions at Vx1.


28W maximum.

DC supply 2:

10mA per energised optically coupled isolator at Vx2.

7.4

Distance elements

7.4.1

Settings
Impedance:
Range of positive sequence settings referred to line VT and CT secondaries:
Zone 1, Zone 1X, Zone 1Y, Zone 2 and Zone 3 reach:
In = 1A range is

0.2 to 250 ohms (All versions except LFZP113)


0.1 to 125 ohms (LFZP113)

In = 5A range is

0.04 to 50 ohms (All versions except LFZP113)


0.02 to 25 ohms (LFZP113)

Zone 3 reverse:
In = 1A range is

0.04 to 250 ohms (All versions except LFZP113)


0.02 to 125 ohms (LFZP113)

In = 5A range is

0.008 to 50 ohms (All versions except LFZP113)


0.004 to 25 ohms (LFZP113)

Reach setting method is by digitally controlled analogue attenuators. Attenuation


factors KZPh and KZN operate on current signals and are common to all zones.

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Attenuation factors KZ1, KZ1X, KZ1Y, KZ2, KZ3 and KZ3' operate on voltage
signals and are specific to Zone 1, Zone 1X, Zone 1Y, Zone 2, Zone 3 and Zone 3
reverse respectively. The positive sequence reach for Zone 1 is given by:Zone 1

= KZ1.KZPh.5/In
= KZ1.KZPh.5/2.In

(All versions except LFZP113)


(LFZP113)

Either KZPh or KZ1 is set to unity. To obtain the formula for other zones employed,
replace KZ1 by the appropriate attenuation factor for the zone.
Extra settings for ground fault distance:

Residual compensation factor:

KZN
ZLO ZL1
=
KZPh
3ZL1

Where ZL0 and ZL1 are the vector values of zero and positive sequence impedance
of the protected line.
Quadrilateral resistive reach settings:

Right-hand reach = KR.5/In


Left-hand reach = KR.6/In

Zone 3 lenticular aspect ratio:


The aspect ratio a/b of the lenticular elements is 1.0, 0.67 or 0.41 where b is the
sum of the forward and reverse reach setting and a is the maximum width of the
impedance characteristic measured perpendicular to the characteristic angle.

Setting ranges:

SETTING
KZPh
KZN
KZ1
KZ1X

MINIMUM
0.04
0.0
1.00
1.00

MAXIMUM
1.0
1.360
49.98
49.98

STEP
0.001
0.001
0.02
0.02

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KZ1Y
KZ2
KZ3
KZ3'
KR
Z3 Lenticular a/b

1.00
1.00
1.00
0.2
1

49.98
49.98
49.98
49.9
30
1.00, 0.67, 0.41

Characteristic angle:

THETA Ph =

arg ZL1 to nearest available


setting

Residual compensation
angle:

THETA N =

arg (ZL0 - ZL1) to nearest


available setting

Note:

0.02
0.02
0.02
0.1
1

LFZP113 is not designed to be used with a ground


fault
loop setting (2ZL1 + ZL0)/3 with an argument less than 30.

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Setting ranges:

SETTING
THETA Ph
THETA N
THETA Ph
THETA N

MINIMUM

MAXIMUM

STEP

50
85
5
50
85
5
45
80
5
-45, -35, -25, to 80 in steps of 5

*
*
**
**

* LFZP Versions 111, 112 & 114.


** LFZP 113
7.4.2

7.4.3

Accuracy of distance elements


Reach:

5% at 2In and 20C.

Characteristic angle:

2.

Resetting ratio:

105%.

Current sensitivity
Determined by the low set current level detectors. The sensitivity varies inversely with
the base setting (KZPh) and is given by:
0.05 * In / KZPhA.

7.4.4

Timers
Timer ranges:

SETTING
TZ1X
TZY1
TZ2
TZ3
TP
TD
TDW
TPG
TDG
Timer accuracy:

MINIMUM
100ms
100ms
100ms
100ms
0ms
0ms
0ms
0ms
0ms
1% of setting and 3ms

MAXIMUM
9980ms
9980ms
9980ms
9980ms
98ms
98ms
98ms
98ms
98ms

STEP
20ms
20ms
20ms
20ms
2ms
2ms
2ms
2ms
2ms

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Polarising
Proportion and type of cross polarising for Zones 1 and 2 for partially cross
polarised mho and for Zones 1 and 2 directional lines.
Phase to Ground fault:
Phase to Phase to Ground fault:
Phase to Phase fault:

)
) 16% square wave from healthy
) phases

3 Phase fault:

16% square wave from synchronous memory

Synchronous memory is effective for 16 cycles after fault incidence and is available
12.5 cycles after energising the line.
7.4.6

Operate and reset times


Operate times:

Reset times:

Typical relay operating times for Zone 1 are shown in Figures


7-1 to 7-8 50Hz and Figures 7-9 to 7-16 60Hz.
Mho characteristic

50Hz minimum: 14ms


typical: 18ms
60Hz minimum: 12ms
typical: 16ms

Quad characteristic

50Hz minimum: 16ms


typical: 23ms
60Hz minimum: 15ms
typical: 20ms

The trip contacts are sealed in for 60ms following the initial
contact closure. Thereafter, the maximum reset time is 35ms.

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Operating Time(ms)

G/F Mho Characteristic 50Hz SIR 1


30
25
20
15
10
5
0

min
max
0

10

20

30

40

50

60

70

80

90

Fault Position (% of setting)


Figure 7-1

Zone 1 typical operating times

Operating Time(ms)

G/F Quad Characteristic 50Hz SIR 1


30
25
20
15
10
5
0

min
max
0

10

20

30

40

50

60

70

Fault Position (% of setting)


Figure 7-2

Zone 1 typical operating times

80

90

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Operating Time(ms)

P/F Mho Characteristic 50Hz SIR 1


35
30
25
20
15
10
5
0

min
max
0

10

20

30

40

50

60

70

80

90

Fault Position (% of setting)


Figure 7-3

Zone 1 typical operating times

Operating Time(ms)

3P/F Mho Characteristic 50Hz SIR 1


30
25
20
15
10
5
0

min
max
0

10

20

30

40

50

60

70

Fault Position (% of setting)


Figure 7-4

Zone 1 typical operating times

80

90

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Operating Time(ms)

G/F Mho Characteristic 50Hz SIR 30


60
50
40
30
20
10
0

min
max

10

20

30

40

50

60

70

80

90

Fault Position (% of setting)


Figure 7-5

Zone 1 typical operating times

Operating Time(ms)

G/F Quad Characteristic 50Hz SIR 30


100
min
max

80
60
40
20
0
0

10

20

30

40

50

60

70

Fault Position (% of setting)


Figure 7-6

Zone 1 typical operating times

80

90

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Operating Time(ms)

P/F Mho Characteristic 50Hz SIR 30


60
50
40
30
20
10
0

min
max

10

20

30

40

50

60

70

80

90

Fault Position (% of setting)


Figure 7-7

Zone 1 typical operating times

Operating Time(ms)

3P/F Mho Characteristic 50Hz SIR 30


30
25
20
15
10
5
0

min
max
0

10

20

30

40

50

60

70

Fault Position (% of setting)

Figure 7-8

Zone 1 typical operating times

80

90

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Operating Time(ms)

G/F Mho Characteristic 60Hz SIR 1


30
25
20
15
10
5
0

min
max
0

10

20

30

40

50

60

70

80

90

Fault Position (% of setting)


Figure7-9Zone 1 typical operating times

Operating Time(ms)

G/F Quad Characteristic 60Hz SIR 1


30
25
20
15
10
5
0

min
max
0

10

20

30

40

50

60

70

Fault Position (% of setting)

Figure 7-10

Zone 1 typical operating times

80

90

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Operating Time(ms)

P/F Mho Characteristic 60Hz SIR 1


30
25
20
15
10
5
0

min
max
0

10

20

30

40

50

60

70

80

90

Fault Position (% of setting)


Figure 7-11

Zone 1 typical operating times

Operating Time(ms)

3P/F Mho Characteristic 60Hz SIR 1


30
25
20
15
10
5
0

min
max
0

10

20

30

40

50

60

70

Fault Position (% of setting)


Figure 7-12

Zone 1 typical operating times

80

90

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Operating Time(ms)

G/F Mho Characteristic 60Hz SIR 30


60
50
40
30
20
10
0

min
max

10

20

30

40

50

60

70

80

90

Fault Position (% of setting)


Figure 7-13

Zone 1 typical operating times

Operating Time(ms)

G/F Quad Characteristic 60Hz SIR 30


60
50
40
30
20
10
0

min
max

10

20

30

40

50

60

70

Fault Position (% of setting)


Figure 7-14

Zone 1 Typical Operating Times

80

90

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Operating Time(ms)

P/F Mho Characteristic 60Hz SIR 30


30
25
20
15
10
5
0

min
max
0

10

20

30

40

50

60

70

80

90

Fault Position (% of setting)


Figure 7-15

Zone 1 typical operating times

Operating Time(ms)

3P/F Mho Characteristic 60Hz SIR 30


50

min
max

40
30
20
10
0
0

10

20

30

40

50

60

70

Fault Position (% of setting)


Figure 7-16

Zone 1 typical operating times

80

90

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Switch on to fault (SOTF)


SOTF can be disabled, or enabled in 200ms or 110s after all poles of the line have
been de-energised. Once the SOTF feature has been enabled, it remains enabled
for 250ms after the line has been re-energised, or until a SOTF trip has been
cleared. The menu allows for a choice of fault detectors. The three options
available are:
a)

Tripping via the operation of any distance comparator.

b)

Tripping via the operation of any current level detector


provided that its corresponding voltage level detector
has not picked up within 20ms.

c)

Tripping via the operation of any distance comparator


or any current level detector provided that its
corresponding voltage level detector has not picked up
within 20ms.

Voltage level detector setting:

44.5V (70% Vn)

Current level detector setting:

0.05 * In / KZPh

The operating time for close up 3 Phase faults and close up Phase to Ground faults
were measured for each of the modes of SOTF operation and for Line VTs and Bus
Bar VTs.
SOTF times (50Hz relays)

Fault
Type

Source
Impedance

angle 88

3P/F
G/F
mho
G/F
quad

108
36
3
108
36
3
108
36
3

Any comparator

Line VTs
min
29
29
29
29
28
30
30
30
29

max
35
34
35
37
37
37
37
38
37

By Level detectors

SOTF operate times ( ms )


Bus Bar VTs
Line VTs
Bus Bar VTs
min
16
15
14
16
13
15
18
14
15

max
24
23
22
27
25
27
29
26
23

Zone 1 set to 5 angle 75, Zone 3 set to 25 angle 75


100% Ground fault compensated, Source angle 88 Lag

min
32
31
30
32
31
31
32
31
31

max
37
36
35
39
39
38
39
39
38

min
25
22
24
27
27
25
27
27
25

max
32
32
32
43
33
34
43
33
34

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Voltage transformer supervision (VTS)


The VTS operates when zero sequence voltage is detected without the presence of
zero sequence current. The VTS does not limit the current sensitivity of the distance
measuring elements.
Setting of V0 detector:

7.7

15%

Power swing blocking (PSB)


Power swing detected by transit time of impedance between Zone 6, which can be
an offset mho or a lenticular characteristic, and either Zone 3 or Zone 2 as
selected.
Setting ranges:

SETTING
KZ6
KZ6'
TZ6
Z6 Lenticular a/b

MINIMUM
1.00
0.2
20ms

MAXIMUM
49.98
49.9
90ms
1.00, 0.67 & 0.41

STEP
0.02
0.1
5ms

The PSB feature may be enabled or disabled, and can be set to surround either
Zone 3 or Zone 2. The later option is used if Zone 3 is set reverse looking. When
enabled the PSB feature can be set to give alarms only or to block individually
selected zones. Blocking disabled if a ground fault occurs or (if DEF fitted) a phase
fault occurs during a power swing.
7.8

Block auto-reclose
Auto-reclose is blocked after SOTF trips and Zone 3 time delayed trips.
Auto-reclose may be enabled or blocked on:
Zone 1 or aided trip caused by 2 or 3 phase fault
Zone 1 or aided trip caused by 3 phase fault
Zone 1X time delayed trip
Zone 1Y time delayed trip
Zone 2 time delayed trip
Channel out of service
DEF aided trip
DEF time delay trip

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Current transformer requirements


Class X current transformers are required to meet the following specification:
VK

IF * (1 + X/R) * (RB + RCT + RL)

IF

The maximum secondary fault current at the relay


Zone 1 reach point.

X/R

The primary system ratio.

RB

The relay burden.

RCT

The CT secondary winding resistance.

RL

The resistance of the cable connecting the relay


to the CTs, (lead and return for ground faults,
lead only for phase faults).

Where:

The calculation is done for ground faults and phase faults and the highest knee
point voltage calculation is used.
Burdens:
The resistance of the relay current transactors measured at twice rated current are
given below. They do not include the DEF polarising CT.

Fault type
3P/F
G/F
7.10

In = 1A

In = 5A

0.073 to 0.079
0.146 to 0.152

0.012 to 0.02
0.024 to 0.04

Directional earth fault (DEF)


DEF may be enabled or disabled.
Directional measuring one forward looking, one reverse looking.
elements:

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Setting ranges:

SETTING
Lowset 3Io
THETA G
Highset 3Io
DEF MUTL*t
DEF Base setting Is

MINIMUM
0.05In
10
0.05In
0.025
0.05In

MAXIMUM
0.8In
80
0.8In
1.000
1.2In

Polarising:

Zero sequence volt.


Zero sequence current.
Zero sequence volts and current.
Negative sequence volts.

Sensitivity:

Depends on polarising selected.

Polarising quantity:
Operating quantity:

1V Residual Voltage or
1.5% Polarising Current as appropriate.
3I0 & 3I2 (if appropriate) set via menu.

Overcurrent curves:

See Figures 7-17 & 7-18

IEC:

CURVE 1
CURVE 2
CURVE 3
CURVE 4

(Standard Inverse)
(Very Inverse)
(Extremely Inverse)
(Longtime Stand-By Earth Fault)

American:

CURVE 5
CURVE 6
CURVE 7
CURVE 8

(US Moderate Inverse)


(US Standard Inverse)
(US Very Inverse)
(US Extremely inverse)

Definite time:

2 SECOND
4 SECOND
8 SECOND

STEP
0.05In
10
0.05In
0.025
0.05In

Accuracy at fn, 20C, Time mult=1:


Current:
Operating time:

+10% to 0%
definite time 3% over 2Is to 31Is.
curves 1, 2, 4, 5, 6, 7 & 8 5% over 2Is to 31Is.
curve 3 7.5% over 2Is to 20Is.

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100

50

10

curve 4

curve 1

Operating
time (s)

0.5

curve 2

curve 3

0.1
1

10

Current (Multiples of Is)

Figure 7-17

IEC characteristics (time multiplier = 1)

50

100

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100

50

10

Operating
time (s)

curve 5
curve 6
curve 7

0.5
curve 8

0.1
1

10

Current (Multiples of Is)

Figure 7-18

American characteristics (time mulitplier = 1)

50

100

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Fault location and instrumentation


Range of fault locator positive sequence settings referred to line VT and CT
secondaries:
In = 1A range is
In = 5A range is

0.2 to 200 ohms


0.1 to 100 ohms
0.04 to 40 ohms
0.2 to 20 ohms

(All versions except LFZP113)


(LFZP113)
(All versions except LFZP113)
(LFZP113)

The positive sequence reach for the fault locator is given by:
Zone F = KZF.KZPh.5/In (for overhead line models)
Zone F = KZF.KZPh.5/2In (cable models)
KZPh and residual compensation are common to distance measuring elements.
KZM and THETA M are provided for mutual compensating the fault locator if
required.
Setting ranges:

SETTING
KZF
KZM
THETA M
Line units
Line Length
CT Ratio
VT Ratio
Accuracy:

MINIMUM
1.00
0.0
50

MAXIMUM
STEP
40.00
0.01
1.360
0.001
85
5
miles or km or 100%
0 to 99.99 in steps of 0.01 plus
100 to 999.9 in steps of 0.1
1 : 1 and 10 : 1 to 5000 : 1 in steps of 10 : 1
1 : 1 and 10 : 1 to 9990 : 1 in steps of 10 : 1

2% at 2In, fn, 20C for faults within the protected section of


line the Fault Locator option is available for the 113 relay,
primarily for metering purposes, as its accuracy on power systems
containing cable sections can not be guaranteed.

Service Manual
LFZP 11x
7.12

R5911D
Chaper 2
Page 322 of 345

Output contacts
Ratings:
Make and carry 0.2s
Carry continuously
Break

7500VA subject to a maxima of 30A


300V, ac or dc.
5A ac or dc.
ac: 1250VA
dc: 50W resistive
25W L/R = 0.04s
subject to a maxima of 5A and 300V

Service Manual
LFZP 11x

Figure 7-19

R5911D
Chaper 2
Page 323 of 345

Arrangement & outline panel mounting horizontal

Service Manual
LFZP 11x

Figure 7-20

R5911D
Chaper 2
Page 324 of 345

Arrangement & outline rack mounting

Service Manual
LFZP 11x

Figure 7-21

R5911D
Chaper 2
Page 325 of 345

Arrangement & outline panel mounting vertical

Service Manual
LFZP 11x
7.13

Dimensions
Weight:
Overall size:

7.14

R5911D
Chaper 2
Page 326 of 345

15kg
see Figures 7-19, 7-20 & 7-21

Serial communications.
Active port:

LOCAL (front) or MODEM (rear).

Baud rate:

Separate setting for each port.


300, 600, 1200, 2400 & 4800.

Protocol:

Separate setting for each port.

Protocols available are :

No OF DATA BITS
8
8
8
8
7
7
7
7
7
Modem control lines:
7.15

PARITY
NONE
EVEN
ODD
NONE
EVEN
ODD
EVEN
ODD
NONE

Selectable in use or not in use.


CTS, DTR, RTS and DSR

Atmospheric environment
Temperature
IEC 255-6:1988

Operative -25C to +55C.


Storage and transport -25C to +70C.

IEC 68-2-1:1990
IEC 68-2-2:1974

Cold
Dry heat

Humidity
IEC 68-2-3:1969
BS2011 part 2.1 Ca

56 days at 93% RH and 40C

Enclosure protection
IEC 529: 1989
BS 5490

7.16

No OF STOP BITS
1
1
1
2
1
1
2
2
2

Mechanical environment

IP50 (dust protected)

Service Manual
LFZP 11x
Vibration
IEC 255-21-1:1988
BS 142: 1982 section 2.2
Category S2
7.17

10,000 operations minimum


100,000 operation minimum

High voltage withstand


Insulation resistance
IEC 255-5:1977
High voltage impulse
IEC 255-5:1977
BS 142:1982 section 1.3

7.19

Response Class 1

Durability
Loaded contact
Unloaded contact

7.18

R5911D
Chaper 2
Page 327 of 345

>100M when measured at 500V dc.


Three positive and three negative
impulses of 5kV peak, 1.2/50s, 0.5J
between all terminals and terminals and
case earth.

Electrical environment
High frequency disturbance
IEC 255-22-1:1988 Class III
BS 142:1982 section 1.4
ANSI C37.90.1:1989

2.5kV peak between independent circuits


and case.
1.0kV peak across terminals of the same circuit.

Fast transient disturbance


IEC 255-22-4:1992 Class IV
IEC 801-4: 1988 Level 3
ANSI C37.90.2:1987

4.0kV, 2.5kHz applied directly to auxiliary


supply.
2.0kV, 5kHz applied directly to all inputs.

Electrostatic discharge
IEC 255-22-2: 1989 Class III

8.0kV, discharge in air with cover in place

Electromagnetic interference
IEC 255-22-3 Class III
Draft ANSI C37.90.2

25MHz-1GHz 10V/m

Radio frequency interference


EMC Compliances
Compliance to the European Commission
88/336/EEC
Directive on EMC is claimed via the
EN50081-2:1994
Technical Construction File rout.
EN50082-2:1995
Generic Standards were used to establish
conformity.

Service Manual
LFZP 11x

R5911D
Chaper 2
Page 328 of 345

Section 8. OPTIMHO DISTANCE RELAY EXTERNAL CONNECTIONS


See Figures 8-1 and 8-2 for typical external connection diagrams.
The input terminal connections are listed below.
8.1

Power supply (Vx1):


13
14

8.2

Ac voltage:
15
16
17
18

8.3

Va
Vb
Vc
Vn

Ac current:
19-20
21-22
23-24
25-26
27-28

8.4

+DC
-DC

Ia
Ib
Ic
In
Ip or Im. This input can be used for zero sequence polarising the DEF or
for mutual compensating the fault locator.

Optical isolators:
+ve
58
62
66
70
74
78
82

-ve
60
64
68
72
76
80
84

FUNCTION
Reset Zone 1 Extension / Loss of Guard
Single Pole Open
Breaker Open
Channel Out of Service
CRX
Relay Blocked
Reset Indications

For Vx2 = 220/250V external box GJ0229 002 is required.

Service Manual
LFZP 11x

8.4.1

R5911D
Chaper 2
Page 329 of 345

Breaker open
Circuit breaker contacts connected in series to indicate all poles open. Required
with busbar VTs or if the Weak infeed or echo feature of POR schemes are
required.

8.4.2

Relay blocked
Closed contact from miniature circuit breaker required when no VT fuses are used.

Service Manual
LFZP 11x

R5911D
Chaper 2
Page 330 of 345

NOTES
1) CT CONNECTIONS AS SHOWN
ARE TYPICAL ONLY

15
Va

2) a)

CT SHORTING LINKS MAKE BEFORE b)


OR c) DISCONNECT

16
Vb

c)

b)

VT
SECONDARIES

DIRECTION OF POWER
FLOW FOR OPERATION

17

S2

29
31
33
35

C-4

37
39

C-5

41
43

C-6

45
47

C-7

49
51

C-8

53
55

C-9
C - 10
C - 11

30
32
34
36

C - 12

38
40

C - 13

42
44

C - 14

46
48

C - 15

50
52

C - 16

54
56

C - 17
C - 18
C - 19

57
59
61
63

C - 20

65
67

C - 21

69
71

C - 22

73
75

C - 23

77
79

C - 24

81
83

Vc

P1

P2

C-1
C-2
C-3

S1
18
Vn
19
Ia
20
21
A

Ib
22
B

23

PHASE
ROTATION

Ic
24
25
In

P2

26

P1
S2

27

S1
Ip

DEF CURRENT POLARISATION


RESET ZONE 1
EXTENSION /
LOSS OF GUARD
SINGLE POLE OPEN

28
58
60
62
64
66

BREAKER OPEN

68
70

Vx2

CHANNEL OUT OF
SERVICE

72
74

CRX

76

78
RELAY BLOCKED

RESET INDICATIONS

80

82

4
5

84

6
7

13

Vx1

14

10
CASE EARTH

OPTIMHO

20

GND
TXD
RXD
RTS
CTS
DSR
0V
+12V
-12V
DTR

REAR SERIAL
COMMUNICATION PORT

Figure 8-1

Typical external connection diagram

Service Manual
LFZP 11x

R5911D
Chaper 2
Page 331 of 345

NOTES
1) CT CONNECTIONS AS SHOWN
ARE TYPICAL ONLY
2)

15
Va

a)

CT SHORTING LINKS MAKE BEFORE b)


OR c) DISCONNECT
c)

b)

16
Vb
VT
SECONDARIES

DIRECTION OF POWER
FLOW FOR OPERATION

17

S2

29
31
33
35

C-4

37
39

C-5

41
43

C-6

45
47

C-7

49
51

C-8

53
55

C-9
C - 10
C - 11

30
32
34
36

C - 12

38
40

C - 13

42
44

C - 14

46
48

C - 15

50
52

C - 16

54
56

C - 17
C - 18
C - 19

57
59
61
63

C - 20

65
67

C - 21

69
71

C - 22

73
75

C - 23

77
79

C - 24

81
83

Vc

P1

P2

C-1
C-2
C-3

S1
18

Vn
19

Ia

PHASE
ROTATION

20
21
Ib
22
DIRECTION OF POWER
FLOW FOR OPERATION

23
Ic

P1

P2
S1

S2

24
25
In

PARALLEL
LINE
PROTECTION

MUTUAL ZERO SEQUENCE


COMPENSATION INPUT

26
27

Im
28

RESET ZONE 1
EXTENSION /
LOSS OF GUARD
SINGLE POLE OPEN

58
60
62
64
66

BREAKER OPEN

68
70

Vx2

CHANNEL OUT OF
SERVICE

72
74

CRX

76

78
RELAY BLOCKED

RESET INDICATIONS

80

82

4
5

84

6
7

13

Vx1

14

10
CASE EARTH

OPTIMHO

20

GND
TXD
RXD
RTS
CTS
DSR
0V
+12V
-12V
DTR

REAR SERIAL
COMMUNICATION PORT

Figure 8-2

Typical external connection diagram with mutual zero sequence input

Service Manual
LFZP 11x

8.4.3

R5911D
Chaper 2
Page 332 of 345

Single pole open


Open contact from auto-reclose relay required with single phase tripping and any
of the following:
a)
b)
c)

DEF option selected.


PSB option selected and busbar VTs.
POR 2 scheme selected. (Weak infeed).

The optical isolator must be energised during single pole dead times.
8.4.4

Unblocking schemes
For the unblocking schemes CRX is used for the unblock frequency (trip frequency)
and Reset Zone 1 Extension for the block frequency (guard frequency).

8.5

Serial Communications Port

(Figure 3-7)
PIN NO
1
2
3
4
5
6
7
9
10
20

FUNCTION
GND
TXD
RXD
RTS
CTS
DSR
0V
+12V
-12V
DTR

Service Manual
LFZP 11x

8.6

R5911D
Chaper 2
Page 333 of 345

Output connections
The output relay connections are dependent on the relay version and are listed on
the next pages together with a list of abbreviations used.
The following conditions will cause the relay inoperative alarm contact RIA to
close:a)
b)
c)
d)
e)
f)

Loss of dc supply.
Operation of voltage transformer supervision if this feature is set to
block tripping.
Failure detected by relay monitoring system.
Operation of Relay Blocked optical isolator.
Test mode selected.
Block contacts option selected.

When 3 phase tripping is selected TRIP A, TRIP B, TRIP C and ANY TRIP respond as
TRIP 3PH.

8.6.1

Output relays for LFZP111 without DEF

Service Manual
LFZP 11x

CONTACT
REFERENCE
TERMINAL No
C-1
29-31
C-2
29-33
C-3
29-35
C-4
37-39
C-5
41-43
C-6
45-47
C-7
49-51
C-8
53-55
C-9
30-32
C-10
30-34
C-11
30-36
C-12
38-40
C-13
42-44
C-14
46-48
C-15
50-52
C-16
54-56
C-17
57-59
C-18
57-61
C-19
57-63
C-20
65-67
C-21
69-71
C-22
73-75
C-23
77-79
C-24
81-83

R5911D
Chaper 2
Page 334 of 345

The relevant external connection diagram is:

10 LFZP 111 05

The software number without fault locator is:

18 LFZP 146

The software number with fault locator is:

18 LFZP 145

CONTACT CONFIGURATION No.


01
RIA
VTS
DIST TRIP
TRIP A
TRIP B
TRIP C
SIGNAL SEND
SOTF
TIME DELAY
ANY TRIP
AIDED TRIP
TRIP A
TRIP B
TRIP C
BAR
START
TRIP A
TRIP B
TRIP C
TRIP A
TRIP B
TRIP C
ANY TRIP
PSB

02
RIA
SOTF
Z1 Ph
Z2 INST ph
BAR
TRIP A
TRIP B
TRIP C
Z3 ( T )
Z1Y ( T )+Z2 ( T )
Z1X ( T )
START A
START B
START C
START G
Z3.NOT Z2
Z1 A-G
Z1 B-G
Z1 C-G
Z2 INST A-G
Z2 INST B-G
Z2 INST C-G
PSB
VTS

03
RIA
VTS
TRIP 3PH
TRIP 3PH
Z1
Z2 ( T )
SIGNAL SEND
SOTF
Z3 ( T )
ANY TRIP
AIDED TRIP
TRIP PH
TRIP G
SIGNAL STOP
BAR
START
TRIP A
TRIP B
TRIP C
TRIP A
TRIP B
TRIP C
ANY TRIP
PSB

04
RIA
VTS
ANY TRIP
TRIP A
TRIP B
TRIP C
TRIP A
TRIP B
Z1
Z2 (T)
Z3 (T)
TRIP C
ANY TRIP
Z2 INST
BAR
BAR
START A
START B
START C
START N
SIGNAL SEND
AIDED TRIP
SOTF
PSB

05
RIA
VTS
DIST TRIP
TRIP A
TRIP B
TRIP C
SIGNAL SEND
SIGNAL STOP
TIME DELAY
ANY TRIP
AIDED TRIP
TRIP 3PH
TRIP 3PH
START
BAR
BAR
TRIP PH
TRIP G
Z1 G TRIP
TRIP A
TRIP B
TRIP C
TIME DELAY
TIME DELAY

Service Manual
LFZP 11x

8.6.2

R5911D
Chaper 2
Page 335 of 345

Output relays for LFZP111 with DEF


The relevant external connection diagram is:

10 LFZP 111 06

The software number without fault locator is:

18 LFZP 147

The software number with fault locator is:

18 LFZP 143

CONTACT
REFERENCE/
TERMINAL No
C-1
9-31
C-2
9-33
C-3
9-35
C-4
7-39
C-5
1-43
C-6
5-47
C-7
9-51
C-8
3-55
C-9
0-32
C-10
0-34
C-11
0-36
C-12
8-40
C-13
2-44
C-14
6-48
C-15
0-52
C-16
4-56
C-17
7-59
C-18
7-61
C-19
7-63
C-20
5-67
C-21
9-71
C-22
73-75
C-23
77-79
C-24
81-83

CONTACT CONFIGURATION No.


01
RIA
VTS
DIST TRIP
TRIP A
TRIP B
TRIP C
SIGNAL SEND
SOTF
TIME DELAY
DEF TRIP
AIDED TRIP
TRIP A
TRIP B
TRIP C
BAR
START
TRIP A
TRIP B
TRIP C
TRIP A
TRIP B
TRIP C
ANY TRIP
PSB

02
RIA
SOTF
Z1 Ph
DEF FWD
BAR
TRIP A
TRIP B
TRIP C
Z3 ( T )
Z1Y ( T )+Z2 ( T )
Z1X ( T )
DEF FWD
DEF ( T )
Z2 INST ph
DEF REV
Z3.NOT Z2
Z1 A-G
Z1 B-G
Z1 C-G
Z2 INST A-G
Z2 INST B-G
Z2 INST C-G
PSB
VTS

03
RIA
VTS
TRIP 3PH
TRIP 3PH
Z1
Z2 ( T )
SIGNAL SEND
SOTF
Z3 ( T )
DEF TRIP
AIDED TRIP
TRIP PH
TRIP G
SIGNAL STOP
BAR
START
TRIP A
TRIP B
TRIP C
TRIP A
TRIP B
TRIP C
ANY TRIP
PSB

04
RIA
VTS
DIST TRIP
TRIP A
TRIP B
TRIP C
TRIP A
TRIP B
Z1
Z2 ( T )
Z3 ( T )
TRIP C
DEF TRIP
Z2 INST/DEF F
BAR
BAR
START A
START B
START C
START N
SIGNAL SEND
AIDED TRIP
SOTF
PSB

05
RIA
VTS
DIST TRIP
TRIP A
TRIP B
TRIPC
SIGNAL SEND
SIGNAL STOP
TIME DELAY
DEF TRIP
AIDED TRIP
TRIP 3PH
TRIP 3PH
START
BAR
BAR
TRIP PH
TRIP G
Z1 G TRIP
TRIP A
TRIP B
TRIP C
TIME DELAY
TIME DELAY

Service Manual
LFZP 11x

8.6.3

R5911D
Chaper 2
Page 336 of 345

Output relays for LFZP112 wihtout DEF


The relevant external connection diagram is:

10 LFZP 112 03

The software number without fault locator is:

18 LFZP 165

The software number with fault locator is:

18 LFZP 163

CONTACT
REFERENCE/
TERMINAL No
C-1
29-31
C-2
29-33
C-3
29-35
C-4
37-39
C-5
41-43
C-6
45-47
C-7
49-51
C-8
53-55
C-9
30-32
C-10
30-34
C-11
30-36
C-12
38-40
C-13
42-44
C-14
46-48
C-15
50-52
C-16
54-56
C-17
57-59
C-18
57-61
C-19
57-63
C-20
65-67
C-21
69-71
C-22
73-75
C-23
77-79
C-24
81-83

CONTACT CONFIGURATION No.


01
RIA
VTS
DIST TRIP
TRIP A
TRIP B
TRIP C
SIGNAL SEND
SOTF
TIME DELAY
AIDED TRIP
TRIP A
TRIP B
TRIP C
BAR
START
TRIP A
TRIP B
TRIP C
TRIP A
TRIP B
TRIP C
ANY TRIP
PSB

02
RIA
SOTF
Z1 Ph
Z2 INST ph
BAR
TRIP A
TRIP B
TRIP C
Z3 ( T )
Z1Y ( T )+Z2 ( T )
Z1X ( T )
START A
START B
START C
START G
Z3.NOT Z2
Z1 A-G
Z1 B-G
Z1 C-G
Z2 INST A-G
Z2 INST B-G
Z2 INST C-G
PSB
VTS

03
RIA
VTS
TRIP 3PH
TRIP 3PH
Z1
Z2 ( T )
SIGNAL SEND
SOTF
Z3 ( T )
AIDED TRIP
TRIP PH
TRIP G
SIGNAL STOP
BAR
START
TRIP A
TRIP B
TRIP C
TRIP A
TRIP B
TRIP C
ANY TRIP
PSB

04
RIA
VTS
ANY TRIP
TRIP A
TRIP B
TRIP C
TRIP A
TRIP B
Z1
Z2 ( T )
Z3 ( T )
TRIP C
ANY TRIP
Z2 INST
BAR
BAR
START A
START B
START C
START N
SIGNAL SEND
AIDED TRIP
SOTF
PSB

Service Manual
LFZP 11x

8.6.4

R5911D
Chaper 2
Page 337 of 345

Output relays for LFZP112 with DEF


The relevant external connection diagram is:

10 LFZP 112 04

The software number without fault locator is:

18 LFZP 166

The software number with fault locator is:

18 LFZP 164

CONTACT
REFERENCE/
TERMINAL No
C-1
29-31
C-2
29-33
C-3
29-35
C-4
37-39
C-5
41-43
C-6
45-47
C-7
49-51
C-8
53-55
C-9
30-32
C-10
30-34
C-11
30-36
C-12
38-40
C-13
42-44
C-14
46-48
C-15
50-52
C-16
54-56
C-17
57-59
C-18
57-61
C-19
57-63
C-20
65-67
C-21
69-71
C-22
73-75
C-23
77-79
C-24
81-83

CONTACT CONFIGURATION No.


01
RIA
VTS
DIST TRIP
TRIP A
TRIP B
TRIP C
SIGNAL SEND
SOTF
TIME DELAY
DEF TRIP
AIDED TRIP
TRIP A
TRIP B
TRIP C
BAR
START
TRIP A
TRIP B
TRIP C
TRIP A
TRIP B
TRIP C
ANY TRIP
PSB

02
RIA
SOTF
Z1 Ph
DEF FWD
BAR
TRIP A
TRIP B
TRIP C
Z3 ( T )
Z1Y ( T )+Z2 ( T )
Z1X ( T )
DEF FWD
DEF ( T )
Z2 INST ph
DEF REV
Z3.NOT Z2
Z1 A-G
Z1 B-G
Z1 C-G
Z2 INST A-G
Z2 INST B-G
Z2 INST C-G
PSB
VTS

03
RIA
VTS
TRIP 3PH
TRIP 3PH
Z1
Z2 ( T )
SIGNAL SEND
SOTF
Z3 ( T )
DEF TRIP
AIDED TRIP
TRIP PH
TRIP G
SIGNAL STOP
BAR
START
TRIP A
TRIP B
TRIP C
TRIP A
TRIP B
TRIP C
ANY TRIP
PSB

04
RIA
VTS
DIST TRIP
TRIP A
TRIP B
TRIP C
TRIP A
TRIP B
Z1
Z2 ( T )
Z3 ( T )
TRIP C
DEF TRIP
Z2 INST/DEF F
BAR
BAR
START A
START B
START C
START N
SIGNAL SEND
AIDED TRIP
SOTF
PSB

Service Manual
LFZP 11x

8.6.5

R5911D
Chaper 2
Page 338 of 345

Output relays for LFZP113


The relevant external connection diagram is:

10 LFZP 113 01

The software number is:

18 LFZP 174

CONTACT
REFERENCE/
TERMINAL No
C-1
29-31
C-2
29-33
C-3
29-35
C-4
37-39
C-5
41-43
C-6
45-47
C-7
49-51
C-8
53-55
C-9
30-32
C-10
30-34
C-11
30-36
C-12
38-40
C-13
42-44
C-14
46-48
C-15
50-52
C-16
54-56
C-17
57-59
C-18
57-61
C-19
57-63
C-20
65-67
C-21
69-71
C-22
73-75
C-23
77-79
C-24
81-83

CONTACT CONFIGURATION No.


01
RIA
VTS
DIST TRIP
TRIP A
TRIP B
TRIP C
SIGNAL SEND
SOTF
TIME DELAY
AIDED TRIP
TRIP A
TRIP B
TRIP C
BAR
START
TRIP A
TRIP B
TRIP C
TRIP A
TRIP B
TRIP C
ANY TRIP
PSB

02
RIA
SOTF
Z1 Ph
Z2 INST ph
BAR
TRIP A
TRIP B
TRIP C
Z3 ( T )
Z1Y ( T )+Z2 ( T )
Z1X ( T )
START A
START B
START C
START G
Z3.NOT Z2
Z1 A-G
Z1 B-G
Z1 C-G
Z2 INST A-G
Z2 INST B-G
Z2 INST C-G
PSB
VTS

03
RIA
VTS
TRIP 3PH
TRIP 3PH
Z1
Z2 ( T )
SIGNAL SEND
SOTF
Z3 ( T )
AIDED TRIP
TRIP PH
TRIP G
SIGNAL STOP
BAR
START
TRIP A
TRIP B
TRIP C
TRIP A
TRIP B
TRIP C
ANY TRIP
PSB

Service Manual
LFZP 11x

8.6.6

R5911D
Chaper 2
Page 339 of 345

Output relays for LFZP114 without DEF


The relevant external connection diagram is:

10 LFZP 114 05

The software number without fault locator is:

18 LFZP 181

The software number with fault locator is:

18 LFZP 177

CONTACT
REFERENCE/
TERMINAL No
C-1
29-31
C-2
29-33
C-3
29-35
C-4
37-39
C-5
41-43
C-6
45-47
C-7
49-51
C-8
53-55
C-9
30-32
C-10
30-34
C-11
30-36
C-12
38-40
C-13
42-44
C-14
46-48
C-15
50-52
C-16
54-56
C-17
57-59
C-18
57-61
C-19
57-63
C-20
65-67
C-21
69-71
C-22
73-75
C-23
77-79
C-24
81-83

CONTACT CONFIGURATION No.


01
RIA
VTS
DIST TRIP
TRIP A
TRIP B
TRIP C
SIGNAL SEND
SOTF
TIME DELAY
ANY TRIP
AIDED TRIP
TRIP A
TRIP B
TRIP C
BAR
START
TRIP A
TRIP B
TRIP C
TRIP A
TRIP B
TRIP C
ANY TRIP

Continued on next page.

02
RIA
SOTF
Z1 Ph
Z2 INST ph
BAR
TRIP A
TRIP B
TRIP C
Z2 ( T )
Z1Y ( T )
Z1X ( T )
START A
START B
START C
START G
Z2 INST
Z1 A-G
Z1 B-G
Z1 C-G
Z2 INST A-G
Z2 INST B-G
Z2 INST C-G
ANY TRIP
VTS

03
RIA
VTS
TRIP 3PH
TRIP 3PH
Z1
Z2 ( T )
SIGNAL SEND
SOTF
Z1X ( T )
ANY TRIP
AIDED TRIP
TRIP PH
TRIP G
Z1Y ( T )
BAR
START
TRIP A
TRIP B
TRIP C
TRIP A
TRIP B
TRIP C
ANY TRIP
TRIP

04
RIA
VTS
DIST TRIP
TRIP A
TRIP B
TRIP C
SIGNAL SEND
SOTF
TIME DELAY
ANY TRIP
AIDED TRIP
TRIP A
TRIP B
LDHS PHASES
BAR
START
TRIP A
TRIP B
TRIP C
TRIP A
TRIP B
TRIP C
ANY TRIP
BAR

Service Manual
LFZP 11x

R5911D
Chaper 2
Page 340 of 345

Continued from previous page.


CONTACT
REFERENCE/
TERMINAL No
C-1
29-31
C-2
29-33
C-3
29-35
C-4
37-39
C-5
41-43
C-6
45-47
C-7
49-51
C-8
53-55
C-9
30-32
C-10
30-34
C-11
30-36
C-12
38-40
C-13
42-44
C-14
46-48
C-15
50-52
C-16
54-56
C-17
57-59
C-18
57-61
C-19
57-63
C-20
65-67
C-21
69-71
C-22
73-75
C-23
77-79
C-24
81-83

CONTACT CONFIGURATION No.


05
RIA
VTS
DIST TRIP
TRIP A
TRIP B
TRIP C
SIGNAL SEND
SIGNAL STOP
TIME DELAY
ANY TRIP
AIDED TRIP
TRIP 3PH
TRIP 3PH
START
BAR
BAR
TRIP PH
TRIP G
Z1 G TRIP
TRIP A
TRIP B
TRIP C
TIME DELAY
TIME DELAY

06
RIA
VTS
ANY TRIP
TRIP A
TRIP B
TRIP C
TRIP A
TRIP B
Z1
Z2 ( T )
Z3 ( T )
TRIP C
ANY TRIP
Z2 INST
BAR
BAR
START A
START B
START C
START N
SIGNAL SEND
AIDED TRIP
SOTF
PSB

Service Manual
LFZP 11x

8.6.7

R5911D
Chaper 2
Page 341 of 345

Output relays for LFZP114 with DEF


The relevant external connection diagram is:

10 LFZP 114 06

The software number without fault locator is:

18 LFZP 176

The software number with fault locator is:

18 LFZP 183

CONTACT
REFERENCE/
TERMINAL No
C-1
29-31
C-2
29-33
C-3
29-35
C-4
37-39
C-5
41-43
C-6
45-47
C-7
49-51
C-8
53-55
C-9
30-32
C-10
30-34
C-11
30-36
C-12
38-40
C-13
42-44
C-14
46-48
C-15
50-52
C-16
54-56
C-17
57-59
C-18
57-61
C-19
57-63
C-20
65-67
C-21
69-71
C-22
73-75
C-23
77-79
C-24
81-83

CONTACT CONFIGURATION No.


01
RIA
VTS
DIST TRIP
TRIP A
TRIP B
TRIP C
SIGNAL SEND
SOTF
TIME DELAY
DEF TRIP
AIDED TRIP
TRIP A
TRIP B
TRIP C
BAR
START
TRIP A
TRIP B
TRIP C
TRIP A
TRIP B
TRIP C
ANY TRIP

Continued on next page.

02
RIA
SOTF
Z1 Ph
DEF FWD
BAR
TRIP A
TRIP B
TRIP C
Z2 ( T )
Z1Y ( T )
Z1X ( T )
DEF FWD
DEF ( T )
Z2 INST ph
START
Z2 INST
Z1 A-G
Z1 B-G
Z1 C-G
Z2 INST A-G
Z2 INST B-G
Z2 INST C-G
ANY TRIP
VTS

03
RIA
VTS
TRIP 3PH
TRIP 3PH
Z1
Z2 ( T )
SIGNAL SEND
SOTF
Z1X ( T )
DEF TRIP
AIDED TRIP
TRIP PH
TRIP G
Z1Y ( T )
BAR
START
TRIP A
TRIP B
TRIP C
TRIP A
TRIP B
TRIP C
ANY TRIP
TRIP

04
RIA
VTS
DIST TRIP
TRIP A
TRIP B
TRIP B
SIGNAL SEND
SOTF
TIME DELAY
DEF TRIP
AIDED TRIP
TRIP A
TRIP B
LDHS PHASES
BAR
START
TRIP A
TRIP B
TRIP C
TRIP A
TRIP B
TRIP C
ANY TRIP
BAR

Service Manual
LFZP 11x

R5911D
Chaper 2
Page 342 of 345

Continued from previous page.

CONTACT
REFERENCE/
TERMINAL No
C-1
29-31
C-2
29-33
C-3
29-35
C-4
37-39
C-5
41-43
C-6
45-47
C-7
49-51
C-8
53-55
C-9
30-32
C-10
30-34
C-11
30-36
C-12
38-40
C-13
42-44
C-14
46-48
C-15
50-52
C-16
54-56
C-17
57-59
C-18
57-61
C-19
57-63
C-20
65-67
C-21
69-71
C-22
73-75
C-23
77-79
C-24
81-83

CONTACT CONFIGURATION No.


05
RIA
VTS
DIST TRIP
TRIP A
TRIP B
TRIP C
SIGNAL SEND
SIGNAL STOP
TIME DELAY
DEF TRIP
AIDED TRIP
TRIP 3PH
TRIP 3PH
START
BAR
BAR
TRIP PH
TRIP G
Z1 G TRIP
TRIP A
TRIP B
TRIP C
TIME DELAY
TIME DELAY

06
RIA
VTS
DIST TRIP
TRIP A
TRIP B
TRIP C
TRIP A
TRIP B
Z1
Z2 ( T )
Z3 ( T )
TRIP C
DEF TRIP
Z2 INST/DEF F
BAR
BAR
START A
START B
START C
START N
SIGNAL SEND
AIDED TRIP
SOTF
PSB

Service Manual
LFZP 11x

8.6.8

R5911D
Chaper 2
Page 343 of 345

Reserved
This contact arrangement is common to all versions and is used during the GEC
ALSTHOM T&D production testing of all relays.

CONTACT
REFERENCE/
TERMINAL No
C-1
29-31
C-2
29-33
C-3
29-35
C-4
37-39
C-5
41-43
C-6
45-47
C-7
49-51
C-8
53-55
C-9
30-32
C-10
30-34
C-11
30-36
C-12
38-40
C-13
42-44
C-14
46-48
C-15
50-52
C-16
54-56
C-17
57-59
C-18
57-61
C-19
57-63
C-20
65-67
C-21
69-71
C-22
73-75
C-23
77-79
C-24
81-83

CONTACT
CONFIGURATION
RESERVED

RIA
VTS
BAR
ANY TRIP
START A
START B
START C
START G
SOTF
AIDED TRIP
Z1
Z2 ( T )
Z3 ( T )
SIGNAL SEND
PSB
DEF TRIP

TRIP A
TRIP B
TRIP C

Service Manual
LFZP 11x

8.6.9

R5911D
Chaper 2
Page 344 of 345

Abbreviations used in contact names


Trips
TRIP A
TRIP B
TRIP C
TRIP 3PH

Trip pole A of circuit breaker


Trip pole B of circuit breaker
Trip pole C of circuit breaker
Trip all 3 poles of circuit breaker

Trip alarms
Z1
Z1X(T)
Z1Y(T)
Z2(T)
Z3(T)
SOTF
DIST TRIP
DIST AIDED
DEF AIDED
DEF (T)
TIME DELAY
DEF TRIP
ANY TRIP
AIDED TRIP
TRIP PH
TRIP G

Zone 1 trip
Zone 1X time delay trip
Zone 1Y time delay trip
Zone 2 time delay trip
Zone 3 time delay trip
Switch on to fault trip
Distance trip
Distance aided trip
DEF aided trip
DEF time delayed trip
Any time delayed trip
Any DEF trip
Any trip
Any aided trip
Trip for a phase fault
Trip for ground fault

Miscellaneous aarms
RIA
VTS
PSB

Relay inoperative alarm (normally closed)


Voltage transformer supervision operated
Power swing in progress

Starts
START
START A
START B
START C
START G

DEF forward or reverse or any Z1, Z2, Z3 element


Any fault involving A phase detected by distance
Any fault involving B phase detected by distance
Any fault involving C phase detected by distance
Any fault involving ground detected by distance or DEF

Service Manual
LFZP 11x

R5911D
Chaper 2
Page 345 of 345

Instantaneous operation of elements for external scheme logic


Z2 INST
Z2 INST A-G
Z2 INST B-G
Z2 INST C-G
Z2 INST ph
Z1 INST ph
Z1 A-G
Z1 B-G
Z1 C-G
Z3.NOT Z2
DEF FWD
DEF REV

Any Z2 element operated


Zone 2 A-G element operated
Zone 2 B-G element operated
Zone 2 C-G element operated
Any Zone 2 phase - phase element operated
Any Zone 1 phase - phase element operated
Zone 1 A-G element operated
Zone 1 B-G element operated
Zone 1 C-G element operated
Any Zone 3 element without any Zone 2 element
DEF forward comparator operated
DEF reverse comparator operated

Miscellaneous
BAR
SIGNAL SEND
SIGNAL STOP
LDHS PHASES

Block auto-reclose
Initiate signal send
Stops signal send (Z2 INST or DEF FWD)
LDHSA or LDHSB or LDHSC

Service Manaul
LFZP 11x

R-5911B
Chapter 2
Appendix A
Page 1 of 26

OPTIMHO menu tree


for relay versions:

LFZP 111 (DEF and FAULT LOCATOR are optional)


LFZP 112 (DEF and FAULT LOCATOR are optional)
LFZP 113 (FAULT LOCATOR IS OPTIONAL. See Section 4.5.1)
LFZP 114 (DEF and FAULT LOCATOR are optional)

Default level
The top of the menu tree is designated the default level. when the operator interface is not in use
the liquid crystal display will always show an appropriate default page. the normal default or
root page will be as selected in the section of the menu.
'OPTIONS
'IDENTIFIERS

'
'

This will be either a blank page or a group identification string of up to 32 characters which has
been entered by the user (see Section 3.10) or the setting group number selected. Under certain
conditions, as indicated below, the root page may be replaced by one of the following default
pages which are listed in a hierarchical order, item a) having the highest precedence :
a)

'SERIAL COMMS
'LOGGED ON

'
'

If serial communications is logged on. Note, serial


communications can only log on when either a root page or
one of the default pages a) to h) below are displayed.

b)

'Push SET to
'update changes
'OR
'Push SET to
'update group

'
'
'
'
'

Only if setting changes have been made.

c)

'Z1
'AN V~FAIL

'
'

Fault or event information.

d)

'PwrSwg TEST
'ENABLED

'
'

If the power swing test commission option has been selected.

e)

'CONTACTS
'BLOCKED

'
'

If either the 'contacts blocked' or the contacts blocked


except any trip' commission options have been selected.

f)

'ERROR# SLOT No 1
'5 6 7 8 9 10 11

'
'

Diagnostic information, if any faults have been detected

g)

'ERROR# I~FAIL

'

Diagnostic information, if an anomalous condition has been


detected

h)

'Please set
'CALENDAR CLOCK

'
'

Only if setting group no. has been changed.

If a power up reset has occurred.

Service Manaul
LFZP 11x

R-5911B
Chapter 2
Appendix A
Page 2 of 26

MENU TREE
ROOT OR
DEFAULT
DISPLAY
OPTIONS
ACTIVE SETTINGS
OPTIONS
PRINT
PRINT SETTINGS
PRINT FAULT RECORDS
OPTIONS
FAULT RECORDS
VIEW RECORDS
CLEAR RECORDS
OPTIONS
METERING
OPTIONS
IDENTIFIERS
SET GROUP IDENTIFIER
SOFTWARE VERSION
DEFAULT DISPLAY
OPTIONS
CALENDAR CLOCK
READ TIME & DATE
SET TIME & DATE
CLOCK REFERENCE
OPTIONS
COMMISSION TESTS
CONTACT CONTROL
ON LOAD DIR TEST
PwrSwg TEST
MONITOR OPTION
OUTPUT OPTION
OPTIONS
COMMUNICATIONS
SERIAL CONTROL
OPTIONS
SETTINGS
CONTACT CONFIGURATION
SCHEME
DISTANCE
BLOCK AUTORECLOSE
VT SUPERVISION
START INDICATION
DEF
FAULT LOCATOR

Service Manaul
LFZP 11x

!
OPTIONS
ACTIVE SETTINGS

R-5911B
Chapter 2
Appendix A
Page 3 of 26

ACTIVE SETTINGS
GROUP = 1

GROUP
SETTING TRAP

ACTIVE SETTINGS
GROUP = 1 "

8 SETTING GROUPS
ARE AVAILABLE

If no change made

If change made

Push SET to
update group

SET

settings group
updated

#
RESET

OPTIONS

settings group
change ignored

PRINT

push ! to print

'printing in'

'printer not'

Service Manaul
LFZP 11x

PRINT

R-5911B
Chapter 2
Appendix A
Page 4 of 26
push ! to print

all settings

push ! to print
fault records

'progress'

or

Note
1)

'OPTION '
'PRINT '
display is stepped to from the root or default display when the ! key is pressed
provided the default display is not :'Please set
'
'CALENDAR CLOCK '
For this display the menu steps to:'OPTIONS
'
'CALENDAR CLOCK '

2)

If serial comms. is logged on printing is directed to the ACTIVE serial port.


If serial comms. is not logged on printing is directed to the PARALLEL port.

'ready'

Service Manaul
LFZP 11x

OPTIONS
FAULT
RECORDS
$

R-5911B
Chapter 2
Appendix A
Page 5 of 26

FAULT RECORDS
push ! to view !
$

push ! to view
LAST FAULT

push ! to view
LAST FAULT -1

(If fault record is empty,

See Fig 3-2 &3-3 for


typical fault records

push ! to view
LAST FAULT -2

push ! to view
LAST FAULT -3

' No record ',

FAULT RECORDS
clear records

push SET to
clear records

is displayed.)

SET

all fault
records cleared

Note, if ACCESS LEVEL (COMMUNICATIONS section) is set to LIMITED, the display:'FAULT RECORDS'
'clear records
'
is not visible

Service Manaul
LFZP 11x

OPTIONS
METERING
$

R-5911B
Chapter 2
Appendix A
Page 6 of 26

Va= 63.50 KV
0.0 degrees

!
$

Vb= 63.50 KV
-120.0 degrees

Vc= 63.50 KV
120.0 degrees

Ia= 2.00 KA
- 20.0 degrees

Ib= 2.00 KA
-140.0 degrees

Ic= 2.00 KA
100.0 degrees

REAL POWER
= 358.0 MW
REACTIVE POWER
= 130.3 MVAR

(Only if FAULT LOCATOR fitted)

Note, metered values are updated every 2 seconds.

Service Manaul
LFZP 11x

OPTIONS
IDENTIFIERS

R-5911B
Chapter 2
Appendix A
Page 7 of 26

IDENTIFIERS
GROUP !
$

GROUP IDENTIFIER
push ! to set

IDENTIFIERS
SOFTWARE VERSION
!
$
(Only if FAULT
LOCATOR fitted)

IDENTIFIERS
DEFAULT DISPLAY

(32 character string entered


via relay keypad)

SOFTWARE VERSION
DISTANCE

DISTANCE
18 LFZP xxx x

SOFTWARE VERSION
FAULT LOCATOR

FAULT LOCATOR
18 LFZP xxx x

DEFAULT DISPLAY
Blank display

DEFAULT DISPLAY
Blank display "
DEFAULT DISPLAY
GROUP ID "

Note:
Group 1 GROUP
IDENTIFIER is used as
the logon password for
the serial communications

DEFAULT DISPLAY
ACTIVE GROUP "

Service Manaul
LFZP 11x

OPTIONS
CALENDAR CLOCK!
!
$

R-5911B
Chapter 2
Appendix A
Page 8 of 26
CALENDAR CLOCK
READ TIME & DATE !
$
CALENDAR CLOCK
SET TIME & DATE !
$

1980 JAN 01
00:00:00
SET TIME & DATE
SET YEAR 1980

SET TIME & DATE


SET YEAR 1980 "

SET TIME & DATE


SET MONTH JAN

SET TIME & DATE


SET MONTH JAN "

$
SET TIME & DATE
SET DAY 01

SET TIME & DATE


SET DAY 01 "

$
(Time is set when
#is pressed)

SET TIME & DATE


SET HOUR 00

SET TIME & DATE


SET HOUR 00 "

$
SET TIME & DATE
SET MINUTE 00

SET TIME & DATE


SET MINUTE 00 "

SET TIME & DATE


SET SECOND 00

SET TIME & DATE


SET SECOND 00 "

CALENDAR CLOCK
CLOCK REFERENCE !

CLOCK REFERENCE
RELAY CRYSTAL !

CLOCK REFERENCE
RELAY CRYSTAL "
CLOCK REFERENCE
SYSTEM VOLTAGE "

Service Manaul
LFZP 11x

OPTIONS
!
COMMISSION TESTS
$

R-5911B
Chapter 2
Appendix A
Page 9 of 26

COMMISSION TESTS !
CONTACT CONTROL
$

ALL CONTACTS !
ENABLED

ALL CONTACTS
ENABLED "
ALL CONTACTS
BLOCKED "
CONTACTS BLOCKED
EXCEPT ANY TRIP "

COMMISSION TESTS
ON LOAD DIR TEST !
$

ON LOAD DIR TEST


push SET to test
SET

'Fault seen as'


'FORWARD '

*1

or
'Fault NOT seen'
'as FORWARD'
or
'Test aborted '
'check I &/or V'

(Except version 114)

COMMISSION TEST
PwrSwg TEST
$

PwgSwg TEST
DISABLED !

PwgSwg TEST
DISABLED"

*2

PwgSwg TEST
ENABLED"
COMMISSION TEST
MONITOR OPTIONS

MONITOR 23456789
!

OPT 25

$
COMMISSION TEST
OUTPUT OPTION

********

MONITOR

23456789

OPT 25 "

********

*3

*4
!

push SET to test


OUTPUT OPT #27

push SET to test


OUTPUT OPT #27 "

or 'Contacts blocked'
(If contact block has
been selected)

*5

*1

Note, this test is only active whilst the SET key is held pressed. The RELAY AVAILABLE LED is turned off and the RIA
contact closes when the page :- 'ON LOAD DIR TEST''push SET to test' is displayed and the SET key is pressed. The
RELAY AVAILABLE LED is turned on and the RIA contact opens when the SET key is released.

*2

Note, when Power Swing test is enabled, monitor option number 8 should be selected in order to view relay response

*3

Note, * = 0 or 1. Monitor options are detailed in section 3.14

*4

Note,
a) this test is only active whilst the SET key is held pressed. The RELAY AVAILABLE LED is turned off and the RIA contact
closes when the page :- 'push SET to test' , 'OUTPUT OPT #xx' is displayed. The RELAY AVAILABLE LED is turned on
and the RIA contact opens when the user steps back to the page:-'COMMISSION TEST' 'OUTPUT OPTION'
b) The 15 minute timeout feature is not applicable when the page :-.'push SET to test' 'OUTPUT OPT #xx' is displayed
c) Output options are detailed in section 3.14

*5

Note, If ACCESS LEVEL (COMMUNICATIONS section) is set to limited the pages:-'COMMISSION


DIR TEST' & 'COMMISSION TEST' 'OUTPUT OPTION' are not visible

TEST' 'ON LOAD

Service Manaul
LFZP 11x

OPTIONS
COMMUNICATIONS
!
$

R-5911B
Chapter 2
Appendix A
Page 10 of 26

COMMUNICATIONS
ACCESS LEVEL !

ACCESS LEVEL
FULL !

ACCESS LEVEL
FULL"

$
ACCESS LEVEL
LIMITED"
COMMUNICATIONS
SERIAL CONTROL
!

SERIAL CONTROL
ACTIVE PORT !
$

Note, when ACCESS LEVEL is set to


LIMITED, only time/date and ACCESS
LEVEL can be
changed. -see note 6 on page 12
and notes at bottom of page 10

ACTIVE PORT
MODEM !

ACTIVE PORT
MODEM "
ACTIVE PORT
LOCAL"

( BAUD Settings
are :4800
2400
1200
600
300 )

SERIAL CONTROL
MODEM BAUD RATE

MODEM BAUD RATE


!

MODEM BAUD RATE


4800"

$
SERIAL CONTROL
MODEM PROTOCOL

MODEM PROTOCOL
DATA PARITY STOP

DATA PARITY STOP


8 NONE 1

DATA PARITY STOP


8 NONE 1"

$
DATA PARITY STOP
8 EVEN 1 "
DATA PARITY STOP
8 ODD 1 "
DATA PARITY STOP
8 NONE 2 "
DATA PARITY STOP
7 EVEN 1 "
DATA PARITY STOP
7 ODD 1 "
DATA PARITY STOP
7 EVEN 2 "
DATA PARITY STOP
7 ODD 2 "
DATA PARITY STOP
7 NONE 2 "
Note,
1) To gain access to the menu via the serial comms the user must first type in the Group 1 GROUP IDENTIFIER, see IDENTIFIER
section, followed by carriage return. Provided the ID matches that stored in the relay a prompt GECAM: will appear. The user
then types LOGON followed by carriage return, at which point he will be logged onto the menu provided the LCD display is at a
root or default display. The message 'Operator interface in use' will be written to the VDU if the menu is not at the root or default
level.
2) When the GECAM: prompt is displayed on the remote VDU, the relay LCD changes to :-'Serial comms.' 'Logged on'

Service Manaul
LFZP 11x

R-5911B
Chapter 2
Appendix A
Page 11 of 26

COMMUNICATIONS continued:-

SERIAL CONTROL
CONTROL LINES
$

CONTROL LINES
IN USE "
CONTROL LINES
NOT IN USE "

SERIAL CONTROL
LOCAL BAUD RATE !
$

LOCAL BAUD RATE


4800 !

SERIAL CONTROL
LOCAL PROTOCOL !

LOCAL PROTOCOL
DATA PARITY STOP!

LOCAL BAUD RATE


4800 !

DATA PARITY STOP 8


NONE 1!

DATA PARITY STOP


8 NONE 1 "
DATA PARITY STOP
8 EVEN 1 "

3) Serial comms. is logged off whenever Q on the remote keyboard or


RESET on the relay keypad is pressed

DATA PARITY STOP


8 ODD 1 "

4) When the MODEM serial comms. is logged on, the option to select
LOCAL port is not available, this prevents lockout of the modem
control.

DATA PARITY STOP


8 NONE 2 "

5) A timeout feature will automatically log off serial comms. if no key is


pressed within a 15 minute interval. The LCD will return to an
appropriate root or default display.
6) When serial comms. is logged on to the MODEM port and the
ACCESS LEVEL is set to LIMITED, no settings (except time/date) can
be changed. When serial comms. is logged on to the LOCAL port and
the ACCESS LEVEL is set to LIMITED, no settings (except time/date
and ACCESS LEVEL) can be changed.
7) A 60s timeout on X-OFF will automatically select X-ON if X-OFF
is active for more than 60s.
8) Any change made to any setting in this branch of the menu tree is
copied to all the other setting groups when settings are updated.

DATA PARITY STOP


7 EVEN 1 "
DATA PARITY STOP
7 ODD 1 "
DATA PARITY STOP
7 EVEN 2 "
DATA PARITY STOP
7 ODD 2 "
DATA PARITY STOP
7 NONE 2

Service Manaul
LFZP 11x

OPTIONS
SETTINGS !

R-5911B
Chapter 2
Appendix A
Page 12 of 26
SETTINGS
CONTACT
CONFIG!

CONTACT CONFIGRESERVED!

CONTACT CONFIGRESERVED"

$
1) RESERVED contact configuration is
for GECAM test use only
2) For all versions a minimum of 3 or 4
contact configurations are always
available, additional configurations may be
available for specific relay versions

CONTACT CONFIGURATION No. 01"


CONTACT CONFIGURATION No. 02"
CONTACT CONFIGURATION No. 03"
CONTACT CONFIGURATION No. 04"

Service Manaul
LFZP 11x

R-5911B
Chapter 2
Appendix A
Page 13 of 26

SCHEME SETTINGS continued:SETTINGS


SCHEME
$ !

(Only if POR1, POR1 UNBLOCK,


BLOCKING or BLOCKING 2 selected)

SCHEME
SELECTION !
$

SCHEME SELECTION
BASIC !
$
SCHEME
SELECTION
TP = 98ms !
TP = 98ms "

SCHEME SELECTION
BASIC "

SCHEME SELECTION
Z1 EXTENSION"

(Only if POR1,POR1 UNBLOCK,


POR2,POR2 UNBLOCK,POR2 WI
TRIP,POR2 WI TRIP UNBLOCK,
BLOCKING or BLOCKING 2 selected)

$ SCHEME
SELECTION
TD = 98ms !
TD = 98ms "

SCHEME SELECTION
PUR "

(Only if PUR UNBLOCK, POR1


UNBLOCK, POR2 UNBLOCK or
POR2 WI TRIP UNBLOCK selected)

$ SCHEME
SELECTION
TDW= 98ms!
TDW= 98ms "

SCHEME SELECTION
PUR UNBLOCK"
SCHEME SELECTION
POR 1"

( timer range = 0 to 98ms in 2ms steps)

(Except 114
version)

SCHEME SELECTION
POR 1 UNBLOCK"
SCHEME SELECTION
POR 2"
SCHEME SELECTION
POR 2 WI TRIP"
SCHEME SELECTION
POR 2 UNBLOCK"
SCHEME POR 2
W1 TRIP UNBLOCK"
SCHEME SELECTION
BLOCKING"
SCHEME SELECTION
BLOCKING 2"

Service Manaul
LFZP 11x

R-5911B
Chapter 2
Appendix A
Page 14 of 26

SCHEME SETTINGS continued:-

(Versions 111,112

SCHEME SELECTION

DEF ELEMENTS

DEF ELEMENTS

& 114 only with


DEF fitted)

DEF ELEMENTS

ALL ENABLED!

ALL ENABLED"

(Only if DEF
ELEMENTS
ALL
ENABLED)

DEF ELEMENTS
DEF AIDED TRIP!

DEF AIDED TRIP


ENABLED!

(Scheme timer
range = 0 to
98ms in 2ms
steps)

DEF AIDED TRIP


ENABLED "

$
Note, DEF AIDED TRIP is set to
BLOCKED if BASIC,Z1 EXTENSION,
or PUR UNBLOCk schemes are
selected

(Highset 3Io
range=0.05
to 0.8In in
0.05In steps)

DEF ELEMENTS
ALL BLOCKED"

(Only if DEF AIDED TRIP ------------ENABLED and SCHEME TYPE


any POR or any BLOCKING)
Only if DEF AIDED TRIP -------------ENABLED and SCHEME TYPE is
any BLOCKING)
(Only if DEF AIDED TRIP ------------ENABLED and SCHEME TYPE is
POR1, POR1 UNBLOCK, BLOCKING or
BLOCKING 2 )
SCHEME
LOSS OF LOAD !

DEF AIDED TRIP


BLOCKED "

DEF AIDED TRIP


HIGHSET !

DEF HIGHSET
3Io = 0.8In"

$
DEF AIDED TRIP
TPG = 98ms !

DEF AIDED TRIP


TPG = 98ms "

$
DEF AIDED TRIP
TDG = 98ms !

DEF AIDED TRIP


TDG = 98ms "

LOSS OF LOAD
FEATURE ENABLED!

LOSS OF LOAD
FEATURE ENABLED "

$
LOSS OF LOAD
FEATURE BLOCKED "
(Only if ENABLED)-

LL ENABLED BY
LS I LEVEL DET !

LL ENABLED BY
LS I LEVEL DET "
LL ENABLED BY
HS I LEVEL DET "

Service Manaul
LFZP 11x

R-5911B
Chapter 2
Appendix A
Page 15 of 26

SCHEME SETTINGS continued :SETTINGS


DISTANCE!
$

DISTANCE
TYPE OF TRIP
$

TYPE OF TRIP
1 OR 3 POLE

TYPE OF TRIP
1 OR 3 POLE"
TYPE OF TRIP
3 POLE ONLY"

DISTANCE
ZONE 1 TRIPPING !
$

ZONE 1 TRIPPING
ENABLED
!

ZONE 1 TRIPPING
ENABLED"
ZONE 1 TRIPPING
BLOCKED"

DISTANCE
TIME DELAY TRIP!
$

TIME DELAY TRIP


Z1X(T) ENABLED!
$

TIME DELAY TRIP


Z1X(T) ENABLED
TIME DELAY TRIP
Z1X(T) BLOCKED"

(TZ1X range =
100ms to 9980ms in 20ms steps)

(Only if Z1X(T) --------ENABLED)

TIME DELAY TRIP


TZ1X = 9.98s
$

TIME DELAY TRIP


Z1Y(T) ENABLED !
$

TIME DELAY TRIP


TZ1X = 9.98s"

TIME DELAY TRIP


Z1Y(T) ENABLED"
TIME DELAY TRIP
Z1Y(T) BLOCKED "

(TZ1Y range =
100ms to 9980ms in 20ms steps)

(Only if Z1Y(T) -------ENABLED)

TIME DELAY TRIP


TZ1Y=9.98s
$

TIME DELAY TRIP


Z2(T) ENABLED !
$

TIME DELAY TRIP


TZ1Y=9.98s"

TIME DELAY TRIP


Z2(T) ENABLED"
TIME DELAY TRIP
Z2(T) BLOCKED"

(TZ2 range =
100ms to 9980ms in 20ms steps)

(Only if Z2(T) ----------ENABLED)

TIME DELAY TRIP


TZ2=9.98s
$
TIME DELAY TRIP
Z3(T) ENABLED !
$

TIME DELAY TRIP


TZ2=9.98s"

TIME DELAY TRIP


Z3(T) ENABLED"
TIME DELAY TRIP
Z3(T) BLOCKED"

(TZ3 range = 100ms to 9980ms in


20ms steps)

(Only if Z3(T) ----------ENABLED)

TIME DELAY TRIP


TZ3= 9.98s
!
$

TIME DELAY TRIP


TZ3= 9.98s"

TIME DELAY TRIP


ALL G ENABLED !

TIME DELAY TRIP


ALL G ENABLED"
TIME DELAY TRIP
ALL G BLOCKED"

Service Manaul
LFZP 11x

(KZPh range = 0.04 to 1.00 in steps of


0.001)
(THETA Ph range = 50 to 80 in 5
steps, versions 111, 112 & 114 only)
(THETA Ph range = 45 to 80 in 5
steps, version 113 only)

(KZN range = 0 to 1.360 in steps of


0.001)

(THETA N range = 50 to 85 in 5
steps, versions 111, 112 & 114 only)
(THETA N range = -45,-35, -25 to
80 in 5 steps, version 113 only)

R-5911B
Chapter 2
Appendix A
Page 16 of 26

DISTANCE
BASE SETTING!
$

BASE SETTING
KZPh = 1.000
$

BASE SETTING
! KZPh = 1.000"

BASE SETTING
THETA Ph = 85
$

! BASE SETTING
THETA Ph = 85"

BASE SETTING
KZN= 1.360
$

BASE SETTING
! KZN= 1.360"

BASE SETTING
THETA N = 85

BASE SETTING
! THETA N = 85"

Service Manaul
LFZP 11x

R-5911B
Chapter 2
Appendix A
Page 17 of 26

DISTANCE SETTINGS
continued:(Version 111
only)

DISTANCE
DIST G CHAR'STIC
$

DIST G CHAR'STIC
MHO
$

DIST G CHAR'STIC
MHO "

DIST G CHAR'STIC
QUADRILATERAL"

KR range = 1 to 30 in
(steps of 1)

DIST G CHAR'STIC
KR = 30
!

DIST G CHAR'STIC
KR = 30"

(Only if QUADRILATERAL)
(KZ1 range = 1.00 to
49.98 in steps of 0.02)

DISTANCE
Z1 & Z2 SETTING !
$

(KZ1X range = 1.00 to


49.98 in steps of 0.02)
(KZ1Y range = 1.00 to
49.98 in steps of 0.02)
(KZ2 range = 1.00 to
49.98 in steps of 0.02)

DISTANCE ZONE 3
SETTING !

Z1 & Z2 SETTING
KZ1 = 49.98 !
$
Z1 & Z2 SETTING
KZ1X = 49.98 !
$
Z1 & Z2 SETTING
KZ1Y = 49.98 !
$
Z1 & Z2 SETTING
KZ2 = 49.98 !

Z1 & Z2 SETTING
KZ1 = 49.98"

ZONE 3 SETTING
OFFSET !
$

ZONE 3 SETTING
OFFSET"

Z1 & Z2 SETTING
KZ1X = 49.98"
Z1 & Z2 SETTING
KZ1Y = 49.98"
Z1 & Z2 SETTING
KZ2 = 49.98"

ZONE 3 SETTING REVERSE


LOOKING"

(KZ3'range = 0.2 to 49.9


in steps of 0.1)
(KZ3 range = 1.00 to
49.98 in steps of 0.02)

(Only for
OFFSET)

(LENT a/b range =


1.00,0.67, 0.41)

DISTANCE
SWCH ON TO FAULT !
$

ZONE 3 SETTING
KZ3'= 49.9 !
$
ZONE 3 SETTING
KZ3= 49.98 !
$
ZONE 3 SETTING
LENT a/b = 1.00 !

ZONE 3 SETTING
KZ3'= 49.9"

SWCH ON TO FAULT
ENABLED !
$

SWCH ON TO FAULT
ENABLED"

ZONE 3 SETTING
KZ3= 49.98"
ZONE 3 SETTING
LENT a/b = 1.00"

SWCH ON TO FAULT
BLOCKED"

Service Manaul
LFZP 11x

DISTANCE
SETTINGS
continued:-

R-5911B
Chapter 2
Appendix A
Page 18 of 26

(Only if ENABLED)

SWCH ON TO FAULT
ENABLED IN 110s!

SWCH ON TO FAULT
ENABLED IN 110s"

SWCH ON TO FAULT
ENABLED IN 0.2s"

SWCH ON TO FAULT
BY COMPARATORS!

SWCH ON TO FAULT
BY COMPARATORS"
SWCH ON TO FAULT
BY LEVEL DETECT"
SWCH ON TO FAULT
BY LD OR COMP"

(Versions 111,112 &


113 only)

DISTANCE
PwrSwg DETECTOR!

PwrSwg DETECTOR
ENABLED!
$

PwrSwg DETECTOR
ENABLED"
PwrSwg DETECTOR
BLOCKED"

(Only if ENABLED)

PwrSwg DETECTOR
TIMING Z6-->Z2!
$

PwrSwg DETECTOR
TIMING Z6-->Z2"
PwrSwg DETECTOR
TIMING Z6-->Z3"

PwrSwg DETECTOR
To ALLOW Z1!
$

PwrSwg DETECTOR
To ALLOW Z1"
PwrSwg DETECTOR
To BLOCK Z1"

PwrSwg DETECTOR
To ALLOW Z1X!
$

PwrSwg DETECTOR
To ALLOW Z1X"
PwrSwg DETECTOR
To BLOCK Z1X"

PwrSwg DETECTOR
To ALLOW Z1Y !
$

PwrSwg DETECTOR
To ALLOW Z1Y"
PwrSwg DETECTOR
To BLOCK Z1Y"

Service Manaul
LFZP 11x

R-5911B
Chapter 2
Appendix A
Page 19 of 26

DISTANCE
SETTINGS continued
PwrSwg DETECTOR
TO ALLOW Z2!
$

PwrSwg DETECTOR
TO ALLOW Z2"
PwrSwg DETECTOR
TO BLOCK Z2"

PwrSwg DETECTOR
TO ALLOW Z3!
$

PwrSwg DETECTOR
TO ALLOW Z3"
PwrSwg DETECTOR
TO BLOCK Z3"

(TZ6 range = 20ms


to 90ms in steps 0f
5ms)
(KZ6 range = 1.00
to
49.98 in steps of
0.02)
(KZ6' range = 0.2 to
49.9 in steps of 0.1)
(LENT a/b = 1.00,
0.67, 0.41)

PwrSwg DETECTOR
TZ6 = 90ms!
$
PwrSwg DETECTOR
KZ6 = 49.98!
$
PwrSwg DETECTOR
KZ6' = 49.9!
$
PwrSwg DETECTOR
LENT a/b = 1.00!

PwrSwg DETECTOR
TZ6 = 90ms"
PwrSwg DETECTOR
KZ6 = 49.98"

PwrSwg DETECTOR
KZ6' = 49.9"
PwrSwg DETECTOR
LENT a/b = 1.00"

Service Manaul
LFZP 11x

SETTINGS
BLOCK AUTORECLSE!
$

R-5911B
Chapter 2
Appendix A
Page 20 of 26

BLOCKA/R ON
Z1+AT 2&3Ph/F!
$

BLOCK A/R ON
Z1+AT 2&3Ph/F"
ALLOW A/R ON
Z1+AT 2&3Ph/F"
BLOCK A/R ON
Z1+AT 3Ph/F"

BLOCK A/R ON!


Z1X(T) TRIP
$

BLOCK A/R ON
Z1X(T) TRIP"
ALLOW A/R ON
Z1X(T) TRIP"

BLOCK A/R ON!


Z1Y(T) TRIP
$

BLOCK A/R ON
Z1Y(T) TRIP"
ALLOW A/R ON
Z1Y(T) TRIP"

BLOCK A/R ON
Z2(T) TRIP !
$

BLOCK A/R ON
Z2(T) TRIP"
ALLOW A/R ON
Z2(T) TRIP"

BLOCK A/R ON
CHANNEL OUT !
$

BLOCK A/R ON
CHANNEL OUT"
ALLOW A/R ON
CHANNEL OUT"

(Only for versions 111,112


& 114 with DEF)

BLOCK A/R ON
DEF DELAY TRIP !
$

BLOCK A/R ON
DEF DELAY TRIP"
ALLOW A/R ON
DEF DELAY TRIP"

(Only for versions 111,112


& 114 with DEF)

BLOCK A/R ON
DEF AIDED TRIP !

BLOCK A/R ON
DEF AIDED TRIP"
ALLOW A/R ON
DEF AIDED TRIP"

Service Manaul
LFZP 11x

SETTINGS
VT SUPERVISION
$

R-5911B
Chapter 2
Appendix A
Page 21 of 26

VT SUPERVISION
TO ALLOW TRIP!

VT SUPERVISION
TO ALLOW TRIP"

$
VT SUPERVISION
TO BLOCK TRIP"
VT SUPERVISION
SELF RESETTING!

SELF RESETTING
ENABLED!

SELF RESETTING
ENABLED"
SELF RESETTING
DISABLED"

Service Manaul
LFZP 11x

SETTINGS
START INDICATION!
!
$

R-5911B
Chapter 2
Appendix A
Page 22 of 26

START INDICATION
ENABLED!

START INDICATION
ENABLED"
START INDICATION
BLOCKED"

Service Manaul
LFZP 11x

(Only for versions


111, 112 & 114
with DEF)

R-5911B
Chapter 2
Appendix A
Page 23 of 26

SETTINGS
DEF !
$

DEF
LOW SET !
$
DEF
ELEMENTS !

(3Io range = 0.05 to 0.8


In
in 0.05 In steps)

DEF LOW SET


3 Io = 0.8 In !

DEF ELEMENTS
ALL ENABLED !
$

DEF LOW SET


3 Io = 0.8 In "

DEF ELEMENTS
ALL ENABLED "
DEF ELEMENTS
ALL BLOCKED "

(Only if ALL
ENABLED)

DEF ELEMENTS
DELAY TRIP !
$

DEF DELAY TRIP


ENABLED !
$

DEF DELAY TRIP


ENABLED "
DEF DELAY TRIP
BLOCKED "

(Only if
ENABLED)

DEF DELAY TRIP


CURVE 1 !

DEF DELAY TRIP


CURVE 1 "
DEF DELAY TRIP
CURVE 2 "
DEF DELAY TRIP
CURVE 3 "
DEF DELAY TRIP
CURVE 4 "
DEF DELAY TRIP
CURVE 5 "
DEF DELAY TRIP
CURVE 6 "
DEF DELAY TRIP
CURVE 7 "
DEF DELAY TRIP
CURVE 8 "
DEF DELAY TRIP
DEFINITE t = 2s "
DEF DELAY TRIP
DEFINITE t = 4s "
DEF DELAY TRIP
DEFINITE t = 8s "

Service Manaul
LFZP 11x

R-5911B
Chapter 2
Appendix A
Page 24 of 26

DEF SETTINGS continued:DEF DELAY TRIP


MULT *t =1.000 !
$

DEF DELAY TRIP


MULT *t =1.000 "

DEF DELAY TRIP


BASE SETTING !

(*t range = 0.025 to 1.000


in steps of 0.025)

DEF BASE SETTING


Is = 1.20 In !

(Is range = 0.05In to 1.20In


in steps of 0.05
DEF ELEMENTS
POLARISING !

DEF POLARISING
NEGATIVE SEQ V !

DEF BASE SETTING


Is = 1.20 In "

DEF POLARISING
NEGATIVE SEQ V"
DEF POLARISING
ZERO SEQ I"

DEF POLARISING
ZERO SEQ V "
DEF POLARISING
ZERO SEQ V & I "

(THETA G range = 10 to
80 in 10 steps)
DEF ELEMENTS
ANGLE !
$

DEF ANGLE
THETA G = 80 !

DEF ANGLE
THETA G = 80 "

DEF ELEMENTS
MAG INRUSH !

DEF MAG INRUSH


STABILISER ON !

DEF MAG INRUSH


STABILISER ON"
DEF MAG INRUSH
STABILISER OFF"

Service Manaul
LFZP 11x

(Only for versions with


fault locator fitted)

R-5911B
Chapter 2
Appendix A
Page 25 of 26

SETTINGS !
FAULT LOCATOR

(KZF range = 1 to 40 in
0.01 steps.)

FAULT LOCATOR
REACH !
$

REACH
KZF = 40.00 !

REACH
KZF = 40.00"

FAULT LOCATOR
LINE UNITS !
$

LINE UNITS
= km !

LINE UNITS
= km"
LINE UNITS
= miles"

(LINE LENGTH 0 to 99.99 km or miles in steps of 0.01


100 to 999.9 km or miles in steps of 0.1)

LINE UNITS
= 100%"

(Only if km selected)

FAULT LOCATOR
LINE LENGTH !
$

LINE LENGTH
999.9 km !

LINE LENGTH
999.9 km "

(Only if miles selected)

FAULT LOCATOR
LINE LENGTH !
$

LINE LENGTH
999.9 miles !

LINE LENGTH
999.9 miles"

(Only if 100% selected)

FAULT LOCATOR
LINE LENGTH= 100%
$

(CT ratio - 1:1 or 10:1 to 5000:1 in 10:1 steps)


(VT ratio - 1:1 or 10:1 to 9990:1 in 10:1 steps)

( KZM range =0 to 1.360 in


steps of 0.001)
(THETA M range = 50
to 85 in 5 steps)

FAULT LOCATOR
CT RATIO =5000:1 !
$

FAULT LOCATOR
CT RATIO =5000:1"

FAULT LOCATOR
VT RATIO =9990:1 !
$

FAULT LOCATOR
VT RATIO = 9990:1"

FAULT LOCATOR MUTUAL MUTUAL COMP


COMP !
ENABLED !
$

MUTUAL COMP
ENABLED"
MUTUAL COMP
DISABLED "

(Only if MUTUAL
COMP ENABLED)

MUTUAL COMP
KZM =1.360"

MUTUAL COMP
KZM =1.360 !
$
MUTUAL COMP
THETA M = 85 !

MUTUAL COMP
THETA M = 85
"

Service Manaul
LFZP 11x

R-5911B
Chapter 2
Appendix A
Page 26 of 26

SETTING TRAP
If no change made

If change made

Note, any changes made to TIME/


DATE will not be ignored if RESET key
is pressed at the setting trap.
!
'Push SET to '
'update group'

SET

'all changes '


'updated'

#
RESET

'all changes '


'ignored'
#

Service Manaul
LFZP 11x

R-5911D
Chapter 2
Glossary
Page 1 of 6

Glossary of terms
a/b Code bit

Aspect ratio selection digital code

A/D

Analogue to digital converter

ALE

Address latch enable

BAR

Block auto-reclose

B.P.Filter

Band pass filter

COS BAR

Channel Out-Of-Service block auto reclose

CK

Clock

COS

Channel Out-Of-Service

CpAZ1

Zone 1 A-N comparator

CRX

Carrier receive

CTS

Clear to send

CTX

Carrier transmit

CVT

Capacitor voltage transformer

DCE

Data communication equipment

DEF

Directional earth fault

DEF BU

Directional earth fault back-up

DEF SOTF

Directional earth fault switch-on-to-fault

DEF T BU

Directional earth fault time delayed back-up

DSR

Data set ready

DTE

Data terminal equipment

DTR

Data terminal ready

Operation start signal for data read/write

E2PROM }

Electrically erasable and programmable read

Service Manaul
LFZP 11x

R-5911D
Chapter 2
Glossary
Page 2 of 6

EEPROM }

only memory (e squared prom)

EPROM

Electrically programmable read only memory

G/F

Ground faults

IAR

Resistive replica impedance (A phase)

IAZph

Replica impedance voltage (A phase)

LCD

Liquid crystal display

LDCpAZ1

Comparator gated with level detectors


(A phase, Zone1)

LDHSA

Level detector high set (A phase)

LDHSI0

Level detector high set (I0)

LDLSA

Level detector low set (A phase)

LDLSI0

Level detector low set (I0)

LDLSI2

Level detector low set (I2)

LDOVA

Level detector over-voltage (A phase)

LDV0

Level detector zero sequence voltage

LED

Light emitting diode

LGS

Loss of guard signal

Modem

Modulator / demodulator

Mux

Multiplexer

Osc

Oscillator

PDA

Pole dead A phase

P/F

Phase faults

PORT 0

Main processor address/data port

PORT 2

Main processor address port

Service Manaul
LFZP 11x

R-5911D
Chapter 2
Glossary
Page 3 of 6

PSB

Power swing blocking

PSD

Permissive scheme disable

PSEN *

Program store enable

RAM

Random access memory

RD *

Read

RIA

Relay inoperative alarm

RL29-31

Contact connected to case terminals 29-31

RS

Signal to select register

RS232

An internationally recognised serial


communications standard for the interface
between data terminal equipment (DTE) and data
communication equipment (DCE)

RTS

Request to send

R/W

Signal to select read or write

RXD

Received data

SOTF CNV

Switch-on-to-fault current-no-volts

SOTF EN

Switch-on-to-fault enable

SOTF TRIP

Switch-on-to-fault trip

Timer 1

Scheme dependant commissioning test point

Timer 2

Scheme dependant commissioning test point

TXD

Transmitted data

VA

Voltage ac (A phase)

Vmem A

Voltage memory (A phase)

Vpol A

Polarising voltage (A phase)

VTS

Voltage transformer supervision

Service Manaul
LFZP 11x

R-5911D
Chapter 2
Glossary
Page 4 of 6

WI

Weak infeed

WR *

Write

Z1A

Zone 1 (A phase)

Z1XS

Scheme request Zone 1 extension

Z1XT

Zone 1X time delayed Trip

Z1YT

Zone 1Y time delayed Trip

Z2A

Zone 2 (A phase)

Z2T

Zone 2 time delayed Trip

Z3A

Zone 3 (A phase)

Z3T

Zone 3 time delayed Trip

* = Signals active low

Service Manaul
LFZP 11x

Figure G-1

R-5911D
Chapter 2
Glossary
Page 5 of 6

Logic Symbols

Service Manaul
LFZP 11x

Figure G-2 Logic Symbols

R-5911D
Chapter 2
Glossary
Page 6 of 6

CHAPTER 3
INSTALLATION AND HANDLING

LFZP 11x SERIES


SERVICE MANUAL
CONTENTS

R-5911
CHAPTER 3
Page 1

1.

RECEIVING ........................................................................................................................... 2

2.

HANDLING........................................................................................................................... 2

3.

STORAGE ............................................................................................................................. 2

4.

INSTALLATION................................................................................................................... 2
4.1 Rack mounting.................................................................................................................. 2
4.2 Panel mounting ................................................................................................................. 3
4.3 Earthing ............................................................................................................................ 3

5.

HANDLING PRECAUTIONS, STATIC ELECTRICITY DANGERS ................................ 3

6.

NOTES ON WIRING ............................................................................................................ 4

7.

INPUT MODULE CALIBRATION ...................................................................................... 4

LFZP 11x SERIES


SERVICE MANUAL

R-5911
CHAPTER 3
Page 2

INSTALLATION

Section

1.

RECEIVING

Remove the relay from the container in which it is received and inspect for obvious
damage. If damage has been sustained in transit, a claim should be made immediately
to the transport company concerned and a report sent to the nearest GEC Alsthom
Protection and Control office or agent.

Section

2.

HANDLING

The relay in its case is extremely robust and no special precautions are necessary.
However, to prevent the ingress of dirt, it is strongly advised that modules, or PCBs are
not removed from the case. If the front plate is opened, care should be taken when it is
reclosed, to fully locate the 64 way connector between the processor PCB (slot #11)
and the front plate PCB, before the front plate screw is tightened. This can be achieved
by pressing firmly on the frontplate directly infront of the connector.

Section

3.

STORAGE

If not required for immediate use, return the relay to its original wrapper and carton and
store in a clean dry place. The silica gel unit supplied with the relays delivered outside
the United Kingdom should be heated at 60-70C for one hour before being replaced.

Section

4.

INSTALLATION

Relays should be installed in a location free from excessive vibration. The relay cases
can be supplied for either rack or panel mounting.

4.1

Rack mounting
Relays for rack mounting are supplied in cases designed for housing in standard 19 inch
(483 mm) racks.

LFZP 11x SERIES


SERVICE MANUAL

4.2

R-5911
CHAPTER 3
Page 3

Panel mounting
Relays can be supplied for either flush or semi-projecting panel mounting. Panels
should be vertical to within 5. Dimension, fixing details and cut-out sizes for the cases
are shown in the relevant case outline drawing.
Flush mounted relays are inserted from the front into the panel cut-out and secured by
means of nuts and bolts through holes in the upper and lower flanges in the relay and
corresponding holes in the panel.
Semi-projecting mounted relays are fitted with an extending collar and are otherwise
secured using the same means as those described for the flush mounted relays.
When installation is complete the relays must be set up and commissioned as described
in the relevant instructions.

4.3

Earthing
The relay case earthing terminal on the rear of the relay case must be connected to earth
(ground).

Section

5.

HANDLING PRECAUTIONS, STATIC ELECTRICITY DANGERS

The modules/boards in Optimho contain circuitry which consists of devices that have
been manufactured by the CMOS process (Complementary Metal Oxide Silicon).
CMOS devices are susceptible to damage due to static discharge and for this reason it is
essential that the correct handling procedure is followed:The following procedure is recommended when handling all modules:1.

Before removing modules from the Optimho case, the operator should firstly
ground himself to the relay case, in order to remove any static charge
difference between the operator and the Optimho.

2.

Modules should only be handled by holding the module frontplate, or board


edges, the board assemblies must not be "grasped".

3.

Modules must not be passed from one person to another unless both persons
are grounded.

4.

Do not place modules in polystyrene trays.

LFZP 11x SERIES


SERVICE MANUAL

Section

6.

R-5911
CHAPTER 3
Page 4

Notes on wiring

In the event of a power supply failure access is required to the back pack. This would
be assisted if the wiring loom does not run across the back pack.

Section

7.

Input module calibration

The calibration of the boards in the input module is related to the specific current and
voltage transformers in that module. Therefore, under no circumstances should the
boards be replaced with boards from another module without the module being
recalibrated.

CHAPTER 4
COMMISSIONING

Service Manual
LFZP11x

R5911D
Chapter 4
Contents
Page 1 of 3
Page

1.
2.
3.
3.1
3.2
3.3
3.4
4.
4.1
4.2
4.3
4.4
4.5
4.5.1
4.5.2
4.5.3
4.6
4.6.1
4.6.2
4.6.3
4.6.4
4.6.5
4.6.6
4.6.7
4.6.8
4.7
4.7.1
4.7.2
4.7.3
4.7.4
4.7.5
4.8
4.8.1
4.8.2
4.8.3
4.9
4.9.1
4.9.2
4.9.3
4.9.4
4.10
4.11
4.12
4.13

GENERAL NOTES
TEST EQUIPMENT REQUIRED
PRELIMINARY INSTRUCTIONS
Wiring
Rating details
CT shorting contacts
Insulationtest
SECONDARY INJECTION TESTS (MAIN)
Isolation
Initial Checks
Settings
Test plugs
Level detector checks
Voltage level detectors
Fixed current level detectors
Biased high set and low set residual current level detectors
Reach and fault location checks
Fault locator
Ground faults zone 1
Phase faults zone 1
Zone 1X reach (If applicable)
Zone 1Y reach (If applicable)
Zone 2 reach checks
Zone 3 reach checks (Not fitted on LFZP 114)
Resistive reach check (If quadrilateral characteristic is applicable) 16
Operation times
Zone 1 operation times
Zone 1X operation time (If applicable)
Zone 1Y operation (if applicable)
Zone 2 operation time
Zone 3 operation time
Power swing blocking checks
Zone 6 reach check
TZ6 time
Simulated power swing with blocking checks
Voltage transformer supervision
Operation on zero sequence volts
Timing check
Instantaneous indication
Blocking check
Switch on to fault
Memory feature (Synchronous polarising)
Loss of load accelerated trip feature
Fault location using mutual compensation

1
1
2
2
2
2
6
6
6
7
7
8
8
8
9
10
11
12
13
14
14
14
15
15
16
16
17
17
17
17
18
19
19
20
20
20
20
20
21
21
21
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26

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LFZP11x

5
5.1
5.2
5.2.1
5.2.2
5.2.3
5.2.4
5.3
5.3.1
5.3.2
5.3.3
5.3.4
5.3.5
5.3.6
5.3.7
5.3.8
5.4
5.4.1
5.4.2
5.4.3
5.4.4
5..5
5.5.1
5.5.2
5.5.3
5.6
6
6.1
6.2
6.3
6.3.1
6.3.2
6.4
6.4.1
6.4.2
6.4.3
6.4.4
6.4.5
6.4.6
7
7.1
7.2
7.3
7.4

SECONDARY INJECTION TESTS (SCHEME)


Zone 1 extension
Permissive under-reach
Aided trip check
Signal send checks
TDW timer (Unblocking scheme only)
Channel out of service
Permissive overreach
Aided trip check
Signal send checks
TP and TD timer checks
TDW timer (unblocking schemes only)
Echo feature (POR 1 or POR 2)
Weak infeed echo (POR 2)
Weak infeed trip (POR 2) if selected
Channel out of service
Blocking scheme (see section 5.5 for blocking 2 scheme)
Measurement of TP
Measurement of TD
36
Signal send check
Channel out of service check
Blocking 2 scheme
Measurement of TP and distance aided trip test
Measurement of TD and signal start check
Channel out of service check
Signalling channel check
DIRECTIONAL EARTH FAULT (DEF) IF FITTED
Current level detectors
Mag inrush detector
Back up time delay
Current sensitivity
Operation time
DEF aided tripping
POR 1 or POR 2 1 unblock
POR 2 (any version)
Blocking
Blocking 2
Aided trip check
Channel out of service check
LIVE SYSTEM CHECKS
Signalling channel check
Trip test
Final setting checks
On load checks

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Contents
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29
29
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30
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31
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33
34
34
35
35
35
36
37
37
37
38
39
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39
40
40
41
41
41
42
44
44
47
47
47
48
48
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7.4.1
7.4.2
7.4.3

R5911D
Chapter 4
Contents
Page 3 of 3
Page

Voltage transformer checks


CT/VT phasing check
Directional check

COMMISSIONING TEST RESULT SHEETS

Figure 1
Figure 1a
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
Figure 7
Figure 8a
Figure 8b
Figure 9
Figure 10
Figure 11

Recommended MMLG test block connections for optimho 11X


relays
Normal test plug connections for secondary injection
Test plug connection for on load test CT/VT phasing
VTS instataneous indication
Memory feature (Synchronous polarising)
Test plug connections for secondary injection test of mutual
compensation setting on the fault locator
Connections to prove polarity of panel wiring for mutual
compensation on the fault locator
Def simulated mag inrush current
Lec characteristics
American Characteristics
Determination of the load angle from load information
Vector diagram on load directional check
Test plug connections for on load test current reversal

51
51
53
57

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Chapter 4
Page 1 of 70

Section 1. GENERAL NOTES


The commissioning engineer should be supplied with all the required settings for
the relay.
The type of test set used for commissioning should ideally be capable of producing
three phase dynamic faults, ie. capable of switching from a prefault condition
simulating normal load conditions, to that of a fault condition. It is possible to test
the relay with non-dynamic test equipment, though some care must be exercised in
the interpreting of the test results, as a non-dynamic test set may give rise to larger
than expected errors. It is possible to test some functions of the relay with nondynamic test equipment.
Although not essential, the use of a computer running the Opticom software may
aid with commissioning the relay.
The tolerances quoted throughout this chapter make no allowance for
instrumentation errors.

Section 2. TEST EQUIPMENT REQUIRED


a)

1 three phase dynamic test set

b)

1 interval timer capable of being triggered by a contact or a 5V signal


and able to measure dwell times.

c)

2 Multimeters (20,000 /V on dc ranges)

d)

1 high impedance digital voltmeter

e)

1 variable auto transformer

f)

1 variable resistor 0-200

g)

3 double pole switches

h)

1 variable resistor 10k

i)

1 Optimho monitor point box

j)

1 dc. power supply (if panel supply unavailable)

k)

2 MMLB01 test plugs (if MMLG test blocks are used)

l)

1 phase rotation meter

m) 1 phase angle meter

} capable of
} supplying
} rated current

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Page 2 of 70

n)

1 electronic insulation tester (if panel wiring is to be checked)

o)

2 diodes rated 10A at 600V (only required if the magnetising inrush


detector test is required to be done when the DEF is fitted)

Section 3. PRELIMINARY INSTRUCTIONS


Test result sheets are provided in Appendix B
3.1

Wiring
Check that the external wiring is correct to the relevant external connection
diagram and/or scheme diagram. If test blocks type MMLG are provided, the
connections should be checked to the scheme diagram particularly that the supply
connections are to the live side of the test block (coloured orange and allocated
with odd numbered terminals 1, 3, 5, 7 etc.). See Figure 1 for recommended
connections.

3.2

Rating details
Check that the ratings for frequency, current, ac volts, auxiliary dc supplies Vx(1)
and Vx(2) are correct. These will appear on the nameplate on the front of the
relay.
Note:

3.3

Auxiliary dc supply Vx(1) and opto isolator supply Vx(2) may be


different. If Vx(2) supply is 220/250V an external box GJ0229
002 containing 7 resistors will be required.

CT shorting contacts
Observing electro static discharge precautions (i.e. wear an earthed wrist strap or
touch earth and only handle the module by the front plate and board edges) and
ensuring that all dc supplies are isolated from the relay, open the relay front panel.
Remove the input module (on the right hand side using the handle provided) and
check that the contact block within the case is fitted with CT shorting contacts. The
following pairs of terminals will be provided with shorting facilities 19 and 20, 21
and 22, 23 and 24, 25 and 26, 27 and 28. If the MMLB test blocks are fitted the
relay is easily isolated from its supply CTs using Figure 2 Test Plug 1 connection.

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Page 3 of 70

DIRECTION OF POWER FLOW


FOR OPERATION
P2

P1

S2

MMLG 01
TEST BLOCK 1

S1

IA
IB
IC

SIGNAL
SEND

IN
DEF
CURRENT
POLARISATION

P2

P1

S2

S1

19

20

21

22

10

23

11

12

24

13

14

13

15

16

14

17

18

49

19

20

51

21

22

25

23

24

26

25

26

27

27

28

28
60
64
68

NOTE:
IF DEF CURRENT POLARISATION
IS NOT REQUIRED THE SAME
INPUT TERMINALS CAN BE USED
TO PROVIDE MUTUAL COMPENSATION
FOR THE FAULT LOCATOR

72
76
80
MMLG 01
TEST BLOCK 2

84

58

62

BREAKER OPEN

66

CHANNEL OUT OF SERVICE

70

CARRIER RECEIVE

10

74

RELAY BLOCKED

11

12

78

13

14

15

16

17

18

77

19

20

79

VA
VB

21

22

15

23

24

16

VC
VN

25

26

17

27

28

18

RESET ZONE 1 EXTENSION / LOSS OF GUARD


* SINGLE POLE OPEN

DC SUPPLY

ANY TRIP

* INHIBITS PSB,DEF

Figure 1 Recommended MMLG test block connections for Optimho 11X relays

O
P
T
I
M
H
O

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MMLB 01
TEST PLUG 1
IA
IB
IC

IN
I pol
DEF OR
FAULT LOCATOR
MUTUAL COMPENSATION

10

12

11

14

13

16

15

18

17

20

19

22

21

24

23

26

25

28

27

THESE CONNECTIONS
MUST BE MADE BEFORE
THE TEST PLUG IS
INSERTED

MMLB 01
TEST PLUG 2

CHECK VOLTS V
X1
BEFORE LINKING

THESE CONNECTIONS
MUST BE MADE AFTER
THE TEST PLUG IS
INSERTED

Figure 1a

VA
VB
VC
VN

10

12

11

14

13

16

15

18

17

20

19

22

21

24

23

26

25

28

27

Normal test plug connections for secondary injection

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Page 5 of 70

MMLB 01
TEST PLUG 1
2

10

12

11

14

13

16

15

18

17

20

19

22

21

24

23

26

25

28

27

CURRENT COIL
PHASE ANGLE METER
+
-

THESE CONNECTIONS
MUST BE MADE BEFORE
THE TEST PLUG IS
INSERTED

MMLB 01
TEST PLUG 2
2

10

12

11

14

13

16

15

18

17

20

19

22

21

24

23

26

25

28

27

VOLTAGE COIL
PHASE ANGLE METER
+
-

Figure 2 Test plug connection for on load test CT / VT phasing

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Page 6 of 70

Pass current through each pair of contacts to ensure a circuit is indicated or check
that a low resistance is measured.
The equipment label is on the back of the front panel and gives PCB/Module
identification numbers. These numbers are needed if replacements are ever
required. The external connection diagram number is also given (10 LFZP11 0 )
SAFETY ADVICE
DO NOT OPEN CIRCUIT THE SECONDARY CIRCUIT OF A CURRENT
TRANSFORMER SINCE THE HIGH VOLTAGE PRODUCED MAY BE LETHAL
AND COULD DAMAGE INSULATION.
When type MMLG test block facilities are installed it is essential that the sockets in
the type MMLB01 test plug which correspond to the current transformer secondary
windings are LINKED BEFORE THE TEST PLUG IS INSERTED INTO THE TEST
BLOCK. Similarly, an MMLB02 single finger test plug must be terminated with an
ammeter BEFORE IT IS INSERTED to monitor CT secondary currents.
3.4

Insulation test
This test may be done by the main plant contractor at an earlier date. An
electronic or brushless insulation tester should be used having a dc output not
exceeding 1000V.
Deliberate circuit earthing links removed for these tests must subsequently be
replaced. The relay and associated wiring may be tested between :
a)

All electrical isolated circuits

b)

All circuits and earth

Accessible terminals of the same circuit should first be strapped together.

SECTION 4. SECONDARY INJECTION TESTS (MAIN)


4.1

Isolation
All the relay contacts can be prevented from operating while the rest of the relay
functions normally and gives indications also signals for operation times may be
taken from the monitor point box. It is, however, necessary to check the operation
of contacts during commissioning so alternative trip isolation must be obtained as
necessary.
It is possible to inhibit all contacts, except ANY TRIP if only secondary injection tests
are being performed rather than full commissioning. See Chapter 2 Appendix A
for the menu tree plan.

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4.2

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Page 7 of 70

Initial checks
If the dc supplies are available on the panel they should be checked for correct
polarity and voltage before linking through to the relay. If the panel supply is
unavailable, a suitable supply should be connected to the relay side of the test
block.
On power up it will be observed that the red and yellow LED's (trip and alarm
respectively) will flash on and then off once, followed by the green LED (relay
available) lighting and remaining on. The power up process takes about 700ms.
Check the Relay Inoperative Alarm contact (RIA) is open.
Note 1:

On power up the LCD will display the prompt "Please Set CALENDAR
CLOCK". It is not necessary to conform to this prompt, however, to
prevent confusion it should now be set.

It should be noted that if the dc auxiliary supply Vx(1) is removed the CALENDAR
CLOCK will have to be reset.
Note 2:

4.3

If after power up the relay inoperative alarm contact closes and there is
an error on the LCD, investigation is required. If the watchdog
system has found a problem an appropriate error message will be
seen on the LCD.

Settings
When commissioning an Optimho for the first time the engineer should allow an
hour to get familiar with the menu.
All settings on the optimho are by means of a built in keypad, and the settings
should now be entered. It is recommended that the final service settings are used
during commissioning. The software version number should be checked (in menu
under identifiers), reference should then be made Chapter 2 output connections
for standard models, or Chapter 5 for special models, for the contact
configuration tables. The chosen contact configuration should then be checked
against the wiring diagram.
Note:
The menu returns to the `default display' or `press set to update
changes' if left in another part of the menu for 15 minutes or longer.
The relay can store eight independent groups of settings identified as group 1 to 8.
Ensure that group 1 is selected for the first or only new set of settings to be
entered. The user can select the default display to be either a blank display, the
group identification code or the active group number selected.

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The user has to decide what commissioning is necessary for any additional setting
groups that will be used. If only different zone reaches are involved then the user
may select to test the appropriate settings. Alternatively having proved that correct
settings can be selected by the menu then for additional groups of settings it may
only be necessary to obtain a record or printout of the selections. Alternatively a
complete repetition of the commissioning procedure for each additional group
used may be required by some users.
4.4

Test plugs
If GEC ALSTHOM T&D P&C MMLG 01 Test Blocks are installed, it is
recommended that they are wired as shown in Figure 1 and the test plug type
MMLB 01 wired for normal secondary injection as shown in Figure 1a.

4.5

Level detector checks

4.5.1

Voltage level detectors


Each phase to ground input voltage is monitored and the pick up of the level
detector is fixed at 44.5V ( 10%).
Select monitor option 06. (The protection logic is fully functional when in monitor
options).
Apply volts in turn to each voltage input and determine the pick up and drop off of
each level detector.
Pick up is indicated by a `1' appearing on the LCD in the appropriate column as
shown below.
LCD POSITION/SOCKET NO
MONTIOR

OPT 06

Drop off should be within 20% of pick up.


The 25 way Optimho monitor point box may also be used. This should be plugged
into the `Parallel' socket on the front of the relay. The numbered sockets of the box
correspond exactly to the numbers indicated on the LCD. A voltage of 5V will
appear on the appropriate socket, No 22 being OV. A high impedance digital
voltmeter must be used.

The monitor point box has the added advantage that the data is on the box all the
time once a monitor option has been selected even if the relay is in another part of
the menu.

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4.5.2

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Chapter 4
Page 9 of 70

Fixed current level detectors


i) Low set
Each phase current is monitored, and the pickup of the level detector is dependent
on the setting of KZPh, the most sensitive value being 5% of In.
The pick up is given by:
5 x 1
x In Amps 10%
100 KZPh
If the supply contains significant harmonics results outside this tolerance may be
obtained.
Select monitor option 06
Inject current in turn into each pair of phase termination's and determine the pick
up and drop off of each level detector. The drop off should be within 20% of pick
up.
LCD POSITIONS/SOCKET NO
MONTIOR

OPT 06
Note:

The biased neutral level detector will operate at the same value. If the
biased neutral low - set level detector operates, for a period of five
seconds continuously, without the operation of one of the following :
a)

Any pole dead

b)

Any zone comparator

c)

The Vo level detector

d)

Single pole open opto - isolator

then the relay will respond by closing the "Relay Inoperative Alarm" contact and
extinguishing the "Relay Available" LED. The main micro controller writes the
message:
,
,
, ERROR# IFAIL ,
to the fault diagnostic page on the LCD

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R5911D
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Page 10 of 70

The relay calculates the neutral current from the vector addition of phase currents.
Thus the message may be created during commissioning but will automatically
reset and can be ignored in these circumstances.

When an 'error' message is given closure of the inoperative alarm contact only
means investigation is necessary NOT that the relay has been taken out of service.
ii) High Set
current setting is given by:
7.5 x 1 x In Amps 10%
100 KZPh
Select monitor option 07
Inject current as above and determine the pick up and drop off. Drop off to be
within 20% of pick up.
LCD Position/Socket No
MONTIOR

OPT 07

4.5.3

Biased high set and low set residual current level detectors
The biasing only comes into action when a minimum phase difference current is
exceeded. The residual signal is derived by summing the vectors of the voltages in
the relay which are proportional to the phase currents.
The operation level when biasing varies directly with the highest phase difference
current until a limit is reached. The minimum operate level varies inversely with
KZPh. In commissioning it is only necessary to check this fixed level.

i) Low set
The minimum operate current is given by:
5 x 1
x In Amps 20%
100 KZPh
Select monitor option 06

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R5911D
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Inject current in turn into each pair of phase termination's and determine the pick
up and drop off of each level detector. The drop off should be within 20% of pick
up.
LCD POSITIONS/SOCKET NO
MONTIOR

OPT 06

9
N

ii) High set


The minimum operate current is given by:
16 x 1 x In Amps 20%
100 KZPh
Select monitor option 07
Inject current as above and determine the pick up and drop off. Drop off to be
within 20% of pick up.
LCD Position/Socket No
MONTIOR

OPT 07

4.6

9
N

Reach and fault location checks


Connections and preliminaries
The relay should now be connected to equipment able to supply phase to neutral
volts and current in the correct phase relation for a particular type of fault on the
selected relay characteristic angle. The facility for altering the loop impedance
(phase + ground fault compensation or phase-phase) presented to the relay is
essential, this may be a continuous adjustment or steps of around 1% in the
voltage or current.
Connect the test equipment to the relay via the test block(s) taking care not to open
circuit any CT secondary. If MMLG type test blocks are used, the live side of the test
plug must be provided with shorting links before it is inserted into the test block.
VT Supervision should be set "TO ALLOW TRIP", giving indication only.
It may prove useful if "START INDICATION" is "ENABLED" which will speed up the
process of determining the reaches.

4.6.1

Fault locator

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If the fault locator is fitted checks can be done on its location readings while
checking Zone 1 reaches. The location reading is based on the secondary ohm
setting being unaffected by whatever CT and VT ratios are selected in the fault
locator part of the menu its only reach setting KZF sets the line length in ohms.
Locations can be selected to be given in percentages, miles or kilometres.
If Zone 1 is set to 80% of the line then KZF is set to 1.25 x KZ1.
If miles or kilometres have been set just multiply the line length by the above
percentage to check the location given for the Zone 1 reach.
Pressing the `ACCEPT/READ' key after a fault brings up the fault location, the
alarm LED then ceases to flash and the indications could be reset, however,
continued pressing of the `ACCEPT/READ' key will display all the pre-fault and
fault information. Time delayed trips will have no pre-fault information available if
starts are not enabled.
Reverse faults will give a negative reading but locations given should be regarded
as a guide only. SOTF trips will give a location and the fault information will
indicate the faulted phase or phases.
Note: The fault locator has five cyclic buffers for acquired data. At any moment in
time one buffer must be in use for acquiring new data thus the fault locator can
store raw data for up to four faults.
If more than four faults occur within a 20 second period the fault locator may
ignore faults until a fault data buffer is free. In this situation if data from a previous
fault exists in the buffer it will be available with the new fault type and time
information which will always be correct.
Note: If mutual compensation is to be used on the fault locator see Section 4.13.

4.6.2

Ground faults zone 1


If the Zone 1 Extension or Blocking scheme is selected read 5.1 or 5.4 before
proceeding.
Commence with connections for an A-N fault. The appropriate loop impedance is
given by:
(KZPh + KZN) x KZ1 x 5 OHMS
In

(See later if THETA Ph and THETA N


differ by more than 5)

(See note 2 for LFZP113)


Apply an impedance slightly greater than above momentarily to the relay. If START
INDICATION has been ENABLED and impedance is outside Zone 1, the LCD will
indicate START AN (for the enabled forward zones). DEF start will also be obtained
if fitted and enabled. If START INDICATION has been BLOCKED, the LCD will
remain unchanged.

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Make small adjustments, say 1%, to the impedance and re-apply to the relay until
the highest impedance which gives the indication Z1 AN occurs.
Note 1:

If the Circuit Breaker Open optical isolator input is connected then all
faults can appear as SOTF. Appropriate action must be taken to
prevent the optical isolator input from being energised. This is easily
done if the recommended test blocks are used.

Note 2:

The loop impedance required for the LFZP113 version is half that given
by all the formulae in Section 4.6 as the nameplate formulae have a
divide by 2 factor.

It will also be seen that the ALARM LED will flash continuously and the TRIP LED will
light. The trip may now be accepted by pressing the ACCEPT/READ key (two
presses will be necessary if the fault locator is fitted, the second press will only be
effective when the fault location calculation is finished, this may be 3 seconds for
one fault and much longer for a series of faults) which will cause the ALARM LED
to stop flashing and become continuously illuminated. Pressing the RESET key will
extinguish the ALARM and TRIP LED's and clear the fault information on the LCD.
However, any new event is automatically displayed and the previous 3 stored for
menu recall.
The measured impedance should be within 10% of the calculated value assuming
the angle of the impedance presented is within 5 of THETA Ph and N as set on
the relay. If the angle difference is greater then KZN and KZPH must be added
vectorially before applying the appropriate zone multiplier.
Check the appropriate contacts operate, for single or three phase tripping as
selected. In particular check the ANY TRIP contact and the Block Auto-reclose (BAR)
contact.
Change the direction of the current and ensure that the relay does not operate
(check with a close up fault briefly applied).
Repeat the above tests for the other two phases i.e. B-N and C-N.
4.6.3

Phase faults Zone 1


The appropriate loop impedance is now given by:
2 x KZPh x KZ1 x 5 OHMS
In
Carry out the tests as for ground faults for A-B, B-C and C-A faults. Under
commissioning conditions the measured values should be within 10% of the
calculated values.

4.6.4

Zone 1X reach (If applicable)

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The ground fault loop impedance required is given by:


(KZPh + KZN) x KZ1X x 5 OHMS
In
and for phase to phase faults the loop impedance required is given by:2 x KZPh x KZ1X x 5 OHMS
In
The reach for each phase to ground and phase to phase element of the relay
should be checked and the operation of the appropriate contacts confirmed.
4.6.5

Zone 1Y reach (If applicable)


The ground fault loop impedance required is given by:
(KZPh + KZN) x KZ1Y x 5 OHMS
In
and for phase to phase faults the loop impedance required is given by:
2 x KZPh x KZ1Y x 5 OHMS
In
The reach for each phase to ground and phase to phase element of the relay
should be checked and the operation of the appropriate contacts confirmed.

4.6.6

Zone 2 reach checks


The ground fault loop impedance required is:
(KZPh + KZN) x KZ2 x 5 OHMS
In
and for phase to phase faults the loop impedance required is given by:
2 x KZPh x KZ2 x 5 OHMS
In
The reach for each phase-ground and phase-phase element of the relay should be
checked and the operation of the appropriate contacts confirmed.

4.6.7

Zone 3 reach checks (not fitted on LFZP114)


Zone 3 has the facility for setting forward and reverse reaches of the line angle up
to the same impedance. There are three possible shapes of characteristic available
these being circular or lenticular for phase faults or ground faults plus
quadrilateral for ground faults.
The aspect ratio of the lenticular characteristic can be set to either 1.0, 0.67 or
0.41.

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The quadrilateral resistive reach will be dealt with later.


The ground fault loop impedance for forward checks is:
(KZPh + KZN) x KZ3 x 5 OHMS
In
and for reverse ground faults is :
(KZPh + KZN) x KZ3' x 5 OHMS
In
The phase fault loop for forward checks is
2 x KZPh x KZ3 x 5 OHMS
In
and for reverse phase faults
2 x KZPh x KZ3' x 5 OHMS
In
The reach checks should be performed for each element of the relay and the
appropriate outgoing contacts checked.
4.6.8

Resistive reach check (If quadrilateral characteristic is applicable)


Checks are done using resistive faults, thus in the forward direction all zones will
operate at the same loop impedance.
The loop resistance for forward faults will be
RR = KR x 5 OHMS
In

(This reach is common to all zones but


only Z1 will be indicated. See note below).

and for reverse resistive faults (applicable to Zone 3 only) will be


RR' = KR x 6 OHMS
In
The checks should be done for all phase to ground faults and results should be
within 15% of the selected settings.
Note:

Indication locks to first zone giving trip and can only change when a
new event occurs, therefore Zone 1 indication of operation will be
given on the LCD, for Zone 2, indication will be given by selecting
monitor option 12 and observing LCD positions 2, 3 and 4 for A, B
and C ground faults respectively. For Zone 3, monitor option 13
should be selected, LCD positions 2, 3 and 4 indicating A, B and C
ground faults respectively.

4.7

Operation times

4.7.1

Zone 1 operation times

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Zone 1 operation times should be checked by applying a fault at 50%


(approximately) of Zone 1 reach.
An interval timer should be started when the fault is applied and stopped by a
suitable pair of contacts.
The following points should be noted:
a)

To obtain 'correct' operating times, it is essential to use dynamic tests


starting with all phase to neutral voltages above the level detector
setting. If this is not done, filters in the voltage and current circuits will
already be switched in and operation times will be slower up to
20ms.

b)

If the polarising quantities are not correctly provided by the test set, some
slower times may be measured. This may be noticed when doing phase
to phase faults.

c)

Times vary with the point-on-wave of fault application. It is thus


suggested that 10 operations be done for each type of fault and the
mean value recorded.

d)

Times vary with the type of characteristic, typical times being


(a) Shaped Mho 15-30ms
(b) Quadrilateral 20-35ms

If the polarising quantities are not correct or if the voltage filters are in initially
times may increase by 10-20ms. Times on 60Hz relays are approximately 10%
faster.
4.7.2

Zone 1X operation time (If applicable)


Apply a fault midway between Zone 1X and the next inward zone and check the
operation time. This need only be done for one type of fault. The time measured
will be that of the software timer plus the comparator time plus the output contact
operation
The actual measured time should be within 60ms of the set time. Check for correct
indication and contact operation.
Note:

4.7.3

Z1X does not have to be smaller than Z1Y but they must both be set
smaller than the largest forward looking zone. Time stepped zone
operation times include the operation times of two comparators.

Zone 1Y operation (if applicable)


Apply a fault midway between Zone 1Y and the next inward zone and check as in
4.7.2 Check for correct indications and contact operations.

4.7.4

Zone 2 operation time

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Apply a fault midway between Zone 2 and the next inward zone and check the
operation time as in 4.7.2 The measured time should be within 40ms of the set
time. Check for correct indication and contact operation.
4.7.5

Zone 3 operation time


Apply a fault midway between Zone 3 and the next inward zone and check the
operation time as in 4.7.2
Check for correct indication and contact operation.

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Power swing blocking checks


If this feature is to be used it should now be enabled. Also enable the power swing
test within the commissioning menu. Remember the selection is not made until the
setting trap update is done
The feature works for comparators on A-B only and utilises Zone 6. the outer
boundary, Zone 6, can be set around Zone 2 or Zone 3.
A power swing is detected when the transfer time of an impedance from Zone 6 to
the inner zone exceeds the setting of Zone 6 timer TZ6.
Note:

If Zone 6 is set around Zone 2 and Zone 3 is reverse looking, it is not


possible to completely block Zone 3.

If set around Zone 3, and the Lenticular characteristic is selected, it is usual to have
the aspect ratios set the same.
The recommended settings for the Power Swing Blocking characteristic Zone 6
forward and reverse reach can be obtained from the following expressions:
With Zone 3 set looking in the forward direction:
Z6 forward reach = 1.3 x Z3 forward reach
Z6 reverse reach = 0.3 x Z3 forward reach + Z3 reverse reach
With Zone 3 set looking in the reverse direction:
Z6 forward reach = 1.3 x Z2 forward reach
Z6 reverse reach = 0.3 x Z2 forward reach
With these impedance settings, the recommended timer setter TZ6 is 50ms.
4.8.1

Zone 6 reach check


The loop impedance required for checking the forward boundary is given by:
2 x KZPh x KZ6 x 5 OHMS
In
and for the reverse boundary:
2 x KZPh x KZ6' x 5 OHMS
In
Select monitor option 08.
The above impedance's must be prepared as A-B faults. The boundary may be
determined either by momentarily applying the `fault' or by gradually decreasing
the impedance until the A-B comparators pick up as indicated.
LCD POSITION/SOCKET NO

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MONTIOR
OPT 08

8
1

The measured impedance should be within 10% of the calculated value.


4.8.2

TZ6 Time
Select monitor option 08 and insert the monitor box into the "parallel" socket on
the front of the relay. Arrange a timer capable of working off 5V levels to start on
socket 8 (going 0 to 5V) and stop on socket 9 (going 0 to 5V), 22 being common.
(The timer should be set to `Break for Start' and `Break for Stop').
Apply an impedance midway between Zone 6 and Zone 2 or 3 as appropriate.
The timer will start when comparator A-B picks up and will stop when TZ6 time has
expired.
The time measured should be TZ6 10%

4.8.3

Simulated power swing with blocking checks.


Return to the default display `Power Swing Test Enabled'.
It is now necessary to simulate a power swing for the A-B element of the relay.
Apply an impedance just outside Zone 2 or 3 as appropriate and reduce it without
switching off (say 1% steps) until power swing indication is given, check that the
PSB alarm contact also closes. Re-select monitor option 08 which makes available
information on all zones giving trip outputs after any set time delays:
LCD Position/Socket No
MONTIOR

OPT 08

Z1

Z1XT

Z1YT

Z2T

Z3T

With this it is easy to check which zones are being blocked by the PSB feature in
the menu selection. The power swing will be simulated by applying an A-B fault
just outside Zone 3 or Zone 2 as appropriate, moving the fault to just inside the
zone and then moving it again to inside Zone 1.
Apply the fault used in 4.8.3 and again move in to just inside Zone 2 or Zone 3 as
appropriate and then move the fault again to inside Zone 1 in less time than the
lowest time delay setting.
Only the forward zones not blocked by the PSB feature will change form 0 to 1 on
the LCD display.
Note:

It may help to provide a temporary increase to the time delays.

If a close up fault is applied from a volts only condition then all forward zones
enabled in the 'distance' part of the MENU will be seen as operating. Indications
for operation of the time stepped comparator zones are latched in this monitor
option.

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Voltage transformer supervision


Operation occurs when zero sequence voltage above a set level is detected without
any zero sequence current being detected above a set level. If set `TO ALLOW
TRIP', instantaneous indication will be given if operation conditions are satisfied
and a comparator is operated, otherwise time delayed indication will be given. If
set for blocking, blocking can take place instantaneously if a comparator operates
and the indication will be (RELAY BLOCKED V~ FAIL). The relays have the facility
for self resetting of the VTS alarm contact and relay blocking. This feature can be
enabled or disabled via the menu.

4.9.1

Operation on Zero sequence volts


The operation time is 5.5 seconds 0.1 seconds. The zero sequence voltage
setting is 15% of 63.5V, thus the required voltage reduction on one phase is 45%
of 63.5V (28.6V 20%).
Apply balanced 3 phase-neutral volts and reduce the voltage on one phase until
V~ FAIL indication is given. The reduction in one phase-neutral voltage required
for operation should be between 22.9 and 34.3 volts, (ie the measured voltage
about 29 to 40 volts).

4.9.2

Timing check
Timing is checked by using a double pole switch to remove one healthy voltage
and start a timer which is stopped by the VTS alarm contact. The time obtained
should be as stated above.

4.9.3

Instantaneous indication
To perform this check it is necessary to provide the relay with zero sequence
voltage but no zero sequence current, and a Zone 1 comparator operation.
This can be acheived by applying a prefault condition of two phases of nominal
voltage, and one phase where the voltage is below the VTS detector setting. The
current inputs can either be zero, or a balanced condition. Then before the VTS 5.5
second time delay has elapsed switch to a Zone 1 fault condition. Instantaneous V
~ FAIL indication should be given.
For a test with three phase volts and a single phase

4.9.4

Note 1:

If a pole dead is seen before and not during the fault VTS operation
will be delayed by 240ms.

Note 2:

Any fault locator position information should be ignored during these


tests due to the abnormal connections.

Blocking check
If VTS is now set to BLOCK TRIP, check that the indication RELAY BLOCKED is
obtained when the above conditions are satisfied and no trip is given. The `RELAY

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BLOCKED' indication can not be reset or other information viewed (other than date
and time of V~ FAIL) until normal volts are restored.
If self resetting has been selected in the menu the RELAY BLOCKED indication will
automatically reset when volts are restored leaving the V~ FAIL indication only.
If `blocking' is to be used only select it after all tests are finished.
4.10

Switch on to fault
The feature is enabled when all poles have been dead for either 200ms or 110s
as selected by the menu.
When the poles dead signal goes off, the feature remains available for 250ms.
To check, go from a poles dead condition to a fault condition and arrange a timer
to start when the fault is applied and to stop when the SOTF Alarm contact closes.
Confirm SOTF indication is given. Note, no phase indication is given, however any
phase information from the last event is retained.
The time obtained should be less than 40ms.
(Times will be faster if comparator operation is selected for SOTF trips).
If SOTF is set to be enabled after 110 sec then this period of time must elapse
before another shot is attempted.
If Busbar VTs are to be used, BREAKER OPEN opto isolator input should be
energised. Faults can then be applied in the normal way giving SOTF indication
and the times already indicated.

4.11

Memory feature (synchronous polarising)


This can only be done with a dynamic type of test equipment. The memory is
mainly to deal with 3 phase close up faults but is made to run out when any
voltage level detector resets or when any comparator operates. There is nominally
16 cycles of memory polarising which is derived from B phase volts. We thus have
to satisfy the above conditions and make the relay behave as though it is seeing a
three phase close-up fault.

For a test set with three phase volts and three phase current this can be achieved
by applying a prefault condition, for at least 500ms, then switch to a fault
condition. The fault condition must have balanced three phase current above the
high set level detector setting, and the voltage must collapse to zero on all three
phases.
For a test set with three phase volts and single phase current, the test can be
carried out using a B-N fault condition. The A and C phase voltage inputs should
be removed, the connect the relay Va and Vc inputs to the B phase input, as shown
in Figure 4. A prefault condition should be applied for at least 500ms, the switch

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to a B-N Zone 1 fault condition where the current is above the high set level
detector setting, and the voltage collapses to zero.
For both cases the Memory Time can be measured by measuring the dwell time of
the distance Trip contact (the dwell time is measured by arranging the timer to
start when the contact closes, and stop when the contact opens).
It may be necessary to select a different contact configuration for this test to
provide the 'distance trip' contact.
All other trip contacts are kept operated until the fault current is removed.
On 50Hz the time measured should be 330 - 360ms
On 60Hz the time measured should be 270 - 300ms
Note 1:

When the voltage inputs are all in phase V~ FAIL is obtained.

Note 2:

Dwell time is the time for which a contact remains closed.

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TEST PLUG 1
IA

IN

10

12

11

14

13

16

15

18

17

20

19

22

21

24

23

26

25

28

27

Figure 3 VTS instantaneous indication

THESE CONNECTIONS
MUST BE MADE BEFORE
THE TEST PLUG IS
INSERTED

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TEST PLUG 2

THESE CONNECTIONS
MUST BE MADE AFTER
THE TEST PLUG IS
INSERTED

VB
VN

Figure 4 Memory feature (synchronous polarising)

10

12

11

14

13

16

15

18

17

20

19

22

21

24

23

26

25

28

27

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Loss of load accelerated trip feature


This feature can be selected in conjunction with any 3 pole only tripping scheme. It
provides the facility for fast end zone tripping if there is:
i)
ii)
iii)

No signalling channel.
Signalling channel out of service.
No auto-reclose enabling the use of Zone 1 extension scheme.

It can only be used in conjunction with 3 pole only tripping and provides Loss of
Load tripping if Zone 2 and/or DEF forward comparators have operated and loss
of load is detected in two phases. Load must have been present in all three phases
prior to detecting a load loss and no other form of tripping is in progress (i.e. Zone
1 or aided). The presence and loss of load is detected via the low set or high set
current level detectors as selected on the menu.
A convenient way of testing this feature is to have the test set arranged for an A-G
fault just inside Zone 2 and to use a variac and resistor to supply current above the
selected level detector setting in phases B and C via one pole of a two pole switch.
The current should go in one direction though B phase and the opposite way
though C phase so that the resultant is zero.
Supply the current to phases B and C and connect a timer to start when the 2 pole
switch is opened and to stop when the relay ANY TRIP contact closes. Apply the
A-G fault from the test set and open the 2 pole switch before Zone 2 time delay
has expired (extend or disable the time if required). The relay will display (DIST +
DEF) LL if DEF* is fitted and enabled or DISTANCE LL if the DEF is not fitted or is
disabled. The trip time will be 30 to 40ms. The trip times on a real system will be
increased by the time taken for the remote circuit breaker to open.
Another method is to apply a perfect condition of three phase nominal voltage,
and three phase current above the low set level detector (or high set level detector).
Then to apply an A-N fault just within Zone 2, at the same time reducing the
current in B and C phases to zero. Indication of DISTANCE LL or (DIST + DEF) LL
should be give, with the measured trip time between 30 to 40ms.
* The DEF part of the logic has been removed for versions later than "C" series of
the LFZP.

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Fault location using mutual compensation


Connect the test set as shown in Figure 5 and apply a ground fault at the Zone 1
reach point.
The location obtained will be given by:
Location with Mutual =

KZPh + KZN * Location without MUTUAL


KZPh + KZN + KZM

in %, Miles or Kilometres, provided THETA Ph, THETA N and THETA M are within
10 of each other.
The mutual compensation can be enabled or disabled in the fault locator part of
the menu. However when enabled the compensation can NOT effectively be
shorted on the compensation terminals.
It should also be noted that if Io polarising is selected in the menu for the DEF
feature then the mutual compensation is automatically disabled even when you
may think it has been enabled in the menu.
The two relays on the parallel line ends should be connected on the relay panel to
the test set as shown in Figure 6. If the panel wiring is correct the predicted
location will be obtained, if incorrect a higher value will be obtained. As the same
current is going through both relays all the fault locator testing could be done in
this connection but it is not recommended as lead lengths involved could have an
appreciable effect on the phase angle of the fault presented to the relays. Testing
in this connection with the added lead resistance may effect the distance relays
performance and is not recommended.
If mutual compensation is set to unrealistic high values compared with the neutral
compensation than location errors can be obtained.

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MMLB 01
TEST PLUG 1
IA
IB
IC

IN

10

12

11

14

13

16

15

18

17

20

19

22

21

24

23

26

25

28

27

THESE CONNECTIONS
MUST BE MADE BEFORE
THE TEST PLUG IS
INSERTED

MMLB 01
TEST PLUG 2

CHECK VOLTS V
X1
BEFORE LINKING

THESE CONNECTIONS
MUST BE MADE AFTER
THE TEST PLUG IS
INSERTED

Figure 5

VA
VB
VC
VN

10

12

11

14

13

16

15

18

17

20

19

22

21

24

23

26

25

28

27

Test plug connections for secondary injection test of mutual compensation setting
on the fault locator

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MMLB 01
TEST PLUG 2
2

Figure 6

MMLB 01
TEST PLUG 1
2

10

10

12

11

12

11

14

13

14

13

16

15

16

15

18

17

18

17

20

19

20

19

22

21

22

21

24

23

24

23

26

25

26

25

28

27

28

27

MMLB 01
TEST PLUG 2

A B C N
VOLTAGE

RELAY
LINE 1

RELAY
LINE 2

MMLB 01
TEST PLUG 1
2

10

10

12

11

12

11

14

13

14

13

16

15

16

15

18

17

18

17

20

19

20

19

22

21

22

21

24

23

24

23

26

25

26

25

28

27

28

27

PART OF
SCHEME
WIRING TO
REAR
TERMINALS

A
N
CURRENT

Connections to prove polarity of panel wiring for mutual compensation on the fault
locator

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Section 5. SECONDARY INJECTION TESTS(SCHEME)


Standard schemes in Optimho
Note:

relay type LFZP114 does not have the POR 2 or blocking schemes:

BASIC:
Z1 EXTENSION:
PUR:
PUR UNBLOCK:
POR 1:
POR 1 UNBLOCK:
POR 2:
POR 2 WI TRIP:
POR 2 UNBLOCK:
Z3
POR 2 WI TRIP UNBLOCK:
Z3

Permissive Underreach.
Unblocking Permissive Underreach.
Permissive Overreach using Tp & Td for current
reversal guard.
Unblocking Permissive Overreach using Tp & Td
for current reversal guard.
Permissive Overreach using reverse Z3 for
current reversal guard and including Weak
Infeed echo.
Permissive Overreach using reverse Z3 for
current reversal guard and including Weak
Infeed Trip.
Unblocking Permissive Overreach using reverse
for current reversal guard and including Weak
Infeed Trip.
Unblocking Permissive Overreach using reverse
for current reversal guard and including Weak
Infeed Trip.

BLOCKING:
BLOCKING2:
The Loss of Load Accelerated Trip feature can be selected in conjunction with any
of the above schemes but it is only functional if 3 pole only tripping is selected.
5.1

Zone 1 extension
If this scheme is selected, Zone 1 reach is extended to that of Zone 1X.
The loop impedance's required will be as given in 4.6.4
Ensure the opto isolator input for RESET ZONE 1 EXTENSION is de-energised.
Check the reaches as in 4.6 for each fault condition. Indication given will be as for
Zone 1, ie Z1 on the LCD.
Energise RESET ZONE 1 EXTENSION opto-isolator input and recheck the reaches
which will now by that of Z1.

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5.2

Permissive under-reach

5.2.1

Aided trip check


Energise opto-isolator input CRX and check that application of a Zone 2 fault gives
an instantaneous aided trip. Make sure that a Zone 2 time delayed trip is obtained
when CRX opto-isolator input is de-energised.
Note:

5.2.2

If the UNBLOCKING scheme is selected LOSS OF GUARD (LGS) optoisolator input must also be energised from the same switch as CRX.

Signal send checks


With CRX de-energised (and LGS if UNBLOCKING) check that application of a
Zone 1 fault causes the SIGNAL SEND contact to operate and a Zone 2 fault does
not.
Note:

5.2.3

If the reach stepped Zones 1X, 1Y are used, the SIGNAL SEND contact
will go off after Zone 1X or Zone 1Y time delay.

TDW timer (unblocking scheme only)


Ensure CRX opto-isolator is de-energised.
Apply a Zone 2 fault and measure the trip time from energising LGS opto isolator
input.
The time measured will be TDW time + up to 9ms to allow for program loop time
and contact operation time.
Note:

If Zone 2 time delay is short, it may prove helpful to temporarily


lengthen it to facilitate this test to be performed. Remember to reset it to
the required setting.

The recommended setting for TDW is 10ms.


5.2.4

Channel out of service


If the CHANNEL OUT OF SERVICE opto isolator input is energised, only 3 pole
trips will be allowed. If 1 or 3 pole tripping has been selected, this may be proved
by applying a single phase to ground fault and monitoring the A, B and C trip
contacts which should all close simultaneously.
If it has been selected to BLOCK AUTORECLOSE when CHANNEL OUT OF
SERVICE, the BAR contact should be checked to confirm that it operates when a trip
occurs. (Apply an A-G Zone 1 fault).

5.3

Permissive overreach

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If DEF aided tripping is to be used it should now be blocked until the later tests are
done alternatively Ph-Ph faults could be applied.
If POR 2 WI TRIP or POR 2 WI TRIP UNBLOCK are to be used, the WEAK INFEED
TRIPPING feature should not be selected until that particular test is to be
performed.
5.3.1

Aided trip check


Energise opto-isolator input CRX and check that application of a Zone 2 fault gives
an instantaneous aided trip. Make sure that a Zone 2 time delayed trip is obtained
when CRX opto-isolator is de-energised.
Note:

5.3.2

If an UNBLOCKING SCHEME is selected energise CRX and LOSS OF


GUARD opto-isolator from the same switch.

Signal send checks


With CRX opto-isolator input de-energised (and LGS if UNBLOCKING), check that
application of a Zone 2 fault causes the signal send contact to operate.

5.3.3

TP and TD timer checks


1) Recommendations for timer settings in current reversals
POR 1, POR 1 Unblock
Distance
The current reversal guard is not required if there is no parallel line or the Zone 2
reach is not set to more than 150% of the line length.
If current reversal guard is not required set TP = 98ms, TD = 0ms.
If required :
TP = 30ms - minimum signalling channel operating time
TD = 35ms + maximum signalling channel reset time
DEF
If current reversal guard is not required set TDG = 0ms.
If required (the DEF guard is always required if there is a parallel line).

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TDG = 35ms + maximum signalling channel reset time.


(This can only be set in the menu when DEF aided tripping is enabled).
POR 2, POR 2 Unblock, POR 2 WI Trip, POR 2 WI Trip Unblock
The current reversal guards used at the DISTANCE and DEF have only one time
setting, they can however be initiated by reverse Zone 3 or the DEF reverse looking
comparators. Zone 3 must be set to reverse looking only.
If the guard is not required set TD = 0ms (i.e. there is no parallel line or Zone 2
does not reach more than 150% of the line length and DEF aided tripping is not in
use).
If required :
TD = 35ms + maximum signalling channel reset time.
In all settings the nearest available above should be selected if the exact setting
cannot be obtained.
2) TP (POR 1 only)
The current reversal guard in the POR 1 scheme is initiated when a healthy circuit
relay receives a permissive trip signal, however, a time delay, TP, is required to
give time for a Zone 2 comparator to pick up.
Note:

That TP is not used in schemes which utilise the weak infeed feature and
the guard is initiated by Zone 3 set to be reverse looking.

Arrange a double pole switch to energise CRX opto isolator input and start a timer.
Select Monitor Option 19 and use terminals 3 and 22 on the monitor point box to
stop the timer. If using a timer, 22 must be connected to common and set to
`break to stop'.
Energise CRX opto isolator and note the time displayed on the timer which will be
TP setting + up to 7ms to allow for program loop time.
Note:

If an UNBLOCKING SCHEME is selected, arrange a timer to start when


CRX and LGS opto isolators are energised. Note the time from
energising to an output from terminals 3 and 22 using monitor
option 19.

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3) TD
When the current reversal guard is picked up, transfer tripping is inhibited until the
permissive trip signal is removed or the Zone 2 comparator operates in POR 1. In
POR 2 the guard is on when a reverse looking comparator is picked up. A delay
on reset (TD) is required in case the Zone 2 comparator picks up while the
permissive trip signal is in the process of resetting which would otherwise cause
healthy circuit tripping.
If POR 1 is selected, proceed as follows:
Select Monitor Option 19 and arrange a timer to start on terminal 9 (going 0 to
5V) and stop on terminal 3 (going 5V to 0) of the Monitor Point box with terminal
22 being common.
Timer should have `Break for Start' and `Make for Stop'.
Ensure CRX opto isolator is energised. Apply a Zone 2 fault and note the time
which will be TD setting + up to 5ms to allow for program loop time.
If an Unblocking scheme is selected, energise CRX and LGS opto isolator and then
proceed as above.
If POR 2 is selected, proceed as follows:
Select Monitor Option 19 and arrange a timer to start on terminal 8 (going 5V to
0) and stop on terminal 2 (going 5V to 0) of the monitor point box, 22 being
common.
Apply a reverse Zone 3 fault, reset the timer and then remove the fault
The time obtained will be TD setting + up to 5ms to allow for program loops.
Timer should have `Make for Start' and `Make for Stop'.
The time obtained will be TD setting + up to 5ms to allow for program loops.
5.3.4

TDW timer (unblocking schemes only)


Time delay TDW is necessary to prevent mal-tripping during transient loss of
guard.
Ensure CRX opto-isolator input is de-energised.
Apply a Zone 2 fault and measure the trip time from energising LGS opto-isolator
input.
TDW time will be its setting + up to 9ms to allow for program loop time and
auxiliary relay operation time.
Note:

If Zone 2 time delay is short it may prove helpful to temporarily lengthen


the delay to facilitate this test to be performed. The recommended
setting for TDW is 10ms unless other information is available.

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5.3.5

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Page 34 of 70

Echo feature (POR 1 OR POR 2)


To make this functional, an opto isolator input has to be available to inform the
relay when the breaker is open. The feature causes signal send for 100ms on
receipt of carrier once the breaker has been open for 250ms.
If the feature is to be used, check it as follows:
Connect a double pole switch so that one pole energises the BREAKER OPEN opto
isolator input and the other pole starts a timer. The switch should be open initially.
Stop the timer on the SIGNAL SEND contact.
Energise CRX opto isolator input then close the double pole switch. A time delay of
255-265ms should be obtained.
Re-arrange the timer to measure the dwell time of the SIGNAL SEND contact.
Open the double pole switch and on re-closing it a time of 100-110ms should be
obtained.

5.3.6

Weak infeed echo (POR 2)


The `normal' echo feature is not enabled when the breaker at the weak infeed end
is closed. Thus make sure that the BREAKER OPEN opto isolator input is
de-energised.
If the weak infeed trip feature is to be used, this should not be selected yet to
enable this test to be performed.
No ac volts should be supplied to the relay.
There is a 10ms delay on the echo once the CRX opto-isolator is energised. To
check this, use a double pole switch to energise CRX opto isolator and start a
timer. Stop the timer on the SIGNAL SEND contact.
The time measured should be 15-20ms.
Measure the dwell time of the SIGNAL SEND contact when energising CRX opto
isolator which should be 100-115ms.
Note:

5.3.7

If the weak infeed feature is to be used, the relay at the other end of the
line must also have POR 2 selected which will then only send carrier
when Zone 2 + high set current level detector have picked up.

Weak infeed trip (POR 2) if selected


The logic contains a delay on tripping of 60ms.
Ensure the BREAKER OPEN opto isolator is de-energised and no ac volts are
applied to the relay. Use a double pole switch to energise CRX opto isolator input
and start timer. Stop the timer on the any trip contact.

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A time delay of 60ms + up to 10ms to allow for program loop time and auxiliary
relay contact operation time, should be obtained.
Aided trip indication should be obtained and 3 phase trips given.
Note:

(For Sections 5.3.6 and 5.3.7) If an Unblocking scheme is selected,


LOSS OF GUARD opto isolator input must be energised with the same
switch as CRX.

If 1 or 3 pole tripping has been selected, this may be confirmed by applying 3


phase volts on to the relay and reducing one phase to neutral voltage. Energise
CRX as above and observe that single pole tripping is achieved and the correct
indication is given.
5.3.8

Channel out of service


This can be done as in Section 5.2.4

5.4

Blocking scheme (see Section 5.5 for blocking 2 scheme)


In this scheme, a block signal is sent when a particular Zone 3 comparator
operates and the corresponding Zone 2 comparator does not. an aided trip occurs
when a Zone 2 comparator operates, the CHANNEL OUT OF SERVICE OPTO
isolator is not energised and no block signal is received.
Reverse looking Zone 3 operation must be selected in the menu.
Certain time delays are necessary to prevent maloperation. These time delays have
to be set to take into account different signalling channel times, comparator
operation times and logic processing times.
TP is the time set to delay tripping after Zone 2 comparator has operated to allow
a possible blocking signal to be received from the relay at the other line end.
For current reversal conditions a small delay in drop off of the blocking signal is
required to prevent unwanted trips while the Zone 2 comparator is resetting.

The recommended settings are:


Distance
TP = Maximum signalling channel operating time + 16ms
TD = 20ms - minimum signalling channel reset time
DEF (if fitted)
These settings can only be put on when DEF aided tripping is enabled.
TPG = Maximum signalling channel operating time + 26ms

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TDG = 20ms - minimum signalling channel reset time

5.4.1

Measurement of TP
DEF aided tripping should be inhibited (if available) until later tests are done
(alternatively Ph-Ph faults should be applied).
Select Monitor Option 19 and arrange a timer to start on terminals 9 (going 0 to
5V) and 22 and to stop on the ANY TRIP contact.
Ensure CRX opto isolator and CHANNEL OUT OF SERVICE opto isolator are
de-energised.
A timer should have `Break to Start' and `Make to Stop' selected. Apply a fault just
outside Z1.
The time obtained will be TP setting + up to 6ms for program loop time
DISTANCE AIDED indication will be given on the LCD.
The aided trip alarm contact should be checked if used.

5.4.2

Measurement of TD
Arrange a double pole switch to de-energise CRX opto isolator and start a timer.
Select Monitor Option 19 and use terminals 3 and 22 to stop the timer (going 5V
to 0), a timer should be re-set to `Break To Start' and `Make To Stop'.
Ensure CHANNEL OUT OF SERVICE opto isolator is de-energised.
CRX opto isolator should initially be energised.
De-energise CRX opto isolator and note TD time which will be TD setting + up to
4ms to allow for program loop time.
Energise CRX opto isolator, apply a fault outside Zone 1 and check that a time
delay trip is obtained.

5.4.3

Signal send check


Check that application of a Zone 3 reverse fault causes the SIGNAL SEND contact
to operate and a Zone 2 fault does not.

5.4.4

Channel out of service check


If the channel is out of service, the relay reverts to a basic scheme. This may be
checked by energising the CHANNEL OUT OF SERVICE opto isolator, applying a
fault outside Zone 1 and noting that a time delay trip will be obtained.
If it has been selected to BLOCK AUTORECLOSE when the channel is out of
service, check that the BAR contact closes when a trip occurs for a Zone 1 single
phase to ground fault. Three phase tripping will also be obtained.

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5.5

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Page 37 of 70

Blocking 2 scheme
In this scheme, a normally open contact is used to start sending carrier and a
normally open contact stops carrier send when it closes but it will work with just
signal start contact if required.
Zone 3 must be set reverse looking and this causes SIGNAL START, if the DEF is
fitted and enabled the low set zero sequence current level detector also causes
SIGNAL START.
The SIGNAL STOP is controlled by the Zone 2 comparator and also the DEF
forward comparator if fitted and enabled. Aided tripping is obtained when either
of these comparators operate and no block signal is received within a small delay
time. The START and STOP signals are also used internally to control aided
tripping.
Certain time delays are necessary to prevent maloperation. These time delays have
to be set to take into account different signalling channel times, comparator
operation times and logic processing times.
TP is the time set to delay tripping after Zone 2 comparator has operated to allow
a possible blocking signal to be received from the relay at the other line end.
For current reversal conditions a small delay in drop off of the blocking signal is
required to prevent unwanted trips while the Zone 2 comparator is resetting.

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The recommended settings are:


Distance
TP = TD = Maximum signalling channel operating time + 14ms
If a simplex channel is used TD can be reduced by the minimum signalling
channel reset time
DEF (if fitted)
These settings can only be put on when DEF aided tripping is enabled.
TPG = Maximum signalling channel operating time + 4ms
TDG = Maximum signalling channel operating time + 14ms
If a simplex channel is used TPG can be set to 0ms and TDG can be reduced by
the minimum signalling channel reset time
5.5.1

Measurement of TP and distance aided trip test


Apply a fault just inside Zone 2 with sufficient current to operate the high set level
detectors. DEF aided tripping should be inhibited (if available) until later tests are
done (alternatively Ph-Ph faults should be applied).
Select Monitor Option 19, the pick-up of any Zone 2 comparator is detected by the
output of the monitor box terminal 9 and the trip output by terminal 5. Monitor
box terminal 22 is the common zero volt rail.
Ensure CRX opto isolator and CHANNEL OUT OF SERVICE opto isolator are
de-energised.
A timer should have `Break to Start' and `Break to Stop' selected.
The time obtained will be TP setting + up to 3ms for program loop time
DISTANCE AIDED indication will be given on the LCD.
Check that the SIGNAL STOP contact closes and also the aided trip alarm contact
should be checked if used.

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5.5.2

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Measurement of TD and signal start check


Select Monitor Option 19, the pick-up of any Zone 3 comparator is detected by the
output of the monitor box terminal 8 and the output on terminal 3 going low will
indicate when TD has run out after Zone 3 is allowed to reset. Monitor box
terminal 22 is the common zero volt rail.
A timer should have `Make to Start' and `Make to Stop' selected.
Ensure CHANNEL OUT OF SERVICE opto isolator is de-energised.
Apply a reverse Zone 3 fault and measure the time obtained on removing the
fault. This will give the set TD + up to 3ms.
Also check that the SIGNAL START contact closes while the fault is applied.

5.5.3

Channel out of service check


If the channel is out of service, the relay reverts to a basic scheme. This may be
checked by energising the CHANNEL OUT OF SERVICE opto isolator, applying a
fault outside Zone 1 and noting that a time delay trip will be obtained.
If it has been selected to BLOCK AUTORECLOSE when the channel is out of
service, check that the BAR contact closes when a trip occurs for a Zone 1 single
phase to ground fault. Three phase tripping will also be obtained even if single/3
pole tripping has been selected on the menu.

5.6

Signalling channel check


This test should be applied to any scheme using a signalling channel when the
channel in service is available and in service.
An engineer will be required at each end of the protected line and some form of
verbal communication is necessary.
At end A, select OUTPUT OPTION 6 (SIGNAL SEND) and at end B select
MONITOR OPTION 5 and observe LCD position 6 (CRX opto isolator).
Push the SET button at end A. LCD position 6 at end B will display `1' to indicate
carrier has been received.
The procedure should then be reversed.

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Note 1:

It has been assumed that CONTACT CONFIGURATION 1 is selected. If


any other configuration is selected the appropriate drawings must be
made available.

Note 2:

If the BLOCKING 2 scheme is selected refer to the appropriate external


connection diagram.

Section 6. DIRECTIONAL EARTH FAULT (DEF) IF FITTED


Note:

If current polarising is used, the transformer should be checked for


correct polarity by primary injection. The directional checks below
should then be carried out.

Directional checks
Apply rated current of the correct polarity to DEF polarising input and to the
neutral CT. The phase difference between the two should be 0 and the DEF

forward comparator should be picked up (LCD position 6 monitor option


4).
The phase angle of the neutral current should be rotated so that it lags the
polarising current. The angle that the DEF reverse comparator picks up
(LCD position 7 monitor option 4) should be -90 5.
The angle of the neutral current should be rotated around to a leading
angle and the angle that the DEF reverse comparator picks up (LCD
position 7 monitor option 4) should be +90 5.
6.1

Current level detectors


Low set
Set monitor Option 7.
The settings available are 0.05 to 0.8 In
Apply phase to neutral current and note the pick-up and drop-off of the level
detector
by LCD position 2.
This may be achieved with a suitable variac and resistor.
High set
This is only seen on the menu when DEF aided tripping is enabled in the SCHEME
part of the menu.

The settings available are 0.05 to 0.8 In

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Select Monitor Option 7


Apply current as for the low set and note the pick up and drop off current which
will be indicated by LCD position 4.
The sensitivities are menu selectable, and given by 3Io = %In. The pick up values
should be within 10% of that set. Drop off to be within 20% of Pick up.
6.2

Mag inrush detector


The Mag inrush detector works by measuring a Gap greater than 5ms in the
current waveform, the most convenient method of testing this is by applying half
wave rectified current.
Some test sets can generate half wave rectified current, if this feature is not
available a half wave rectified current can be achieved by connecting two diodes
of suitable rating as shown in Figure 7.
Select monitor option 4
Inject 0.2In and check the mag inrush detector picks up as indicated by LCD
Position 2.

6.3

Back up time delay

6.3.1

Current sensitivity
Select Monitor Option 4
Current sensitivity is given by Is = SETTING x In
The available range is 5 to 120% In
Inject current for each phase to ground fault and note the level required to obtain
a `1' in LCD Position 3.
The DEF forward comparator must be picked-up, when a ground fault is applied,
this is shown by LCD Position 6 in Monitor Option 4.
Tolerance = +10%-0%

6.3.2

Operation Time
Set the relay to the required curve setting. For curves 1 to 4 inject 10 x Is (or see
Note 3) and note the time for the DEF TRIP contact to operate which will be

Service Manual
LFZP 11x

CURVE
Definite 2
Definite 4
Definite 8
Curve 1
Curve 2
Curve 3
Curve 4

R5911D
Chapter 4
Page 42 of 70
TIME (x MULT t)
Secs
2
4
8
2.971
1.500
0.808
13.333

TOLERANCE UNDER COMMISSIONING CONDITIONS 10% FOR


CURRENTS GREATER THAN 2 Is

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TEST PLUG 1

IA
IB
IC

IN

10

12

11

14

13

16

15

18

17

20

19

22

21

24

23

26

25

28

27

Fgure 7 DEFf simulated mag inrush current

THESE CONNECTIONS
MUST BE MADE BEFORE
THE TEST PLUG IS
INSERTED

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For curves 5 to 8 it may be necessary to check 2 points see Note 3.

6.4

Note 1:

If zero sequence current polarising is selected, it will be necessary to


route the current via the polarising CT. This may be achieved by
connecting the neutral connection to relay terminal 27 and linking 26
and 28.

Note 2

If single pole tripping has been selected (and is available i.e. COS not
energised) then if the fault is seen by Zone 1 DEF will be inhibited until a
3 pole trip occurs via Z1X.Z1Y or Zone 2. Either take this into account
or energise COS opto-isolator.

Note 3:

If the test equipment used is not capable of supplying 10 x Is or a


different point on the curve is to be checked, refer to Figure 8 which
gives the DEF back up time delay curves.

Note 4:

If a blocking scheme is selected, energise CRX opto isolator input.

DEF aided tripping


DEF Aided Tripping is available on all the Permissive Overreach schemes and in
the Blocking schemes. Schemes POR 1 and POR 1 UNBLOCK make use of timer
TDG. If these schemes are to be used, they may be checked as follows:
Note:
it

6.4.1

POR 2 DEF uses the same reversal guard timer setting as the distance,
there is only one menu setting for the drop off time delay for the guard,
is TD.

POR 1 or POR 1 unblock


TDG
Select Monitor Option 19
Apply a fault that will only pick up the reverse looking DEF comparator, this is
shown by Monitor Point 6 going to 5V. The guard pick-up is shown by Monitor
Point 2 going to 5V. On removing the fault, time from M.P.6 falling to 0V to M.P.2
falling to 0v.
(Monitor point 22 is the 0V common connection). The time obtained will be TDG
+ up to 5ms processing time. A timer should be set for `Make to Start' and `Make
to Stop'.

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100

50

10

curve 4

curve 1

Operating
time (s)

0.5

curve 2

curve 3

0.1
1

10

Current (Multiples of Is)

Figure 8a Iec characteristics

50

100

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100

50

10

Operating
time (s)

curve 5
curve 6
curve 7

0.5
curve 8

0.1
1

10

Current (Multiples of Is)

Figure 8b American characteristics

50

100

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6.4.2

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POR 2 (any version)


The procedure is exactly the same as above but the time obtained will be TD + up
to 5ms processing time.

6.4.3

Blocking
TPG
Select Monitor Option 19 and start a timer when M.P.7 goes to 5V on the
application of a fault only seen by the DEF forward comparator, stop the timer with
the any trip contact. (Monitor point 22 is the 0V common terminal). A timer should
have `Break to Start' and `Make to Stop'.
If single or 3 pole tripping is selected:Measured Time = TPG + 20ms + up to 8ms (for contact operation and processing)
Time delay to give distance single
pole tripping preference.
If 3 pole tripping is selected, the time measured will be as above less the 20ms.
TDG
Select Monitor Option 19. Connect MP2 to stop a timer which has a start given by
de-energising the CRX input.
A timer should have `Break to Start' and `Make to Stop'. The time obtained will be
TDG and up to 6ms processing time.

6.4.4

Blocking 2
TPG
Apply a ground fault that will only be seen by the DEF forward looking comparator
(i.e. a high impedance or resistive fault outside the reach of the distance).
Select Monitor Option 19, the pick-up of the DEF forward comparator is detected
by the output of the monitor box terminal 7 and the trip output by terminal 4.
Monitor box terminal 22 is the common zero volt rail.
Ensure CRX opto isolator and CHANNEL OUT OF SERVICE opto isolator are
de-energised.

A timer should have `Break to Start' and `Break to Stop' selected.

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The time obtained will be TPG setting + up to 3ms for program loop time (+40ms
+ up to 3ms if single/three pole tripping is selected thus giving preference to
distance single pole tripping). DEF AIDED indication will be given on the LCD.
Check that the SIGNAL STOP contact closes and also the aided trip alarm contact
should be checked if used.
TDG
Select a reverse ground fault outside the reach of the distance elements and select
Monitor Option 19. The pick-up of the DEF reverse comparator is detected by the
output of the monitor box terminal 6 and the output on terminal 2 going low will
indicate when TDG has run out after DEF is allowed to reset. Monitor box terminal
22 is the common zero volt rail.
A timer should have `Make to Start' and `Make to Stop' selected.
Ensure CHANNEL OUT OF SERVICE opto isolator is de-energised.
Apply the fault and measure the time obtained on removing the fault. This will give
the set TDG + up to 3ms.
Also check that the SIGNAL START contact closes while the fault is applied.
6.4.5

Aided trip check


If a POR scheme is selected, energise CRX opto isolator input, if an unblocking
POR scheme is selected, energise LOSS OF GUARD opto isolator alone. If the
BLOCKING scheme is selected ensure that all opto isolator inputs are
de-energised.
Apply a forward fault outside the distance Zones and check that the instantaneous
DEF AIDED TRIP is given. (There must be sufficient current to pick up the DEF
Current Level Detectors).

6.4.6

Channel out of service check


Apply a forward fault with the CHANNEL OUT OF SERVICE opto isolator
energised, and check that DEF aided tripping can not be obtained.

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Section 7. LIVE SYSTEM CHECKS


If current polarising is used the transformer polarity should be proved by primary
injection.
7.1

Signalling channel check


If the scheme requires the use of a signalling channel and the check has not been
done recently then 5.5 should be repeated.

7.2

Trip test
Trip isolation should be obtained if breaker operation is not wanted.
Auto reclose should be blocked.
Breaker operation will of course only occur if previously closed.
Select the appropriate output option in the commissioning tests part of the MENU.
When the SET button is pressed, the appropriate contact will operate as shown.
The relay inoperative alarm will also be closed.

The output test options are as follows:


NUMBER

CONTACT OPERATED

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1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27

Note:
7.3

29-33
29-35
37-39
41-43
45-47
49-51
53-55
30-32
30-34
30-36
38-40
42-44
46-48
50-52
54-56
57-59
57-61
57-63
65-67
69-71
73-75
77-79
81-83
TRIP A & ANY TRIP
TRIP B & ANY TRIP
TRIP C & ANY TRIP
TRIP A, B, C, 3PH & ANY TRIP

Option 24, 25 & 26 only applicable if 1 or 3 pole tripping is selected.

Final setting checks


The check list (in Appendix 3) should now be referred to, and used in conjunction
with the menu scrolling facility to check that all settings are correct. If the VTS is to
block tripping check this is set before commencing the scrolling.
As an alternative a print out of settings may be obtained using the print option in
the MENU and a suitable printer.

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7.4

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On load checks
As there could be a risk of tripping, maintain trip isolation or block contact
operation in the menu if required.
For the following checks it has been assumed that 2 type MMLG test blocks have
been fitted and are wired as recommended in Figure 1.
If alternative test facilities are provided, the panel wiring diagram will need to be
referred to and the procedure adapted to suit.

7.4.1

Voltage transformer checks


Insert an MMLB01 test plug into test block 2.
With the line energised, check the voltage input to the protection across each pair
of phases and between each phase and neutral.
Check for correct phase rotation with a phase rotation meter.

7.4.2

CT/VT phasing check


To ensure that the corresponding voltage and current go to a given relay element
it is necessary to check the phase angle between them agrees with the known load
power factor. If the information available is in terms of import/export MW and
MVAR, Figure 9 gives guidance.
Connect A-N volts to a phase angle meter voltage input terminals, paying careful
attention to polarity.

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+M.W.
VA

IA

IA

-M.V.A.R.

+M.V.A.R.

IA

IA

-M.W.
- = IMPORT

+ = EXPORT

= TAN

-1

M.V.A.R.
MW

DETERMINATION OF THE LOAD ANGLE FROM LOAD INFORMATION

Figure 9 Determination of the load angle from load information

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If the fault locator is fitted `metering' information should be checked for


agreement. (If the current is below about 7.5% In no current value will be given
and zero will be indicated). Prewire another MMLB01 connecting A phase current
to the current connection of the phase angle meter and providing shorts for the
other current paths as shown in Figure 2.
Insert this plug into MMLG test block 1.
Check that the phase angle measured gives reasonable agreement with the known
load power factor.
This procedure must be repeated for another phase.
Remove both test plugs.
7.4.3

Directional check
The test must be carried out with the relay energised from the line voltage
transformers and current transformers with the load current above the minimum
sensitivity of the low-set current level detectors (5% In) and preferably at a lagging
power factor in the tripping direction.
Select on load directional check.
When the Set key is held pressed it automatically sets the relay low set current level
detectors to their most sensitive settings, THETA Ph to the minimum value and Zone
1 to a straight line directional characteristic. As shown in Figure 10.
All contacts will be disabled and the Relay Inoperative Alarm will close.
If the current vector Ia as determined in 7.4.2 is drawn on Figure 10, and it comes
inside the `Operate' area, then it will be seen as a `Forward Fault' when the Set
key is pressed. If In appears to be on a boundary line voltage rotation may be
necessary to give a definite confirmation.
If using MMLB test plugs, the voltage plug must be fully inserted BEFORE any
rotation is performed.
Push the SET key to perform the test. One of the three following messages will
appear which are self-explanatory.
a)
b)
c)

Fault seen as forward


Fault not seen as forward
Test aborted check i & or v

A check must be performed with the fault in the opposite direction which is
achieved by reversing the current input to the relay and the new appropriate

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message seen when the set key is pressed.If MMLG Test blocks are fitted, this may
be achieved by referring to Figure 11.At the end of these tests the calendar clock
should be correctly set. Any relay inhibits or special test facilities should be
removed and trip links put back.

Service Manual
LFZP 11x

R5911D
Chapter 4
Page 55 of 70

NOTE : ON LOAD CHECKS ONLY INVOLVE OPERATION OF PHASE - PHASE


COMPARATORS, FOR SIMPLICITY THIS DIAGRAM IS DRAWN ON A
SINGLE PHASE BASIS.

VA

RCA

OPERATION

NO OPERATION
PH min

Ia

VB
VC

OPERATION
NO OPERATION
FROM FIG. 9
LET TAN -1 M.V.A.R.

M.W.
THEN 1 MUST SHOW REASONABLE
AGREEMENT WITH

Figure 10 Vector diagram on load directional check

Service Manual
LFZP 11x

R5911D
Chapter 4
Page 56 of 70

MMLB 01
TEST PLUG 1
2

10

12

11

14

13

16

15

18

17

20

19

22

21

24

23

26

25

28

27

MMLB 01
TEST PLUG 2
2

10

12

11

14

13

16

15

18

17

20

19

22

21

24

23

26

25

28

27

Figure 11 Test plug connections for on load test current reversal

Service Manual
LFZP 11x

R5911D
Chapter 4
Page 57 of 70

COMMISSIONING TEST RESULT SHEETS


Static distance prot. type LFZP 11

Serial number:

Model:
Station:

Date:

Circuit:

Engineer:

Scheme type:

Witness:

Active settings group no:

1.

Preliminary Checks

a) Rating Details
b) CT Shorting Contacts
c) DC supply
d) Power up
e) Wiring
f) Relay Inoperative Alarm Contact

Service Manual
LFZP 11x

2.

Voltage level detectors (monitor option 06)


Level
Detector
PhA
PhB
PhC

3.

R5911D
Chapter 4
Page 58 of 70

Relay Terminal
Injected
15-18
16-18
17-18

Mon Opt 6
LCD POS
2
3
4

Pick Up
Volts

Drop Off
Volts

Drop off %
Pick up

Phase current level detectors

Low set
Level
Detector
PhA
PhB
PhC

Relay Terminal
Injected
19-20
21-22
23-24

Mon Opt 6
LCD POS
6
7
8

Pick Up
Current

Drop Off
Current

Drop off %
Pick up

Relay Terminal
Injected
19-20
21-22
23-24

Mon Opt 7
LCD POS
6
7
8

Pick Up
.Current

Drop Off
.Current

Drop off %
Pick up

High set
Level
Detector
PhA
PhB
PhC

Biased low set


Relay Terminal
Injected
19-20
21-22
23-24

Mon Opt 6
LCD POS
9
9
9

Pick Up
.Current

Drop Off
.Current

Drop off %
Pick up

Mon Opt 7
LCD POS
9
9
9

Pick Up
.Current

Drop Off
.Current

Drop off %
Pick up

Biased high set


Relay Terminal
Injected
19-20
21-22
23-24

Service Manual
LFZP 11x
4a.

5.

R5911D
Chapter 4
Page 59 of 70

Reach tests using a computer based test set


Relay
Angle
n /
ph

Reqd
Reach
Zr

Fault
Type

__
__

Zone
1

__
__

Zone
1X

__
__

Zone
1Y

__
__

Zone
2

__
__

Zone
3

__
__

Zone
3 Rev

__
__

Quad
Res.

A-G
B-G
C-G
A-G
B-G
C-G
A-G
B-G
C-G
A-G
B-G
C-G
A-G
B-G
C-G
A-G
B-G
C-G
A-G
B-G
C-G

__

Zone
1

__

Zone
1X

__

Zone
1Y

__

Zone
2

__

Zone
3

__

Zone
3 Rev

A-B
B-C
C-A
A-B
B-C
C-A
A-B
B-C
C-A
A-B
B-C
C-A
A-B
B-C
C-A
A-B
B-C
C-A

Fault location (if fitted)

Relay
Volts

Relay
Amps

Equiv
Z

Actual %

%
Error

Service Manual
LFZP 11x

KZ1
=

R5911D
Chapter 4
Page 60 of 70
KZF
=

LINE LENGTH =
KZM
THETA M
MUTUAL

ENABLED/DISABLED

Location with Mutual =

KZPh + KZN
KZPh + KZN + KZM

PHASE

LOCATION GIVEN FOR Z1 REACH


% OR Km OR MILES
(NO MUTUAL)

COMPENSATION
* Location without MUTUAL

LOCATION GIVEN FOR Z1 REACH


% OR Km OR MILES
(WITH MUTUAL)
EXPECTED
ACTUAL

A-G
B-G
C-G
A-B
B-C
C-A

6.
PHASE
A-B
B-C
C-A
A-G
B-G
C-G

OPERATION TIMES
Zone 1
(ms)

Zone 1X
(seconds)

Zone 1Y
(seconds)

Zone 2
(seconds)

Zone 3
(seconds)

Service Manual
LFZP 11x

7.

Power swing blocking

a)

Zone 6 boundary

R5911D
Chapter 4
Page 61 of 70

Required forward loop


impedance =
Measured forward loop
impedance =
Required reverse loop impedance
=
Measured reverse loop
impedance =
b)

TZ6 Timer
Measured time =

c)
d)

Simulated power swing


Blocking and contact check
Block Zone 1
Block Zone 1X
Block Zone 1Y
Block Zone 2
Block Zone 3
PSB Alarm

ms

Service Manual
LFZP 11x
8.

Voltage transformer tupervision

a)

Operation on zero sequence volts

R5911D
Chapter 4
Page 62 of 70

Voltage for
operation

Operation time

seconds

Indication
b)

Instantaneous operation
Indication

c)

Self resetting ENABLED/DISABLED


Operation checked

9.

Switch on to fault

SOTF Indication

Trip time
10.

ms

Memory feature (synchronous polarising)

Distance trip alarm contact dwell time


11.

ms

Loss of load accelerated trip feature

Loss of load accelerated trip feature ENABLED/DISABLED


Trip time
Indication

ms

Service Manual
LFZP 11x
12.

R5911D
Chapter 4
Page 63 of 70

Zone 1 extension

RESET Z1 EXTENSION energised,Z1 Reach

RESET Z1 EXTENSION de-energised,Z1 Reach =


13.

Permissive underreach

Aided trip check


Signal send check
TDW Timer (if applicable)

ms

3 pole trip if COS


BAR contact

14.

Permissive overreach

Aided trip check


Signal send check
TP Time

ms

TD Time

ms

TDW Timer (if applicable)

ms

ECHO feature
Breaker open time

ms

Signal Send dwell time


(100-110ms)

ms

Weak infeed echo


Delay on echo (15-25ms)

ms

Signal Send dwell time


(100-110ms)

ms

Service Manual
LFZP 11x

R5911D
Chapter 4
Page 64 of 70

Weak infeed trip

15.

Delay on tripping (54-66ms)

ms

Delay on drop off (100-124ms)

ms

Blocking
TP Time

ms

TD Time

ms

Signal send check


Channel out of service check
BAR

16.

17.

Signalling channel check

DEF

Low set
Level
Detector
A-G
B-G
C-G

Pick Up
Current

Drop Off
Current

Drop off %
Pick up

Pick Up
Current

Drop Off
Current

Drop off %
Pick up

High set
Level
Detector
A-G
B-G
C-G

Current Polarising Test

Service Manual
LFZP 11x

R5911D
Chapter 4
Page 65 of 70

Mag Inrush Detector

Time delayed back up operation


Sensitivity
Phase
Injected
A-G
B-G
C-G

Is Pick up
mA

Operation time
Phase
Injected
A-G
B-G
C-G

Current
Injected

Curve
Selected

Expected
Time

Actual
Time

DEF aided tripping


TD Time (if applicable)

ms

TPG Time (if applicable)

ms

TDG Timer (if applicable)

ms

Aided trip check

18.

Live system checks


18.1

Signalling channel check

18.2

Trip test

Service Manual
LFZP 11x

18.3

21.

R5911D
Chapter 4
Page 66 of 70

Final setting check

On load checks

a) Voltage correct
b) Phase rotation correct
c) CT/VT phasing correct
d) Forward directional check
e) Reverse directional check

Engineer

Witness

Date

Date

SETTINGS CHECK SHEETS


STATIC DISTANCE PROT. TYPE LFZP11
MODEL
STATION

DATE

CIRCUIT

ENGINEER

SERIAL NUMBER

Service Manual
LFZP 11x

R5911D
Chapter 4
Page 67 of 70

ACTIVE SETTINGS GROUP NO.


IDENTIFIERS
DISTANCE
FAULT LOCATOR

18 LFZP
18 LFZP

DEFAULT DISPLAY

BLANK / GROUP IDENTIFIER / ACTIVE GROUP NO.

CLOCK REFERENCE

CRYSTAL / SYSTEM VOLTAGE

CONTACT CONFIGURATION NO.


SCHEME

ONLY THE APPROPRIATE QUANTITIES

TP

ms

FOR THE SCHEME SELECTED WILL

TD

ms

BE DISPLAYED

TDW

ms

DEF ELEMENTS

LOSS OF LOAD
ACCELERATED TRIP

ENABLED/BLOCKED

ENABLED/BLOCKED

HIGH SET

In

TPG

ms

TDG

ms

BY LOW SET/HIGH SET


LEVEL DETECTORS

DISTANCE
TYPE OF TRIP1 OR 3 POLE/3 POLE
ZONE 1 TRIPENABLED/BLOCKED
TIME DELAY TRIPS
TZ1X
TZ1Y
TZ2
TZ3
ALL G
BASE SETTINGS

ENABLED/BLOCKED
ENABLED/BLOCKED
ENABLED/BLOCKED
ENABLED/BLOCKED
ENABLED/BLOCKED

TZ1X
TZ1Y
TZ2
TZ3

s
s
s
s

Service Manual
LFZP 11x

R5911D
Chapter 4
Page 68 of 70

KZPh
THETA Ph
KZN
THETA N
DIST G CHAR'STIC MHO/QUADRILATERAL
Z1 & Z2 SETTING
KZ1
KZ1X
KZ1Y
KZ2
Z3 SETTING
KZ3'

OFFSET/REVERSE

KR

Service Manual
LFZP 11x

R5911D
Chapter 4
Page 69 of 70
KZ3
LENT a/b

SWCH ON TO FAULT ENABLE/BLOCK

ENABLED IN
BY

110s/0.2s

TIMING
ZONE 1
ZONE 1X
ZONE 1Y
ZONE 2
ZONE 3
TZ6

Z6-Z3/Z6-Z2
ALLOW/BLOCK
ALLOW/BLOCK
ALLOW/BLOCK
ALLOW/BLOCK
ALLOW/BLOCK

PWRSWG DETECTOR ENABLE/BLOCK

KZ6
KZ6'
LENT a/b

BLOCK AUTORECLOSE

BLOCK/ALLOW ON Z1 + AT 2 & 2/3 Ph/F


BLOCK/ALLOW ON Z1X(T) TRIP
BLOCK/ALLOW ON Z1Y(T) TRIP
BLOCK/ALLOW ON Z2(T) TRIP
BLOCK/ALLOW ON CHANNEL OUT
BLOCK/ALLOW ON DEF DELAY TRIP
BLOCK/ALLOW ON DEF AIDED TRIP

VT SUPERVISION ALLOW/BLOCK TRIP


START INDICATION

SELF RESETTING (ENABLED/DISABLED)

ENABLED/BLOCKED

m
s

Service Manual
LFZP 11x

R5911D
Chapter 4
Page 70 of 70

DEF
LOW SET
DEF ELEMENTS

In
ENABLe/BLOCK

DELAY TRIP
CURVE
MULT *t
BASE SETTING
POLARISING
THETA G
MAG INRUSH
STABILISER

FAULT LOCATOR
KZF
LINE UNITS
LINE LENGTH
CT RATIO
VT RATIO
MUTUAL
COMPENSATION

ENABLE/DISABLE

KZM
THETA M

ENABLe/BLOCK

In

ON/OFF

SERVICE MANUAL
Types LFZP

R5911D

REPAIR FORM
Please complete this form and return it to AREVA T&D with the equipment to be repaired.
This form may also be used in the case of application queries.

AREVA T&D
St. Leonards Works
Stafford
ST17 4LX,
England
For:

After Sales Service Department

Customer Ref:

_______________________

AREVA Contract Ref: _______________________


Date:
1.

Model No: __________________


Serial No:

__________________

_______________________

What parameters were in use at the time the fault occurred?


AC volts

_____________ Main VT/Test set

DC volts

_____________ Battery/Power supply

AC current

_____________ Main CT/Test set

Frequency

_____________

2.

Which type of test was being used? ____________________________________________

3.

Were all the external components fitted where required?


(Delete as appropriate.)

4.

List the relay settings being used

Yes/No

____________________________________________________________________________
____________________________________________________________________________
____________________________________________________________________________
5.

What did you expect to happen?


____________________________________________________________________________
____________________________________________________________________________
____________________________________________________________________________
____________________________________________________________________________

continued overleaf

SERVICE MANUAL
Types LFZP

6.

R5911D

What did happen?


____________________________________________________________________________
____________________________________________________________________________
____________________________________________________________________________
____________________________________________________________________________

7.

8.

When did the fault occur?


Instant

Yes/No

Intermittent

Yes/No

Time delayed

Yes/No

(Delete as appropriate).

By how long?

___________

What indications if any did the relay show?


____________________________________________________________________________
____________________________________________________________________________
____________________________________________________________________________

9.

Was there any visual damage?


____________________________________________________________________________
____________________________________________________________________________
____________________________________________________________________________

10. Any other remarks which may be useful:


____________________________________________________________________________
____________________________________________________________________________

______________________________________
Signature

_______________________________________
Title

______________________________________
Name (in capitals)

_______________________________________
Company name

____________________________________________________________________________

Publication: R5911-D
AREVA T&D's Automation & Information Systems Business www.areva-td.com
T&D Worldwide Contact Centre online 24 hours a day: +44 (0) 1785 25 00 70 http://www.areva-td.com/contactcentre/

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