Beruflich Dokumente
Kultur Dokumente
May 2012
Thesis submitted in partial fulfillment
of the requirements for the degree of
Master of Technology
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
JAYPEE INSTITUTE OF INFORMATION TECHNOLOGY
(Deemed to be University)
NOIDA
CERTIFICATE
This is to certify that the work titled RF INDUCTOR/TRANSFORMER
submitted by Pallavie Tyagi in partial fulfillment for the award of degree of
Master of Technology (Microelectronics and Embedded Technology) of Jaypee
Institute of Information Technology, Noida has been carried out under my supervision. This work has not been submitted partially or wholly to any other University
or Institute for the award of this or any other degree or diploma.
Signature of Supervisor:
Name of supervisor:
Designation:
Date:
ii
ACKNOWLEDGMENT
I would like to express my deepest gratitude and appreciation for my supervisor
Prof. A. B. Bhattacharyya, without whose faith, continued interest, dedication and support, this work would not have been possible. Additionally, he deserves
my accolades for his patience and fairness during tough moments in my work. I
thank him for encouraging me at times when I needed it most. His energy and
enthusiasm for knowledge are boundless.
I would also like to thank Mr. Kirmender Singh for sharing his passion and
love for circuit design and device modeling. He encouraged me to work on a variety
of projects and thereby provided me with a well rounded perspective in engineering.
Above all, I thank him for his friendship, his natural charisma and great sense of
humour.
This project is a part of NPMASS program supported by Government of
India at MEMS Design Center at JIIT.
Signature of Student:
Name of Student:
Date:
iii
ABSTRACT
High performance Inductors and Transformers are playing an increasing role
in modern communication systems. Despite the superior performance offered by
discrete components, parasitic capacitances from bond pads, board traces and packaging leads reduce the high frequency performance and contribute to the urgency
of an integrated solution. Embedded Inductors have the potential for significant
increase in reliability and performance of the IC. Due to the driving force of CMOS
integration and low costs of silicon-based IC fabrication, these Inductors and Transformers lie on a low resistivity silicon substrate, which is a major source of energy
loss and limits the frequency response. Therefore, the quality factor of Inductors
and Transformers fabricated on silicon continues to be low.
In this thesis to improve the performance of the Inductors and Transformers
various approaches have been used. One approach is to fabricate the transformer
on a certain distance from the silicon substrate and then within this distance use
Air, High resistive silicon or Silicon nitride as a cavity. By doing so improvement
in quality factor is observed. Another approach is to increase the thickness of the
silicon dioxide. Fabrication of inductors or transformers on such a thick SiO2 layer
can be a good solution to achieve better performance. However, the thickness of
such SiO2 layer is still limited by the process for further performance improvement.
One another approach is to use glass as a substrate and RF performance of the
glass-based transformer is improved compared to that of silicon-based transformer
highlighting a good prospect for the future 3-dimensional RF device application.
Meander structure is also investigated in this project. Perform the modeling
of meander inductor by decomposing it into individual straight segments and then
compute the self and mutual inductance. The obtained results are compared with
FASTHENRY.
Signature of Student:
Signature of Supervisor:
Name:
Name:
Date:
Date:
iv
Contents
CERTIFICATE
ii
ACKNOWLEDGEMENT
iii
ABSTRACT
iv
LIST OF TABLES
vii
LIST OF FIGURES
1 INTRODUCTION
1.1 INTRODUCTION:- . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 MOTIVATION:- . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 THESIS OUTLINE:- . . . . . . . . . . . . . . . . . . . . . . . . . . .
1
1
2
3
3.2.1
44
APPENDIX
44
45
47
51
REFERENCES
51
vi
List of Tables
1.1
3.1
3.2
3.3
3.4
3.5
Process Parameters . . . .
Aluminium with Cavity .
Copper with Cavity . . . .
Copper without Cavity . .
Aluminium without Cavity
4.1
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List of Figures
2.1
2.2
2.3
2.4
2.5
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3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10
3.11
3.12
3.13
3.14
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15
16
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24
25
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
4.9
4.10
4.11
4.12
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viii
Chapter 1
INTRODUCTION
1.1
INTRODUCTION:-
Monolithic inductors/transformers have found extensive applications in radiofrequency (RF) circuits in wireless communication systems, such as impedance
matching, signal coupling, phase splitting and formation of large inductances on
the order of tens of nano henries. Implemented in CMOS technology, the current
inductors/transformers generally have low quality factors (Q), low self-resonant frequencies fres and large cross talk.
The low performance of current inductors/transformers is in part due to the parasitics between the devices and the lossy silicon substrate. First, the eddy currents
induced in the silicon substrate beneath a inductor/transformer by the magnetic field
generated in the device cause energy loss and reduce Q, this effect is especially serious at high frequencies, because the intensity of the eddy currents is proportional to
the rate of change in the magnetic field. Second, the parasitic capacitances between
the inductor/transformer traces and the substrate are in shunt with the inductance
obtained from the spiral traces, thus lowering fres of the inductor/transformer, these
parasitic capacitances also enable electric coupling between the device and the substrate, causing further energy loss. Lastly, but not the least important,adjacent
devices are coupled through these parasitics and their ambient (including both the
substrate and air), hence large cross talk.
Because spiral inductors are typically used to form transformers, the very nature
of coupling entails even greater parasitic capacitances and eddy currents among the
spirals, resulting in more energy loss. Therefore, to improve the performance of
the on-chip monolithic transformers, the parasitics due to the substrate should be
suppressed as much as possible. One efficient approach is to drastically increase
the thickness of the isolation layer, typically silicon dioxide or by using air as a
1
cavity, between the inductor/transformer and the silicon substrate. In doing so,
the magnetic and electric coupling between the device and the silicon substrate and
the coupling among devices through the substrate are greatly weakened. Another
approach to reduce these effects is the use of glass substrate instead of silicon substrate. By using glass as a substrate quality factor is increased up to 40 percent.
1.2
MOTIVATION:-
Modern RF communication systems require stringent specifications for RF components. Despite much work , which has been done on the integration of RF systems
into a single chip, many components remain off-chip. This is because the RF passives with the required performance are not available in the standard silicon process.
Many recent studies have shown that two aspects are extremely important in order
to obtain high performance integrated passive components when the signal frequency
is in the GHz range. One is the metal thickness and the other is how far the device is
isolated from the lossy substrate. For these two reasons, research has been performed
to investigate other technological options among available fabrication processes.
Recently, Transformers/Inductors have been required in many RFIC applications
for impedance matching/transforming, signal coupling, phase splitting (balun).Important
specifications for inductors/transformers are their Q and self-resonance frequency.
High-Q inductors are essential for many different passive and active circuits and
can substantially reduce the phase noise or power consumption of oscillators and
amplifiers. Also, they result in low-loss matching networks and filters as shown in
Table 1.1.
Parameter
Effect of Q
1
Oscillator
Phase Noise
Q2
Amplifier
Gain
Q
1
Oscillator
Power Consumption
Q
1
Amplifier
Power consumption
Q
1
Matching System
Loss
Q
1
Filter
Loss
Q
1
System
Noise Figure
Q
1.3
THESIS OUTLINE:-
Chapter 2
LITERATURE REVIEW OF
INDUCTOR AND
TRANSFORMER
2.1
WHAT IS A INDUCTOR:-
2.2
A general model that describes the performance of a planar inductor ( square coil) is
shown in Figure 2.1. Ls is the low-frequency inductance, Rs is the series resistance of
the coil, Cs is the capacitance between the different windings of the inductor and includes the fields in air and in the supporting dielectric layers, Cox is the capacitance
in the oxide layer between the coil and the silicon substrate, Cp is the capacitance
between the coil and the ground through the silicon substrate, and Rp is the eddy
current losses in the substrate[20].
2.3
WHAT IS A TRANSFORMER:-
2.4
TRANSFORMER APPLICATIONS:-
Transformers are used for: Impedance matching to achieve maximum power transfer between two devices.
Voltage/current step-up or step-down.
DC isolation between circuits while affording efficient AC transmission.
Interfacing between balanced and unbalanced circuits, example: push-pull amplifiers, ICs with balanced input such as A to D converters.
Common mode rejection in balanced architectures.
2.5
ELECTRICAL CHARACTERISTICS:-
A monolithic integrated planar Transformer comprises two windings. Each winding consists of an integer number of turns N 1 1,N 2 1 where N1 is the number
5
of primary turns and N2 is the number of Secondary turns. The two windings are
arranged in a single plane with conductors crossing one another .
The Turn Ratio (n) of a Transformer is one of the main electrical parameters
of interest and is defined as
n = N 1/N 2
In the case of an ideal transformer, the Turn Ratio (n) is also equivalent to
n = V1 /V2 = I2 /I1
where V1 is the voltage between the primary ports, V2 is the voltage between the
secondary ports. I1 and I2 is the current-flow into the related ports. Each winding, the Primary and the Secondary, has a self-inductance LP and LS and they are
inductively coupled denoted by the mutual-inductance M. The self inductance of
a given winding is the inductance measured at the Transformer terminals with all
other windings open circuited.
The strength of the magnetic coupling between the Primary and Secondary winding
is indicated by the Coupling Coefficient k (k-factor) as
k = MP / LP LS
A typical range for the k-factor achieved in monolithic transformer designs is 0.6
k 0.95. The phase of the voltage induced at the secondary of the Transformer
depends upon the selection of the reference terminal and basis of this Transformer
connections are of two types:-
Inverting Connection
Noninverting connection
For an ac signal source with the output and ground applied between terminals
P and P , there is minimal phase shift of the signal at the secondary if the load is
connected to terminal S(with S grounded). This is the Noninverting connection. In
the Inverting connection, terminal S is grounded and S is connected to the load so
that the secondary output is antiphase to the signal applied to the primary[13].
2.6
TRANSFORMER TOPOLOGIES:-
are identical and lie in the same plane. This configuration ensures that when both
windings have the same number of turns, they are electrically identical. In addition,
this configuration has the advantage of placing the terminals of the Transformer at
opposite ends which makes it easier to connect the transformer to other components
in the system. The Frlan[11] winding configuration was selected as the most suitable
configuration for the resonant tank of the oscillator.
Multiple conductor layers are used to fabricate an overlay or broadside coupled
Transformer. This implementation was first introduced by Finlay[12]. In this configuration two windings are on different metal layers and are staked one on top of
the other. This has the advantage of high coupling coefficient, k, because magnetic
coupling is achieved both from the edges and the flat surfaces of the metal traces.
Thus, coupling coefficients close to 0.9 are easy to achieve with this configuration. In
addition, a relatively smaller area is required to achieve the same inductance as the
other layouts. The disadvantage of this winding configuration lies in the fact that
the primary and secondary windings are constructed with different metals which
have different sheet resistances. Thus, the Q-factors of the two windings will be
different.
A Transformer can also be implemented using concentrically wound planer spirals. The common periphery between the two windings is limited to just a single
turn. Therefore, mutual coupling between adjacent conductors contributes mainly
to the self-inductance of each winding and not to mutual inductance between the
windings. As a result, the concentric spiral transformer has less mutual inductance
and more self-inductance than the Frlan and Finlay configurations, giving it a lower
k-factor. Also there is no symmetry between windings in this configuration[11][12].
2.6.1
Improved Performance
Very high Q from 40 to 70 at 4 GHZ Inductance
Reduce of capacitive effects for Inductances
Less noise
Low consumption
Integration: Light, small, compatibility
2.7
Losses arise in transformers because of the finite conductivity of the metal windings, the finite resistivity of the silicon substrate, and eddy currents in the windings and substrate. These losses lead to reduction in quality factor, self resonant
frequency. Hence, minimization of losses is important. To reduce these losses,
transformers fabricated on different substrates with different dimensions have been
studied. The following sections explain in detail about the various losses that occur
in transformers.
2.7.1
CONDUCTOR LOSSES:-
Conductor losses in monolithic transformers arise because of the finite conductivity of the metal. At low frequencies, mainly dc resistance losses due to finite
conductivity of the metal contribute to the conductor losses[14]. At high frequencies, eddy currents resulting in conductor skin and proximity effects also contribute
to the conductor losses.
METAL LOSSES:-
The metal losses arise because of the finite resistivity of the windings. This loss
can be modeled as series resistance as illustrated in Figure 2.3. The dc resistance is
directly related to the resistivity of the windings and is given as
L
(2.7.1)
wt
where R is the resistance of the winding of length L, width w, thickness t, and is
the resistivity of the winding.
R=
1
=
f
(2.7.2)
The proximity effect is another form of eddy currents, in which nearby conductive
segments experiences induced eddy currents due to the magnetic field of a separate
conductor. Proximity effect is considered as a important loss mechanism when the
distance between adjacent conductive segments in a spiral inductor is made very
small.
10
2.7.2
SUBSTRATE LOSSES:-
2.8
Lp =
Li + 2
XX
Mi,k
(2.8.1)
Ls =
Li + 2
XX
Mi,k
(2.8.2)
The primary and secondary inductances can be extracted by using the tool
FASTHENRY and by the following equations:
Lp =
11
imgZ11
(2.8.3)
Ls =
imgZ22
(2.8.4)
(2.8.5)
(2.8.6)
Cm1m2 is the capacitance per unit area between metal layers 1 and 2, lp and ls
are the lengths of primary and secondary turns, W is width of metal traces.
Csub1 and Csub2 are used to model the parasitic capacitive coupling into the
substrate.
1
Csub1 = Csub2 = W.lp .Csub
(2.8.7)
2
1
(2.8.8)
Csub3 = Csub4 = W.ls .Csub
2
Csub is the substrate capacitance per unit area.
In order to model the parasitic capacitive coupling into the oxide Cox1 to Cox4
12
is used.
Cox1 = Cox2 = W.lp .Cox
(2.8.9)
(2.8.10)
W + 6Hox + T
1
ln 2Coth
=
sub l
8
Hsub
(2.8.11)
Wp is the width of the primary turns, T is the thickness of metal layer, Hsub
is the thickness of the substrate. Similarly Rsub3 and Rsub4 can be calculated.
13
Chapter 3
QUALITY FACTOR
ENHANCEMENT
TECHNIQUES FOR INDUCTOR
AND TRANSFORMER
3.1
INTRODUCTION:-
In this chapter we have presented two approaches for the quality factor enhancement of Inductor and Transformer: (i) By fabricating the Inductor on a high
resistive glass substrate or high resistive Si substrate and this is equivalent to eliminate the substrate underneath the spiral (ii) By fabricating the Inductor farther
away the silicon substrate and within this distance use air, high resistive silicon and
silicon nitride as a cavity. The simulation results are obtained by using the tool
ASITIC. Inductors are key devices in RF circuits that, when fabricated on traditional semiconductor substrates like silicon, suffer from poor RF performances due
to substrate related RF losses and capacitive parasitics due to inter-spiral tracks/substrate coupling. Inductor and Transformer on a glass substrate results in a high
quality factor(Q) as well as high self resonance frequency(SRF) which show a good
prospect in various RFICs applications.
3.2
14
3.2.1
3.2.2
Other parasitic effect that shows up in Silicon integrated inductors is the capacitative coupling between the inductor and the substrate. In addition, ohmic losses are
produced since there are displacement currents induced in the substrate as shown
in Figure 3.2[18].
For substrates with lossless dielectrics, the higher the dielectric constant, the
higher the electric field concentration; therefore higher the current density at the
edges of the transmission line(each segment is treated as a Transmission line) and
higher the attenuation of the signal[1]. On the other hand if the dielectric constant
of the substrate is low, then capacitive parasitics will be reduced because
C=
A
if is lower then C will be reduced.
d
15
3.3
QUALITY FACTOR:-
Quality (Q) factor and self-resonant frequency (SRF) originate from resonant
circuits. They are relevant to loop inductors as the inductors exhibit finite parasitic
capacitances.
It is defined as the ratio of the energy stored to the total dissipation per cycle for a
sinusoidal excitation:
Q = 2
Energy stored
Energy lost per cycle
(3.3.1)
Energy stored
Average power loss
(3.3.2)
Q = .
Q=
ImagY11
RealY11
(3.3.3)
3.4
When the inductor starts behaving like a capacitor rather than as an inductor.
The value of the frequency where this occurs is called Self Resonance Frequency(Fsr )
of the inductor. Transformer and inductor can not be used beyond this frequency.At
self-resonance, the magnitude of the imaginary impedance is zero (the inductive and
capacitive parts cancel), yielding a Q of zero
16
3.5
The key parameters for the design of Inductors and Transformers involve the
outer dimensions or inner dimensions, width and spacing of metal tracks, number of
turns, thickness of the metal and the substrate material. The inductance as well as
its quality factor can be fine tuned by the proper selection of the above parameters.
Process related parameters are given in Table 3.1.
Table 3.1: Process Parameters
PROCESS PARAMETERS
VALUE
SUBSTRATE RESISTIVITY(sub )
10
OXIDE RESISTIVITY()
10E10
SUBSTRATE PERMITTIVITY()
11.7
OXIDE PERMITTIVITY()
3.9
METAL (ALUMINIUM) SHEET RESISTANCE(Rsh )
30
METAL (COPPER) SHEET RESISTANCE(Rsh )
30
DIMENSIONS:
OXIDE THICKNESS
1
OXIDE THICKNESS WITHOUT CAVITY
6
SUBSTRATE THICKNESS
230
CAVITY(High Resistive Silicon,Air,Glass)DEPTH
5
METAL THICKNESS(t)
1
INNER HOLE LENGTH(Lin )
40
NUMBER OF TURNS(N)
4
WIDTH OF SPIRAL(w)
variable
SPACING BETWEEN TURNS(s)
variable
VIA LENGTH
0.5
3.6
UNIT
cm
cm
F/m
F/m
m/sq
m/sq
m
m
m
m
m
m
m
m
m
17
18
19
20
3.7
Width/Spacing Quality
Factor(Qmax )
W=S=8
4.540
W=S=12
4.110
W=S=16
3.611
W=S=20
3.356
W=S=25
2.957
W=S=30
2.733
Self
Resonance
Frequency(Fsr )GHZ
16GHZ
14GHZ
13GHZ
12GHZ
10GHZ
10GHZ
Inductance(L)nH
10.040
8.195
8.027
8.778
10.358
86.907
Width/Spacing Quality
Factor(Qmax )
W=S=8
6.185
W=S=12
5.504
W=S=16
5.044
W=S=20
4.580
W=S=25
3.663
W=S=30
2.763
Self
Resonance
Frequency(Fsr )GHZ
16GHZ
14GHZ
13GHZ
12GHZ
10GHZ
10GHZ
Inductance(L)nH
9.618
8.017
7.899
8.688
10.219
91.789
Width/Spacing Quality
Factor(Qmax )
W=S=8
6.519
W=S=12
6.161
W=S=16
6.000
W=S=20
5.782
W=S=25
4.800
W=S=30
3.585
Self
Resonance
Frequency(Fsr )GHZ
11GHZ
10GHZ
9GHZ
8GHZ
7GHZ
6GHZ
21
Inductance(L)nH
12.903
10.079
9.189
9.138
10.157
11.492
3.8
Width/Spacing Quality
Factor(Qmax )
W=S=8
4.642
W=S=12
4.414
W=S=16
3.853
W=S=20
3.934
W=S=25
3.610
W=S=30
2.943
Self
Resonance
Frequency(Fsr )GHZ
11GHZ
10GHZ
9GHZ
8GHZ
7GHZ
6GHZ
Inductance(L)nH
13.505
10.471
9.437
9.358
10.122
11.596
Many techniques have been used to improve the Q-factor of inductors by reducing substrate loss, especially capacitive loss. In these techniques use high resistivity
silicon substrates, or glass or quartz to enhance the Q factor of inductor. High substrate resistivities result high Q values, whereas Q degrades quickly when resistivity
decreases between 10 and 0.1 cm, to reach values close to zero. This degradation
is due to the energy dissipation into the substrate which can be explained by analyzing both electric E and magnetic H fields in the substrate. These fields induce
leakage(E) and eddy(H) currents into the substrate which densities depend on the
resistivity. The layout of Inductor and transformer over the substrate is shown in
Figure 3.9.
23
3.9
LAYOUT OF INDUCTOR:-
A typical spiral inductor surrounded with ground is shown in Figure 3.11. Qualitatively, the spiral inductor consists of a number of series-connected metal segments.
In each segment, time varying conductive current will flow due to a time-varying
voltage impressed on the segment. Spiral inductor generally makes use of one or
more metal layers. In the most conventional design, the spiral is build with several
turns in the one of the metal layers and the end of the inductor connects to the out
of the inductor with other layer.
24
3.10
LAYOUT OF TRANSFORMER:-
In this structure, two parallel coils on the same metal layer are symmetrically
interwound side by side[11][16]. Lower metal layer conductors are used to connect
the inner terminals to other circuitry. Layout of Transformer surrounded by ground
is shown in Figure 3.14.
3.11
EXPERIMENTAL RESULTS:-
These simulation results are obtained by using the tool ASITIC(Analysis and
simulation of Inductors and Transformers in Integrated Circuits). Through ASITIC
25
we can model the electrical and magnetic behavior of passive metal structures residing above a lossy conductive substrate. In all these plots the Q-factor initially
rises with frequency as the reactive component of the impedance increases, peaks,
and then decreases due to the increasing energy dissipation at higher frequencies.
The estimated quality factor for inductor and transformer, when fabricated on High
resistive glass substrates is shown in Figure 3.9 and Figure 3.10. Inductors made on
a glass substrate have shown a Q of 14.75 at 14 GHz with an inductance of 1.974
nH and Transformers made on a glass substrate have shown a Q of 13.89 at 11 GHz
with an inductance of 2.957 nH.
The thickness of the oxide layer is an important parameter which influences the
inductor/transformer performance. The measured effect of changes in the oxide
thickness upon the component factor is illustrated in Figure 3.5 and Figure 3.6. A
thicker oxide layer reduces the parasitic capacitance of the structure, which improves
the inductor self-resonant frequency.
A spiral inductor suspended approximately 5m above the silicon substrate is
found to reduce the effect of substrate proximity on the performance of inductor.
Figure 3.4 and Figure 3.5 presents the effect of air cavity on the quality factor of the
inductor. Similarly the plot of the Q factor and inductance, when Silicon nitride is
used as a cavity is shown in Figure 3.7. The inductors with cavity have higher Q
and self-resonance frequency than one without any cavity as shown in Figure 3.8.
26
Chapter 4
VERIFICATION OF SELF AND
MUTUAL INDUCTANCE
THROUGH FASTHENRY
4.1
There are several approaches for inductance calculation. Traditionally, the concept of partial inductance is used. Partial inductances are useful when the induced
current return paths are unknown. In the partial inductance approach, the signal
lines, ground and supply lines are treated equivalently, resulting in a large, densely
coupled network representation[9]. When a multi conductor problem is described
by a set of partial inductances, the sum of the partial self and partial mutual inductances along any closed loop path will yield the total loop inductance of the
path. The most accurate way of extracting inductance is to divide the structure
into smaller regions and numerically solve the magnetic field within each region to
find the magnetic flux.
4.2
FASTHENRY:-
FASTHENRY was developed for the solution of Maxwell equations and extraction of inductances and resistances. FASTHENRY is a software for computing
the frequency-dependent self and mutual inductances and resistances of a generic
tridimensional conductive structure, in the magnetoquasistatic approximation[10]
as explained later.
FASTHENRY specifies every conductor as a sequence of rectilinear segments
connected between nodes. Every segment has a finite conductivity and the shape of
a parallelepiped, whose height and width can be assigned. A node is a point in the
27
4.3
28
Parameter
Description
wg
ws
dg
4
5
lw
ds
In first case the spacing between signal and ground is same on both the sides
i.e. Symmetric structure.
On the other hand in second case the spacing between signal and ground is
not same on both the sides i.e. Asymmetric structure.
29
Figure 4.5: Plot of self inductance by Varying the length lw of the conductor
30
31
4.4
Rsm is the series resistance, which models skin effect and ohmic losses.
Rsm =
.l
t
w..(1 e )
(4.4.1)
Cox =
ltotal .w.ox
2.tox
(4.4.2)
where tox is the oxide thickness, ltotal is the total inductor length and ox is the
permittivity of the oxide.
32
2.si .tsi
ltotal .w
(4.4.4)
where si is the permittivity of the silicon, si and resistance of the conductor
line and silicon substrate.
4.5
MODELING OF INDUCTANCE:-
Amperes law:
~
~ = J~ + E
B
(4.5.1)
t
where is the magnetic permeability and is the electric permittivity of the
material. The first term on the right-hand side represents a magnetic field generated from a wire carrying an electric current. The second term corresponds to
the magnetic field generated from the displacement current, which represents the ac
current flowing between two conductors due to their capacitive coupling as shown
in Figure 4.9. In integrated circuits, the second term is usually neglected because
the current flowing in the conductor is much larger than the displacement current.
This assumption is called the magnetoquasistatic[10] approximation.
~ = 0 I
~ dl
B.
(4.5.2)
Faradays law: According to faraday, a steady magnetic field produces no current flow, but a time varying field produces an induced voltage in a closed circuit,
33
~
B
t
(4.5.3)
~ =
~ dl
E.
~
~ ds
B.
t
(4.5.4)
With the help of both the two Equations 4.5.2 and 4.5.4, We can characterize the
interaction between electric field and magnetic field and derive the expression for
inductance. Inductance is a property of the physical layout of a conductor and is a
measure of the ability of a conductor configuration to link magnetic flux. The flux
linkage is the total magnetic field enclosed by a closed circuit. The inductance of a
current-carrying loop is defined as the ratio of the total magnetic flux penetrating
the surface of the loop and the current of the loop that produced it:
ij
=
Lij =
I
R
s
~
~ ds
B.
I
(4.5.5)
Z
12 =
B1 .ds
(4.5.6)
If the C1 consists of multiple turns N1 , the total flux produced is N1 times larger,
12 = N1 12. When two current carrying conductors are in proximity, their magnetic flux lines interact with each other. If the currents flow in same directions,
inductance of each conductor is increased. Currents flowing in the opposite direction decrease each conductors inductance. The change in an isolated conductors
inductance when in proximity to another conductor is known as their mutual inductance. The mutual inductance M12 , between two loops is defined as the following:
34
N1 N2
I1
M12 =
(4.5.7)
The self inductance, L11 , is defined from the magnetic flux produced by I1 enclosed by the contour C1 as the following:
11
I1
L11 =
(4.5.8)
r1 b
(4.5.9)
0 Ii
B~out = a
,
2r2
r2 b
(4.5.10)
where B~in is the magnetic field density vector inside the conductor and B~out is the
vector outside the conductor. The current in a unit length of this annular ring[Figure
4.11] is linked by the flux that can be obtained by integrating Equation 4.5.5, through
this we are able to derive the formula of the internal inductance per unit length.
d0in
Z
=
0 Ii 2
(b r2 )
4b2
Bin dr =
r
d0in =
0in
2rdr 0
d
b2
(4.5.11)
(4.5.12)
d0in
(4.5.13)
2rdr 0 Ii 2
(b r2 )dr
b2 4b2
(4.5.14)
=
0
0in
Z
=
0
0in
2 0 Ii
=
b2 4b2
Z
0
35
[rb2 r3 ]dr
(4.5.15)
b
0 Ii b2 r2 r4
=
2b4 2
4 0
(4.5.16)
0 Ii b4
=
2b4 4
(4.5.17)
L0in =
0in
0
=
Ii
8
(4.5.18)
4.6
0in
0
=
Ii
4
(4.5.19)
SELF INDUCTANCE:-
The total magnetic flux generated by a current can be partitioned into the portion lying outside the conductor plus the flux that lies inside the conductor. The
storage of energy associated with the internal flux leads to internal inductance and
that associated with the external flux is represented by external inductance[8].
Now compute the self inductance when there is only one signal conductor surrounded by ground on both the sides as shown in Figure 4.12. Considering that the
distance between the signal and ground is equal on both the sides.
Total self inductance(Lself ) = lw (Lint + Lext )
Lint =
0
0
(1 + 0.5) = 1.5
8
8
Due to ground:
Bg = 0.5
0 Ii
2x
Due to signal:
0 Ii
2[rg + dg + rs x]
Bsi =
Lext =
x
Ii
x =
R rg +dg
x
=
Ii
rg
rg
rg +dg
0.50
0
dx
+
2x
2[rg + dg + rs x]
36
rg +dg
rg
0.5
1
+
dx
x
[rg + dg + rs x]
rg +dg
0
ln x0.5
=
2 rg + dg + rs x rg
0 ln (rg + dg )0.5 ln (rg )0.5
=
2
rs
rs + dg
0 ln (rg + dg )0.5 .(rs + dg )
=
2
rs .rg0.5
x
=
Ii
0 Ii
2[0.5wg + dg + ws + dg1 x]
dg1 +0.5ws
dg1
0.50
0
+
dx
2x
2[0.5wg + dg + ws + dg1 x]
dg1 +0.5ws
0
ln x0.5
=
2 0.5wg + dg + ws + dg1 x dg1
0 ln (dg1 + 0.5ws )0.5 .(0.5wg + dg + 0.5ws )
=
2
(0.5wg + dg + ws )d0.5
g1
37
Lself 1
0 15
= lw
2 40
ln (rg + dg )0.5 .(rs + dg )
+
rs .rg0.5
ln (dg1 + 0.5ws )0.5 .(0.5wg + dg + 0.5ws )
(0.5wg + dg + ws )d0.5
g1
(4.6.1)
Similarly the effect of ground G1 can be calculated but as the distance is equal on
both the sides, the expression will be identical.
Self InductanceLself 1 = G1 S1 - Effect of ground(G2 )
Total Self Inductance = 2.Lself 1
Compute the self inductance for Asymmetric structure, When the distance between
the signal and the ground is not equal on both the sides as shown in Figure 4.13.
Lint =
0
0
(1 + 0.5) = 1.5
8
8
0 ln (rg + dg )0.5 .(rs + dg )
==
2
rs .rg0.5
x
=
Ii
0 Ii
2[rg + dg1 + rs x]
R
rg
rg +dg1
0.50
0
+
dx
2x
2[rg + dg1 + rs x]
0 ln (rg + dg1 )0.5 .(rs + dg1 )
=
2
rs .rg0.5
0 Ii
2[0.5wg + dg1 + ws + dg2 x]
38
dg2 +0.5ws
dg2
0.50
0
+
dx
2x
2[0.5wg + dg1 + ws + dg2 x]
dg2 +0.5ws
0
ln x0.5
=
2 0.5wg + dg1 + ws + dg2 x dg2
0 ln (dg2 + 0.5ws )0.5 .(0.5wg + dg1 + ws )
=
2
(0.5wg + dg1 + 0.5ws )d0.5
g2
Self Inductance due to the effect of Ground G1 on Ground G2 :Bsi =
x
=
Ii
0 Ii
2[0.5wg + dg + ws + dg3 x]
dg3 +0.5ws
dg3
0.50
0
+
dx
2x
2[0.5wg + dg + ws + dg3 x]
dg3 +0.5ws
ln x0.5
0
=
2 0.5wg + dg + ws + dg3 x dg3
0 ln (dg3 + 0.5ws )0.5 .(0.5wg + dg + ws )
=
2
(0.5wg + dg + 0.5ws )d0.5
g3
39
Lself 1
0 15
= lw
2 40
ln (rg + dg )0.5 .(rs + dg )
+
rs .rg0.5
+
4.7
(4.6.2)
MUTUAL INDUCTANCE:-
0 Ii
2x
Due to signal:
40
Bsi =
0 Ii
2[0.5wg + dg + ds + 1.5ws x]
1
x0 =
l
x0 =
x0
=
Ii
R
Slap
Bdsoverlap
0.5wg
0
0
+
dx
2x 2[0.5wg + dg + ds + 1.5ws x]
0.5wg
0.5wg +dg +ws 1
1
0
+
dx
=
2 0.5wg
x [0.5wg + dg + ds + 1.5ws x]
0.5wg +dg +ws
0
ln x
=
2 0.5wg + dg + ds + 1.5ws x 0.5wg
0 ln(0.5wg + dg + ws )
ln(0.5wg )
=
2
(ds + 0.5ws )
(dg + ds + 1.5ws )
0 ln(0.5wg + dg + ws )(dg + ds + 1.5ws )
=
2
(ds + 0.5ws )0.5wg
41
0.5wg +dg +ws
0
ln x
=
2 0.5wg + dg + 2ds + 2.5ws x 0.5wg
0 ln(0.5wg + dg + ws )
ln(0.5wg )
=
2
(2ds + 1.5ws )
(dg + 2ds + 2.5ws )
0 ln(0.5wg + dg + ws )(dg + 2ds + 2.5ws )
=
2
(2ds + 1.5ws )0.5wg
Due to signal:
0 Ii
2[0.5wg + dg + 2ds + 2.5ws x]
0.5wg +dg +2ws +ds
0
0
(M23 ) =
+
dx
2x 2[0.5wg + dg + 2ds + 2.5ws x]
0.5wg
0.5wg +dg +2ws +ds 1
0
1
=
+
dx
2 0.5wg
x [0.5wg + dg + 2ds + 2.5ws x]
Bsi =
0.5wg +dg +2ws +ds
ln x
0
=
2 0.5wg + dg + 2ds + 2.5ws x 0.5wg
0 ln(0.5wg + dg + 2ws + ds )
ln(0.5wg )
=
2
(ds + 0.5ws )
(dg + 2ds + 2.5ws )
0 ln(0.5wg + dg + 2ws + ds )(dg + 2ds + 2.5ws )
=
2
(ds + 0.5ws )0.5wg
42
l0 1
M =
2 4
ln(0.5wg + dg + ws )(dg + ds + 1.5ws )
+
(ds + 0.5ws )0.5wg
ln(0.5wg + dg + 2ws + ds )(dg + 2ds + 2.5ws )
+
(ds + 0.5ws )0.5wg
ln(0.5wg + dg + ws )(dg + 2ds + 2.5ws )
+
(2ds + 1.5ws )0.5wg
4.8
(4.7.1)
EXPERIMENTAL RESULTS:-
When line spacing decreases, it is observed that the inductance of the meander coil decreases. This is because meander coil has negative mutual inductance as
shown in Figure 4.3. The plot for symmetric structure and asymmetric structure
is shown in Figure 4.6 and Figure 4.7. A comparison is made between derived and
FASTHENRY for self inductance variation with increasing distance of ground plane
dg , as shown in Figure 4.4. Initially the error is very small but as the distance
increases error increases linearly.
The plot for self inductance calculated from FASTHENRY as well as analytically
by varying the length of the conductor and keeping the distance between ground
and signal fixed is shown in Figure 4.5.
43
Chapter 5
CONCLUSIONS
In this work significant efforts have been emphasized, to enhance the Q factor
and self resonance frequency of Inductor and Transformer. Efforts were focused on
dimensional and material optimizations to minimize the associated resistance and
capacitance. Metals such as Cu and Al were investigated. Losses introduced by the
conductive substrate tend to dominate performance at higher frequencies. However,
these losses do not significantly degrade the performance in the low GHz frequency
range. To reduce parasitic effects of the substrate cavity(air,high resistive silicon
and silicon nitride) has been used and reported a high value of Q factor.In spite
of some practical issues, this technology can give a light to the current integrated
inductor technology, since the process is very simple and the inductor performance
can approach its maximum value by eliminating the substrate coupling almost completely.
Derived the Expression of self inductance for ground signal ground structure
surrounded by ground on both the sides. This expression can be applied to Meander,
Spiral inductor or Transformer, for calculating the self inductance of individual
segment and the total self inductance will be equal to sum of all the individual
segments. The derived expression is also verified with a field simulator such as
FASTHENRY.
44
Appendix A
FASTHENRY CODING OF
SPIRAL INDUCTOR:* Spiral Inductor
n7 x=-2 y=2
n8 x=-2 y=-2
n9 x=2 y=-2
n10 x=2 y=3
n11 x=-3 y=3
n12 x=-3 y=-3
n13 x=3 y=-3
n14 x=3 y=4
n15 x=-4 y=4
n16 x=-4 y=-4
n17 x=4 y=-4
*Segment Declaration
e1 n1 n2 w=0.1 h=0.1
e2 n2 n3 w=0.1 h=0.1
e3 n3 n4 w=0.1 h=0.1
e4 n4 n5 w=0.1 h=0.1
e5 n5 n6 w=0.1 h=0.1
e6 n6 n7 w=0.1 h=0.1
e7 n7 n8 w=0.1 h=0.1
e8 n8 n9 w=0.1 h=0.1
e9 n9 n10 w=0.1 h=0.1
e10 n10 n11 w=0.1 h=0.1
e11 n11 n12 w=0.1 h=0.1
e12 n12 n13 w=0.1 h=0.1
e13 n13 n14 w=0.1 h=0.1
e14 n14 n15 w=0.1 h=0.1
e15 n15 n16 w=0.1 h=0.1
e16 n16 n17 w=0.1 h=0.1
.external n1 n17
*Frequency Range
.freq fmin=1e9 fmax=1e10
*Programme end
.end
46
Appendix B
FASTHENRY CODING OF
TRANSFORMER:* Transformer
n3 x=0 y=40
n4 x=0 y=-40
n5 x=80 y=-40
n6 x=80 y=80
n7 x=-40 y=80
n8 x=-40 y=-80
n9 x=120 y=-80
n10 x=120 y=120
n11 x=-80 y=120
n12 x=-80 y=-120
n13 x=160 y=-120
n14 x=160 y=160
n15 x=-120 y=160
n16 x=-120 y=-160
n17 x=200 y=-160
n18
n19
n20
n21
n22
n23
n24
n25
n26
n27
n28
n29
n30
n31
n32
n33
n34
x=20 y=20
x=20 y=-20
x=60 y=-20
x=60 y=60
x=-20 y=60
x=-20 y=-60
x=100 y=-60
x=100 y=100
x=-60 y=100
x=-60 y=-100
x=140 y=-100
x=140 y=140
x=-100 y=140
x=-100 y=-140
x=180 y=-140
x=180 y=180
x=-140 y=180
*Segment Declaration
e1
e2
e3
e4
n1
n2
n3
n4
n2
n3
n4
n5
w=10
w=10
w=10
w=10
h=1
h=1
h=1
h=1
48
e5 n5 n6 w=10 h=1
e6 n6 n7 w=10 h=1
e7 n7 n8 w=10 h=1
e8 n8 n9 w=10 h=1
e9 n9 n10 w=10 h=1
e10 n10 n11 w=10 h=1
e11 n11 n12 w=10 h=1
e12 n12 n13 w=10 h=1
e13 n13 n14 w=10 h=1
e14 n14 n15 w=10 h=1
e15 n15 n16 w=10 h=1
e16 n16 n17 w=10 h=1
e17
e18
e19
e20
e21
e22
e23
e24
e25
e26
e27
e28
e29
e30
e31
e32
n18
n19
n20
n21
n22
n23
n24
n25
n26
n27
n28
n29
n30
n31
n32
n33
n19
n20
n21
n22
n23
n24
n25
n26
n27
n28
n29
n30
n31
n32
n33
n34
w=10
w=10
w=10
w=10
w=10
w=10
w=10
w=10
w=10
w=10
w=10
w=10
w=10
w=10
w=10
w=10
h=1
h=1
h=1
h=1
h=1
h=1
h=1
h=1
h=1
h=1
h=1
h=1
h=1
h=1
h=1
h=1
49
50
Appendix C
DIMENSIONS OF INDUCTOR
LAYOUT:1170m
100m
100m
100m
50m
30m
30m
50m
30m
50m
970m
1170m 50m
30m
30m 30m
30m20m
30m
30m
40m
30m
50m
335m
30m
30m
50m
970m
100m
51
50m
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52
53