Basic Digital Logic Design: by Chau, Chien Fat (Universiti Tenaga Nasional)

Copyright 2013 Pearson Education Ltd . Permission required for reproduction or display.
Basic Digital Logic Design
by Chau, Chien Fat (Universiti Tenaga Nasional)
Topic Outline:
Boolean algebra
Logic gates
Combinational logic design
Logic minimization
Karnaugh Map
Timing & Hazards
Number codes
Boolean Algebra
Digital design is based on processing binary signals
In simplicity, signals can take one of two algebra values
ON or OFF
TRUE or FALSE
1 or 0
Algebra of two values is known as Boolean algebra,
named after George Boole (1815 1864), and is the

basic mathematics used for logic design
VHDL provides ways to represent signals similar to in
reality
Boolean Algebra (2)

Five basic operators, in order of decreasing precedence
NOT (overbar or )
AND (aka . )
OR (aka +)
IMPLIES
EQUIVALENCE
The last two operators are not normally used in digital
design
These operators are used to form expressions.
Boolean Algebra (3)

The meaning of an operator or expression can be
described by a truth table

A truth table lists all the possible values of the
variables in an expression, together with the value of
the expression
The truth tables for the 3 basic operators:
Boolean Algebra (4)

In digital design, 3 more operators are commonly used
NAND (Not AND)
NOR (Not OR)
XOR (eXclusive OR)
Boolean Algebra (5)

There are 12 basic rules of Boolean algebra:
1. A + 0 = A
2. A + 1 = 1
3. A . 0 = 0
7. A . A = A
8. A . A = 0
=
9. A = A
4. A . 1 = A
10. A + AB = A
5. A + A = A
11. A + AB = A + B
6. A + A = 1
12. (A + B)(A + C) = A + BC
Boolean Algebra (6)

Some basic laws in Boolean algebra:
Commutative Laws
Associative Laws
Distributive Laws
Principle of duality if each AND is changed to an OR,
each OR to an AND, each 1 to 0 and each 0 to 1, the

value of expression remains the same.
Boolean Algebra (6)

DeMorgans Law:
Can be used to form the complement of an expression
Used to rewrite Boolean expressions in terms of NAND
or NOR operations
Logic Gates
Basic logic gates with one and two inputs:
10
Logic Gates (2)

IEEE notation is normally used for complex systems,
but traditional symbols are preferred for simple

sketches
A circle shows logic inversion
Two forms of NAND and NOR gates
Can use DeMorgans Law to show that both are
equivalent
For clarity, choose the form of logic gate that allows
inverting circles to be joined
11
Logic Gates (3)

Example implementation in (b) is preferred over (c)
12
Combinational Logic Design

Combinational logic outputs depend only on inputs
and are independent of previous inputs / states.

Logic minimization; usually less gates => less cost
Assume a number of inputs, a single output
Minterm Boolean AND function containing exactly
one instance of each input variable or its inverse
Maxterm Boolean OR function with exactly one
instance of each input variable or its inverse
For a combi logic with n input variables, there are 2n
possible minterms and 2n possible maxterms
13
Combinational Logic Design (2)

If the logic is true at row i
of the truth table, that

minterm exists and is
designated by mi.
If the logic is false at row i
of the truth table, that
maxterm exists and is
designated by Mi.
14

The logic function may be described by the logic OR of
its minterms:
In canonical sum of product form:
Each variable is inverted if there is corresponding 0 in
the truth table and not inverted if there is 1

15

Similarly, the logic function may be described by
logical AND of its maxtems:
In canonical product of sum form:
Each variable is inverted if there is corresponding 1 in
the truth table and not inverted if there is 0

16

An implicant is a term that covers at least one true
value and no false values of a function

A prime implicant is an implicant that covers one or
more minterms of a function
An essential prime implicant is a prime implicant
that covers an implicant not covered by any other
prime implicant
17

Eg.: Z = A + A.B
The implicants are A.B, A, B, A.B
and A.B
The prime implicants are A and B
The essential prime implicants are
A and B
18
Logic Minimization
Simplify Boolean expression => minimize the number
of gates needed
To find set of prime implicants of a function
In principal, it is possible to simplify Boolean
expressions by applying the rules of Boolean algebra

But this approach is slow and error prone
Example:
19
Logic Minimization (2)

Other techniques include:
Karnaugh maps a graphical method but limited to six
or fewer variables
Quine-McCluskey algrorithm a tabular method
Logic minimization belongs to NP-complete problems
increase in number of variables leads to exponential

increase in time to find a solution
EDA tools more suited for large variables problems
20
Karnaugh Maps
A Karnaugh map (or K- map) is effectively another way
to write a truth table

It generates solution in sum-of-product (SOP) or
product-of-sums (POS) form.
Such a solution can be implemented directly as twolevel AND-OR or OR-AND logic.
AND-OR logic is equivalent to NAND-NAND logic
OR-AND logic is equivalent to NOR-NOR logic
Example of general K-maps:

21
Karnaugh Maps (2)
22
Karnaugh Maps (3)
23
Karnaugh Maps (4)
24
Karnaugh Maps (5)

K-map uses Gray code, ie only one variable changes at
one time, hence sequence 00, 01, 11, 10

Along the top edge of 3-variable K-map
Along both edges of 4-variable K-map
3-variable K-map is really a tube; a 4-variable K-map is
a torus
A 5-variable K-map is drawn as two 4-variable K-maps
=> one represents the truth table when the fifth
variable is true; the other one when it is false.
25
Karnaugh Maps (6)

A 6-variable K-map is drawn as four 4-variable K-maps
In practice, it is not feasible to consider K-maps with
more than six variables

Implicants can be read from K-maps by circling groups
of 1, 2, 4, 8, , 2n true values.
Eg.: Z = A.B + A.B
26
Karnaugh Maps (7)

Rules of reading the prime implicants from a K-map:
Circle the largest possible groups
Avoid circle inside circles
Circle 1s and read the sum of products for Z
Circle 0s and read the sum of products for Z.
Circle 0s and read the product of sums for Z.
Circle 1s and read the product of sums for Z.
27
Karnaugh Maps (8)

Eg of 3-variable K-map
28
Karnaugh Maps (9)

29
Karnaugh Maps (10)

30
Karnaugh Maps (11)

Diagonal pair corresponds to XOR function
Redundant pairs can be removed to achieve minimum
form, but may introduce hazard
31
Karnaugh Maps (12)
32
Karnaugh Maps (12)

Incompletely specified functions have dont care
condition in the truth tables

Correspond to input combination that will not (or
should not) occur
Treat dont care as 1
X
X
33
Timing & Hazards

Fully minimized Boolean expression may not be
desirable
Real implementation needs to consider delay, and hence
hazard
Timing diagram a diagram of the input and output
waveforms as a function of time

Eg. timing diagram of an inverter
Causality change in the output results from a change in
the input
34
Timing & Hazards (2)
35

More complex example:
One implementation is as follows which introduce
static 1 hazard
36
37

Different types of hazard:
Static 1 hazard can occur in AND-OR or NAND-NAND
logic
Static 0 hazard can occur in OR-AND or NOR-NOR logic
Dynamic hazards do not occur in two-level circuits; they
need three or more unequal signal paths
Dynamic hazards often caused by poor factorization in
multi-level minization
38

Different types of hazard:
39

Static hazards can be avoided by designing with
redundant logic
Eg in previous slide; the hazard-free circuit function is
therefore
40
Number Codes
Information takes the form of numbers of characters.
Suitable coding of numbers in suitable form is
important for storage and manipulation of digital

hardware.
No one coding system is better than another.
However there are standards so that different systems
can communicate.
Integers, fixed-point numbers, floating-point
numbers, alphanumeric characters, Gray codes, parity
bits
41
Number Codes Integers

Positive integers simplest form of coding
Eg.: three bits to represent decimal integers 0 to 7.
In base 2 arithmetic , 0002 represents 010, 0112
represents 310 and 1112 represents 710.
Most significant bit is on the left
Strings of bits can be grouped into sets of three octal
(base 8) or sets of four hexadecimal (base 16) notation.
Eg.: 668 is equal to 110 1102 or 5410
Eg.: EDA16 is 1110 1101 10102 or 73328 or 380210
42
Number Codes Integers (2)

Signed integers simplest form of coding negative
numbers
Set aside one bit as sign bit
Eg.: 0 1102 is + 610 while 1 1102 is -610
Addition and subtraction require that the sign bits are
checked before operation
Twos complement notation based on 2n b

Code for b, where b is a binary number represented
using n bits is given as 2n b
Eg.: -610 is 100002 01102 = 10102
43
Number Codes Integers (3)

Inverting all bits and adding 1: -610 is 10012 + 1 = 10102
Advantage addition and subtraction can be performed
using the same hardware; no need to check sign bit

Disadvantage multiplication and division become
much more complicated.
44
Number Codes Fixed-point numbers

Non-integer data same binary representation as for
integer number, except there is an implicit decimal

point
Eg.: 6.25 is equal 22 + 21 + 2-2 or 110.012
Instead of representing the point, the number 110012
(2510) is stored with implicit knowledge that it and the

results of any operations involving it have to be divided
by 22 to obtain the true value
All operations including twos complement
representations are the same as for integer numbers
45
Number Codes Floating-point

numbers
The number of bits that have been allocated to
represent fractions limits the range of fixed-point

number.
Floating-point numbers allow much wider range of
accuracy
Only performed using specialized hardware as they are
computationally expensive
46
Number Codes Floating-point

numbers (2)
Typical single-precision floating point number has 32
bits one is sign bit (s), eight are exponent (e) in twos
complement form, the remaining 23 are the mantissa
(m)
Hence a decimal number is typically represented as
IEEE standard, 754-1985 defines formats for 32, 64 and
128 bit floating-point numbers

47
Number Codes Alphanumeric

characters
Characters are commonly represented by 7 or 8 bits
The ASCII character encoding scheme based on
alphabet
Seven bits allow Latin alphabet in upper and lower
cases, plus punctuation symbols and control codes
Eg.: A is represented 10000012 or 4116
48
Number Codes Gray codes

Bit changes during transition may not be desirable
since bit changes may not occur at exactly the same

time => the intermediate values might generate
spurious warnings
Gray code is one example in which only one bit
changes at a time
Eg. of a three-bit Gray code:
000 -> 001 -> 011 -> 010 -> 110 -> 111 -> 101 -> 100
The sequence of bits on a K-map is a Gray code.
49
Number Codes Gray codes (2)

Another use of Gray code is as a position encoder on a
rotating shaft as follows
50
Number Codes Parity bits

Noise may cause bit to be misinterpreted. Hence, it is
desirable to know that an error has occurred, so that

correction or retransmission could be made
Simplest form of error detection is to use a parity bit
(check bit) with each word of data.
For each eight bits of data, a ninth bit is sent
Ninth bit is 0 if there are even number of ones in the
data word (or 1 otherwise making number of ones even)

=> even parity
Eg. 1010 1101 1 5 1s hence parity bit is 1
51
Number Codes Parity bits (2)

Odd parity => Ninth bit is 1 if there are already even
number of ones in the data word (or 0 otherwise making

number of ones odd)
Eg. 1010 1101 0 5 1s hence parity bit is 0
Cannot tell which bit is in error, but knowing that an
error has occurred which means that the data can be

transmitted again
If two errors occur, the parity bit might appear to be
correct
52

Single error can be corrected using two-dimensional
parity scheme:
Every ninth word is itself a set of parity bits
53

If a single error occurs, both the row parity and even
parity will be incorrect, allowing the erroneous bit to be

identified and corrected
Other better error correction scheme include the
Hamming (derived in 1948) and Reed and Solomon

(1960)
54

Basic Digital Logic Design: by Chau, Chien Fat (Universiti Tenaga Nasional)

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Copyright 2013 Pearson Education Ltd . Permission required for reproduction or display.

Basic Digital Logic Design

by Chau, Chien Fat (Universiti Tenaga Nasional)

by Chau, Chien Fat (Universiti Tenaga Nasional)

named after George Boole (1815 1864), and is the

Boolean Algebra (2)

Boolean Algebra (3)

described by a truth table

by Chau, Chien Fat (Universiti Tenaga Nasional)

Boolean Algebra (4)

by Chau, Chien Fat (Universiti Tenaga Nasional)

Boolean Algebra (5)

by Chau, Chien Fat (Universiti Tenaga Nasional)

Boolean Algebra (6)

each OR to an AND, each 1 to 0 and each 0 to 1, the

Boolean Algebra (6)

by Chau, Chien Fat (Universiti Tenaga Nasional)

by Chau, Chien Fat (Universiti Tenaga Nasional)

Logic Gates (2)

but traditional symbols are preferred for simple

by Chau, Chien Fat (Universiti Tenaga Nasional)

Logic Gates (3)

by Chau, Chien Fat (Universiti Tenaga Nasional)

Combinational Logic Design

and are independent of previous inputs / states.

Combinational Logic Design (2)

of the truth table, that

by Chau, Chien Fat (Universiti Tenaga Nasional)

Combinational Logic Design (3)

In canonical sum of product form:

Each variable is inverted if there is corresponding 0 in

the truth table and not inverted if there is 1

Combinational Logic Design (4)

logical AND of its maxtems:

In canonical product of sum form:

Each variable is inverted if there is corresponding 1 in

the truth table and not inverted if there is 0

Combinational Logic Design (5)

value and no false values of a function

by Chau, Chien Fat (Universiti Tenaga Nasional)

Combinational Logic Design (6)

by Chau, Chien Fat (Universiti Tenaga Nasional)

In principal, it is possible to simplify Boolean

expressions by applying the rules of Boolean algebra

by Chau, Chien Fat (Universiti Tenaga Nasional)

Logic Minimization (2)

increase in number of variables leads to exponential

by Chau, Chien Fat (Universiti Tenaga Nasional)

to write a truth table

Example of general K-maps:

Karnaugh Maps (2)

by Chau, Chien Fat (Universiti Tenaga Nasional)

Karnaugh Maps (3)

by Chau, Chien Fat (Universiti Tenaga Nasional)

Karnaugh Maps (4)

by Chau, Chien Fat (Universiti Tenaga Nasional)

Karnaugh Maps (5)

one time, hence sequence 00, 01, 11, 10

3-variable K-map is really a tube; a 4-variable K-map is

Karnaugh Maps (6)

more than six variables

by Chau, Chien Fat (Universiti Tenaga Nasional)

Karnaugh Maps (7)