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Kultur Dokumente
11/29/2007
General Description
Features
It features a high-
circuit.
Applications
DIP-8 package.
Typical Application
1
Leadtrend Technology Corporation
LD7575-DS-04b November 2007
www.leadtrend.com.tw
LD7575
Pin Configuration
HV
NC
VCC
OUT
YY:
WW:
PP:
TOP MARK
CS
GND
RT
COMP
YYWWPP
Year code
Week code
Production code
Ordering Information
Part number
Package
Top Mark
Shipping
LD7575 PS
SOP-8
PB Free
LD7575PS
LD7575 GS
SOP-8
Green Package
LD7575GS
LD7575 PN
DIP-8
PB Free
LD7575PN
Pin Descriptions
PIN
NAME
FUNCTION
RT
COMP
CS
GND
Ground
OUT
VCC
NC
Unconnected Pin
This pin will program the switching frequency, to connect a resistor with ground to
set the switching frequency.
Voltage feedback pin (same as the COMP pin in UC384X), By connecting a
photo-coupler to close the control loop and achieve the regulation.
Current sense pin, connect to sense the MOSFET current
Connect this pin to positive terminal of bulk capacitor to provide the startup current
8
HV
for the controller. When Vcc voltage trips the UVLO(on), this HV loop will be off to
save the power loss on the startup circuit.
2
Leadtrend Technology Corporation
LD7575-DS-04b November 2007
www.leadtrend.com.tw
LD7575
Block Diagram
HV
1mA
8V
POR
UVLO
Comparator
32V
OVP
Comparator
internal bias
& Vref
16.0V/
10.0V
VCC
27.5V
VCC OK
RT
PG
OSC
Vref OK
R
OVP
Green-Mode
Control
PG
Vbias
PWM
Comparator
COMP
2R
OLP
R
R
Leading
Edge
Blanking
CS
Slope
Compensation
Driver
Stage
POR
OCP
Comparator
0.85V
clear
30mS
Delay
5.0V
OLP
Comparator
S
/2
Counter
PG
GND
3
Leadtrend Technology Corporation
LD7575-DS-04b November 2007
www.leadtrend.com.tw
OUT
LD7575
Absolute Maximum Ratings
Supply Voltage VCC
30V
High-Voltage Pin, HV
-0.3V~500V
COMP, RT, CS
-0.3 ~7V
Junction Temperature
150C
-40C to 85C
-65C to 150C
160C/W
100C/W
400mW
650mW
260C
3KV
200V
500mA
Caution:
Stresses beyond the ratings specified in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only
rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not
implied.
Min.
Max.
11
25
Vcc Capacitor
10
47
Switching Frequency
50
130
KHz
4
Leadtrend Technology Corporation
LD7575-DS-04b November 2007
www.leadtrend.com.tw
Unit
LD7575
Electrical Characteristics
o
CONDITIONS
MIN
TYP
MAX
UNITS
0.5
1.0
1.5
mA
35
100
VCOMP=0V
2.0
3.0
mA
VCOMP=3V
2.5
4.0
mA
0.5
mA
UVLO (off)
9.0
10.0
11.0
UVLO (on)
15.0
16.0
17.0
OVP Level
25.0
27.5
30.0
2.2
mA
VCOMP=0V
1.5
6.0
2.35
0.80
0.85
0.90
350
Input impedance
nS
Delay to Output
M
100
nS
RT=100K
60.0
65.0
70.0
Fs=65.0KHz
Temp. Stability
(-40C ~105C)
Voltage Stability
(VCC=11V-25V)
VCC=15V, Io=20mA
VCC=15V, Io=20mA
Rising Time
Load Capacitance=1000pF
50
160
nS
Falling Time
Load Capacitance=1000pF
30
60
nS
20
KHz
KHz
Fs=65KHz
Note: The OLP delay time is proportional to the period of switching cycle.
frequency and the shorter OLP delay time.
5
Leadtrend Technology Corporation
LD7575-DS-04b November 2007
www.leadtrend.com.tw
5.0
30
mS
LD7575
Typical Performance Characteristics
0.90
0.89
1.3
1.5
1.1
0.88
0.87
0.9
0.86
0.7
-40
40
80
0.85
120 125
-40
Temperature (C)
Fig. 2
18.0
12
17.2
11.2
16.4
15.6
125
120
125
120
125
Temperature (C)
VCS (off) vs. Temperature
9.6
8
-40
40
80
120 125
-40
40
80
Temperature (C)
Fig. 4 UVLO (off ) vs. Temperature
70
26
68
24
Frequency (KHz)
Frequency (KHz)
120
10.4
Temperature (C)
Fig. 3 UVLO (on) vs. Temperature
66
64
22
20
18
62
60
80
8.8
14.8
14.0
40
16
-40
40
80
120
125
-40
40
80
6
Leadtrend Technology Corporation
Temperature (C)
Temperature (C)
Fig. 5 Frequency vs. Temperature
www.leadtrend.com.tw
LD7575
25
70
Frequency (KHz)
68
66
64
62
12
14
16
18
20
22
24
21
19
17
15
11
25
12
14
16
22
80
30
75
70
65
24
25
120
125
120
125
25
20
15
60
10
-40
40
80
120 125
-40
40
80
Temperature (C)
Temperature (C)
Fig. 10
6.0
6.5
5.5
6.0
5.0
OLP (V)
VCOMP (V)
20
Vcc (V)
85
5.5
5.0
4.5
18
Vcc (V)
60
11
23
4.5
4.0
-40
40
80
3.5
120 125
-40
Temperature (C)
Fig. 11 VCOMP open loop voltage vs. Temperature
Fig. 12
7
Leadtrend Technology Corporation
LD7575-DS-04b November 2007
www.leadtrend.com.tw
40
80
Temperature (C)
OLP-Trip Level vs. Temperature
LD7575
Application Information
threshold thus the current source is on to supply a current
Operation Overview
and the power saving is getting more and more important for
Vcc capacitor.
high-line conditions.
transformer.
achieved.
Vin
power MOSFET.
Cbulk
D1
R1
during startup.
Vcc
HV
VCC
OUT
UVLO(on)
LD7575
UVLO(off)
CS
Comp
GND
Rs
Fig. 13
HV Current
~ 0mA (off)
Vcc current
Operating Current
(Supply from Auxiliary Winding)
Fig. 14
During the startup transient, the Vcc is lower than the UVLO
8
Leadtrend Technology Corporation
LD7575-DS-04b November 2007
www.leadtrend.com.tw
LD7575
Current Sensing, Leading-edge Blanking and
the Negative Spike on CS Pin
The typical current mode PWM controller feedbacks both
current signal and voltage signal to close the control loop
and achieve regulation. The LD7575 detects the primary
MOSFET current from the CS pin, which is not only for the
peak current mode control but also for the pulse-by-pulse
current limit. The maximum voltage threshold of the current
sensing pin is set as 0.85V. Thus the MOSFET peak current
can be calculated as:
IPEAK(MAX) =
0.85 V
RS
Fig. 15
It is
1
( VCOMP 2VF )
3
Fig. 16
9
Leadtrend Technology Corporation
LD7575-DS-04b November 2007
www.leadtrend.com.tw
LD7575
threshold 5.0V and keeps longer than 30mS (when
and then turns off the gate output to stop the switching of
power circuit.
65.0
100(KHz)
RT(K )
internal
slope
compensation
circuit
has
been
On/Off Control
The LD7575 can be controlled to turn off by pulling COMP
pin to lower than 1.2V.
are
many
difference
topologies
has
been
requirements
such
as
burst-mode
control,
Fig. 17
toward the saturation and thus pull the voltage on COMP pin
(VCOMP) to high.
protection.
10
Leadtrend Technology Corporation
LD7575-DS-04b November 2007
www.leadtrend.com.tw
LD7575
the OVP level again and re-shutdown the output.
is working as a hiccup mode.
disconnected.
The Vcc
operation.
VCC
OVP Tripped
OVP Level
UVLO(on)
UVLO(off)
t
OUT
Switching
Non-Switching
Switching
Fig. 18
Fault Protection
A lot of protection features have been implemented in the
LD7575 to prevent the power supply or adapter from being
damaged caused by single fault condition on the open or
Fig. 19
RT pin floating
CS pin floating
11
Leadtrend Technology Corporation
LD7575-DS-04b November 2007
www.leadtrend.com.tw
Therefore, the
LD7575
Protection Resistor on the Hi-V Path
In some other Hi-V process and design, there may cause a
parasitic SCR between HV pin, Vcc and GND.
As shown
dV
i = Cgd bulk
dt
Figure 23
Fig. 20
Fig. 21
Fig. 22
12
Leadtrend Technology Corporation
LD7575-DS-04b November 2007
www.leadtrend.com.tw
LD7575
Reference Application Circuit --- 10W (5V/2A) Adapter
Pin < 0.15W when Pout = 0W & Vin = 264Vac
Schematic
L
AC
input
F1
R1A
R1B
NTC1
Z1
CX1
LD7575
COMP
HV
FL1
IC1
RT
RT
5
R9
OUT
CS
D1A~D1D
C1
VCC
GND
D2
C2
R7
R6
R4A
R4B
R8
C5
D4
C4
RS1
T1
Q1
RS2
C51
C52
R56A ZD51
R54
L51
C55
R55
R56B
R52
R53
C54
www.leadtrend.com.tw
R51B
R51A
CR51
IC2
photocoupler
CY1
IC5
13
Leadtrend Technology Corporation
LD7575
BOM
P/N
Component Value
Original
P/N
Component Value
Note
R1A
N/A
C1
22F, 400V
R1B
N/A
C2
22F, 50V
L-tec
R4A
39K, 1206
C4
Holystone
R4B
39K, 1206
C5
R6
2.2, 1206
C51
R7
10, 1206
C52
1000F, 10V
L-tec
R8
10K, 1206
C54
470F, 10V
L-tec
R9
10K, 1206
C55
RS1
2.7, 1206, 1%
CX1
0.1F
X-cap
RS2
2.7, 1206, 1%
CY1
2200pF
Y-cap
RT
100K, 0805, 1%
D1A
1N4007
R51A
100, 1206
D1B
1N4007
R51B
100, 1206
D1C
1N4007
R52
2.49K, 0805, 1%
D1D
1N4007
R53
2.49K, 0805, 1%
D2
PS102R
R54
100, 0805
D4
1N4007
R55
1K, 0805
Q1
2N60B
R56A
2.7K, 1206
CR51
SB540
R56B
N/A
ZD51
6V2C
NTC1
5, 3A
08SP005
IC1
LD7575PS
FL1
20mH
UU9.8
IC2
EL817B
T1
EI-22
IC51
TL431
L51
2.7H
F1
250V, 1A
Z1
N/A
14
Leadtrend Technology Corporation
LD7575-DS-04b November 2007
www.leadtrend.com.tw
L-tec
600V, 2A
SOP-8
1%
LD7575
Package Information
SOP-8
Dimensions in Millimeters
Dimensions in Inch
Symbols
MIN
MAX
MIN
MAX
4.801
5.004
0.189
0.197
3.810
3.988
0.150
0.157
1.346
1.753
0.053
0.069
0.330
0.508
0.013
0.020
1.194
1.346
0.047
0.053
0.178
0.229
0.007
0.009
0.102
0.254
0.004
0.010
5.791
6.198
0.228
0.244
0.406
1.270
0.016
0.050
15
Leadtrend Technology Corporation
LD7575-DS-04b November 2007
www.leadtrend.com.tw
LD7575
Package Information
DIP-8
Dimension in Millimeters
Dimensions in Inches
Symbol
Min
Max
Min
Max
9.017
10.160
0.355
0.400
6.096
7.112
0.240
0.280
-----
5.334
------
0.210
0.356
0.584
0.014
0.023
1.143
1.778
0.045
0.070
2.337
2.743
0.092
0.108
2.921
3.556
0.115
0.140
7.366
8.255
0.29
0.325
0.381
------
0.015
--------
Important Notice
Leadtrend Technology Corp. reserves the right to make changes or corrections to its products at any time without notice. Customers should
verify the datasheets are current and complete before placing order.
0
16
Leadtrend Technology Corporation
LD7575-DS-04b November 2007
www.leadtrend.com.tw
LD7575
Revision History
Rev.
Date
Change Notice
00
07/21/05
Original Specification.
01
07/28/05
1.
Page 2, Remove the unexpected code skype.lnk before the ordering information.
2.
Page 4, Recommended operating condition, change the min. supply voltage Vcc
from 10V to 11V since the UVLO range is from 9V to 11V.
3.
Page 9, Add the gate resistor on figure 15 and figure 16 to avoid misunderstanding.
4.
Page 11, Add the description Figure 17 shows its operation. In the section of OVP
on Vcc.
02
10/24/05
5.
1.
Page 1 --- modify the general description The LD7575 is offered in both
SOP-8 and DIP-8 package..
b.
Page 2 --- Add DIP-8 data on the pin configuration and ordering
information.
2.
c.
d.
Page 1, 8 (figure13), 9 (figure15,16), 12, 13 --- Update the drawing, BOM and
schematics for such resistors.
b.
Page 11, 12 --- Add the sections Pull-Low Resistor on the Gate Pin of
MOSFET, Protection Resistor on the Hi-V Path and figure 19~22.
c.
Page 4 --- Add negative voltage limitation of HV pin on the absolute maximum
rating.
3.
Page 3 --- Add flip-flop on the OVP loop to be matched with the OVP operation
and add the anti-floating resistor on the output.
4.
Continued
17
Leadtrend Technology Corporation
LD7575-DS-04b November 2007
www.leadtrend.com.tw
LD7575
03
11/28/05
1.
Page3, Correction on the block diagram by modifying the AND gate (following the
PWM comparator) to OR gate.
2.
Page 5, Correction on the parameters on Gate Drive Output because LD7575 can
support to 500mA driving capability but the parameters in the previous datasheet are
for 300mA driving current. The output high level will be updated from min. 8V to min.
9V. The rising time will be updated from max. 200nS to max. 160nS. The falling time
will be updated from max. 100nS to max. 60nS. All these parameters are for
correction and no design change on the related circuits.
04
1/22/07
04a
6/5/2007
04b
11/29/2007
18
Leadtrend Technology Corporation
LD7575-DS-04b November 2007
www.leadtrend.com.tw