Ex. No.

CYCLIC REDUNDANCY CHECK

Date:

AIM:
To simulate and test the cyclic redundancy check
REQUIREMENTS:
1. MATLAB
2. PERSONAL COMPUTER
ALGORITHM:
1.Start the program.
2. Get the generator and find its length and convert it into decimal.
3. Set the message and find its length and convert it into decimal.
4. Find the transmitted message.
5. Insert and error by radiant and find received message.
6. Check the node of receiver message and generator.
7. If it is zero display no error or else error.
8. Stop the program
THEORY:
CRCs are based on the theory of cyclic error correcting codes. The use
of systematic cyclic codes, which encode messages by adding a fixed-length check value, for the
purpose of error detection in communication networks, was first proposed during 1961. Cyclic
codes are not only simple to implement but have the benefit of being particularly well suited for
the detection of burst errors, contiguous sequences of erroneous data symbols in messages. This
is important because burst errors are common transmission errors in many communication
channels, including magnetic and optical storage devices. Typically an n-bit CRC applied to a
data block of arbitrary length will detect any single error burst not longer than n bits and will
detect a fraction 1 2n of all longer error bursts.
Specification of a CRC code requires definition of a so-called generator polynomial. This
polynomial resembles the divisor in a polynomial long division, which takes the message as
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the dividend and in which the quotient is discarded and the remainder becomes the result, with
the important distinction that the polynomial coefficients are calculated according to the carryless arithmetic of a finite field. The length of the remainder is always less than the length of the
generator polynomial, which therefore determines how long the result can be.
In practice, all commonly used CRCs employ the finite field GF (2). This is the field of
two elements, usually called 0 and 1, comfortably matching computer architecture. A CRC is
called an n-bit CRC when its check value is n bits. For a given n, multiple CRCs are possible,
each with a different polynomial. Such a polynomial has highest degree n, which means it
has n + 1 terms. In other words, the polynomial has a length of n + 1; its encoding requires n + 1
bits. The simplest error-detection system, the parity bit, is in fact a trivial 1-bit CRC: it uses the
generator polynomial x + 1 (two terms), and has the name CRC-1.

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PROGRAM:
clc;
clear all;
a=input ('Enter the generator :','s');
g=str2num(a);
L1=length(g);
for i=1:L1
temp(i)=g(L1-i+1);
end
y=binvec2dec(temp);
a= input('Enter the message :','s');
m=str2num(a);
L2=length(m);
for i=1:L1
m(L2+i)=0;
end
for i=1:L1+L2
temp(i)=m(L1+L2-i+1);
end
x=binvec2dec(temp);
z=mod(x,y);
z1=y-z;
g1=dec2binvec(x+z1);
for i=1:L1+L2
tx(i)=g1(L1+L2-i+1);
end
for i=1:3
disp('Transmitted data');
disp(tx);
tx1=tx;
err=randint(1,1,[1 10]);
if err>5
pos = randint(1,1,[1 L1+L2]);
tx1(pos)=~tx1(pos);
end
disp('Received data');
disp(tx1);
for j=1:L1+L2
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temp(j)=tx1(L1+L2-j+1);
end
rec = binvec2dec(temp);
if mod(rec,y)==0
disp('No error');
else
disp('Error');
end
end

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OUTPUT:
Enter the generator: [1 1 0 1]
Enter the message: [1 1 1 1 0 1]
Transmitted data
1

Received data
1

Error
Transmitted data
1

Received data
1

Error
Transmitted data
1

Received data
1

Error
EXERCISE:
1. Vary the inputs
2. Vary the message

RESULT:

Thus, the cyclic redundancy check is simulated and tested

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