Virtual Wafer Fab: Automated Design of Experiments (DOE) and Optimization Framework

Virtual Wafer Fab
Automated Design of Experiments (DOE)

and Optimization Framework
Contents
Introduction
Benefit and Advantages
Architecture
Case study
Conclusion
Virtual Wafer Fab Automated Design of Experiments (DOE) and Optimization Framework
-2-
Introduction
VWF is software used for performing Design of Experiments (DOE) and

Optimization Experiments. Split-lots can be used in various pre-defined
analysis methods. Optimization algorithms can be used for automated
parameter variation. Scripts can be used to define custom DOE algorithms.
Split parameters can be defined for any of Silvacos process, device,
parasitic extraction and circuit simulators.
All simulations can be carried out in parallel either on a cluster of
workstations or on a single SMP machine. VWF comes with a GUI, that also
enables examination of experimental results.
-3-
Advantages
Integrates Silvacos simulators into one graphical user interface

Offers wide range of pre-defined DOE strategies (including: Full-Factorial,
Half-Factorial and Box-Behnken)
Offers a JavaScript interface to implement own DOE strategies
Allows to import DOE definitions from a comma separated values (CSV)
file
Offers many Optimization Algorithms (including: Levenberg-Marquardt,
Genetic Algorithm, Parallel Tempering, Simulated annealing)
Offers a JavaScript interface for scripted optimization target computation
Supports Sensitivity Analysis: Study the effects of varying process input
parameters on structural and electrical characteristics
-4-
Advantages
Is Time and processor efficient Supported computing environments

range from single SMP workstations to large grid computing clusters
(including Sun Grid Engine and LSF)
Supports both database (powerful SQL-92 compliant database) and file
mode data storage environments
Increases productivity by ease of use and automation
Facilitates effective transfer of technology from development to
manufacturing
Reduces cycle-time for development of new process technology
Allows central TCAD groups to generate results which are used by general
engineering groups in a simple to use environment
Supports the Silvaco SRDB database concept to backup and restore
databases easily
-5-
Advantages
Supports multiple databases

Seamlessly invokes analysis tools (e.g. TonyPlot and SPAYN)
Allows Response Surface Model (RSM) generation
Effortlessly exports worksheet data results in common formats (e.g. CSV)
Offers powerful import and export capabilities to easily
exchange data via zipped TAR files
Offers an Interface to the CVS version control system to import simulation
decks
Supports a JavaScript batch mode to sequentially run experiments
outside the main VWF application.
Comes with a comprehensive set of representative examples
-6-
VWF Architecture
Graphical User Interface (GUI) Main application to define, control, run

and analyze experiments
VWF Background Module Runs experiments in the background when
GUI is closed
VWF Database Stores data like the simulation deck and split
definitions, as well as simulation results
VWF File space Holds all simulation result files like generated
structures and runtime output
VWF Visualization Module Offers powerful visualization and postprocessing facilities
VWF Import/Export Allows to move an experiment from one database
to another
VWF Backup/Restore facility Perform regular automated backups of
data
-7-
VWF Architecture: Database Access
Access multiple databases on several hosts through user name and

password
-8-
VWF Architecture: Secure Database Explorer
Protection of experiments by individual user permissions
-9-
VWF Architecture: Experiment Definition
Input decks can be loaded from text files, pasted from another directory,
imported from DeckBuild, or loaded from a CSV repository
- 10 -
Any parameter from any simulator can be defined graphically as a variable
Quest
Atlas
SmartSpice
- 11 -
External files used in the input deck are loaded in the database using the
Resources menu
External file
- 12 -
Parameters can be varied in many ways, ranging from manual selection

over pre-defined DOEs, to custom DOEs in JavaScript script, or one of
many optimizer algorithms
- 13 -
Meaningful description of the experiment can be added within the

Description Tab
Actions made on each experiment are recorded and can be retrieved in
the Logging pane
- 14 -
Properties of the optimizer experiment can be comprehensively

configured using the Setup Tab
- 15 -
Open Interface (Java Script) for implementing own DOE algorithms
- 16 -
Open Interface
(Java Script) for implementing
custom optimization target
functions
Complex experiment types
combining DOE and
optimization
- 17 -
VWF Architecture: Experiment Execution
Sun Grid Engine (SGE) and LSF Compatible

Can utilize local multi processor machine
- 18 -
The experiment and its status can be viewed as a Tree, a Worksheet or

as Jobs
- 19 -
Run-time output and simulation results are attached to each node and are
available in real time
Can be opened from worksheet and tree views
- 20 -
Summary of extracted data is available in real time within the Worksheet

Tab
- 21 -
View output of simulation

results and JavaScript target
function (cost) for combined
DOE and optimization
experiments
Simulation results
Target function (cost)
- 22 -
VWF Architecture: Experiment Analysis
Results can be analyzed directly in the Worksheet in text form or in

graphical form (TonyPlot interface)
- 23 -
Efficiently select files for plotting in the SplitPlot Worksheet Tab
Cell numbers (3.1,

3.3 and 3.6) are
shown in the plot
- 24 -
Convergence of the optimizer can be graphically visualized during an

optimization experiment
- 25 -
A direct link to SPAYN allows statistical analysis and RSM generation for
DOE experiments
- 26 -
RSM generation done in Spayn can be visualized in TonyPlot
- 27 -
Case Study
Sensitivity Analysis
Impact of Process Variation on Circuit Performance
3D Parasitic Capacitance Optimization
3D Stress Simulation for Mobility Enhancement Optimization
CIGS Solar Cell Optimization
Ge solar cell External Quantum Efficiency Optimization
Inductor Performance Optimization
Inductor PDK Generation
Comparison between Doe and Optimization approaches
Managing Circuit Simulation
- 28 -
Sensitivity Analysis
Sensitivity analysis in VWF allows quick and efficient parameter screening

in order to reduce the number of variables to be used in a subsequent
DOE
- 29 -
Impact of process variation on circuit performance
CMOS layout driven Ring oscillator simulation was done in VWF

Key circuit figures of merit (i.e frequency of the ring oscillator) can be
plotted versus process splits
- 30 -
Statistical summary, histograms and correlation matrix of simulated data

between and for all variables (process parameters) and corresponding
extracted parameter (ring oscillator frequency)
- 31 -
Response Surface Model of ring oscillator frequency as a function of gate

oxidation time and Vt implant dose
- 32 -
Ring Oscillator frequency yield analysis, based on user defined input

distribution of each process parameter.
- 33 -
Clever 3D process based RC parasitic extraction tool can be used in VWF

to study back end process induced capacitance variation
2D cut-line along the red line
3D Inverter built in Clever
IN
OUT
PMD_THICK
The capacitance between IN and

substrate will be calculated as a
function of PMD_THICK
- 34 -
PMD thickness is optimized to reduce the overall capacitance
OUT
IN
PMD_THICK
- 35 -
Nominal 50 nm 3D FinFet structure. Buried Oxide thickness is fixed at

400 nm.
Vary : Fin width
Fin height
Gate length
Lg = 50nm
SiN
Gate
height/width
150 / 50nm
Fin
Buried Oxide
height/width
50 / 50nm
- 36 -
3-D stress contour profiles along the channel in the <100> fin direction
Channel under compressive stress
Channel under tensile stress
- 37 -
3-D contour profiles showing stress distribution in the polysilicon gate
FinFET under tensile stress
FinFET under compressive stress
- 38 -
3D FinFET structures showing gate length and height variations. Silicon

nitride capping layer is not shown
50nm
100nm
250nm
500nm
Gate length variation "
50nm
75nm
150nm
Gate height variation "

- 39 -
300nm
Mobility enhancement for <100> nominal structure with various gate

thicknesses when tensile and compressive capping layer (1Gpa) is
applied
- 40 -
Mobility enhancement for <100> nominal structure with various gate

length when tensile and compressive capping layer (1Gpa) is applied
- 41 -
CIGS Solar Cell
CIGS structure and Photo-generation Rate
- 42 -
CIGS Solar Cell
Simulate all the variations in VWF

Integrated statistical package Spayn loads all the results from VWF data
base
- 43 -
CIGS Solar Cell
Click Tools Regression to

create a Response Surface
Model (R.S.M.)
Choose a Target and Input
Parameters to create the
model
- 44 -
CIGS Solar Cell
Click TonyPlot to visualize the RSM (Response Surface Model)
Solar Cell Efficiency RSM

using two variables
ZnO thickness
X-Composition
Optimum values can be
visually obtained
- 45 -
CIGS Solar Cell
Optimized parameters also for 4

variables and more can be
obtained from the RSM created by
VWF through the integrated
statistical package Spayn.
(here optimized with respect to a
target efficiency of 10%)
- 46 -
CIGS Solar Cell
Effects of ZnO Thickness Variation (process induced)

In this example, we analyze the
effects of ZnO thickness variation
during production.
A Gaussian thickness variation is
input into the model.
We can instantly see the effects on
the solar cell output.
- 47 -
CIGS Solar Cell
Efficiency Variation due to Thickness Variation

Here we analyze the effects
of thickness variations on
Solar Cell Efficiency.
- 48 -
Ge Solar Cell
Ge solar cell simulation in VWF

Note that string can be defined as variable
- 49 -
Ge Solar Cell
Ge solar External Quantum Efficiency (EQE) as a function of

optical model (RTM versus TMM) and
substrate thicknesses
- 50 -
Ge Solar Cell
Ge solar cell EQE using TMM as a function of

surface velocity recombination and
InGaP thicknesses
- 51 -
The objective is to optimize a

Q factor versus Frequency curve
as a function of process parameters
To do so a scalar target is defined
by comparing with a target curve so
that a global optimizer (genetic
algorithm) can be used. A relative
error and then a least square of
that relative error is computed in
dbinternal
The target of the optimization is to
minimize this least square error
- 52 -
Visualization of the optimizer convergence as well as the result after and

before optimization
- 53 -
Inductor Spice Parameter Extraction versus Layout Variation
The objective is to vary the inductor geometry (number of turns,

radius, ..) and to extract spice model parameters with Utmost IV in VWF
to generate an inductor PDK
- 54 -
A parameterized Expert LISA script runs in VWF to create inductors GDSII

layouts as a function of geometrical parameters (number of turns, radius )
LISA script of Expert
- 55 -
Tree view representation of all inductors with different geometries and

corresponding results in the worksheet
- 56 -
Inductor Spice Parameter Extraction Versus Layout Variation
The worksheet is exported to Spayn where a regression analysis is done
- 57 -
Comparison between DOE and Optimization
The goal is to optimize a threshold voltage. A DOE based approach will

be used as well as a direct optimization approach and results of both
approaches will be compared
The DOE approach consists of first defining a DOE on the parameters we
want to vary and run the simulation in VWF. Then a regression analysis is
performed in Spayn and a synthesis based on the previously generated
Response Surface Model is done to get the desired threshold voltage
The optimization approach consists of using an optimizer directly in VWF
by selecting a target (threshold voltage) and variables
- 58 -
Comparison Between DOE and Optimization
The DOE approach
- 59 -
Comparison Between Doe and Optimization
The Optimization approach
- 60 -
Comparison between DOE and Optimization
DOE
Approach
Optimization
Approach
Gate Oxidation
Time
Gate Oxidation
Temperature
Vt Adjust Dose
Vt Adjust Energy
11min
940 C
9.6e11at/cm2
8.15Kev
11.95min
934 C
1e12at/cm2
9.3Kev
- 61 -
A comparator circuit is used for this example where a transition from 0 to

1 is expected when a sine wave crosses a DC voltage. Variables are Vdd,
Temperature, Load capacitance and SPICE model (typical, slow and fast)
- 62 -
Input deck, variables definition and tree view representation defined within
the VWF GUI
- 63 -
Simulation results shown in the worksheet. Working specification defined

as rise and fall time are both below 25ns
Circuit output is defined as 1 in this case 0 else
- 64 -
Corner analysis (impact of spice models: typical, slow and fast). Circuit
output is 1 for all spice models used
Simulation conditions were Vdd=5V, C=1e-12F, Temperature=25C and
spice model=typical
Zoom
- 65 -
Specifications are not achieved when temperature as well as load

capacitance increase
Zoom
- 66 -
A ring oscillator instead of a comparator is used in this example

Impact of Supply Voltage and Output Load Capacitor on Ring Oscillator
Frequency
- 67 -
Impact of spice model on Ring Oscillator Frequency
Cmos1 correspond to BSIM3 cmos2 to BSIM4 and cmos3

to BSIM4 with different model parameters.
- 68 -
Conclusion
VWF is a feature rich tool for performing DOE and Optimization

Experiments
Seamlessly integrates Silvacos simulators and post-processing tools into
one graphical user interface
Compatible with workstation clusters for time and processor efficient
calculations
Incorporates a wide range of DOE strategies and optimization algorithms
Highly customizable by offering a powerful scripting interface (JavaScript)
- 69 -

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Virtual Wafer Fab

Automated Design of Experiments (DOE)

VWF is software used for performing Design of Experiments (DOE) and

Integrates Silvacos simulators into one graphical user interface

Is Time and processor efficient Supported computing environments

Supports multiple databases

Graphical User Interface (GUI) Main application to define, control, run

VWF Architecture: Database Access

Access multiple databases on several hosts through user name and

VWF Architecture: Secure Database Explorer

Protection of experiments by individual user permissions

VWF Architecture: Experiment Definition

VWF Architecture: Experiment Definition

Any parameter from any simulator can be defined graphically as a variable

VWF Architecture: Experiment Definition

VWF Architecture: Experiment Definition

Parameters can be varied in many ways, ranging from manual selection

VWF Architecture: Experiment Definition

Meaningful description of the experiment can be added within the

VWF Architecture: Experiment Definition

Properties of the optimizer experiment can be comprehensively

VWF Architecture: Experiment Definition

Open Interface (Java Script) for implementing own DOE algorithms

VWF Architecture: Experiment Definition

VWF Architecture: Experiment Execution

Sun Grid Engine (SGE) and LSF Compatible

VWF Architecture: Experiment Execution

The experiment and its status can be viewed as a Tree, a Worksheet or

VWF Architecture: Experiment Execution

VWF Architecture: Experiment Execution

Summary of extracted data is available in real time within the Worksheet

VWF Architecture: Experiment Execution

View output of simulation

VWF Architecture: Experiment Analysis

Results can be analyzed directly in the Worksheet in text form or in

VWF Architecture: Experiment Analysis

Efficiently select files for plotting in the SplitPlot Worksheet Tab

Cell numbers (3.1,

VWF Architecture: Experiment Analysis

Convergence of the optimizer can be graphically visualized during an

VWF Architecture: Experiment Analysis

VWF Architecture: Experiment Analysis

RSM generation done in Spayn can be visualized in TonyPlot

Sensitivity analysis in VWF allows quick and efficient parameter screening

Impact of process variation on circuit performance

CMOS layout driven Ring oscillator simulation was done in VWF

Impact of process variation on circuit performance

Statistical summary, histograms and correlation matrix of simulated data

Impact of process variation on circuit performance

Response Surface Model of ring oscillator frequency as a function of gate

Impact of process variation on circuit performance

Ring Oscillator frequency yield analysis, based on user defined input

3D Parasitic Capacitance Optimization

Clever 3D process based RC parasitic extraction tool can be used in VWF

3D Inverter built in Clever

The capacitance between IN and

3D Parasitic Capacitance Optimization

PMD thickness is optimized to reduce the overall capacitance

3D Stress Simulation for Mobility Enhancement Optimization

Nominal 50 nm 3D FinFet structure. Buried Oxide thickness is fixed at

3D Stress Simulation for Mobility Enhancement Optimization

Channel under tensile stress