Sie sind auf Seite 1von 6

IECON'O1: The 27th Annual Conference of the IEEE Industrial Electronics Society

Power Sensor-less MPPT Control Scheme Utilizing Power Balance at DC Link


-System Design to Ensure Stability and Response Tatsuya Kitano

Mikihiko Matsui

De-hong Xu

Tokyo Inst. of Polytechnics


1583, Iiyama, Atsugi-shi
Kanagawa, 243-0297
JAPAN
kitano@ee.t-kougei.ac.jp matsui@ee.t-kougei.ac.jp

Abstract - Authors previously proposed a new MPPT


(maximum power point tracking) control scheme for PV
(photo-voltaic) system connected in parallel with the ac
system line. It is characterised by utilizing power balance at
dc link in the steady state conditions, and hence eliminating
the array output power detection and achieving power
sensor-less operation. However, the system response and
stability greatly depend on its main circuit and control
system parameters. This paper shows system design to
ensure stability and response based on system transfer
functions. Response of the experimental system has been
proved fast enough for practical use. A full-daytime testing
data shows successful tracking result of the system.

Boost
chopper

(a) Conventional system


PV

I. INTRODUCTION
In order to track the time varying maximum power point
of the solar array depending on its operating conditions of
insolation and temperature, the MPPT (maximum power
point tracking) control technique plays an important role in
the practical PV systems. A variety of MPPT schemes have
been proposed in the literatures so far [1]-[3]. Amongst
them, the authors have been focussing on the simplification
of the MPPT control system by utilizing steady state power
balancing condition at dc link which is the interlink stage of
two power conversion stages, i.e. a boost chopper stage and
a PWM inverter stage[4][5].
For the MPPT control, it is essential to use the
information of actual output power of the PV array, and the
duty ratio for boost chopper is selected to maximize the
output power by MPPT algorithm as shown in Fig.] (a). On
the other hand, authors previously proposed a new power
sensor-less method shown in Fig. 1 (b) .
In the steady state condition, the generated power of the
solar array and the regenerative power to the system side
should have a balance. Therefore a sensor for power
detection can be omitted by using the power balancing
condition that, the generated power is in proportion to
inverter output current magnitude which is the inner signal
of the controller in the steady state. However, response
deteriorates in comparison with the method which detects
power directly because the response of the proposed MPPT
operation directly depends on the response of the dc voltage
control loop of the inverter. The parameter of the main
circuit is decided in this paper from the practical viewpoint.
The inverter-power conversion stage is Modeled, and an
integration gain, algorithmic sampling time are set up in
consideration of the stability of the dc voltage control loop.
Then, it is proved that practical speed of response can be
realized in experiment by the proposed method.

0-7803-7108-9/01/$10.00 (C)2001 IEEE

Zhejiang University
Dept. of Electrical Eng.
Hang-zhou, 3 10027
P.R.China
Xdhdj@mail.hz.zj.cn

Fig. 1. Two different types of MPPT control schemes for the same voltage
source type converter topology connected in parallel with ac system.

11. PROPOSED MPPT CONTROL METHOD

A ) Operation principle

The proposed control system is shown in Fig.2 (a) in a


single-phase system and (b) in a three-phase system,
respectively. Current control on the inverter side is done so
that the link voltage Vlink may be kept in constant value.
Then, the output power Parray is changed as Fig.3 by
adjusting the duty ratio command d* for the chopper
between 0 to 1 . At this time, the amplitude value Ipeak* of
the current command of the inverter also changes in
proportion to Parray. Therefore, the system can operate in
the maximum power point if duty ratio d of the chopper is
decided to maximise this Ipeak*. This relationship, however,
holds only in the power balancing condition, i.e., in the
steady state . Therefore, the optimal value for d* should be
searched with a care to avoid system instability or
deterioration of response. It will be discussed in detail later.

1309

IECONO1: The 27th Annual Conference of the IEEE Industrial Electronics Society
time. That is, if Ipeak* is increasing, the searching direction
is always kept constant as before irrespective of the current
state of d* (Fig.3-@ a.nd Fig.3-@). On the other hand, if the
differential value of Ipeak* is found to be negative at a
sampling time, then the searching direction is changed
irrespective of the current state of d* (Fig.3-@ and Fig.30).
This decision making is arranged in the table 1 . Both Ti

B) MPPT algorithm

For an easy implementation of the MPPT algorithm, a


simple electronic circuit shown in Fig.4 has been examined
here. Based on the differential value for the time dependent
variable Ipeak*, the searching direction whether increasing
or decreasing the value of d* is determined every sampling
Boost chopper

Single phase INV.


I

(a) Single phase output

Boost chopper

Sphase INV.

(b) three phase output


Fig. 2. Configuration of the proposed system.

Fig. 4. Example of a simple hardware implementation

0.4

0.8

0.6

d' iP.U.1
Fig. 3. d *versus Pmy and I+*

Table. I. Operating direction of d in MPPT control.

1
I

1
I

Positive
Negative
Positive
Negative

1
1

Increasing
Increasing
Decreasing

I 1
I ; z ~1 ~
,HH:~

Decreasing

0-7803-7 108-9/01/$10.00 (C)2001 IEEE

Fig. 5. Relations between T,, T, and dpp.

1310

IECON'O1: The 27th Annual Conference of the IEEE Industrial Electronics Society
and Tc are MPPT algorithmic parameters. Ti is a time
constant for an integrator at output stage, and Tc is the
sampling time. It is clear from Fig.5 that the peak-to-peak
value of d * is given by
dp p

,L
q. .

(1)

clink

IILSYSYEM MODELING AND DESIGN

Fig. 6 . Modeling of chopper.

A ) Modeling of the chopper stage

Once the duty ratio d is given, the mean current of


'chop

- d ) ' 'array

(2)

flows in the chopper stage at its output side. The dc side


equivalent circuit becomes Fig.6 by paying attention to this
Ichop.
B ) Modeling of the inverter stage
The inverter stage is assumed to be controlled with unity
power factor on ac system side. The instantaneous current
command for the inverter can be calculated by multiplying
the Ipeak*, which is the output of PI controller for dc
voltage control system, with the ac system line voltage with
unity sine wave amplitude. Ideal symmetrical three-phase
ac system voltage is assumed. When the carrier frequency
of the PWM switching is high enough and the value of filter
inductance Ls is small enough to idealize the current
controllability, the Inverter stage is presented by the
following equation.

Fig. 7. Modeling of inverter.

A I

v, =JZVsinm

4-l i,

is = f i r sin wt

e =vq

-CO&)

%=VI
Therefore, the dc link voltage control system can be
shown in the linear control system as shown in Fig.7. The
instantaneous power will contain a fluctuating component
with the angular frequency 2 w in the case of single-phase
system. Such an influence of the component of 2 w can be
eliminated easily with a suitable filter inserted into the
Vlink voltage detection part. Thus, the Modeling of
single-phase system can be done in a same manner as that
for three-phase system as shown in Fig.7.
1)Single-phaseinverter : Assuming that the effective values
of ac system voltage and current are V and I, the coefficient
Kc for the single-phase system is given from a power
relationship between dc and ac side of the system.

2 =v r c o m
Fig. 8. Decision of Clink.

2)Three-phase inverter: On the other hand, assuming that


the effective values of ac system voltage and current are V
and I, the coefficient Kc for the three-phase system is given
by the following equation.
V

(7)

P = Vljnk

I;,,, = VI , I = ;eak

'

fi

(4)

Assuming V link k Wink*,

Since Vlink is always controlled to keep constant value


Wink* by the feedback control loop, Vlink is approximated
with Vlink* .
Then, Kc is given by

r,

'in,

I ;eak

(5)

fivhkk

Then, Kc is given by

0-7803-7108-9/01/$10.00 (C)2001 IEEE

1311

IECONOI : 'The 27th Annual Conference of the IEEE Industrial Electronics Society
C ) Capacitor size of the dc link stage

The capacitor size (capacity) of the dc link stage can be


determined to limit the voltage ripple magnitude at the dc
link. Assuming the average output power in the
single-phase system is Po, the ripple component shown in
Fig.8 is given by following e:quation.

Fig. 9. DC voltage control system.

Mink

Assuming the voltage ripple of the dc link is Vripp-p , the


required capacitor size Clink. is then given by

hnk*

bU.1

In the case of three-phase system, no voltage ripple occurs


in the ideal state. Howevrx, here assumes 10% of the
unbalance voltage. Then the required capacitor size
becomes 1/10 of the single-phase case.

&+lo
p-7.5

--400. r ,
0

K:"k

tl

4
Tpi

1p.u.I

Fig. IO.Step Response against disturbance.

0) Design of the PI controller gains

0.05

Response speed of the MPPT system depends on the


time-lag and loop-gain of the PI control loop. The pulse
transfer time-lag in the inverter main circuit stage and the
time-lag by LPF(1ow pass lilter) of the control system are
the major causes of time-lag in the PI control loop. For
simplicity, the time-lag is presented as an first-order LPF as
shown in Fig.9. Then, the closed-loop transfer function
against the voltage command is given by following
equation.
K

'

0.04

-2 0.03
2 0.02
I

0.0 1
0

'.'link

0.15

0.1

0.2

Tdsl

Fig. 11. Relations between T, and dpp.

'"link

For simplicity, an ideal case without time-lag ( r =0) is


considered first. Then the system becomes second-order
system. The response of h4PPT operation of such system
depends on the pole assignment of the PI control loop. If
these two poles are assigned at a same place - a ,where a is
a positive real value, the equivalent time-lag T pi of the PI
control loop becomes 2/ a , and the following characteristic
equation can be deduced from the closed-loop transfer
function.

0-7803-7108-9/01/$10.00 (C):!OO 1 IEEE

5 7

2 100
50
00

'

4 E
3
2
1

lo

t[sl

'link

Once Kp and Ki are given i.n equation (14) ,the influence of


the time-lag T of the voltage control loop is examined next.
The response of Vlink control loop against step disturbance

--

L 250
200
3
150
2

K K
KcKi s +Es+--((s+a)'=

From equation (13), Kp and Ki are given as follows.

8
7
6

400

- 350
5 300

'link

0.05

Fig. 12. Experimental results.(single phase)

change in Ichop is simulated based on the block-diagram in


Fig.9 and the results shown in the normalized forms are
given in Fig. 10. As for the influence on convergence time of
the voltage deviation, it is observed to be very small in the
range 7 T >5. However, the oscillation of the response
waveform becomes remarkable in the range of T pi/ T <5
due to the shift of the pre-assigned poles. Therefore the
criteria to ensure the stable operation is,

1312

IECONOZ: The 27th Annual Conference of the IEEE Industrial Electronics Society

Pi

>5.r.

The response of the loop is improved by increasing the gain


of the PI controller. However, it is restricted by the
condition given by equation (1 5) because the actual system
do have a time-lag which originates in the filter of the
voltage detector of the dc link and the main circuit itself.
IV. EXPERIMENTAL RESULTS
A ) Design example of a single phase system
The voltage command for the dc link is set Vlink*=200
[VI in the single phase system shown in Fig.2 (a). Kc is
chosen Kc=0.354 from equation (6). Assuming the voltage
ripple Vrip=6 [VI of the dc link with the input power
condition 350 [w], the capacitor size of the dc link can be
determined Clink=960 [ p F] from the equation (11).
Assuming a time-lag of 3 [mS] (cut-off frequency 50 Hz)
for LPF, the minimum requirement for the time-lag T pi of
the PI control loop is 15[mS] from equation (15). Therefore,
T pi is selected to be 25 [mS],here. Then, from equation (14),
Kp=0.435 and Ki=17.4 are given, respectively. The MPPT
algorithmic parameters Tc and Ti can be decided as follows.
The experimentally measured value of dpp as a function of
Tc and Ti are shown in Fig.] 1, where Kp and Ki decided
with T pi=25[mS]is kept constant. It is understood that dpp
becomes large due to some coupling effect between MPPT
algorithm and dc link control loops when sampling time Tc
is selected around the value equal to T pi . The experimental
results Case A (Ti=S[S], Tc=O.l[S]) and Case B
(Ti=IO[S], Tc=0.2[S]) to realize dpp=O.O2 [P.u.] are shown
in Fig.12. They correspond to the characteristics moving
from the operating point C to 0 in Fig.3. It takes about 2[S]
to reach the steady state for Case A. Since the searching
range for d* of the chopper can be limited, say, about 20%
of the full range, the MPPT response will be shortened
within O S [ S ] , which is fast enough for residential use PV
system.

Fig. 13. Solar array with 1.5

m]rating.

Table. 2. Specificationsof solar array

I
I

Module me
Module connection

Maximum output power

&timum omratine voltaee

SHAPR module NT51DL9


6 series - 2 parallel
1548[W] at 25C
i53rvi

Optimum operating current

IO.I[A]

&en terminal voltage

i6orVi
1 1.4[A]

Short terminal current

P m a l computer

Proposed system(Fig 2)

B ) Design example of a three-phase system


The ac system line voltage is selected V=IOO[v] for a
three-phase system, and the voltage command for the dc
link is set Vlink*=200[v] in Fig.2(b), which gives an
equivalent dc side condition with the former single-phase
systems case. Equation (9) gives Kc=0.612. The capacitor
size is selected Clink=960 [ p F] which is the same as the
single phases case. LPF for the dc link voltage detecting
element with 3 [mS](Cut-off frequency 50 Hz) time-lag is
assumed as the single-phase system to get rid of the possible
voltage ripples due to the three-phase unbalance. Therefore,
the time constant for the PI control loop is selected
T pi=25[mS] from the conditions in equation (15).
Kp=0.251 and Ki=lO.O are given in equation (14). The
MPPT algorithm parameters are selected same as the single
phase system, i.e., Case A (Ti=5 s, Tc=O.l s) and Case
B (Ti=lO s, Tc=0.2 s). Thus the response waveforms
become just same as single phases cases shown in Fig.12.

Fig. 14 Instrumentation system

C ) A daytime experimental results


A full-daytime test has been carried out for the
three-phase system by using a solar array with 1.5 [kw]
rating which is settled on the top roof of the JRCH(Joint

0-7803-7108-9/01/$10.00(C)200 1 IEEE

2[A]/div

10 1 1 12 13 14 15 16 17

Time
Fig. 15. Insolation, Parray, Vamy and Iarray.

1313

IECONOI: The 27th Annual Conference of the IEEE Industrial Electronics Society
Research Center for High-technology) building in Tokyo
Institute of Polytechnics in Atsugi-city Kanagawa, Japan.
The picture of the solar array is shown in Fig.13, and its
specifications are given in Table 2. The configuration of
measuring instrumentation system is shown in Fig.14. An
N D converter board has been connected with the personal
computer, and the data logging has been done every 5
seconds. The input data to the ND converter include the
insolation measured by an illuminance meter, voltage and
current of the solar array. The measurement has been
carried out for nine hours from 8:OO a.m. to 17:OO p.m. on
April 20, 2001. The measured data, i.e. illuminance
(ILarray) , solar array voltage (Varray), current (Iarray),
and calculated power(Parray) are shown in Fig.15. The
optimal operating voltage which is slightly changing with
the insolation of the PV array is successfully trucked with
stable operation.
V. CONCLUSIONS
The parameter of the main circuit has been decided from
the practical viewpoint in the maximum power point
tracking control system which maximise the amplitude
value Ipeak* of the output current command of the inverter
in the steady state. The inverter stage was Modeled, and the
parameters such as the integrator gain, sampling time of
MPPT algorithm were given in consideration of the stability
of the dc voltage control loop. The effect of time-lag of LPF
in the link voltage detector on the system stability was also
clearly shown. Thus the system design examples were
shown to ensure the stable operation of the system.
The instantaneous power fluctuation due to the
negative-sequence voltage component doesnt exist ideally
in the three-phase system. However, the actual three-phase
system voltage cannot avoid some unbalance and therefore
contains some negative-sequence component. For this
reason, the experimental three-phase system was designed
to have the same LPF characteristics as single-phase system,
and the control response was same also. It has been proved
that the response time of both single-phase and three-phase
system is fast enough from the practical point of view.

0-7803-7 108-9/01/$10.00 (C)2001 IEEE

ACKNOWLEDGMENT
This work has been supported by Grant-in-Aid for
Scientific Research from the Japanese ministry of Ministry
of Education, Culture, Sports, Science and Technology, and
the JRCH of Tokyo Institute of Polytechnics. The authors
would like to thank all the people who are concerned.
REFERENCES
[I]

B.K.Bose, P.M.Szczesny and R.L.Steigerwalt,


Microcomputer control of a residential power
conditioning system, IEEE Trans. Industrial
Applications, vol. 21, no. 5, Oct. 1985, pp. 1182-1191.

[2] T.Senju, K.Uezato and S.Okuma, Maximum power


tracking control of photovoltaic array using fuzzy
control, IEEJapan Trans. Vo1.9, N0.D-114, 1994,
pp.843-848.
[3] H.Sugimoto and H.A.Dong, A new scheme for
maximum photovoltaic power tracking control, in
Proceedings of the 1997 PCC-Nagaoka,Vol.2,
pp.691-696.
[4] M.Matsui, T.Kitano, D.H.Xu and Z.Q.Yang, A New
Maximum Photovoltaic Power Tracking Control
Scheme Based on Power Equilibrium at DC Link , in
Proceedings of the 1999 IEEE IAS Annual Meeting, pp.
804-809.
[5] M.Matsui, T.Kitano, D.H.Xu and Z.Q.Yang, New
MPPT Control Scheme Utilizing Power Balance at DC
Link Instead of Array Power Detection, in
Proceedings of the 2000 IEEJapan IPEC-Tokyo, Vol. 1,
pp. 164-169.

1314

Das könnte Ihnen auch gefallen