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Hyper - Threading and Hyper Transport

Hyper- Threading

By looking at the picture below, Could someone please tell me how


many processors I recently purchased? In the past, this was a really
simple question to answer, why two of course! Since Intel rolled out
hyper-threading, a simple glimpse at Task Manager just isn't enough to
tell you what someone has under the hood of their precious boxes.

What exactly is this “Hyper threading”? When Intel released it’s


Pentium 4 Processor big time for the simple customers in the mid
2002s it made a big impact in the industry. Basically it was caused due
to the confusion created by the unfamiliarity of the concept. AMD,
Intel’s biggest competition in the industry was working way ahead of
it’s counterparts in specified user environments. But Intel managed to
recapture it’s hold on the market quite rapidly thanks to the new boy
“Hyper thread”. What do you mean by Hyper threading? Buddy, it’s
quite a simple concept….

A technique used to make a single chip act like more. That’s it. Hyper
threading is a concept introduced by Intel, that lets a chip operate far
more efficiently and almost as well as a dual processor machine by
taking advantage of formerly unused circuitry on a Pentium 4 chip.
With it a computer can run a single application faster than a single
processor system can.

Hyper threading works by using the additional CPU registers (circuits


that help manage data inside a chip) that exist on the Pentium 4
processor architecture but aren't used at all times. With the use of
these registers, the chip is better able to manage it's existing
resources without the need to seek computing power elsewhere.

Quite a bit of what a CPU does is illusion. For instance, modern out-of-
order processor architectures don't actually execute code sequentially
in the order in which it was written. An Out-of-Order-Execution (OOE)
architecture takes code that was written and compiled to be executed
in a specific order, reschedules the sequence of instructions (if
possible) so that they make maximum use of the processor resources,
executes them, and then arranges them back in their original order so
that the results can be written out to memory. To the programmer and
the user, it looks as if an ordered, sequential stream of instructions
went into the CPU and identically ordered, sequential stream of
computational results emerged. Only the CPU knows in what order the
program's instructions were actually executed, and in that respect the
processor is like a black box to both the programmer and the user.

Hyper-Threading Technology enables multi-threaded software


applications to execute threads in parallel. This level of threading
technology has never been seen before in a general-purpose
microprocessor.

Hyper-Threading Technology also delivers faster response times for


multi-tasking workload environments. By allowing the processor to use
on-die resources that would otherwise have been idle, Hyper-Threading
Technology provides a performance boost on multi-threading and
multi-tasking operations. This technology is largely invisible to the
platform.

More on this novel Concept can be obtained first hand from the official
Site of Intel.

Hyper Transport

Hyper Transport technology is a high-speed, point-to-point link


designed to increase the communication speed between integrated
circuits in computers, servers, embedded systems, and networking and
telecommunications equipment up to 48 times faster than some
existing technologies.

Hyper Transport technology is an optimized board-level architecture


delivering lowest possible latency, highest bandwidth, design
flexibility, performance scalability and PCI compatibility. Hyper
Transport delivers all of these capabilities within a framework that
enables board-level designers to develop system architectures free of
cumbersome constraints and performance burdens.

The widespread adoption of Hyper Transport across a broad spectrum


of high performance product sectors ranging from consumer devices to
personal computers, network equipment and supercomputers, is
tangible proof of the power and flexibility of the Hyper Transport
architecture.

Hyper Transport technology helps reduce the number of buses in a


system, which can reduce system bottlenecks and enable today's
faster microprocessors to use system memory more efficiently in high-
end multiprocessor systems.
Hyper Transport technology is designed to:

• Provide significantly more bandwidth than current technologies


• Use low-latency responses and low pin counts
• Maintain compatibility with legacy PC buses while being
extensible to new SNA (Systems Network Architecture) buses.
• Appear transparent to operating systems and offer little impact
on peripheral drivers.

Hyper Transport technology was invented at AMD with contributions


from industry partners and is managed and licensed by the Hyper
Transport Technology Consortium, a Texas non-profit corporation. The
full specification and more information about Hyper Transport
technology can be found at HyperTransport.org.

Prepared by
Rubin S Cherian
S4, B