Homework Set for

Midterm Review I

Session: Winter 2015

Total Points: 50

Instructor: Prof. Lei He

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Due Date: Jan 28 (before Midterm starts)

Instructions

1. There are two sections in this homework set. The questions under
Section I are for your practice. Solutions to these problems will be
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provided on the course web page on Monday Jan 26 .

2. Problems under Section II are to be submitted.

Section I

1. What binary number does this hexadecimal number represent

(7fff fffa)hex? What decimal number does

it represent?

2. If x = 0011 0101 0011 and y = 0010 1101 0111 then evaluate x * y.

3. Given your understanding of PC-relative addressing, explain why an assembler might have problems
directly implementing the branch instruction in the following code sequence:

here: beq $s0, $s2, there

...

there: add $s0, $s0, $s0

Show how the assembler might rewrite this code sequence to solve these problems.
4. Show the IEEE 754 binary representation for the floating point number 20.510 in single and double
precision.
5. Calculate the product of the octal unsigned 6-bit integers A and B using the multiply hardware below.
Show the contents of each register on each step. [10 points]


Section - II

1. In this exercise we will evaluate the performance difference between two CPU architectures, CISC
(Complex Instruction Set Computing) and RISC (Reduced Instruction Set Computing). Generally speaking,
CISC CPUs have more complex instructions than RISC CPUs and therefore need fewer instructions to
perform the same tasks. However, typically one CISC instruction, since it is more complex, takes more time
to complete than a RISC instruction. Assume that a certain task needs P CISC instructions and 2P RISC
instructions, and that one CISC instruction takes 8T ns to complete, and one RISC instruction take 2T ns.
Under this assumption, which one has the better performance? [5 points]

2. Given the bit pattern: 1010 1101 0001 0000 0000 0000 0000 0010. What does it represent, assuming
that it is:
a. A twos compliment integer?
b. An unsigned integer?
c. A single precision floating-point number?
d. A MIPS instruction? [5 points]

3.
a.
b.

0x00000000
0x00000004
0x00000100
0x00000104

lui $s0, 100

ori $s0, $s0, 40
addi $t0, $0, 0x0000
lw $t1, 0x4000($t0)

By reducing the size of the immediate fields of the I-type and the J-type instructions, we can save on the
number of bits needed to represent the instructions. If the immediate field of I-type instructions were 8 bits
and the immediate field of the J-type instructions were 18 bits rewrite the MIPS code above to reflect this
change. Avoid using the lui instruction. [10 points]

4. Assuming that mult operation is not available in MIPS, implement it using add, shift and branching
instructions. i.e. write assembly code to write product result in $t2 assuming that operands are available in
registers $t0 and $t1. Check your code on SPIM simulator before submitting it. [10 points]
5. The IEEE 754 floating-point standard specifies 64-bit double precision with a 53-bit significand
(including the implied 1) and an 11-bit exponent. IA-32 offers an extended precision option with a 64-bit
significand and a 16-bit exponent.
a. Assuming extended precision is similar to single and double precision, what is the bias in the
exponent?
b. What is the range of the numbers that can be represented by the extended precision options?
c. How much greater is this accuracy compared to double precision? [10 points]

6. For many reasons, we would like to design multipliers that require less time. Many different approaches,
have been taken to accomplish this goal. In the following table, A represents the bit width of an integer, and
B represents the number of time units (tu) taken to perform a step of an operation.
A (bit width)

B (time units)

a.

3 tu

b.

32

7 tu

Calculate the time necessary to perform a multiply using the approach given in Fig.1 and Fig 2 (see at the
end of the problem set) if an integer is A bits wide and each step of the operation takes B time units.
Assume that in step 1a. an addition is always performed - either the multiplicand will be added, or a 0 will
be. Also assume that the registers have already been initialized (you are just counting how long it takes to
do the multiplication loop itself). If this is being done in hardware, the shifts of the multiplicand and the
multiplier can be done simultaneously. If this is being done in software, they will have to be done one after
the other. Solve for each case. [10 points]

Fig. 1

Fig. 2