This article has been accepted for publication in a future issue of this journal, but has not been

fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TPEL.2014.2310731, IEEE Transactions on Power Electronics

Swinging Bus Operation of Inverters for Fuel Cell

Applications with Small DC-Link Capacitance
Juan M. Galvez, Student Member, IEEE, and Martin Ordonez, Member, IEEE

AbstractFor reliability reasons, the employment of small

film capacitors instead of electrolytic ones is an interesting
alternative for the dc-link in single-phase inverters for fuel
cell applications. Due to the low capacitance that can be
accomplished at an acceptable cost using this technology, there
are large low-frequency voltage fluctuations (100Hz/120Hz and
harmonics) in the dc-link caused by the double-frequency
power transfer. By allowing these variations in the bus, the
capacitor bank absorbs the current ripple from the inverter to
avoid detrimental oscillations in the fuel cell. Traditional control strategies for inverters are usually designed to operate with
nearly constant input voltage and are not able to effectively
handle large (e.g., > 10%) low-frequency input voltage fluctuations. This manuscript introduces the analysis of a swinging bus
in the context of fuel cell standalone applications (i.e., voltagesource inverters) and proposes a non-linear control approach
to operate inverters with very large input voltage swing:
the Natural Switching Surface (NSS). Under the proposed
scheme, the inverter presents excellent dynamic and steadystate characteristics, even at moderate switching frequency
(e.g., 3.6kHz). In order to illustrate the superior performance
of the NSS, a comparison to a proportional-resonant controller
is performed. Unlike the linear compensator, the NSS is able to
reject the large bus voltage oscillations and achieve high-quality
output voltage with low total harmonic distortion (THD).
Simulation and experimental results are provided to illustrate
the behavior of the swinging bus and to validate the NSS control
scheme under the proposed demanding operating conditions.
Index Terms - Boundary control, dc-link, Film capacitors,
Fuel Cell Applications, Natural Switching Surface,
Normalization, Swinging Bus, Voltage-Source Inverter.

I. I NTRODUCTION
Fuel Cells (FCs) are a type of power source that has been gaining
a lot of attention in the last decade due to their high efficiency under
a wide range of operating conditions and a projected reduction
in their cost [1]. Power extraction from these devices is a topic
of critical importance and many research efforts have been made
in order to enhance the performance and extend life expectancy.
Three-phase inverters with unbalanced load and single-phase inverters present a characteristic low-frequency current ripple on the
dc power source that is inherent to these systems and is produced
by the double-frequency power transfer from the output of the
system. In order to maximize power extraction, this 100Hz/120Hz
(and harmonics) current ripple reflection into the fuel cell must
J. M. Galvez and M. Ordonez are with the Department of Electrical and
Computer Engineering, The University of British Columbia, Vancouver,
BC, V6T 1Z4, Canada (e-mail: jmgalvez@ieee.org, mordonez@ieee.org).

be minimized or eliminated since it generates undesired effects on

the source, such as a significant reduction in power delivery [2,
3], a decrease in hydrogen utilization [4] leading to a decrease
in efficiency [5], the degradation of materials and the consequent
diminution in performance [6] and the shortening of lifetime [7].
Many schemes requiring extra hardware have been proposed to
mitigate the aforementioned ripple by using an active filter [8, 9],
auxiliary energy storage systems (batteries and super-capacitors)
[1012] or auxiliary power conditioning modules [1315], which
increase the size and cost of the system. In recent literature, a
waveform control has been proposed for current ripple elimination
in a single-stage differential inverter [16]. Under this scheme,
the low-frequency current component is absorbed by the output
capacitors and the dc component is supplied by the fuel cell.
In two-stage converters, traditional controllers for inverters typically operate with nearly constant bus voltage, requiring large and
unreliable electrolytic capacitors to minimize the low-frequency
ripple. If a smaller capacitance is used and the dc-link is controlled
to minimize the double-frequency fluctuations, the low-frequency
current ripple is reflected to the fuel cell. This undesirable effect
can be mitigated if a swinging dc-link is used instead in such a
way that the bus absorbs the current oscillations, and without the
need for extra components, as proposed by recent literature [17
20]. However, the double-frequency fluctuations (100Hz/120Hz and
harmonics) at the input terminals of inverters present a challenge
to the control scheme, injecting significant harmonic content to the
output [21]. A solution for grid tie inverters has been proposed
[22], in which a second-order notch filter is used to eliminate the
low-frequency ripple from the current reference and obtain a highquality output current. However, a solution for standalone voltagesource inverters for fuel cell applications is lacking in the literature.
The power conversion system that interfaces the fuel cell and
the load should have a minimum lifespan, greater that the life
expectancy of the source. The requirements for the lifetime of
fuel cell can vary significantly for different applications, ranging
from approximately 4,000 for intermittent operation to 40,000
hours when running continuously in stationary applications [23,
24]. The electrolytic capacitors employed for the dc bus are the
weak link in the system since they are prone to failures and
have a reduced life span [25, 26]. A small film capacitor can be
connected across the electrolytic capacitor bank to increase the
lifetime of the dc-link since part of the current ripple is handled
by the film capacitor and the electrolytic capacitors dissipate less
power. However, as can be seen in Fig. 2 of [27], the magnitude
of the low-frequency current ripple (especially significant in this
application) is scarcely reduced, while the high-frequency content
is considerably attenuated. Therefore, the electrolytic capacitors
still have to deal with the double-frequency ripple, which is
the limiting factor in this case. Another alternative is replacing
electrolytic capacitors and employing small film capacitors instead
to increase the system reliability [9, 2834]. Due to the elevated

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240V

v bus

vo

vo

200V

Swinging bus voltage

(20% Vbus)

Q
1
Q
2
Q
3
Q

PR + feedforward
Control

THD = 4.5%
Load step
glitches

(a)

240V

v bus

vo

vo

200V

Swinging bus voltage

(20% Vbus)
-

NSS
Control

Q
1
Q
2
Q
3
Q

THD = 2.1%
No load step
glitches

(b)
Fig. 1.

Swinging bus operation of an inverter using (a) a traditional linear controller and (a) the proposed control scheme.

cost of this technology, the capacitance in the dc-link should be

minimized, which is in contrast with the requirement of traditional
controllers of having small low-frequency voltage ripple at the
input terminals of the inverter. A control scheme for inverters
able to handle these fluctuations can combine the advantages of
extended lifetime of the system (a more reliable technology as film
capacitors can replace electrolytic capacitors), higher efficiency
in the power extraction from the fuel cell (the current ripple is
eliminated), and high-quality sinusoidal synthesis for a wide range
of input voltages.
This paper presents a thorough characterization of the swinging
bus to provide insight into its behavior and establish the requirements for inverters with varying dc-link in fuel cell standalone
applications. A technical solution based on boundary control is
proposed using the Natural Switching Surface (NSS), a non-linear
control scheme that provides high-quality sinusoidal synthesis for
a wide range of input voltages and loading conditions. This is
illustrated in Fig. 1, in which the performance of the proposed
control technique is conceptually contrasted to that of a traditional
linear controller, highlighting the enhanced behavior of the NSS.
A full set of experimental results, including different loading and
operating conditions, is provided in Section IV. The control of
inverters with nearly constant dc-link using non-linear control
based on switching surfaces (SSs) has been gaining attention [35
38] although there is no indication of their ability to handle large
low-frequency ripple on the dc-link. The boundaries or SSs split
the state-plane in regions, and depending on whether the operating
point is on one side of the SS or the other, the state of the
switches is determined. Inverters can benefit from this type of
controllers if the boundaries are properly selected, since precise
and predictable behavior can be achieved, with high-performance
dynamic and steady-state characteristics. This paper introduces the

concept of boundary control for swinging bus inverters, employing

the normalized natural trajectories of the converter in the stateplane as the analytical framework for the study. The behaviors of
the inverter and the dc-link are analyzed geometrically and the
control laws are derived based on the insight gained. Simulation
and experimental results are presented to confirm the theoretical
predictions and the properties of the proposed control strategy.
The results are compared to those of a linear PR controller with
input voltage feedforward, verifying the superior performance of
the NSS.

II. S WINGING B US O PERATION AND THE NATURAL

S WITCHING S URFACE
A simplified schematic diagram of the power conversion system
considered in this manuscript is presented in Fig. 2. This two-stage
system is composed of a fuel cell, a front-end dc-dc converter,
the dc-link, and a single-phase inverter. For illustrative purposes,
this figure shows some characteristic waveforms. The first power
conversion stage supplies the current ibus to the bus capacitor,
which is discharged by the inverter input current iinv . The frontend dc-dc converter is controlled employing a linear dual-loop
compensator with the addition of a filter on the voltage loop.
The filter removes the 100Hz/120Hz components and harmonics.
Hence, the double-frequency ripple that naturally appears on the
bus generated by the single-phase 50Hz/60Hz inverter is eliminated
from the feedback, allowing the dc-link to swing at twice the output
frequency. In this way, the bus absorbs the current oscillations and
the input power is kept constant, therefore, the low-frequency ripple
does not propagate to the fuel cell, maximizing the power extracted
from the source. Any attempt to minimize the double-frequency
fluctuations in the bus voltage will reflect the 100Hz/120Hz ripple
into the fuel cell, producing detrimental effects on the source. If the

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Conventional control

v bus vbus

Swinging strategy

iinv

Tline

i fc
Tline

vfc

Tline

io

Tline

L
t

ibus
dc-dc
converter

v bus

iL

iC

vo

C bus

(vo, iC , v bus ,vr , iCr )

-

Fig. 2.

io

Q
1
Q
2
Q
3
Q
4

Fuel cell two-stage power extraction simplified schematic.

reactive current is neglected and a constant dc bus is considered,

the current supplied to the inverter iinv is a scaled version of the
waveform of the instantaneous output power (vo io ). For example,
for a linear resistive load, iinv is an average sine wave mounted on
a DC component. On the other hand, when the dc-link is assumed
to have low-frequency ripple components, the current waveform
has some distortion that allows for compensation for a reduced or
increased bus voltage in such a way that the instantaneous input
power (vbus iinv ) matches the output power.
The full-bridge inverter can be represented mathematically using
normalized equations to obtain a general expression independent
from the parameters of the converter. Based on the simplified
circuit in Fig. 2, this normalization is performed by using the peak
output voltage reference Vr
= Vop , the characteristic impedance
of the LC output filter Zo = L/C, and the natural frequency of
the filter fo = 1/To = 1/(2 LC) as base quantities for
vx
Vr

(1)

ix
Zo
Vr

(2)

vxn =
ixn =

tn = t fo

(3)

where vx and ix represent generic voltages and currents, t

represents time, and vxn , ixn , and tn represent their respective
normalized values. The behavior of the buck-derived inverter can
be represented by the following normalized differential equations:
diLn
= 2(vbusn u von )
dtn

(4)

dvon
= 2(iLn ion ).
dtn

(5)

The voltage applied to the inverter output filter can take two active
levels (Fig. 3(a) and (b)), vbus and vbus depending on the state
of the switches and the direction of the current. This is represented
in (4) by u = 1 and u = 1 for vbus and vbus respectively. A
short circuit or zero state can also be applied to the output filter
when u = 0 (Fig. 3(c)). vbusn is highlighted in the equations to
indicate this variable is the focus of the study. Based on (4) and
(5), a detailed derivation of the normalized natural trajectories of

the converter in the phase plane (x ), which are determined by

the evolution of the instantaneous values of the capacitor current
and voltage in this domain, is given in the Appendix. As well, the
switching surfaces (x ) that rule the behavior of the swinging bus
the inverter can be written as follows:
1 = 1 : i2Cn + (von vbusn )2 = i2Crn + (vrn vbusn )2 (6)
2 = 2 : i2Cn + (von )2 = i2Crn + (vrn )2
3 = 3 :

i2Cn

+ (von + vbusn ) =

i2Crn

(7)
2

+ (vrn + vbusn ) (8)

where iCn is the normalized output filter capacitor current, iCrn is

the normalized output filter capacitor current reference, von is the
normalized output voltage, vrn is the normalized output voltage
reference, and vbusn is the normalized dc-link voltage. Equations
(6) to (8) are simple circles that model the geometrical behavior
of the converter (natural trajectories in the phase plane). The
objective of the control strategy is to select the best combination
of natural trajectories to achieve the target. Note that the center of
the of the circle is located on vbusn u. Swinging bus operation
results in fluctuations of vbusn , and, therefore, has an impact
on the natural trajectories and on the geometrical location of the
proposed switching surfaces (6) and (8). The sinusoidal output
voltage reference of the inverter and the output capacitor current
reference (with normalized peak value equal to the normalized
line frequency fLn ) describe an elliptical target trajectory in the
normalized phase plane (red trace in Fig. 4). It is important to
note that the natural trajectories are valid for any possible inverter
regardless of the filter values L and C, output voltage reference,
and switching frequency. Note that the control laws x and the
natural trajectory x are interchangeable. The NSS control laws in
monopolar operation are formally defined by quadrant as:
Quadrant I:

if 2 > 0 then u = 0, else u = 1

Quadrant II:

if 3 > 0 then u = 1, else u = 0

Quadrant III:

if 2 > 0 then u = 0, else u = 1

Quadrant IV:

if 1 > 0 then u = 1, else u = 0.

Fig. 4 shows the conceptual evolution of the natural trajectories

of the inverter with varying dc-link voltage in monopolar operation.

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vcc
-

vcc

vo

vo
-

(a)
Fig. 3.

vo

(b)

(c)

Equivalent circuits for states (a) u = 1, (b) u = 1, and (c) u = 0.

i Cn
3

2
ta

-Vbusn

tg

vbusn

vbusn

tb

th

tc
tf

von

Vbusn

td
te

Fig. 4. Swinging bus operation using the natural SS (monopolar operation):

conceptual evolution of the natural trajectories with swinging dc bus.

The curves 1 , 2 ,and 3 depicted in Fig. 4 represent the evolution

of the switching surface as the discrete references (small circles
on the elliptical target trajectory) dynamically change (Just a few
points are considered to facilitate the visualization of the curves).
In each quadrant, there are two circular natural trajectories that
direct the operating point towards the outside of the elliptical
target trajectory (red trace) and one that brings the point inside
the reference trajectory again. Under the proposed scheme, the
switching surface that coincides with the latter natural trajectory is
chosen in each sector, guaranteeing that the output will not grow
unbounded. For example, in Quadrant I, the blue trace represents
the evolution of the operating point in the normalized state plane.
As can be seen, this trace moves according to the natural trajectory
1 (u = 1) until the corresponding switching surface 2 is
intersected and the structure of the inverter changes (u = 0).
At that moment, the operating point is forced to move along the
natural trajectory 2 , and since the perimeter of this circle matches
the target (small circles on the elliptical trajectory), the control
objective is accomplished. The references change dynamically in
discrete steps as well as the bus voltage, and the radius of the circle
2 is adjusted to match the new target (see (7)), and, therefore,
the operating point is maintained around the target at all times.
A similar analysis can be performed for the other sectors. For
Quadrants II and IV, in addition to the radius, the center of the
circles 1 and 3 respectively is adjusted as the bus voltage swings
(refer to (6) and (8)).
In addition to the monopolar operation, the NSS control laws
for bipolar mode (i.e., the zero state is not allowed) are defined by
quadrant as:
Quadrants I and II:
Quadrants III and IV:

if 3 > 0 then u = 1, else u = 1

if 1 > 0 then u = 1, else u = 1.

For the case of the swinging bus inverter, a mixed mode

operation will be considered, i.e., a combination of monopolar
and bipolar operation that merges the advantages of monopolar
mode (reduced voltage and current ripples in the output filter)
and bipolar mode (distortion elimination in the region of output
voltage zero-crossing, especially under heavy loading conditions).
When low-frequency ripple is considered in the dc-link instead of a
nearly constant bus (the main focus of this paper), the bus voltage
evolution (vbusn ) results in a dynamic evolution of the natural
trajectories. This is conceptually represented in Fig. 5 and can be
explained as follows:
The variations on the bus voltage happen in a periodic fashion
and reflect the current charge from the fuel cell and the pulsating
current discharge of the bus capacitor Cbus , which depends on
the nature of the inverter load. The current fed to the inverter
iinv is subtracted from the constant input current supplied by
the first power stage (dc-dc converter), which is equal to the
average inverter input current, yielding the bus capacitor current.
For illustrative purposes, the behavior of the system under linear
resistive load is analyzed. The phase-plane representation of the
dc-link capacitor Cbus is shown in Fig. 5(a), where the bus
capacitor current is filtered in order to eliminate the ripple at the
inverter switching frequency and to recover the fundamental. Five
distinctive points can be observed in the periodic behavior:
t1 represents the start of a cycle (where vbus is nominal).
t2 corresponds to the instant in which the inverter input
current equals the current injection into Cbus (maximum bus
voltage occurs).
t3 denotes the instant of negative peak current in the capacitor
at nominal bus voltage.
t4 corresponds to the instant in which the inverter input
current matches the current injection into Cbus (minimum
bus voltage).
t5 represents the end of the cycle and the start of a new one
(vbus is nominal).
These five distinctive points are mapped into Quadrants I and
IV of the inverter phase plane (normalized output voltage versus
normalized output capacitor current) depicted in Fig. 5(b) to gain
insight into the dynamic evolution of the NSS. The references
values at instants t1 to t5 are indicated in the elliptical target
trajectory as circles. In addition, the evolution of the bus voltage
(which corresponds to the center of the circular SS 1 (6)) is
indicated with t1 to t5 marked as dots on the horizontal axis. Hence,
the switching surfaces at the distinctive moments mentioned before
are obtained by evaluating (6) and (7) with the current bus voltage
and references values at the respective instants.
When the inverter is operated in Quadrant I, the behavior is
governed by 2 (7), which is a circle whose center is in 0 and is
independent of vbusn . Therefore, the fluctuations in the dc-link do
not affect the SS. For instance, the dc-link reaches its maximum
voltage at instant t2 . However, the SS that intersects the target
operating trajectory at that instant (2b ) remains unaltered with its

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i Cn

i C bus

2c
t1

2L

2b

t5
t1
Vbus

t4

t2

2a

t2

t1
t3
t5

t4

v bus

t3

t5

1c

t4

t3

vbusn

vbus

Po

1a

CbusL V bus
(a)

(b)

Swinging bus operation using the natural trajectories analysis: a) bus capacitor evolution and b) natural trajectories with swinging bus.

center in 0. It can be deduced that, during operation in Quadrant I,

the fluctuations in the bus voltage only affect the natural trajectories
for u = 1 (1 ). When the operating point crosses the boundary
2b , the control law makes the converter to change its structure
(u = 0) and the control objective is successfully accomplished
irrespective of the bus voltage. This interesting property (rejection
of any variations in the dc-link voltage) also applies to operation
in Quadrant III.
During operation in Quadrant IV, the behavior is reversed by
1 , which depends on the dc-link voltage vbusn . In this case, the
circumference that acts as SS (6) has its center in the normalized
bus voltage. The starting point for the analysis is the instant t3 ,
which corresponds to the boundary between Quadrants I and IV
(maximum output voltage and current). As shown in Fig. 5(b), the
bus voltage is nominal at t3 , and, therefore, the NSS control law at
this instant is exactly the same for both varying and constant dclink operation. Furthermore, since the synthesis of the crest of the
output voltage happens for nominal bus voltage, operation under
swinging bus does not affect the bus voltage availability during
that critical interval.
It can be concluded that the geometrical location of the NSS
control laws is not affected by the low-frequency ripple in the dclink either in Quadrant I or the boundary between Quadrants I
and IV. Now, the behavior of the NSS 1 at instant t4 should
be analyzed, which corresponds to minimum bus voltage. The
displacement of the center of the circumference (6) is consistent
with the reduction in vbusn , as depicted in Fig. 5(b). Although
the geometrical location of the SS for swinging bus operation
is different compared to the one under constant dc-link voltage,
and since the inverter switching frequency is higher than the
100Hz/120Hz component present in the bus, it can be considered
that the system operates in a fixed voltage fashion with a reduced
value. In this case, it is necessary to measure the dc-link voltage to
accurately compute the 1 and obtain all the benefits of the NSS
performance.
To summarize, between instants t3 and t4 , the dc-link voltage
experiences a progressive reduction until the minimum is achieved
at t4 . Thereafter, the bus voltage increases to reach its nominal

0.6

2
0.4

t2
0.2

iCn

Fig. 5.

von

Vbusn

1b

t2

vbusn

t3

t4 t3/t5 t2
0.2

t4
t5

0.4

1a

1
1b

0.6
0

0.5

von

1.5

Fig. 6. Swinging bus operation with 20% voltage variation: Quadrants I

and IV.

value at t5 , which corresponds to the intersection between Quadrants IV and III. A similar analysis can be performed in Quadrant
II, in which 3 rules the behavior of the converter. For simplicity
and clarity, the reactive current that circulates through the filter has
been neglected and will be explored in the following section.

III. DYNAMIC A NALYSIS AND S IMULATIONS

The dynamic analysis of the converter in a phase plane is first
presented, and then extended to the time domain to illustrate some
particular aspects that result from operation under the proposed
scheme. The effect of the filter reactive current on the bus voltage
is also discussed in this section.
A case example is employed for illustrative purposes with a
normalized line frequency fLn = 0.195, normalized switching
frequency fswn = 11.7, and normalized bus voltage Vbusn = 1.3

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1.5

1.5

1
0.5

0.5

0.5

1
1.5
16

vswn

von

0.5

1
18

20
22
time [ms]

24

1.5
26

Fig. 7. Swinging bus operation with 20% voltage variation: normalized

output voltage (von ) and normalized switching sequence applied to the LC
filter (vswn ).

1
1.4

1.3

i C busn

0.5
vbusn

(nominal), where fLn = 2fL /o and fswn = 2fsw /o . The

rest of the specifications are shown in Table II. Due to the constant
current injection from the first power stage (dc-dc converter), the
pulsating current fed to the inverter, and most importantly, the
value of the dc-link capacitor, vbusn presents voltage swings of
20% (peak-to-peak) for the analyzed example. Fig. 6 depicts the
behavior of the system in Quadrants I and IV under swinging
bus operation. The SS 2 is highlighted in Quadrant I for two
distinctive moments to indicate the instants in which the bus voltage
has its nominal value (t3 ) and when it reaches its maximum (t2 ). As
indicated before, 2 has its center in 0, and, hence, it is not affected
by the variations in the dc-link voltage. When Fig. 6 is compared
to the analysis performed on Fig. 5 in the previous section, a slight
shift in the instants of maximum and nominal dc-link voltage can
be observed due to the presence of the reactive current that flows
through the LC output filter. It can also be noticed in this figure that
the normalized peak capacitor current is fLn = 0.195. Therefore,
in order to minimize the aforementioned shifting effect, the reactive
current should be reduced, which can be accomplished by selecting
a higher natural frequency of the LC output filter.
The analysis is extended to Quadrant IV, where another two
SSs are shown. The first one (1a ) corresponds to the instant in
which the dc-link voltage is minimum (t4 ). The center of this circle
is located on the normalized bus voltage vbusn (green dot on
the horizontal axis). In this region of Quadrant IV, the inverter
is operating in monopolar mode and the behavior of the converter
under the proposed control scheme is as explained in Section II.
Following t4 , the dc-link voltage reverts again to its nominal value
after 7 switching cycles in the case example considered (t5 ). The
SS corresponding to this instant 1b has its center on vbusn (yellow
dot on the horizontal axis) and is located in the region of bipolar
operation. It is interesting to note that the NSS control law in
Quadrant IV is identical for monopolar and bipolar operation:

0.5
1.2

1 : i2Cn + (von vbusn )2 = i2Crn + (vrn vbusn )2 .

Therefore, in the mixed mode operation in Quadrant IV, the
only difference between monopolar and bipolar mode is that the
structure u = 0 is not allowed in the region of bipolar operation
and the structure u = 1 is enforced instead. As the bus voltage
increases, the system continues to operate with 1 as SS in bipolar
mode and transitions to Quadrant III.
So far, the analysis of the inverter under swinging bus operation
using the NSS control strategy has been performed in the phase
plane. While this representation provides valuable geometrical
insight into the behavior of the converter, more understanding
of the system can be obtained from the traditional time domain
representation.
The analysis of the behavior in the time domain is done using
the same case example that has been employed throughout this
section. The system presents a cyclic behavior in steady-state
operation, and, therefore, only one semicycle is examined in detail.
Fig. 7 presents the positive semicycle of the normalized output
voltage (von ) that is obtained using the proposed control strategy.
Furthermore, in the same figure, the detailed switching sequence
(vswn ) that is applied to the LC output filter to generate the
sinusoidal output voltage can be observed. As can be seen, the
amplitude of the PWM pulse train is also modulated as a result
of the low-frequency oscillations in the dc-link. As long as the
envelope of vswn is greater than the normalized output voltage
reference vrn , the inverter will be able to effectively synthesize the
output voltage. The ability of the NSS to successfully reject the

16

18

20
22
time [ms]

24

1
26

Fig. 8. Swinging bus operation with 20% voltage variation: effect of

the inverter switching frequency on normalized bus voltage (vbusn ) and
normalized bus capacitor current (iC busn ).

significant variations in the bus voltage and produce high-quality

sinusoidal synthesis is remarkable. Fig. 8 depicts the effect of the
inverter switching frequency on different waveforms of the system.
It shows a closer representation of the behavior the normalized bus
voltage (vbusn ) and the normalized bus capacitor current (iC busn ).
In both of them, in addition to the large low-frequency ripple,
some high-frequency components are present. In particular, this is
important in the case of the current since both components are to
be considered when estimating the lifetime of the bus capacitor
bank. The capacitor current is the difference between the constant
current supplied by the first power stage and the pulsating current
fed to the inverter. In steady-state operation, the average capacitor
current is zero to guarantee a constant average dc-link voltage.
The behavior of the bus during the negative semicycle presents
exactly the same waveforms shown Fig. 8. In the following section,
experimental validation of the proposed technique under swinging
bus is provided.

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P ROPOSED F ILM

DC - LINK WITH

Value
Rated voltage UR
Dimensions
Height
Total volume
Mass
ESR
RMS ripple current IRAC
Lifetime @ 85 C
Price (qty. 50) (2014)

TABLE I
20% RIPPLE VS E LECTROLYTIC

Film
7 100F (EZPE50107MTA)
450V
57.5mm 35mm
56mm
788,900mm3
7 139g = 973g
4.7m/7
18A
200,000hs
$19.67 each

CAPACITOR BANK WITH

1% RIPPLE

Electrolytic
4 1,500F (PEH200VO415AQB2)
400V
66.6mm
109.2mm
1,521,672mm3
4 415g = 1,660g
53m/4
9.1A
12,500hs
$56.39 each

TABLE II
D ESIGN S PECIFICATIONS

Vol.=788.9cm 3

Vol.=1,521.7cm 3

Fig. 9. Rendering of proposed Film dc-link vs Electrolytic capacitor bank

(Scale 1:5)

8.33ms

41V

v bus

220V

Value
vo = 120V

Vop = 120 2V
vbus = 220V 10%
Cbus = 700F
Po = 2.1kW
fL = 60Hz
fsw = 3.6kHz
C = 50F
L = 5.33mH

Norm. value
von = vo /Vop = 0.707
Vopn = Vop /Vop = 1
Vbusn = Vbus /Vop = 1.3

fLn = fL /fo = 0.195

fswn = fsw /fo = 11.7

TABLE III
T OTAL H ARMONIC D ISTORTION

i fc
i C bus

i inv

26A

Fig. 10. Swinging bus operation under linear loading condition: input
current if c (Ch1), bus capacitor current (Ch2), bus voltage (Ch3), and
current fed to the inverter (Ch4).

IV. E XPERIMENTAL R ESULTS

This section presents the experimental results of a 2.1kW inverter operating under swinging bus condition at fixed switching
frequency (3.6kHz). Although inverters usually work at higher
switching frequencies (around 20kHz), a moderate value was
chosen in order to facilitate the visualization of the results. The
evolution of the natural trajectories of the inverter on the state
plane is distinctly perceived at such a frequency. In order to

Po = 525W vbus
Po = 1050W vbus
Po = 1575W vbus
Po = 2100W vbus

= 5%Vbus
= 10%Vbus
= 15%Vbus
= 20%Vbus

NSS
1.0%
1.1%
1.4%
2.1%

Linear
2.4%
2.9%
3.5%
4.5%

verify the behavior of the proposed control scheme, the results are
contrasted to those obtained using a Proportional-Resonant (PR)
controller with an input voltage feedforward to compensate for
the fluctuations in the dc-link. The NSS control laws were implemented using a floating-point DSP, and the measured variables
were sampled at 216kHz (i.e., 60 times per switching period). In
order to avoid errors (e.g., dc offset in the output voltage), the
signal conditioning circuitry and the A/D conversion were precisely
calibrated. The digitized variables are normalized (refer to (1)
and (2)) and then plugged into the NSS equations ((6) to (8))
to determine the state of the switches in order to produce highquality sinusoidal synthesis while successfully rejecting the lowfrequency voltage oscillations in the dc-link. The DSP was also
employed for the generation of the discrete references vrn and

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TABLE IV
O UTPUT VOLTAGE VARIATION WITH LOAD

Full load %
0%
25%
50%
75%
100%

vo
120.6V
120.3V
120.0V
119.8V
119.1V

Regulation %
0.50%
0.25%
0.00%
0.17%
0.75%

iCrn . The experimental validations were carried out under heavy

loading condition and the dc-link capacitor (700F ) was selected
to produce a 20% voltage swing (peak-to-peak) with constant
power injection from the first power stage. It is important to note
that if the bus is allowed to swing, capacitors of higher voltage
ratings will be required. The capacitance of the dc-link can be
realized using different technologies, namely electrolytic and film.
Table I presents a comparison between the proposed film capacitor
dc-link and an electrolytic capacitor bank that would produce 1%
voltage ripple. A state-of-the-art electrolytic capacitor has been
selected in order to provide a fair comparison. As can be concluded,
the film alternative is superior in every aspect, providing a longlasting, smaller, lighter, more efficient, and cheaper solution as
storage elements for the proposed fuel cell application. Moreover,
a render is presented in Fig. 9 to provide a graphical contrast of
the proposed film capacitor bank against the electrolytic capacitor
bank, in which it can be easily observed that the latter is almost
twice as large as the former (1,521.7cm3 vs 778.9cm3 ). Therefore,
a control strategy for inverters like the NSS that can handle large
low-frequency oscillations in the dc-link is suitable for long-lasting
film-based systems. The design specifications for the inverter are
shown in Table II with their equivalent normalized quantities. For
comparative purposes, these values are the same as the ones used
in the simulations in the previous section.
First, the low-frequency voltage fluctuations of the dc-link for
resistive full-load operation (2.1kW) are analyzed and depicted in
Fig. 10. As can be observed, the dc-link voltage has a 120Hz
oscillation, i.e., twice the output frequency of the inverter. This
figure also illustrates the current supplied to the inverter iinv ,
whose envelope is approximately a rectified version of the inverter
output current, and the dc-link capacitor current iC bus , which is
the difference between the constant current injected from the first
power stage (dc-dc converter) and the current fed to the inverter.
For both currents, the ripple at the inverter switching frequency can
be seen. In order to further illustrate the implications of maintaining
the dc-link at a constant value, Fig. 11 is provided. It is interesting
to note that the efficiency of the inverter slightly decreases when
considering swinging bus operation (a drop of less than 0.4%
compared to the nearly constant bus case). However, it should
be taken into account that operation with constant dc-link would
reflect the large double-frequency oscillations into the fuel cell, as
can be seen in Fig. 11, resulting in a significant reduction in power
delivery, the efficiency of the total system and the shortening of
lifetime.
Fig. 12 illustrates the effect of the swinging bus on the modulation of the pulses. As can be observed, the envelope of the
switching sequence reflects the low-frequency variations of the
dc-link voltage, resulting in a combined amplitude and PWM
modulation of the pulses. An important remark: as can be seen

v bus

220V

i fc
i C bus
i inv

26A

Fig. 11. Nearly constant bus operation under linear loading condition:
input current if c (Ch1), bus capacitor current (Ch2), bus voltage (Ch3),
and current fed to the inverter (Ch4).

v bus

41V

220V

vsw

Fig. 12. Effect of the swinging bus on the pulse modulation: switch state
(Ch2), and bus voltage (Ch3).

in (6) to (8), the control laws consider the normalized capacitor

current iCn as a variable. This current is the difference between
the normalized inductor current iLn and the normalized output
current ion , i.e., the loading condition is implicit in these equations.
However, iCn is proportional to the derivative of the normalized
output voltage von , and thus its shape and amplitude are independent from the load. Therefore, the proposed control strategy
is able to successfully generate low-distortion sinusoidal output
voltage, even for loads with capacitive, inductive, or non-linear
characteristics. As predicted by the theory, the proposed control
scheme was able to accommodate the swinging bus effect and
successfully synthesize high-quality output voltage (< 2.1% THD)
under linear resistive load (Fig. 13) and non-linear high-crest-factor
(CF = 2.3) loading condition (Fig. 14). In order to provide further
insight into the geometrical evolution of the trajectories of the
inverter, the experimental phase-planes for the loading conditions
outlined above are presented in Fig. 15 and Fig. 16. The monopolar
and bipolar operating regions can be easily identified in these
figures, as well as the elliptical target trajectory defined by the
sinusoidal output voltage and capacitor current references.
The dynamic response of the system was tested under a severe
drop in the dc-link voltage, as depicted in Fig. 17. The bus voltage
experiences a progressive reduction from 240V (maximum peak
value) to 160V (minimum bus voltage). Despite this demanding transient under full loading condition, the NSS was able to
compensate for the voltage drop and continued to supply the
load highlighting the input voltage flexibility of the swinging bus

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vo

339.4V

vsw

io

50A

Fig. 13. Swinging bus inverter operation under heavy resistive loading
condition (time domain): output voltage (Ch1), switch state (Ch2), and
output current (Ch4).

16.66ms

vo

Fig. 15. Swinging bus inverter operation under heavy resistive loading
condition (phase plane): output voltage (X-axis) and output capacitor
current (Y-axis).

vsw
io

18A

Fig. 14. Swinging bus inverter operation under high-crest-factor loading

condition (CF = 2.3) (time domain): output voltage (Ch1), switch state
(Ch2), and output current (Ch4).

inverter controlled with the NSS. In a traditional stiff bus inverter,

the crest of the output voltage would be saturated if the dc-link
voltage is less than 170V . However, in the swinging bus inverter,
a close examination of the waveforms shows that the bus voltage is
175V when the crest of the sinusoid happens. Therefore, although
the average value of the bus voltage after the voltage drop in Fig.
17 is 180V with a 10% ripple (i.e., the minimum dc-link voltage
is approximately 160V , which is less than the peak of the output
voltage), the envelope of the switching sequence is still greater than
the peak of the reference output voltage at all times, and the NSS
is able to successfully synthesize the sinusoidal waveform without
saturating it.
The behavior of the inverter operating under resistive load was
evaluated both for the linear controller and the NSS, and the
distortion results for different loading conditions are reported in
Table III. A considerable improvement in the THD is obtained
when the proposed technique is employed, especially for heavy
loads (2.1% for the NSS against 4.5% using the PR+FF controller)
for which the fluctuations of the bus increase significantly and
the linear compensator cannot handle them effectively. Unlike
the linear controller, the NSS scheme is able to synthesize highquality output voltage for a wide range of input voltages and
loading conditions. An important remark is that although a THD
of 4.5% is less than the 5% acceptable distortion according to
IEEE standards, it is close to the limit. Some factors like aging,
temperature, some non-linear loads, etc., could make the THD to
increase, surpassing the maximum allowed. The proposed control

Fig. 16. Swinging bus inverter operation under high-crest-factor loading

condition (CF = 2.3) (phase plane): output voltage (X-axis) and output
capacitor current (Y-axis).

technique provides a 2.1% THD, less than half the one obtained
with the linear controller. Therefore, it can be almost guaranteed
that the distortion will be below 5% for any operating condition.
Furthermore, the LC output filter could be designed using smaller
components and still comply with the standards, giving the NSS
an important competitive advantage. The dynamic response of the
system was also benchmarked against the linear controller as shown
in the loading transients in Fig. 18 and Fig. 19. While the PR+FF
controller produces sags and swells after the step-up and step-down
disturbances respectively, the NSS achieves steady state almost
instantaneously and the transients are imperceptible, demonstrating
the remarkable ability of the NSS to revert to the new operating

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10

vo

vo
220V

v bus
io

180V

41V

v sw
io
25A
50A

Fig. 17. Swinging bus inverter operation using the natural SS: output
voltage (Ch1), bus voltage transient (Ch2), and output current (Ch4) under
heavy loading condition.

vo

v sw
io
25A
50A
Fig. 18. Swinging bus inverter operation using the natural SS: output
voltage (Ch1), switch state (Ch2), and output current transient (Ch4).

Fig. 19. Swinging bus inverter operation using a linear controller: output
voltage (Ch1), switch state (Ch2), and output current step-down transient
(Ch4).

cell inverters. The behaviors of the swinging bus and the inverter in
this operating mode were characterized in a normalized geometrical
domain, and based on this analysis, a solution in the form of
boundary control was proposed: the natural switching surface. This
study provided significant insight into the switching sequences and
natural trajectories of the inverter while taking into account the bus
fluctuations. As predicted by the theory and unlike traditional linear
controllers, the NSS was able to comply with stringent standards
for transient and steady-state performance and compensate for the
low-frequency ripple in the dc-link while successfully synthesizing
high-quality sinusoidal output voltage (< 2.1% THD) even at
moderate switching frequencies.

ACKNOWLEDGMENT
condition in a few switching cycles.
The load regulation is presented in Table IV. The NSS is able
to maintain its value well below 0.75%, even for a demanding
operating condition such as full-load operation (2.1kW). Finally,
in order to test the robustness of the proposed technique, some
simulations were carried out and the THD of the output voltage
was calculated for different scenarios. The objective was to test the
sensitivity of the NSS to the mismatch between the converter model
and the actual parameters of the converter. These discrepancies
could be due to temperature or aging. The actual component values
were modified above and below the nominal ones (20%). As a
result, the switching surfaces are slightly modified such that the
circles 1 to 3 turn into ellipses. Nevertheless, the THD values
obtained are, in the worst case scenario, 0.4% higher compared to
the ideal-components scenario. Another case was also evaluated,
in which the values of the current and voltage measurements are
affected by a scaling factor (20%), resulting in THD values at
most 0.2% higher compared to the ideal case.

V. C ONCLUSIONS
This manuscript introduced an effective control scheme for
inverters to deal with low-frequency voltage variations in the dclink. In order to eliminate the detrimental effect of the current ripple
into the fuel cell, the bus voltage is allowed to swing to absorb the
pulsating current fed to the inverter and avoid propagation into the
source. Moreover, the reliability of the system can be enhanced by
replacing electrolytic capacitors with small-value film capacitors
and allowing larger fluctuations in the bus. Swinging bus operation
has proven to be a challenge and a necessary requirement for fuel

The authors would like to thank Mr. Peter Ksiazek for his
assistance in the execution of the experimental work and Dr. Rafael
Pena Alzola for the comments provided.

APPENDIX
A. N ORMALIZED D ERIVATION
By combining (4) and (5), a second order differential equation
is obtained whose solution is:
iLn = [iLn (0) ion ] cos(2tn )
+ [vbusn u von (0)] sin(2tn ) + ion .

(A-1)

By using the following trigonometric identity

[
( )]

A
A cos x + B sin x = A2 + B 2 sin x + tan1
B
the normalized inductor current can be arranged as

iLn = (iLn (0) ion )2 + (vbusn u von (0))2

[
(
)]
iLn (0) ion
sin 2tn + arctan
+ ion .
vbusn u von (0)

(A-2)

By isolating the argument of the trigonometric function and

replacing it on the derivative of (A-2),
the normalized time tn
is eliminated using cos[sin1 (x)] = 1 x2 , yielding the normalized natural trajectories of the inverter
i : i2Cn + (von vbusn u)2
= iCn (0)2 + (von (0) vbusn u)2 .

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(A-3)

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11

Finally, the initial conditions for steady state operation are

iCn (0) = iCrn

(A-4)

von (0) = vrn

(A-5)

Replacing these values in (A-3) results in the NSS switching

surfaces (6) to (8).

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12

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