CHIN. PHYS. LETT. Vol. 29, No.

12 (2012) 127301

Analysis of Off-State Leakage Current Characteristics and Mechanisms of

Nanoscale MOSFETs with a High- Gate Dielectric *
LIU Hong-Xia(), MA Fei()**
Key Laboratory of Wide Bandgap Semiconductor Materials and Devices of Ministry of Education,
Xidian University, Xian 710071

(Received 8 June 2012)

The off-state leakage current characteristics of nanoscale channel metal-oxide-semiconductor field-effect transistors
with a high- gate dielectric are thoroughly investigated. The off-state leakage current can be divided into
three components: the gate leakage current, the source leakage current, and the substrate leakage current. The
influences of the fringing-induced barrier lowering effect and the drain-induced barrier lowering effect on each
component are investigated separately. For nanoscale devices with high- gates, the source leakage current
becomes the major component of the off-state leakage current.

PACS: 73.40.Qv, 73.61.Ng, 73.22.F

DOI: 10.1088/0256-307X/29/12/127301

When the size of a channel metal-oxidesemiconductor field-effect transistor (MOSFET) is decreased to sub-65 nm, the direct tunneling current
of the gate increases dramatically, and becomes a
main limiting factor in complementary metal-oxidesemiconductor (CMOS) technology.[1] Using high dielectric permittivity (high-) materials to replace the
conventional SiO2 as the gate dielectric has been
widely adopted.[24] However, a parasitic effect called
the fringing-induced barrier lowering (FIBL) effect is
introduced when high- materials are used as the gate
dielectric.[5] Some studies have been made on sub100 nm MOSFETs with a high- gate dielectric, and
it was found that the FIBL effect causes the off-state
characteristics of devices to degrade greatly.[610]
Meanwhile the drain-induced barrier lowering (DIBL)
effect caused by the drain voltage makes the shortchannel effect (SCE) more obvious.[11] In these papers,
the drain off-state leakage current d,leak is used to
characterize the degradation of devices with a high gate dielectric. However, the drain off-state leakage current is not only composed by only one component. Sometimes, using d,leak to characterize the offstate leakage current characteristics of MOSFETs is
difficult to explain the change trends of the total offstate leakage current. Research has been conducted
to understand the composition of off-state leakage
current.[12,13] Yang et al.[13] studied different components of the off-state leakage current and proposed
that edge direct tunneling current dominates the offstate leakage current and high- materials can reduce
it dramatically. However, the characteristics of the offstate leakage current of high- devices are not further
analyzed and off-state leakage current components in
high- devices are still unclear. In this Letter, the

effects of FIBL and DIBL on off-state leakage current components are investigated. The contributions
of each component to the total leakage current are discussed. Compared with using the total off-state leakage current to characterize the SCE of the high- device, the proposed method can help us to understand
the effects of a high- gate dielectric on the off-state
characteristics of MOSFETs.
A schematic cross-sectional view of an n-type
MOSFET with a lightly doped drain (LDD) structure is shown in Fig. 1. A spacer technology with a
heavily doped source and drain extension is used. The
equivalent oxide thickness is 1 nm. The substrate doping concentration is 4 1018 cm3 , the source/drain
extensions and deep source/drain doping concentrations are 1 1019 cm3 and 1 1020 cm3 , respectively. The device simulations are carried out by using
two-dimensional device simulator ISE-TCAD. Poissons equation and the carrier continuity equation are
solved using the hydrodynamic model considering the
carrier temperature and density gradients effect. In
order to study the off-state characteristics of the device, the source contact, the substrate contact, and
the gate contact are connected to the ground. A metal
material with work function = 4.77 eV is used as
the gate electrode to isolate the influences of polysilicon depletion on the device characteristics.
Figure 2 shows the dependences of off-state leakage current on the gate dielectric permittivity . d
is drain voltage bias. When d = 0.05 V, d,leak gradually increases with increasing . For the same EOT,
the physical thickness of the gate dielectric increases
with gate dielectric permittivity increasing, which will
cause the FIBL effect. It makes the electric lines originating from the bottom of the gate electrode and

* Supported by the National Natural Science Foundation of China under Grant Nos 60976068, 61076097 and 60936005, and the
Fundamental Research Funds for the Central Universities (No 20110203110012).
** Corresponding author. Email: flyinghorse-100@163.com
2012 Chinese Physical Society and IOP Publishing Ltd

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CHIN. PHYS. LETT. Vol. 29, No. 12 (2012) 127301

terminating on the source and drain region increase.

These electric lines form an electrical field originating
at the drain that penetrates into the channel through
the high- dielectric and suppresses the barrier height
from the source to the channel, thereby causing lower
threshold voltage, and increasing off-state current.[14]
The change trends of d,leak are consistent with the
previous studies. However, when d = 1.0 V, the
change of d,leak is different. The d,leak decreases
firstly and then increases with increasing .
Gate

Source

40 nm

1nm
15 nm

Drain

n-

32 nm

n+

effect on the band bending of the channel barrier.[15]

With the increase of drain voltage, the depletion width
increases, channel barrier height is decreased, and a
large d,leak is obtained. This effect of drain voltage
is referred to as the DIBL effect. For the given drain
voltage (d < 1.5 V), the d,leak increases with increasing , which is the result of the combination of the
FIBL effect and the DIBL effect. However, with the
continued increase of d , the influences of on the
d,leak become smaller and smaller, especially for a
higher drain voltage (d > 2 V). The off-state leakage
currents of MOSFETs with different gate dielectrics
are consistent with each other.

n-

Sub (p-)
n+

15

9
6
3

40

60

80

Gate dielectric permittivity

Off-state current

d, leak

(A/mm)

Fig. 2. Dependences of off-state leakage current on the

gate dielectric permittivity.

g, leak

=32 nm
EOT=1 nm
=0 V, d=1.0 V
g

s, leak
b leak
,

d, eak

10

15

20

25

Gate dielectric permittivity

Fig. 5. Dependences of off-state leakage current components on gate dielectric permittivity.

10-6
=3.9
=25
=80

10-7
10-8
10-9
0.0

n+

I3

I5

=32 nm
EOT=1 nm
g=0 V

20

I2
I4

Fig. 4. Off-state leakage current components.

Vd=0.05 V
Vd=1.0 V

0
0

I1
n-

P-sub

Off-state current components

Off-state current

d, leak

(nA/mm)

Fig. 1. Schematic cross-section of an n-type MOSFET

with the LDD structure.

12

Vd

n+

30 nm

=32 nm
EOT=1 nm
g=0 V

0.5

1.0

1.5

2.0

Drain voltage bias

2.5

(V)

3.0

Fig. 3. Dependences of off-state leakage current on drain

voltage bias.

Figure 3 shows the dependences of off-state leakage current on drain voltage bias. d,leak gradually
increases with increasing d . This is mainly because
for the short channel device, the source and drain depletion width in the vertical direction have a strong

From Figs. 2 and 3, we can find two kinds of interesting phenomena, which are not mentioned in the
previous studies. (1) When d is fixed at a high voltage (d = 1.0 V), the off-state leakage current d,leak
decreases firstly and then increases with increasing .
(2) The impacts of can be ignored, and the d,leak
becomes the same when d increases to a higher voltage (d > 2 V).
Figure 4 shows the n-type MOSFET structural
diagram. The device is in off-state, and the gate,
the source and the substrate are grounded. The total off-state leakage current includes five components:
(1) edge direct tunneling leakage current 1 , (2) surface sub-threshold leakage current 2 , (3) gate-induced
drain leakage current 3 , (4) bulk punch-through current 4 , (5) pn junction reverse bias leakage current
5 , as shown in Fig. 4.[12]
When the device is in off-state, the FIBL effect

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CHIN. PHYS. LETT. Vol. 29, No. 12 (2012) 127301

and DIBL effect drive the leakage components in different forms and in different regions. With the d
and change, the impacts on the off-state leakage
current components are not the same. For the convenience of research, the off-state leakage current is divided into three parts: the gate leakage current g,leak
(1 ), source leakage current s,leak (2 + 4 ) and bulk
leakage current b,leak (3 + 5 ), thus
d,leak = g,leak + s,leak + b,leak .

Id leak
,

=32 nm
EOT=1 nm
g=0 V
=25 (HfO2)

10-17
,

Ig leak

Off-state current components

Ig leak
Is leak
Ib leak

0.5

1.0

10-18
10-19
0

2.0

2.5

3.0

Drain voltage bias Vd (V)

1.5

Drain voltage bias Vd (V)

100

(1)

Fig. 6. Dependences of off-state leakage current components on drain voltage bias.

Figure 6 shows the dependences of off-state leakage

current components on drain voltage bias. For the device with a high- gate dielectric ( = 25), compared
to a very small gate leakage (1017 A/m), the effects of the drain voltage can be ignored. Based on

s leak
,

80

Ratio (%)

Figure 5 shows the dependences of off-state leakage

current components on the gate dielectric permittivity. For a given , the height of the shaded region represents the value of the leakage current. The impact of
the FIBL effect on the off-state leakage current and its
components are reflected in the changes of the shaded
area. It can be seen that g,leak decreases rapidly
with increasing . When the gate dielectric permittivity changes from =3.9 (SiO2 ) to =9 (Al2 O3 ), the
g,leak reduces to be negligible. The s,leak has the opposite tendency with the g,leak , the s,leak increases
with increasing . Compared to the s,leak and g,leak
by a great influence on , the b,leak is almost independent of , and its corresponding shadow area is almost
unchanged. With increasing , the g,leak and s,leak
have the opposite tendency. The decreased amount of
g,leak is greater than that of s,leak , which makes the
total off-state leakage current decrease. With the continued increase of the s,leak , the proportion of g,leak
in total off-state leakage current becomes smaller. The
changes make the off-state leakage current increase
with increasing . It also explains why the off-state
leakage current firstly decreases and then increases for
d = 1.0 V, as shown in Fig. 2.

10-6
10-7
10-8
10-9
10-10
10-11
10-12
10-13
10-14
10-150.0

so small g,leak , the off-state leakage current can be

seen to be composed of two parts, the s,leak and the
b,leak . Integrating the different effects of d and on
the s,leak and b,leak , it is easy to explain the tendency
of off-state leakage current in Fig. 3, which is caused
by both s,leak and b,leak .

60

b leak
,

=32 nm
EOT=1 nm
=0 V
g

=3.9
=25
=80

40

20

g_leak

0
0.0

0.5

1.0

1.5

Drain voltage bias

2.0
d

2.5

3.0

(V)

Fig. 7. Dependences of the ratio of off-state leakage current components to total leakage current on drain voltage
bias.

Figure 7 shows the dependences of the ratio of

off-state leakage current components to total leakage
current on drain voltage bias. From the previous results, it can be seen that each off-state leakage current
component increases with increasing d . The rate of
the increase of b,leak is most obvious, which leads to
the ratios of g,leak and s,leak in total leakage current decrease gradually. The proportion of b,leak increases gradually. When the d increases to 2 V or
more, b,leak becomes the major component of the offstate leakage current. For the practical application of
nanoscale MOSFET devices, the supply voltage of operation is generally lower than 1 V (voltage scaling to
ensure total active power consumption not to exceed
heat removal rate[16] ), which corresponds to the left
region of the dashed line in Fig. 7. In this region, we
can see that the s,leak is the main component of the
total leakage current, especially for the device with a
high- gate dielectric (=25), the proportion of is
over 90%.
The preceding analysis showed that the s,leak
(2 + 4 ) is mainly composed of surface sub-threshold
leakage current and bulk punch through current. The
punch-through means that the device can not work
properly. In this work, the LDD structure can greatly
suppress the punch-through,[17] and the off-state characteristics are studied in a safe operating region, the
influences of bulk punch-through current can be ignored. Therefore, the surface sub-threshold leakage
current becomes a major component of the source
leakage current, which is also a major component of
the total leakage current.
For the n-type MOSFET, even though the gate
electrode is grounded, the channel surface is still in

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CHIN. PHYS. LETT. Vol. 29, No. 12 (2012) 127301

the weak inversion state. A small number of minority

carriers are the main factor causing the surface subthreshold leakage current,[18] as seen in the equation
log(s,leak ) = log(sL,leak ) +

|th |
,
2.3T

(2)

where =1+dm /ox ; dm and ox are the channel

depletion layer capacitance and the gate capacitance,
respectively; T = /, th is the threshold voltage
roll-off. sL,leak is the sub-threshold leakage current of
the long channel device, it increases with the d increasing. When the d > 3T (0.078 V), the sL,leak
almost is independent of the d , the s,leak is limited
only by the influences of the th . The threshold
voltage th is mainly determined by the channel potential barrier between the source and drain. For a
long-channel device, the barrier height is mainly controlled by the gate voltage g and is not sensitive to
d . However, when a high d is applied to the shortchannel device, it lowers the barrier height and causes
further decrease of the th , which increases the subthreshold leakage current. This effect is referred to as
the DIBL effect. In addition, when high- materials
are used as the gate dielectric to reduce the gate leakage current, the FIBL effect is introduced. It degrades
the control of gate to channel, suppresses the barrier
height, lowers th and increases sub-threshold leakage
current. For a nanoscale MOSFET with a high- gate
dielectric, the FIBL and DIBL effects usually work together on the device, and degrade the short channel
characteristics by increasing the sub-threshold leakage
current.
In summary, the off-state leakage current characteristics of nanoscale MOSFETs with a high- gate dielectric are investigated. We divide the off-state leakage current into three components, and the contribution of each component on the total leakage current is
investigated. The results show that the source leakage
current becomes a major component of the total leakage current. The FIBL and DIBL effects depredate
the off-state characteristics of nanoscale devices with

high- gate dielectrics by reducing the threshold voltage and increasing the sub-threshold leakage current.
Therefore, how to suppress the DIBL and FIBL effects
is the key to improving the off-state characteristics of
nanoscale MOSFET devices, which provides a reference for off-state power management of the device.

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